setup-r8a7779.c 10 KB

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  1. /*
  2. * r8a7779 processor support
  3. *
  4. * Copyright (C) 2011 Renesas Solutions Corp.
  5. * Copyright (C) 2011 Magnus Damm
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/irq.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/delay.h>
  27. #include <linux/input.h>
  28. #include <linux/io.h>
  29. #include <linux/serial_sci.h>
  30. #include <linux/sh_intc.h>
  31. #include <linux/sh_timer.h>
  32. #include <linux/dma-mapping.h>
  33. #include <mach/hardware.h>
  34. #include <mach/irqs.h>
  35. #include <mach/r8a7779.h>
  36. #include <mach/common.h>
  37. #include <asm/mach-types.h>
  38. #include <asm/mach/arch.h>
  39. #include <asm/mach/time.h>
  40. #include <asm/mach/map.h>
  41. #include <asm/hardware/cache-l2x0.h>
  42. static struct map_desc r8a7779_io_desc[] __initdata = {
  43. /* 2M entity map for 0xf0000000 (MPCORE) */
  44. {
  45. .virtual = 0xf0000000,
  46. .pfn = __phys_to_pfn(0xf0000000),
  47. .length = SZ_2M,
  48. .type = MT_DEVICE_NONSHARED
  49. },
  50. /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
  51. {
  52. .virtual = 0xfe000000,
  53. .pfn = __phys_to_pfn(0xfe000000),
  54. .length = SZ_16M,
  55. .type = MT_DEVICE_NONSHARED
  56. },
  57. };
  58. void __init r8a7779_map_io(void)
  59. {
  60. iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
  61. }
  62. static struct resource r8a7779_pfc_resources[] = {
  63. [0] = {
  64. .start = 0xfffc0000,
  65. .end = 0xfffc023b,
  66. .flags = IORESOURCE_MEM,
  67. },
  68. [1] = {
  69. .start = 0xffc40000,
  70. .end = 0xffc46fff,
  71. .flags = IORESOURCE_MEM,
  72. }
  73. };
  74. static struct platform_device r8a7779_pfc_device = {
  75. .name = "pfc-r8a7779",
  76. .id = -1,
  77. .resource = r8a7779_pfc_resources,
  78. .num_resources = ARRAY_SIZE(r8a7779_pfc_resources),
  79. };
  80. void __init r8a7779_pinmux_init(void)
  81. {
  82. platform_device_register(&r8a7779_pfc_device);
  83. }
  84. static struct plat_sci_port scif0_platform_data = {
  85. .mapbase = 0xffe40000,
  86. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  87. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  88. .scbrr_algo_id = SCBRR_ALGO_2,
  89. .type = PORT_SCIF,
  90. .irqs = SCIx_IRQ_MUXED(gic_iid(0x78)),
  91. };
  92. static struct platform_device scif0_device = {
  93. .name = "sh-sci",
  94. .id = 0,
  95. .dev = {
  96. .platform_data = &scif0_platform_data,
  97. },
  98. };
  99. static struct plat_sci_port scif1_platform_data = {
  100. .mapbase = 0xffe41000,
  101. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  102. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  103. .scbrr_algo_id = SCBRR_ALGO_2,
  104. .type = PORT_SCIF,
  105. .irqs = SCIx_IRQ_MUXED(gic_iid(0x79)),
  106. };
  107. static struct platform_device scif1_device = {
  108. .name = "sh-sci",
  109. .id = 1,
  110. .dev = {
  111. .platform_data = &scif1_platform_data,
  112. },
  113. };
  114. static struct plat_sci_port scif2_platform_data = {
  115. .mapbase = 0xffe42000,
  116. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  117. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  118. .scbrr_algo_id = SCBRR_ALGO_2,
  119. .type = PORT_SCIF,
  120. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7a)),
  121. };
  122. static struct platform_device scif2_device = {
  123. .name = "sh-sci",
  124. .id = 2,
  125. .dev = {
  126. .platform_data = &scif2_platform_data,
  127. },
  128. };
  129. static struct plat_sci_port scif3_platform_data = {
  130. .mapbase = 0xffe43000,
  131. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  132. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  133. .scbrr_algo_id = SCBRR_ALGO_2,
  134. .type = PORT_SCIF,
  135. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7b)),
  136. };
  137. static struct platform_device scif3_device = {
  138. .name = "sh-sci",
  139. .id = 3,
  140. .dev = {
  141. .platform_data = &scif3_platform_data,
  142. },
  143. };
  144. static struct plat_sci_port scif4_platform_data = {
  145. .mapbase = 0xffe44000,
  146. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  147. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  148. .scbrr_algo_id = SCBRR_ALGO_2,
  149. .type = PORT_SCIF,
  150. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7c)),
  151. };
  152. static struct platform_device scif4_device = {
  153. .name = "sh-sci",
  154. .id = 4,
  155. .dev = {
  156. .platform_data = &scif4_platform_data,
  157. },
  158. };
  159. static struct plat_sci_port scif5_platform_data = {
  160. .mapbase = 0xffe45000,
  161. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  162. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  163. .scbrr_algo_id = SCBRR_ALGO_2,
  164. .type = PORT_SCIF,
  165. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7d)),
  166. };
  167. static struct platform_device scif5_device = {
  168. .name = "sh-sci",
  169. .id = 5,
  170. .dev = {
  171. .platform_data = &scif5_platform_data,
  172. },
  173. };
  174. /* TMU */
  175. static struct sh_timer_config tmu00_platform_data = {
  176. .name = "TMU00",
  177. .channel_offset = 0x4,
  178. .timer_bit = 0,
  179. .clockevent_rating = 200,
  180. };
  181. static struct resource tmu00_resources[] = {
  182. [0] = {
  183. .name = "TMU00",
  184. .start = 0xffd80008,
  185. .end = 0xffd80013,
  186. .flags = IORESOURCE_MEM,
  187. },
  188. [1] = {
  189. .start = gic_iid(0x40),
  190. .flags = IORESOURCE_IRQ,
  191. },
  192. };
  193. static struct platform_device tmu00_device = {
  194. .name = "sh_tmu",
  195. .id = 0,
  196. .dev = {
  197. .platform_data = &tmu00_platform_data,
  198. },
  199. .resource = tmu00_resources,
  200. .num_resources = ARRAY_SIZE(tmu00_resources),
  201. };
  202. static struct sh_timer_config tmu01_platform_data = {
  203. .name = "TMU01",
  204. .channel_offset = 0x10,
  205. .timer_bit = 1,
  206. .clocksource_rating = 200,
  207. };
  208. static struct resource tmu01_resources[] = {
  209. [0] = {
  210. .name = "TMU01",
  211. .start = 0xffd80014,
  212. .end = 0xffd8001f,
  213. .flags = IORESOURCE_MEM,
  214. },
  215. [1] = {
  216. .start = gic_iid(0x41),
  217. .flags = IORESOURCE_IRQ,
  218. },
  219. };
  220. static struct platform_device tmu01_device = {
  221. .name = "sh_tmu",
  222. .id = 1,
  223. .dev = {
  224. .platform_data = &tmu01_platform_data,
  225. },
  226. .resource = tmu01_resources,
  227. .num_resources = ARRAY_SIZE(tmu01_resources),
  228. };
  229. /* I2C */
  230. static struct resource rcar_i2c0_res[] = {
  231. {
  232. .start = 0xffc70000,
  233. .end = 0xffc70fff,
  234. .flags = IORESOURCE_MEM,
  235. }, {
  236. .start = gic_iid(0x6f),
  237. .flags = IORESOURCE_IRQ,
  238. },
  239. };
  240. static struct platform_device i2c0_device = {
  241. .name = "i2c-rcar",
  242. .id = 0,
  243. .resource = rcar_i2c0_res,
  244. .num_resources = ARRAY_SIZE(rcar_i2c0_res),
  245. };
  246. static struct resource rcar_i2c1_res[] = {
  247. {
  248. .start = 0xffc71000,
  249. .end = 0xffc71fff,
  250. .flags = IORESOURCE_MEM,
  251. }, {
  252. .start = gic_iid(0x72),
  253. .flags = IORESOURCE_IRQ,
  254. },
  255. };
  256. static struct platform_device i2c1_device = {
  257. .name = "i2c-rcar",
  258. .id = 1,
  259. .resource = rcar_i2c1_res,
  260. .num_resources = ARRAY_SIZE(rcar_i2c1_res),
  261. };
  262. static struct resource rcar_i2c2_res[] = {
  263. {
  264. .start = 0xffc72000,
  265. .end = 0xffc72fff,
  266. .flags = IORESOURCE_MEM,
  267. }, {
  268. .start = gic_iid(0x70),
  269. .flags = IORESOURCE_IRQ,
  270. },
  271. };
  272. static struct platform_device i2c2_device = {
  273. .name = "i2c-rcar",
  274. .id = 2,
  275. .resource = rcar_i2c2_res,
  276. .num_resources = ARRAY_SIZE(rcar_i2c2_res),
  277. };
  278. static struct resource rcar_i2c3_res[] = {
  279. {
  280. .start = 0xffc73000,
  281. .end = 0xffc73fff,
  282. .flags = IORESOURCE_MEM,
  283. }, {
  284. .start = gic_iid(0x71),
  285. .flags = IORESOURCE_IRQ,
  286. },
  287. };
  288. static struct platform_device i2c3_device = {
  289. .name = "i2c-rcar",
  290. .id = 3,
  291. .resource = rcar_i2c3_res,
  292. .num_resources = ARRAY_SIZE(rcar_i2c3_res),
  293. };
  294. static struct resource sata_resources[] = {
  295. [0] = {
  296. .name = "rcar-sata",
  297. .start = 0xfc600000,
  298. .end = 0xfc601fff,
  299. .flags = IORESOURCE_MEM,
  300. },
  301. [1] = {
  302. .start = gic_iid(0x84),
  303. .flags = IORESOURCE_IRQ,
  304. },
  305. };
  306. static struct platform_device sata_device = {
  307. .name = "sata_rcar",
  308. .id = -1,
  309. .resource = sata_resources,
  310. .num_resources = ARRAY_SIZE(sata_resources),
  311. .dev = {
  312. .dma_mask = &sata_device.dev.coherent_dma_mask,
  313. .coherent_dma_mask = DMA_BIT_MASK(32),
  314. },
  315. };
  316. static struct platform_device *r8a7779_devices_dt[] __initdata = {
  317. &scif0_device,
  318. &scif1_device,
  319. &scif2_device,
  320. &scif3_device,
  321. &scif4_device,
  322. &scif5_device,
  323. &tmu00_device,
  324. &tmu01_device,
  325. };
  326. static struct platform_device *r8a7779_late_devices[] __initdata = {
  327. &i2c0_device,
  328. &i2c1_device,
  329. &i2c2_device,
  330. &i2c3_device,
  331. &sata_device,
  332. };
  333. void __init r8a7779_add_standard_devices(void)
  334. {
  335. #ifdef CONFIG_CACHE_L2X0
  336. /* Early BRESP enable, Shared attribute override enable, 64K*16way */
  337. l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
  338. #endif
  339. r8a7779_pm_init();
  340. r8a7779_init_pm_domains();
  341. platform_add_devices(r8a7779_devices_dt,
  342. ARRAY_SIZE(r8a7779_devices_dt));
  343. platform_add_devices(r8a7779_late_devices,
  344. ARRAY_SIZE(r8a7779_late_devices));
  345. }
  346. /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
  347. void __init __weak r8a7779_register_twd(void) { }
  348. void __init r8a7779_earlytimer_init(void)
  349. {
  350. r8a7779_clock_init();
  351. shmobile_earlytimer_init();
  352. r8a7779_register_twd();
  353. }
  354. void __init r8a7779_add_early_devices(void)
  355. {
  356. early_platform_add_devices(r8a7779_devices_dt,
  357. ARRAY_SIZE(r8a7779_devices_dt));
  358. /* Early serial console setup is not included here due to
  359. * memory map collisions. The SCIF serial ports in r8a7779
  360. * are difficult to entity map 1:1 due to collision with the
  361. * virtual memory range used by the coherent DMA code on ARM.
  362. *
  363. * Anyone wanting to debug early can remove UPF_IOREMAP from
  364. * the sh-sci serial console platform data, adjust mapbase
  365. * to a static M:N virt:phys mapping that needs to be added to
  366. * the mappings passed with iotable_init() above.
  367. *
  368. * Then add a call to shmobile_setup_console() from this function.
  369. *
  370. * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
  371. * command line in case of the marzen board.
  372. */
  373. }
  374. #ifdef CONFIG_USE_OF
  375. void __init r8a7779_init_delay(void)
  376. {
  377. shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
  378. }
  379. static const struct of_dev_auxdata r8a7779_auxdata_lookup[] __initconst = {
  380. {},
  381. };
  382. void __init r8a7779_add_standard_devices_dt(void)
  383. {
  384. /* clocks are setup late during boot in the case of DT */
  385. r8a7779_clock_init();
  386. platform_add_devices(r8a7779_devices_dt,
  387. ARRAY_SIZE(r8a7779_devices_dt));
  388. of_platform_populate(NULL, of_default_bus_match_table,
  389. r8a7779_auxdata_lookup, NULL);
  390. }
  391. static const char *r8a7779_compat_dt[] __initdata = {
  392. "renesas,r8a7779",
  393. NULL,
  394. };
  395. DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
  396. .map_io = r8a7779_map_io,
  397. .init_early = r8a7779_init_delay,
  398. .nr_irqs = NR_IRQS_LEGACY,
  399. .init_irq = r8a7779_init_irq_dt,
  400. .init_machine = r8a7779_add_standard_devices_dt,
  401. .init_time = shmobile_timer_init,
  402. .dt_compat = r8a7779_compat_dt,
  403. MACHINE_END
  404. #endif /* CONFIG_USE_OF */