i2c-algo-pca.c 14 KB

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  1. /*
  2. * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
  3. * Copyright (C) 2004 Arcom Control Systems
  4. * Copyright (C) 2008 Pengutronix
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/delay.h>
  24. #include <linux/jiffies.h>
  25. #include <linux/init.h>
  26. #include <linux/errno.h>
  27. #include <linux/i2c.h>
  28. #include <linux/i2c-algo-pca.h>
  29. #define DEB1(fmt, args...) do { if (i2c_debug >= 1) \
  30. printk(KERN_DEBUG fmt, ## args); } while (0)
  31. #define DEB2(fmt, args...) do { if (i2c_debug >= 2) \
  32. printk(KERN_DEBUG fmt, ## args); } while (0)
  33. #define DEB3(fmt, args...) do { if (i2c_debug >= 3) \
  34. printk(KERN_DEBUG fmt, ## args); } while (0)
  35. static int i2c_debug;
  36. #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
  37. #define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
  38. #define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
  39. #define pca_clock(adap) adap->i2c_clock
  40. #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
  41. #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
  42. #define pca_wait(adap) adap->wait_for_completion(adap->data)
  43. #define pca_reset(adap) adap->reset_chip(adap->data)
  44. static void pca9665_reset(void *pd)
  45. {
  46. struct i2c_algo_pca_data *adap = pd;
  47. pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
  48. pca_outw(adap, I2C_PCA_IND, 0xA5);
  49. pca_outw(adap, I2C_PCA_IND, 0x5A);
  50. }
  51. /*
  52. * Generate a start condition on the i2c bus.
  53. *
  54. * returns after the start condition has occurred
  55. */
  56. static void pca_start(struct i2c_algo_pca_data *adap)
  57. {
  58. int sta = pca_get_con(adap);
  59. DEB2("=== START\n");
  60. sta |= I2C_PCA_CON_STA;
  61. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
  62. pca_set_con(adap, sta);
  63. pca_wait(adap);
  64. }
  65. /*
  66. * Generate a repeated start condition on the i2c bus
  67. *
  68. * return after the repeated start condition has occurred
  69. */
  70. static void pca_repeated_start(struct i2c_algo_pca_data *adap)
  71. {
  72. int sta = pca_get_con(adap);
  73. DEB2("=== REPEATED START\n");
  74. sta |= I2C_PCA_CON_STA;
  75. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
  76. pca_set_con(adap, sta);
  77. pca_wait(adap);
  78. }
  79. /*
  80. * Generate a stop condition on the i2c bus
  81. *
  82. * returns after the stop condition has been generated
  83. *
  84. * STOPs do not generate an interrupt or set the SI flag, since the
  85. * part returns the idle state (0xf8). Hence we don't need to
  86. * pca_wait here.
  87. */
  88. static void pca_stop(struct i2c_algo_pca_data *adap)
  89. {
  90. int sta = pca_get_con(adap);
  91. DEB2("=== STOP\n");
  92. sta |= I2C_PCA_CON_STO;
  93. sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  94. pca_set_con(adap, sta);
  95. }
  96. /*
  97. * Send the slave address and R/W bit
  98. *
  99. * returns after the address has been sent
  100. */
  101. static void pca_address(struct i2c_algo_pca_data *adap,
  102. struct i2c_msg *msg)
  103. {
  104. int sta = pca_get_con(adap);
  105. int addr;
  106. addr = ( (0x7f & msg->addr) << 1 );
  107. if (msg->flags & I2C_M_RD )
  108. addr |= 1;
  109. DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
  110. msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
  111. pca_outw(adap, I2C_PCA_DAT, addr);
  112. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  113. pca_set_con(adap, sta);
  114. pca_wait(adap);
  115. }
  116. /*
  117. * Transmit a byte.
  118. *
  119. * Returns after the byte has been transmitted
  120. */
  121. static void pca_tx_byte(struct i2c_algo_pca_data *adap,
  122. __u8 b)
  123. {
  124. int sta = pca_get_con(adap);
  125. DEB2("=== WRITE %#04x\n", b);
  126. pca_outw(adap, I2C_PCA_DAT, b);
  127. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  128. pca_set_con(adap, sta);
  129. pca_wait(adap);
  130. }
  131. /*
  132. * Receive a byte
  133. *
  134. * returns immediately.
  135. */
  136. static void pca_rx_byte(struct i2c_algo_pca_data *adap,
  137. __u8 *b, int ack)
  138. {
  139. *b = pca_inw(adap, I2C_PCA_DAT);
  140. DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
  141. }
  142. /*
  143. * Setup ACK or NACK for next received byte and wait for it to arrive.
  144. *
  145. * Returns after next byte has arrived.
  146. */
  147. static void pca_rx_ack(struct i2c_algo_pca_data *adap,
  148. int ack)
  149. {
  150. int sta = pca_get_con(adap);
  151. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
  152. if ( ack )
  153. sta |= I2C_PCA_CON_AA;
  154. pca_set_con(adap, sta);
  155. pca_wait(adap);
  156. }
  157. static int pca_xfer(struct i2c_adapter *i2c_adap,
  158. struct i2c_msg *msgs,
  159. int num)
  160. {
  161. struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
  162. struct i2c_msg *msg = NULL;
  163. int curmsg;
  164. int numbytes = 0;
  165. int state;
  166. int ret;
  167. unsigned long timeout = jiffies + i2c_adap->timeout;
  168. while (pca_status(adap) != 0xf8) {
  169. if (time_before(jiffies, timeout)) {
  170. msleep(10);
  171. } else {
  172. dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
  173. "%#04x\n", state);
  174. return -EAGAIN;
  175. }
  176. }
  177. DEB1("{{{ XFER %d messages\n", num);
  178. if (i2c_debug>=2) {
  179. for (curmsg = 0; curmsg < num; curmsg++) {
  180. int addr, i;
  181. msg = &msgs[curmsg];
  182. addr = (0x7f & msg->addr) ;
  183. if (msg->flags & I2C_M_RD )
  184. printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
  185. curmsg, msg->len, addr, (addr<<1) | 1);
  186. else {
  187. printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
  188. curmsg, msg->len, addr, addr<<1,
  189. msg->len == 0 ? "" : ", ");
  190. for(i=0; i < msg->len; i++)
  191. printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
  192. printk("]\n");
  193. }
  194. }
  195. }
  196. curmsg = 0;
  197. ret = -EREMOTEIO;
  198. while (curmsg < num) {
  199. state = pca_status(adap);
  200. DEB3("STATE is 0x%02x\n", state);
  201. msg = &msgs[curmsg];
  202. switch (state) {
  203. case 0xf8: /* On reset or stop the bus is idle */
  204. pca_start(adap);
  205. break;
  206. case 0x08: /* A START condition has been transmitted */
  207. case 0x10: /* A repeated start condition has been transmitted */
  208. pca_address(adap, msg);
  209. break;
  210. case 0x18: /* SLA+W has been transmitted; ACK has been received */
  211. case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
  212. if (numbytes < msg->len) {
  213. pca_tx_byte(adap, msg->buf[numbytes]);
  214. numbytes++;
  215. break;
  216. }
  217. curmsg++; numbytes = 0;
  218. if (curmsg == num)
  219. pca_stop(adap);
  220. else
  221. pca_repeated_start(adap);
  222. break;
  223. case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
  224. DEB2("NOT ACK received after SLA+W\n");
  225. pca_stop(adap);
  226. goto out;
  227. case 0x40: /* SLA+R has been transmitted; ACK has been received */
  228. pca_rx_ack(adap, msg->len > 1);
  229. break;
  230. case 0x50: /* Data bytes has been received; ACK has been returned */
  231. if (numbytes < msg->len) {
  232. pca_rx_byte(adap, &msg->buf[numbytes], 1);
  233. numbytes++;
  234. pca_rx_ack(adap, numbytes < msg->len - 1);
  235. break;
  236. }
  237. curmsg++; numbytes = 0;
  238. if (curmsg == num)
  239. pca_stop(adap);
  240. else
  241. pca_repeated_start(adap);
  242. break;
  243. case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
  244. DEB2("NOT ACK received after SLA+R\n");
  245. pca_stop(adap);
  246. goto out;
  247. case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
  248. DEB2("NOT ACK received after data byte\n");
  249. goto out;
  250. case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
  251. DEB2("Arbitration lost\n");
  252. goto out;
  253. case 0x58: /* Data byte has been received; NOT ACK has been returned */
  254. if ( numbytes == msg->len - 1 ) {
  255. pca_rx_byte(adap, &msg->buf[numbytes], 0);
  256. curmsg++; numbytes = 0;
  257. if (curmsg == num)
  258. pca_stop(adap);
  259. else
  260. pca_repeated_start(adap);
  261. } else {
  262. DEB2("NOT ACK sent after data byte received. "
  263. "Not final byte. numbytes %d. len %d\n",
  264. numbytes, msg->len);
  265. pca_stop(adap);
  266. goto out;
  267. }
  268. break;
  269. case 0x70: /* Bus error - SDA stuck low */
  270. DEB2("BUS ERROR - SDA Stuck low\n");
  271. pca_reset(adap);
  272. goto out;
  273. case 0x90: /* Bus error - SCL stuck low */
  274. DEB2("BUS ERROR - SCL Stuck low\n");
  275. pca_reset(adap);
  276. goto out;
  277. case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
  278. DEB2("BUS ERROR - Illegal START or STOP\n");
  279. pca_reset(adap);
  280. goto out;
  281. default:
  282. dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
  283. break;
  284. }
  285. }
  286. ret = curmsg;
  287. out:
  288. DEB1("}}} transfered %d/%d messages. "
  289. "status is %#04x. control is %#04x\n",
  290. curmsg, num, pca_status(adap),
  291. pca_get_con(adap));
  292. return ret;
  293. }
  294. static u32 pca_func(struct i2c_adapter *adap)
  295. {
  296. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
  297. }
  298. static const struct i2c_algorithm pca_algo = {
  299. .master_xfer = pca_xfer,
  300. .functionality = pca_func,
  301. };
  302. static unsigned int pca_probe_chip(struct i2c_adapter *adap)
  303. {
  304. struct i2c_algo_pca_data *pca_data = adap->algo_data;
  305. /* The trick here is to check if there is an indirect register
  306. * available. If there is one, we will read the value we first
  307. * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
  308. * we wrote on I2C_PCA_ADR
  309. */
  310. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
  311. pca_outw(pca_data, I2C_PCA_IND, 0xAA);
  312. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
  313. pca_outw(pca_data, I2C_PCA_IND, 0x00);
  314. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
  315. if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
  316. printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
  317. return I2C_PCA_CHIP_9665;
  318. } else {
  319. printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
  320. return I2C_PCA_CHIP_9564;
  321. }
  322. }
  323. static int pca_init(struct i2c_adapter *adap)
  324. {
  325. struct i2c_algo_pca_data *pca_data = adap->algo_data;
  326. adap->algo = &pca_algo;
  327. if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
  328. static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
  329. int clock;
  330. if (pca_data->i2c_clock > 7) {
  331. switch (pca_data->i2c_clock) {
  332. case 330000:
  333. pca_data->i2c_clock = I2C_PCA_CON_330kHz;
  334. break;
  335. case 288000:
  336. pca_data->i2c_clock = I2C_PCA_CON_288kHz;
  337. break;
  338. case 217000:
  339. pca_data->i2c_clock = I2C_PCA_CON_217kHz;
  340. break;
  341. case 146000:
  342. pca_data->i2c_clock = I2C_PCA_CON_146kHz;
  343. break;
  344. case 88000:
  345. pca_data->i2c_clock = I2C_PCA_CON_88kHz;
  346. break;
  347. case 59000:
  348. pca_data->i2c_clock = I2C_PCA_CON_59kHz;
  349. break;
  350. case 44000:
  351. pca_data->i2c_clock = I2C_PCA_CON_44kHz;
  352. break;
  353. case 36000:
  354. pca_data->i2c_clock = I2C_PCA_CON_36kHz;
  355. break;
  356. default:
  357. printk(KERN_WARNING
  358. "%s: Invalid I2C clock speed selected."
  359. " Using default 59kHz.\n", adap->name);
  360. pca_data->i2c_clock = I2C_PCA_CON_59kHz;
  361. }
  362. } else {
  363. printk(KERN_WARNING "%s: "
  364. "Choosing the clock frequency based on "
  365. "index is deprecated."
  366. " Use the nominal frequency.\n", adap->name);
  367. }
  368. pca_reset(pca_data);
  369. clock = pca_clock(pca_data);
  370. printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
  371. adap->name, freqs[clock]);
  372. pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock);
  373. } else {
  374. int clock;
  375. int mode;
  376. int tlow, thi;
  377. /* Values can be found on PCA9665 datasheet section 7.3.2.6 */
  378. int min_tlow, min_thi;
  379. /* These values are the maximum raise and fall values allowed
  380. * by the I2C operation mode (Standard, Fast or Fast+)
  381. * They are used (added) below to calculate the clock dividers
  382. * of PCA9665. Note that they are slightly different of the
  383. * real maximum, to allow the change on mode exactly on the
  384. * maximum clock rate for each mode
  385. */
  386. int raise_fall_time;
  387. struct i2c_algo_pca_data *pca_data = adap->algo_data;
  388. /* Ignore the reset function from the module,
  389. * we can use the parallel bus reset
  390. */
  391. pca_data->reset_chip = pca9665_reset;
  392. if (pca_data->i2c_clock > 1265800) {
  393. printk(KERN_WARNING "%s: I2C clock speed too high."
  394. " Using 1265.8kHz.\n", adap->name);
  395. pca_data->i2c_clock = 1265800;
  396. }
  397. if (pca_data->i2c_clock < 60300) {
  398. printk(KERN_WARNING "%s: I2C clock speed too low."
  399. " Using 60.3kHz.\n", adap->name);
  400. pca_data->i2c_clock = 60300;
  401. }
  402. /* To avoid integer overflow, use clock/100 for calculations */
  403. clock = pca_clock(pca_data) / 100;
  404. if (pca_data->i2c_clock > 10000) {
  405. mode = I2C_PCA_MODE_TURBO;
  406. min_tlow = 14;
  407. min_thi = 5;
  408. raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
  409. } else if (pca_data->i2c_clock > 4000) {
  410. mode = I2C_PCA_MODE_FASTP;
  411. min_tlow = 17;
  412. min_thi = 9;
  413. raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
  414. } else if (pca_data->i2c_clock > 1000) {
  415. mode = I2C_PCA_MODE_FAST;
  416. min_tlow = 44;
  417. min_thi = 20;
  418. raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
  419. } else {
  420. mode = I2C_PCA_MODE_STD;
  421. min_tlow = 157;
  422. min_thi = 134;
  423. raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
  424. }
  425. /* The minimum clock that respects the thi/tlow = 134/157 is
  426. * 64800 Hz. Below that, we have to fix the tlow to 255 and
  427. * calculate the thi factor.
  428. */
  429. if (clock < 648) {
  430. tlow = 255;
  431. thi = 1000000 - clock * raise_fall_time;
  432. thi /= (I2C_PCA_OSC_PER * clock) - tlow;
  433. } else {
  434. tlow = (1000000 - clock * raise_fall_time) * min_tlow;
  435. tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
  436. thi = tlow * min_thi / min_tlow;
  437. }
  438. pca_reset(pca_data);
  439. printk(KERN_INFO
  440. "%s: Clock frequency is %dHz\n", adap->name, clock * 100);
  441. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
  442. pca_outw(pca_data, I2C_PCA_IND, mode);
  443. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
  444. pca_outw(pca_data, I2C_PCA_IND, tlow);
  445. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
  446. pca_outw(pca_data, I2C_PCA_IND, thi);
  447. pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
  448. }
  449. udelay(500); /* 500 us for oscilator to stabilise */
  450. return 0;
  451. }
  452. /*
  453. * registering functions to load algorithms at runtime
  454. */
  455. int i2c_pca_add_bus(struct i2c_adapter *adap)
  456. {
  457. int rval;
  458. rval = pca_init(adap);
  459. if (rval)
  460. return rval;
  461. return i2c_add_adapter(adap);
  462. }
  463. EXPORT_SYMBOL(i2c_pca_add_bus);
  464. int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
  465. {
  466. int rval;
  467. rval = pca_init(adap);
  468. if (rval)
  469. return rval;
  470. return i2c_add_numbered_adapter(adap);
  471. }
  472. EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
  473. MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
  474. "Wolfram Sang <w.sang@pengutronix.de>");
  475. MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
  476. MODULE_LICENSE("GPL");
  477. module_param(i2c_debug, int, 0);