ad1848_lib.c 38 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Routines for control of AD1848/AD1847/CS4248
  4. *
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #define SNDRV_MAIN_OBJECT_FILE
  22. #include <sound/driver.h>
  23. #include <linux/delay.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/slab.h>
  27. #include <linux/ioport.h>
  28. #include <sound/core.h>
  29. #include <sound/ad1848.h>
  30. #include <sound/control.h>
  31. #include <sound/tlv.h>
  32. #include <sound/pcm_params.h>
  33. #include <asm/io.h>
  34. #include <asm/dma.h>
  35. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  36. MODULE_DESCRIPTION("Routines for control of AD1848/AD1847/CS4248");
  37. MODULE_LICENSE("GPL");
  38. #if 0
  39. #define SNDRV_DEBUG_MCE
  40. #endif
  41. /*
  42. * Some variables
  43. */
  44. static unsigned char freq_bits[14] = {
  45. /* 5510 */ 0x00 | AD1848_XTAL2,
  46. /* 6620 */ 0x0E | AD1848_XTAL2,
  47. /* 8000 */ 0x00 | AD1848_XTAL1,
  48. /* 9600 */ 0x0E | AD1848_XTAL1,
  49. /* 11025 */ 0x02 | AD1848_XTAL2,
  50. /* 16000 */ 0x02 | AD1848_XTAL1,
  51. /* 18900 */ 0x04 | AD1848_XTAL2,
  52. /* 22050 */ 0x06 | AD1848_XTAL2,
  53. /* 27042 */ 0x04 | AD1848_XTAL1,
  54. /* 32000 */ 0x06 | AD1848_XTAL1,
  55. /* 33075 */ 0x0C | AD1848_XTAL2,
  56. /* 37800 */ 0x08 | AD1848_XTAL2,
  57. /* 44100 */ 0x0A | AD1848_XTAL2,
  58. /* 48000 */ 0x0C | AD1848_XTAL1
  59. };
  60. static unsigned int rates[14] = {
  61. 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
  62. 27042, 32000, 33075, 37800, 44100, 48000
  63. };
  64. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  65. .count = ARRAY_SIZE(rates),
  66. .list = rates,
  67. .mask = 0,
  68. };
  69. static unsigned char snd_ad1848_original_image[16] =
  70. {
  71. 0x00, /* 00 - lic */
  72. 0x00, /* 01 - ric */
  73. 0x9f, /* 02 - la1ic */
  74. 0x9f, /* 03 - ra1ic */
  75. 0x9f, /* 04 - la2ic */
  76. 0x9f, /* 05 - ra2ic */
  77. 0xbf, /* 06 - loc */
  78. 0xbf, /* 07 - roc */
  79. 0x20, /* 08 - dfr */
  80. AD1848_AUTOCALIB, /* 09 - ic */
  81. 0x00, /* 0a - pc */
  82. 0x00, /* 0b - ti */
  83. 0x00, /* 0c - mi */
  84. 0x00, /* 0d - lbc */
  85. 0x00, /* 0e - dru */
  86. 0x00, /* 0f - drl */
  87. };
  88. /*
  89. * Basic I/O functions
  90. */
  91. static void snd_ad1848_wait(struct snd_ad1848 *chip)
  92. {
  93. int timeout;
  94. for (timeout = 250; timeout > 0; timeout--) {
  95. if ((inb(AD1848P(chip, REGSEL)) & AD1848_INIT) == 0)
  96. break;
  97. udelay(100);
  98. }
  99. }
  100. void snd_ad1848_out(struct snd_ad1848 *chip,
  101. unsigned char reg,
  102. unsigned char value)
  103. {
  104. snd_ad1848_wait(chip);
  105. #ifdef CONFIG_SND_DEBUG
  106. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  107. snd_printk(KERN_WARNING "auto calibration time out - "
  108. "reg = 0x%x, value = 0x%x\n", reg, value);
  109. #endif
  110. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  111. outb(chip->image[reg] = value, AD1848P(chip, REG));
  112. mb();
  113. snd_printdd("codec out - reg 0x%x = 0x%x\n",
  114. chip->mce_bit | reg, value);
  115. }
  116. EXPORT_SYMBOL(snd_ad1848_out);
  117. static void snd_ad1848_dout(struct snd_ad1848 *chip,
  118. unsigned char reg, unsigned char value)
  119. {
  120. snd_ad1848_wait(chip);
  121. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  122. outb(value, AD1848P(chip, REG));
  123. mb();
  124. }
  125. static unsigned char snd_ad1848_in(struct snd_ad1848 *chip, unsigned char reg)
  126. {
  127. snd_ad1848_wait(chip);
  128. #ifdef CONFIG_SND_DEBUG
  129. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  130. snd_printk(KERN_WARNING "auto calibration time out - "
  131. "reg = 0x%x\n", reg);
  132. #endif
  133. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  134. mb();
  135. return inb(AD1848P(chip, REG));
  136. }
  137. #if 0
  138. static void snd_ad1848_debug(struct snd_ad1848 *chip)
  139. {
  140. printk("AD1848 REGS: INDEX = 0x%02x ", inb(AD1848P(chip, REGSEL)));
  141. printk(" STATUS = 0x%02x\n", inb(AD1848P(chip, STATUS)));
  142. printk(" 0x00: left input = 0x%02x ", snd_ad1848_in(chip, 0x00));
  143. printk(" 0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08));
  144. printk(" 0x01: right input = 0x%02x ", snd_ad1848_in(chip, 0x01));
  145. printk(" 0x09: iface (CFIG 1) = 0x%02x\n", snd_ad1848_in(chip, 0x09));
  146. printk(" 0x02: AUXA left = 0x%02x ", snd_ad1848_in(chip, 0x02));
  147. printk(" 0x0a: pin control = 0x%02x\n", snd_ad1848_in(chip, 0x0a));
  148. printk(" 0x03: AUXA right = 0x%02x ", snd_ad1848_in(chip, 0x03));
  149. printk(" 0x0b: init & status = 0x%02x\n", snd_ad1848_in(chip, 0x0b));
  150. printk(" 0x04: AUXB left = 0x%02x ", snd_ad1848_in(chip, 0x04));
  151. printk(" 0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c));
  152. printk(" 0x05: AUXB right = 0x%02x ", snd_ad1848_in(chip, 0x05));
  153. printk(" 0x0d: loopback = 0x%02x\n", snd_ad1848_in(chip, 0x0d));
  154. printk(" 0x06: left output = 0x%02x ", snd_ad1848_in(chip, 0x06));
  155. printk(" 0x0e: data upr count = 0x%02x\n", snd_ad1848_in(chip, 0x0e));
  156. printk(" 0x07: right output = 0x%02x ", snd_ad1848_in(chip, 0x07));
  157. printk(" 0x0f: data lwr count = 0x%02x\n", snd_ad1848_in(chip, 0x0f));
  158. }
  159. #endif
  160. /*
  161. * AD1848 detection / MCE routines
  162. */
  163. static void snd_ad1848_mce_up(struct snd_ad1848 *chip)
  164. {
  165. unsigned long flags;
  166. int timeout;
  167. snd_ad1848_wait(chip);
  168. #ifdef CONFIG_SND_DEBUG
  169. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  170. snd_printk(KERN_WARNING "mce_up - auto calibration time out (0)\n");
  171. #endif
  172. spin_lock_irqsave(&chip->reg_lock, flags);
  173. chip->mce_bit |= AD1848_MCE;
  174. timeout = inb(AD1848P(chip, REGSEL));
  175. if (timeout == 0x80)
  176. snd_printk(KERN_WARNING "mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
  177. if (!(timeout & AD1848_MCE))
  178. outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
  179. spin_unlock_irqrestore(&chip->reg_lock, flags);
  180. }
  181. static void snd_ad1848_mce_down(struct snd_ad1848 *chip)
  182. {
  183. unsigned long flags;
  184. int timeout;
  185. signed long time;
  186. spin_lock_irqsave(&chip->reg_lock, flags);
  187. for (timeout = 5; timeout > 0; timeout--)
  188. inb(AD1848P(chip, REGSEL));
  189. /* end of cleanup sequence */
  190. for (timeout = 12000; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
  191. udelay(100);
  192. #if 0
  193. printk("(1) timeout = %i\n", timeout);
  194. #endif
  195. #ifdef CONFIG_SND_DEBUG
  196. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  197. snd_printk(KERN_WARNING "mce_down [0x%lx] - auto calibration time out (0)\n", AD1848P(chip, REGSEL));
  198. #endif
  199. chip->mce_bit &= ~AD1848_MCE;
  200. timeout = inb(AD1848P(chip, REGSEL));
  201. outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
  202. if (timeout == 0x80)
  203. snd_printk(KERN_WARNING "mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
  204. if ((timeout & AD1848_MCE) == 0) {
  205. spin_unlock_irqrestore(&chip->reg_lock, flags);
  206. return;
  207. }
  208. /* calibration process */
  209. for (timeout = 500; timeout > 0 && (snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) == 0; timeout--);
  210. if ((snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) == 0) {
  211. snd_printd("mce_down - auto calibration time out (1)\n");
  212. spin_unlock_irqrestore(&chip->reg_lock, flags);
  213. return;
  214. }
  215. #if 0
  216. printk("(2) timeout = %i, jiffies = %li\n", timeout, jiffies);
  217. #endif
  218. time = HZ / 4;
  219. while (snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) {
  220. spin_unlock_irqrestore(&chip->reg_lock, flags);
  221. if (time <= 0) {
  222. snd_printk(KERN_ERR "mce_down - auto calibration time out (2)\n");
  223. return;
  224. }
  225. time = schedule_timeout(time);
  226. spin_lock_irqsave(&chip->reg_lock, flags);
  227. }
  228. #if 0
  229. printk("(3) jiffies = %li\n", jiffies);
  230. #endif
  231. time = HZ / 10;
  232. while (inb(AD1848P(chip, REGSEL)) & AD1848_INIT) {
  233. spin_unlock_irqrestore(&chip->reg_lock, flags);
  234. if (time <= 0) {
  235. snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
  236. return;
  237. }
  238. time = schedule_timeout(time);
  239. spin_lock_irqsave(&chip->reg_lock, flags);
  240. }
  241. spin_unlock_irqrestore(&chip->reg_lock, flags);
  242. #if 0
  243. printk("(4) jiffies = %li\n", jiffies);
  244. snd_printk("mce_down - exit = 0x%x\n", inb(AD1848P(chip, REGSEL)));
  245. #endif
  246. }
  247. static unsigned int snd_ad1848_get_count(unsigned char format,
  248. unsigned int size)
  249. {
  250. switch (format & 0xe0) {
  251. case AD1848_LINEAR_16:
  252. size >>= 1;
  253. break;
  254. }
  255. if (format & AD1848_STEREO)
  256. size >>= 1;
  257. return size;
  258. }
  259. static int snd_ad1848_trigger(struct snd_ad1848 *chip, unsigned char what,
  260. int channel, int cmd)
  261. {
  262. int result = 0;
  263. #if 0
  264. printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, inb(AD1848P(card, STATUS)));
  265. #endif
  266. spin_lock(&chip->reg_lock);
  267. if (cmd == SNDRV_PCM_TRIGGER_START) {
  268. if (chip->image[AD1848_IFACE_CTRL] & what) {
  269. spin_unlock(&chip->reg_lock);
  270. return 0;
  271. }
  272. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] |= what);
  273. chip->mode |= AD1848_MODE_RUNNING;
  274. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  275. if (!(chip->image[AD1848_IFACE_CTRL] & what)) {
  276. spin_unlock(&chip->reg_lock);
  277. return 0;
  278. }
  279. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] &= ~what);
  280. chip->mode &= ~AD1848_MODE_RUNNING;
  281. } else {
  282. result = -EINVAL;
  283. }
  284. spin_unlock(&chip->reg_lock);
  285. return result;
  286. }
  287. /*
  288. * CODEC I/O
  289. */
  290. static unsigned char snd_ad1848_get_rate(unsigned int rate)
  291. {
  292. int i;
  293. for (i = 0; i < ARRAY_SIZE(rates); i++)
  294. if (rate == rates[i])
  295. return freq_bits[i];
  296. snd_BUG();
  297. return freq_bits[ARRAY_SIZE(rates) - 1];
  298. }
  299. static int snd_ad1848_ioctl(struct snd_pcm_substream *substream,
  300. unsigned int cmd, void *arg)
  301. {
  302. return snd_pcm_lib_ioctl(substream, cmd, arg);
  303. }
  304. static unsigned char snd_ad1848_get_format(int format, int channels)
  305. {
  306. unsigned char rformat;
  307. rformat = AD1848_LINEAR_8;
  308. switch (format) {
  309. case SNDRV_PCM_FORMAT_A_LAW: rformat = AD1848_ALAW_8; break;
  310. case SNDRV_PCM_FORMAT_MU_LAW: rformat = AD1848_ULAW_8; break;
  311. case SNDRV_PCM_FORMAT_S16_LE: rformat = AD1848_LINEAR_16; break;
  312. }
  313. if (channels > 1)
  314. rformat |= AD1848_STEREO;
  315. #if 0
  316. snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
  317. #endif
  318. return rformat;
  319. }
  320. static void snd_ad1848_calibrate_mute(struct snd_ad1848 *chip, int mute)
  321. {
  322. unsigned long flags;
  323. mute = mute ? 1 : 0;
  324. spin_lock_irqsave(&chip->reg_lock, flags);
  325. if (chip->calibrate_mute == mute) {
  326. spin_unlock_irqrestore(&chip->reg_lock, flags);
  327. return;
  328. }
  329. if (!mute) {
  330. snd_ad1848_dout(chip, AD1848_LEFT_INPUT, chip->image[AD1848_LEFT_INPUT]);
  331. snd_ad1848_dout(chip, AD1848_RIGHT_INPUT, chip->image[AD1848_RIGHT_INPUT]);
  332. }
  333. snd_ad1848_dout(chip, AD1848_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_LEFT_INPUT]);
  334. snd_ad1848_dout(chip, AD1848_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_RIGHT_INPUT]);
  335. snd_ad1848_dout(chip, AD1848_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_LEFT_INPUT]);
  336. snd_ad1848_dout(chip, AD1848_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_RIGHT_INPUT]);
  337. snd_ad1848_dout(chip, AD1848_LEFT_OUTPUT, mute ? 0x80 : chip->image[AD1848_LEFT_OUTPUT]);
  338. snd_ad1848_dout(chip, AD1848_RIGHT_OUTPUT, mute ? 0x80 : chip->image[AD1848_RIGHT_OUTPUT]);
  339. chip->calibrate_mute = mute;
  340. spin_unlock_irqrestore(&chip->reg_lock, flags);
  341. }
  342. static void snd_ad1848_set_data_format(struct snd_ad1848 *chip, struct snd_pcm_hw_params *hw_params)
  343. {
  344. if (hw_params == NULL) {
  345. chip->image[AD1848_DATA_FORMAT] = 0x20;
  346. } else {
  347. chip->image[AD1848_DATA_FORMAT] =
  348. snd_ad1848_get_format(params_format(hw_params), params_channels(hw_params)) |
  349. snd_ad1848_get_rate(params_rate(hw_params));
  350. }
  351. // snd_printk(">>> pmode = 0x%x, dfr = 0x%x\n", pstr->mode, chip->image[AD1848_DATA_FORMAT]);
  352. }
  353. static int snd_ad1848_open(struct snd_ad1848 *chip, unsigned int mode)
  354. {
  355. unsigned long flags;
  356. mutex_lock(&chip->open_mutex);
  357. if (chip->mode & AD1848_MODE_OPEN) {
  358. mutex_unlock(&chip->open_mutex);
  359. return -EAGAIN;
  360. }
  361. snd_ad1848_mce_down(chip);
  362. #ifdef SNDRV_DEBUG_MCE
  363. snd_printk("open: (1)\n");
  364. #endif
  365. snd_ad1848_mce_up(chip);
  366. spin_lock_irqsave(&chip->reg_lock, flags);
  367. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
  368. AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO |
  369. AD1848_CALIB_MODE);
  370. chip->image[AD1848_IFACE_CTRL] |= AD1848_AUTOCALIB;
  371. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
  372. spin_unlock_irqrestore(&chip->reg_lock, flags);
  373. snd_ad1848_mce_down(chip);
  374. #ifdef SNDRV_DEBUG_MCE
  375. snd_printk("open: (2)\n");
  376. #endif
  377. snd_ad1848_set_data_format(chip, NULL);
  378. snd_ad1848_mce_up(chip);
  379. spin_lock_irqsave(&chip->reg_lock, flags);
  380. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  381. spin_unlock_irqrestore(&chip->reg_lock, flags);
  382. snd_ad1848_mce_down(chip);
  383. #ifdef SNDRV_DEBUG_MCE
  384. snd_printk("open: (3)\n");
  385. #endif
  386. /* ok. now enable and ack CODEC IRQ */
  387. spin_lock_irqsave(&chip->reg_lock, flags);
  388. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  389. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  390. chip->image[AD1848_PIN_CTRL] |= AD1848_IRQ_ENABLE;
  391. snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
  392. spin_unlock_irqrestore(&chip->reg_lock, flags);
  393. chip->mode = mode;
  394. mutex_unlock(&chip->open_mutex);
  395. return 0;
  396. }
  397. static void snd_ad1848_close(struct snd_ad1848 *chip)
  398. {
  399. unsigned long flags;
  400. mutex_lock(&chip->open_mutex);
  401. if (!chip->mode) {
  402. mutex_unlock(&chip->open_mutex);
  403. return;
  404. }
  405. /* disable IRQ */
  406. spin_lock_irqsave(&chip->reg_lock, flags);
  407. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  408. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  409. chip->image[AD1848_PIN_CTRL] &= ~AD1848_IRQ_ENABLE;
  410. snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
  411. spin_unlock_irqrestore(&chip->reg_lock, flags);
  412. /* now disable capture & playback */
  413. snd_ad1848_mce_up(chip);
  414. spin_lock_irqsave(&chip->reg_lock, flags);
  415. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
  416. AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
  417. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
  418. spin_unlock_irqrestore(&chip->reg_lock, flags);
  419. snd_ad1848_mce_down(chip);
  420. /* clear IRQ again */
  421. spin_lock_irqsave(&chip->reg_lock, flags);
  422. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  423. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  424. spin_unlock_irqrestore(&chip->reg_lock, flags);
  425. chip->mode = 0;
  426. mutex_unlock(&chip->open_mutex);
  427. }
  428. /*
  429. * ok.. exported functions..
  430. */
  431. static int snd_ad1848_playback_trigger(struct snd_pcm_substream *substream,
  432. int cmd)
  433. {
  434. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  435. return snd_ad1848_trigger(chip, AD1848_PLAYBACK_ENABLE, SNDRV_PCM_STREAM_PLAYBACK, cmd);
  436. }
  437. static int snd_ad1848_capture_trigger(struct snd_pcm_substream *substream,
  438. int cmd)
  439. {
  440. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  441. return snd_ad1848_trigger(chip, AD1848_CAPTURE_ENABLE, SNDRV_PCM_STREAM_CAPTURE, cmd);
  442. }
  443. static int snd_ad1848_playback_hw_params(struct snd_pcm_substream *substream,
  444. struct snd_pcm_hw_params *hw_params)
  445. {
  446. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  447. unsigned long flags;
  448. int err;
  449. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  450. return err;
  451. snd_ad1848_calibrate_mute(chip, 1);
  452. snd_ad1848_set_data_format(chip, hw_params);
  453. snd_ad1848_mce_up(chip);
  454. spin_lock_irqsave(&chip->reg_lock, flags);
  455. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  456. spin_unlock_irqrestore(&chip->reg_lock, flags);
  457. snd_ad1848_mce_down(chip);
  458. snd_ad1848_calibrate_mute(chip, 0);
  459. return 0;
  460. }
  461. static int snd_ad1848_playback_hw_free(struct snd_pcm_substream *substream)
  462. {
  463. return snd_pcm_lib_free_pages(substream);
  464. }
  465. static int snd_ad1848_playback_prepare(struct snd_pcm_substream *substream)
  466. {
  467. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  468. struct snd_pcm_runtime *runtime = substream->runtime;
  469. unsigned long flags;
  470. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  471. unsigned int count = snd_pcm_lib_period_bytes(substream);
  472. chip->dma_size = size;
  473. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO);
  474. snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
  475. count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
  476. spin_lock_irqsave(&chip->reg_lock, flags);
  477. snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
  478. snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
  479. spin_unlock_irqrestore(&chip->reg_lock, flags);
  480. return 0;
  481. }
  482. static int snd_ad1848_capture_hw_params(struct snd_pcm_substream *substream,
  483. struct snd_pcm_hw_params *hw_params)
  484. {
  485. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  486. unsigned long flags;
  487. int err;
  488. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  489. return err;
  490. snd_ad1848_calibrate_mute(chip, 1);
  491. snd_ad1848_set_data_format(chip, hw_params);
  492. snd_ad1848_mce_up(chip);
  493. spin_lock_irqsave(&chip->reg_lock, flags);
  494. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  495. spin_unlock_irqrestore(&chip->reg_lock, flags);
  496. snd_ad1848_mce_down(chip);
  497. snd_ad1848_calibrate_mute(chip, 0);
  498. return 0;
  499. }
  500. static int snd_ad1848_capture_hw_free(struct snd_pcm_substream *substream)
  501. {
  502. return snd_pcm_lib_free_pages(substream);
  503. }
  504. static int snd_ad1848_capture_prepare(struct snd_pcm_substream *substream)
  505. {
  506. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  507. struct snd_pcm_runtime *runtime = substream->runtime;
  508. unsigned long flags;
  509. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  510. unsigned int count = snd_pcm_lib_period_bytes(substream);
  511. chip->dma_size = size;
  512. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
  513. snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
  514. count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
  515. spin_lock_irqsave(&chip->reg_lock, flags);
  516. snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
  517. snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
  518. spin_unlock_irqrestore(&chip->reg_lock, flags);
  519. return 0;
  520. }
  521. static irqreturn_t snd_ad1848_interrupt(int irq, void *dev_id)
  522. {
  523. struct snd_ad1848 *chip = dev_id;
  524. if ((chip->mode & AD1848_MODE_PLAY) && chip->playback_substream &&
  525. (chip->mode & AD1848_MODE_RUNNING))
  526. snd_pcm_period_elapsed(chip->playback_substream);
  527. if ((chip->mode & AD1848_MODE_CAPTURE) && chip->capture_substream &&
  528. (chip->mode & AD1848_MODE_RUNNING))
  529. snd_pcm_period_elapsed(chip->capture_substream);
  530. outb(0, AD1848P(chip, STATUS)); /* clear global interrupt bit */
  531. return IRQ_HANDLED;
  532. }
  533. static snd_pcm_uframes_t snd_ad1848_playback_pointer(struct snd_pcm_substream *substream)
  534. {
  535. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  536. size_t ptr;
  537. if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_PLAYBACK_ENABLE))
  538. return 0;
  539. ptr = snd_dma_pointer(chip->dma, chip->dma_size);
  540. return bytes_to_frames(substream->runtime, ptr);
  541. }
  542. static snd_pcm_uframes_t snd_ad1848_capture_pointer(struct snd_pcm_substream *substream)
  543. {
  544. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  545. size_t ptr;
  546. if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_CAPTURE_ENABLE))
  547. return 0;
  548. ptr = snd_dma_pointer(chip->dma, chip->dma_size);
  549. return bytes_to_frames(substream->runtime, ptr);
  550. }
  551. /*
  552. */
  553. static void snd_ad1848_thinkpad_twiddle(struct snd_ad1848 *chip, int on) {
  554. int tmp;
  555. if (!chip->thinkpad_flag) return;
  556. outb(0x1c, AD1848_THINKPAD_CTL_PORT1);
  557. tmp = inb(AD1848_THINKPAD_CTL_PORT2);
  558. if (on)
  559. /* turn it on */
  560. tmp |= AD1848_THINKPAD_CS4248_ENABLE_BIT;
  561. else
  562. /* turn it off */
  563. tmp &= ~AD1848_THINKPAD_CS4248_ENABLE_BIT;
  564. outb(tmp, AD1848_THINKPAD_CTL_PORT2);
  565. }
  566. #ifdef CONFIG_PM
  567. static void snd_ad1848_suspend(struct snd_ad1848 *chip)
  568. {
  569. snd_pcm_suspend_all(chip->pcm);
  570. if (chip->thinkpad_flag)
  571. snd_ad1848_thinkpad_twiddle(chip, 0);
  572. }
  573. static void snd_ad1848_resume(struct snd_ad1848 *chip)
  574. {
  575. int i;
  576. if (chip->thinkpad_flag)
  577. snd_ad1848_thinkpad_twiddle(chip, 1);
  578. /* clear any pendings IRQ */
  579. inb(AD1848P(chip, STATUS));
  580. outb(0, AD1848P(chip, STATUS));
  581. mb();
  582. snd_ad1848_mce_down(chip);
  583. for (i = 0; i < 16; i++)
  584. snd_ad1848_out(chip, i, chip->image[i]);
  585. snd_ad1848_mce_up(chip);
  586. snd_ad1848_mce_down(chip);
  587. }
  588. #endif /* CONFIG_PM */
  589. static int snd_ad1848_probe(struct snd_ad1848 * chip)
  590. {
  591. unsigned long flags;
  592. int i, id, rev, ad1847;
  593. unsigned char *ptr;
  594. #if 0
  595. snd_ad1848_debug(chip);
  596. #endif
  597. id = ad1847 = 0;
  598. for (i = 0; i < 1000; i++) {
  599. mb();
  600. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  601. udelay(500);
  602. else {
  603. spin_lock_irqsave(&chip->reg_lock, flags);
  604. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
  605. snd_ad1848_out(chip, AD1848_LEFT_INPUT, 0xaa);
  606. snd_ad1848_out(chip, AD1848_RIGHT_INPUT, 0x45);
  607. rev = snd_ad1848_in(chip, AD1848_RIGHT_INPUT);
  608. if (rev == 0x65) {
  609. spin_unlock_irqrestore(&chip->reg_lock, flags);
  610. id = 1;
  611. ad1847 = 1;
  612. break;
  613. }
  614. if (snd_ad1848_in(chip, AD1848_LEFT_INPUT) == 0xaa && rev == 0x45) {
  615. spin_unlock_irqrestore(&chip->reg_lock, flags);
  616. id = 1;
  617. break;
  618. }
  619. spin_unlock_irqrestore(&chip->reg_lock, flags);
  620. }
  621. }
  622. if (id != 1)
  623. return -ENODEV; /* no valid device found */
  624. if (chip->hardware == AD1848_HW_DETECT) {
  625. if (ad1847) {
  626. chip->hardware = AD1848_HW_AD1847;
  627. } else {
  628. chip->hardware = AD1848_HW_AD1848;
  629. rev = snd_ad1848_in(chip, AD1848_MISC_INFO);
  630. if (rev & 0x80) {
  631. chip->hardware = AD1848_HW_CS4248;
  632. } else if ((rev & 0x0f) == 0x0a) {
  633. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x40);
  634. for (i = 0; i < 16; ++i) {
  635. if (snd_ad1848_in(chip, i) != snd_ad1848_in(chip, i + 16)) {
  636. chip->hardware = AD1848_HW_CMI8330;
  637. break;
  638. }
  639. }
  640. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
  641. }
  642. }
  643. }
  644. spin_lock_irqsave(&chip->reg_lock, flags);
  645. inb(AD1848P(chip, STATUS)); /* clear any pendings IRQ */
  646. outb(0, AD1848P(chip, STATUS));
  647. mb();
  648. spin_unlock_irqrestore(&chip->reg_lock, flags);
  649. chip->image[AD1848_MISC_INFO] = 0x00;
  650. chip->image[AD1848_IFACE_CTRL] =
  651. (chip->image[AD1848_IFACE_CTRL] & ~AD1848_SINGLE_DMA) | AD1848_SINGLE_DMA;
  652. ptr = (unsigned char *) &chip->image;
  653. snd_ad1848_mce_down(chip);
  654. spin_lock_irqsave(&chip->reg_lock, flags);
  655. for (i = 0; i < 16; i++) /* ok.. fill all AD1848 registers */
  656. snd_ad1848_out(chip, i, *ptr++);
  657. spin_unlock_irqrestore(&chip->reg_lock, flags);
  658. snd_ad1848_mce_up(chip);
  659. snd_ad1848_mce_down(chip);
  660. return 0; /* all things are ok.. */
  661. }
  662. /*
  663. */
  664. static struct snd_pcm_hardware snd_ad1848_playback =
  665. {
  666. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  667. SNDRV_PCM_INFO_MMAP_VALID),
  668. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  669. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
  670. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  671. .rate_min = 5510,
  672. .rate_max = 48000,
  673. .channels_min = 1,
  674. .channels_max = 2,
  675. .buffer_bytes_max = (128*1024),
  676. .period_bytes_min = 64,
  677. .period_bytes_max = (128*1024),
  678. .periods_min = 1,
  679. .periods_max = 1024,
  680. .fifo_size = 0,
  681. };
  682. static struct snd_pcm_hardware snd_ad1848_capture =
  683. {
  684. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  685. SNDRV_PCM_INFO_MMAP_VALID),
  686. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  687. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
  688. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  689. .rate_min = 5510,
  690. .rate_max = 48000,
  691. .channels_min = 1,
  692. .channels_max = 2,
  693. .buffer_bytes_max = (128*1024),
  694. .period_bytes_min = 64,
  695. .period_bytes_max = (128*1024),
  696. .periods_min = 1,
  697. .periods_max = 1024,
  698. .fifo_size = 0,
  699. };
  700. /*
  701. */
  702. static int snd_ad1848_playback_open(struct snd_pcm_substream *substream)
  703. {
  704. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  705. struct snd_pcm_runtime *runtime = substream->runtime;
  706. int err;
  707. if ((err = snd_ad1848_open(chip, AD1848_MODE_PLAY)) < 0)
  708. return err;
  709. chip->playback_substream = substream;
  710. runtime->hw = snd_ad1848_playback;
  711. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
  712. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
  713. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  714. return 0;
  715. }
  716. static int snd_ad1848_capture_open(struct snd_pcm_substream *substream)
  717. {
  718. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  719. struct snd_pcm_runtime *runtime = substream->runtime;
  720. int err;
  721. if ((err = snd_ad1848_open(chip, AD1848_MODE_CAPTURE)) < 0)
  722. return err;
  723. chip->capture_substream = substream;
  724. runtime->hw = snd_ad1848_capture;
  725. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
  726. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
  727. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  728. return 0;
  729. }
  730. static int snd_ad1848_playback_close(struct snd_pcm_substream *substream)
  731. {
  732. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  733. chip->mode &= ~AD1848_MODE_PLAY;
  734. chip->playback_substream = NULL;
  735. snd_ad1848_close(chip);
  736. return 0;
  737. }
  738. static int snd_ad1848_capture_close(struct snd_pcm_substream *substream)
  739. {
  740. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  741. chip->mode &= ~AD1848_MODE_CAPTURE;
  742. chip->capture_substream = NULL;
  743. snd_ad1848_close(chip);
  744. return 0;
  745. }
  746. static int snd_ad1848_free(struct snd_ad1848 *chip)
  747. {
  748. release_and_free_resource(chip->res_port);
  749. if (chip->irq >= 0)
  750. free_irq(chip->irq, (void *) chip);
  751. if (chip->dma >= 0) {
  752. snd_dma_disable(chip->dma);
  753. free_dma(chip->dma);
  754. }
  755. kfree(chip);
  756. return 0;
  757. }
  758. static int snd_ad1848_dev_free(struct snd_device *device)
  759. {
  760. struct snd_ad1848 *chip = device->device_data;
  761. return snd_ad1848_free(chip);
  762. }
  763. static const char *snd_ad1848_chip_id(struct snd_ad1848 *chip)
  764. {
  765. switch (chip->hardware) {
  766. case AD1848_HW_AD1847: return "AD1847";
  767. case AD1848_HW_AD1848: return "AD1848";
  768. case AD1848_HW_CS4248: return "CS4248";
  769. case AD1848_HW_CMI8330: return "CMI8330/C3D";
  770. default: return "???";
  771. }
  772. }
  773. int snd_ad1848_create(struct snd_card *card,
  774. unsigned long port,
  775. int irq, int dma,
  776. unsigned short hardware,
  777. struct snd_ad1848 ** rchip)
  778. {
  779. static struct snd_device_ops ops = {
  780. .dev_free = snd_ad1848_dev_free,
  781. };
  782. struct snd_ad1848 *chip;
  783. int err;
  784. *rchip = NULL;
  785. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  786. if (chip == NULL)
  787. return -ENOMEM;
  788. spin_lock_init(&chip->reg_lock);
  789. mutex_init(&chip->open_mutex);
  790. chip->card = card;
  791. chip->port = port;
  792. chip->irq = -1;
  793. chip->dma = -1;
  794. chip->hardware = hardware;
  795. memcpy(&chip->image, &snd_ad1848_original_image, sizeof(snd_ad1848_original_image));
  796. if ((chip->res_port = request_region(port, 4, "AD1848")) == NULL) {
  797. snd_printk(KERN_ERR "ad1848: can't grab port 0x%lx\n", port);
  798. snd_ad1848_free(chip);
  799. return -EBUSY;
  800. }
  801. if (request_irq(irq, snd_ad1848_interrupt, IRQF_DISABLED, "AD1848", (void *) chip)) {
  802. snd_printk(KERN_ERR "ad1848: can't grab IRQ %d\n", irq);
  803. snd_ad1848_free(chip);
  804. return -EBUSY;
  805. }
  806. chip->irq = irq;
  807. if (request_dma(dma, "AD1848")) {
  808. snd_printk(KERN_ERR "ad1848: can't grab DMA %d\n", dma);
  809. snd_ad1848_free(chip);
  810. return -EBUSY;
  811. }
  812. chip->dma = dma;
  813. if (hardware == AD1848_HW_THINKPAD) {
  814. chip->thinkpad_flag = 1;
  815. chip->hardware = AD1848_HW_DETECT; /* reset */
  816. snd_ad1848_thinkpad_twiddle(chip, 1);
  817. }
  818. if (snd_ad1848_probe(chip) < 0) {
  819. snd_ad1848_free(chip);
  820. return -ENODEV;
  821. }
  822. /* Register device */
  823. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  824. snd_ad1848_free(chip);
  825. return err;
  826. }
  827. #ifdef CONFIG_PM
  828. chip->suspend = snd_ad1848_suspend;
  829. chip->resume = snd_ad1848_resume;
  830. #endif
  831. *rchip = chip;
  832. return 0;
  833. }
  834. EXPORT_SYMBOL(snd_ad1848_create);
  835. static struct snd_pcm_ops snd_ad1848_playback_ops = {
  836. .open = snd_ad1848_playback_open,
  837. .close = snd_ad1848_playback_close,
  838. .ioctl = snd_ad1848_ioctl,
  839. .hw_params = snd_ad1848_playback_hw_params,
  840. .hw_free = snd_ad1848_playback_hw_free,
  841. .prepare = snd_ad1848_playback_prepare,
  842. .trigger = snd_ad1848_playback_trigger,
  843. .pointer = snd_ad1848_playback_pointer,
  844. };
  845. static struct snd_pcm_ops snd_ad1848_capture_ops = {
  846. .open = snd_ad1848_capture_open,
  847. .close = snd_ad1848_capture_close,
  848. .ioctl = snd_ad1848_ioctl,
  849. .hw_params = snd_ad1848_capture_hw_params,
  850. .hw_free = snd_ad1848_capture_hw_free,
  851. .prepare = snd_ad1848_capture_prepare,
  852. .trigger = snd_ad1848_capture_trigger,
  853. .pointer = snd_ad1848_capture_pointer,
  854. };
  855. int snd_ad1848_pcm(struct snd_ad1848 *chip, int device, struct snd_pcm **rpcm)
  856. {
  857. struct snd_pcm *pcm;
  858. int err;
  859. if ((err = snd_pcm_new(chip->card, "AD1848", device, 1, 1, &pcm)) < 0)
  860. return err;
  861. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1848_playback_ops);
  862. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1848_capture_ops);
  863. pcm->private_data = chip;
  864. pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
  865. strcpy(pcm->name, snd_ad1848_chip_id(chip));
  866. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  867. snd_dma_isa_data(),
  868. 64*1024, chip->dma > 3 ? 128*1024 : 64*1024);
  869. chip->pcm = pcm;
  870. if (rpcm)
  871. *rpcm = pcm;
  872. return 0;
  873. }
  874. EXPORT_SYMBOL(snd_ad1848_pcm);
  875. const struct snd_pcm_ops *snd_ad1848_get_pcm_ops(int direction)
  876. {
  877. return direction == SNDRV_PCM_STREAM_PLAYBACK ?
  878. &snd_ad1848_playback_ops : &snd_ad1848_capture_ops;
  879. }
  880. EXPORT_SYMBOL(snd_ad1848_get_pcm_ops);
  881. /*
  882. * MIXER part
  883. */
  884. static int snd_ad1848_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  885. {
  886. static char *texts[4] = {
  887. "Line", "Aux", "Mic", "Mix"
  888. };
  889. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  890. uinfo->count = 2;
  891. uinfo->value.enumerated.items = 4;
  892. if (uinfo->value.enumerated.item > 3)
  893. uinfo->value.enumerated.item = 3;
  894. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  895. return 0;
  896. }
  897. static int snd_ad1848_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  898. {
  899. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  900. unsigned long flags;
  901. spin_lock_irqsave(&chip->reg_lock, flags);
  902. ucontrol->value.enumerated.item[0] = (chip->image[AD1848_LEFT_INPUT] & AD1848_MIXS_ALL) >> 6;
  903. ucontrol->value.enumerated.item[1] = (chip->image[AD1848_RIGHT_INPUT] & AD1848_MIXS_ALL) >> 6;
  904. spin_unlock_irqrestore(&chip->reg_lock, flags);
  905. return 0;
  906. }
  907. static int snd_ad1848_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  908. {
  909. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  910. unsigned long flags;
  911. unsigned short left, right;
  912. int change;
  913. if (ucontrol->value.enumerated.item[0] > 3 ||
  914. ucontrol->value.enumerated.item[1] > 3)
  915. return -EINVAL;
  916. left = ucontrol->value.enumerated.item[0] << 6;
  917. right = ucontrol->value.enumerated.item[1] << 6;
  918. spin_lock_irqsave(&chip->reg_lock, flags);
  919. left = (chip->image[AD1848_LEFT_INPUT] & ~AD1848_MIXS_ALL) | left;
  920. right = (chip->image[AD1848_RIGHT_INPUT] & ~AD1848_MIXS_ALL) | right;
  921. change = left != chip->image[AD1848_LEFT_INPUT] ||
  922. right != chip->image[AD1848_RIGHT_INPUT];
  923. snd_ad1848_out(chip, AD1848_LEFT_INPUT, left);
  924. snd_ad1848_out(chip, AD1848_RIGHT_INPUT, right);
  925. spin_unlock_irqrestore(&chip->reg_lock, flags);
  926. return change;
  927. }
  928. static int snd_ad1848_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  929. {
  930. int mask = (kcontrol->private_value >> 16) & 0xff;
  931. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  932. uinfo->count = 1;
  933. uinfo->value.integer.min = 0;
  934. uinfo->value.integer.max = mask;
  935. return 0;
  936. }
  937. static int snd_ad1848_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  938. {
  939. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  940. unsigned long flags;
  941. int reg = kcontrol->private_value & 0xff;
  942. int shift = (kcontrol->private_value >> 8) & 0xff;
  943. int mask = (kcontrol->private_value >> 16) & 0xff;
  944. int invert = (kcontrol->private_value >> 24) & 0xff;
  945. spin_lock_irqsave(&chip->reg_lock, flags);
  946. ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
  947. spin_unlock_irqrestore(&chip->reg_lock, flags);
  948. if (invert)
  949. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  950. return 0;
  951. }
  952. static int snd_ad1848_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  953. {
  954. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  955. unsigned long flags;
  956. int reg = kcontrol->private_value & 0xff;
  957. int shift = (kcontrol->private_value >> 8) & 0xff;
  958. int mask = (kcontrol->private_value >> 16) & 0xff;
  959. int invert = (kcontrol->private_value >> 24) & 0xff;
  960. int change;
  961. unsigned short val;
  962. val = (ucontrol->value.integer.value[0] & mask);
  963. if (invert)
  964. val = mask - val;
  965. val <<= shift;
  966. spin_lock_irqsave(&chip->reg_lock, flags);
  967. val = (chip->image[reg] & ~(mask << shift)) | val;
  968. change = val != chip->image[reg];
  969. snd_ad1848_out(chip, reg, val);
  970. spin_unlock_irqrestore(&chip->reg_lock, flags);
  971. return change;
  972. }
  973. static int snd_ad1848_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  974. {
  975. int mask = (kcontrol->private_value >> 24) & 0xff;
  976. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  977. uinfo->count = 2;
  978. uinfo->value.integer.min = 0;
  979. uinfo->value.integer.max = mask;
  980. return 0;
  981. }
  982. static int snd_ad1848_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  983. {
  984. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  985. unsigned long flags;
  986. int left_reg = kcontrol->private_value & 0xff;
  987. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  988. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  989. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  990. int mask = (kcontrol->private_value >> 24) & 0xff;
  991. int invert = (kcontrol->private_value >> 22) & 1;
  992. spin_lock_irqsave(&chip->reg_lock, flags);
  993. ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
  994. ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
  995. spin_unlock_irqrestore(&chip->reg_lock, flags);
  996. if (invert) {
  997. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  998. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  999. }
  1000. return 0;
  1001. }
  1002. static int snd_ad1848_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1003. {
  1004. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  1005. unsigned long flags;
  1006. int left_reg = kcontrol->private_value & 0xff;
  1007. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1008. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1009. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1010. int mask = (kcontrol->private_value >> 24) & 0xff;
  1011. int invert = (kcontrol->private_value >> 22) & 1;
  1012. int change;
  1013. unsigned short val1, val2;
  1014. val1 = ucontrol->value.integer.value[0] & mask;
  1015. val2 = ucontrol->value.integer.value[1] & mask;
  1016. if (invert) {
  1017. val1 = mask - val1;
  1018. val2 = mask - val2;
  1019. }
  1020. val1 <<= shift_left;
  1021. val2 <<= shift_right;
  1022. spin_lock_irqsave(&chip->reg_lock, flags);
  1023. if (left_reg != right_reg) {
  1024. val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
  1025. val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
  1026. change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
  1027. snd_ad1848_out(chip, left_reg, val1);
  1028. snd_ad1848_out(chip, right_reg, val2);
  1029. } else {
  1030. val1 = (chip->image[left_reg] & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  1031. change = val1 != chip->image[left_reg];
  1032. snd_ad1848_out(chip, left_reg, val1);
  1033. }
  1034. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1035. return change;
  1036. }
  1037. /*
  1038. */
  1039. int snd_ad1848_add_ctl_elem(struct snd_ad1848 *chip,
  1040. const struct ad1848_mix_elem *c)
  1041. {
  1042. static struct snd_kcontrol_new newctls[] = {
  1043. [AD1848_MIX_SINGLE] = {
  1044. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1045. .info = snd_ad1848_info_single,
  1046. .get = snd_ad1848_get_single,
  1047. .put = snd_ad1848_put_single,
  1048. },
  1049. [AD1848_MIX_DOUBLE] = {
  1050. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1051. .info = snd_ad1848_info_double,
  1052. .get = snd_ad1848_get_double,
  1053. .put = snd_ad1848_put_double,
  1054. },
  1055. [AD1848_MIX_CAPTURE] = {
  1056. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1057. .info = snd_ad1848_info_mux,
  1058. .get = snd_ad1848_get_mux,
  1059. .put = snd_ad1848_put_mux,
  1060. },
  1061. };
  1062. struct snd_kcontrol *ctl;
  1063. int err;
  1064. ctl = snd_ctl_new1(&newctls[c->type], chip);
  1065. if (! ctl)
  1066. return -ENOMEM;
  1067. strlcpy(ctl->id.name, c->name, sizeof(ctl->id.name));
  1068. ctl->id.index = c->index;
  1069. ctl->private_value = c->private_value;
  1070. if (c->tlv) {
  1071. ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
  1072. ctl->tlv.p = c->tlv;
  1073. }
  1074. if ((err = snd_ctl_add(chip->card, ctl)) < 0)
  1075. return err;
  1076. return 0;
  1077. }
  1078. EXPORT_SYMBOL(snd_ad1848_add_ctl_elem);
  1079. static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
  1080. static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
  1081. static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
  1082. static struct ad1848_mix_elem snd_ad1848_controls[] = {
  1083. AD1848_DOUBLE("PCM Playback Switch", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 7, 7, 1, 1),
  1084. AD1848_DOUBLE_TLV("PCM Playback Volume", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 0, 0, 63, 1,
  1085. db_scale_6bit),
  1086. AD1848_DOUBLE("Aux Playback Switch", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
  1087. AD1848_DOUBLE_TLV("Aux Playback Volume", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 0, 0, 31, 1,
  1088. db_scale_5bit_12db_max),
  1089. AD1848_DOUBLE("Aux Playback Switch", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
  1090. AD1848_DOUBLE_TLV("Aux Playback Volume", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 0, 0, 31, 1,
  1091. db_scale_5bit_12db_max),
  1092. AD1848_DOUBLE_TLV("Capture Volume", 0, AD1848_LEFT_INPUT, AD1848_RIGHT_INPUT, 0, 0, 15, 0,
  1093. db_scale_rec_gain),
  1094. {
  1095. .name = "Capture Source",
  1096. .type = AD1848_MIX_CAPTURE,
  1097. },
  1098. AD1848_SINGLE("Loopback Capture Switch", 0, AD1848_LOOPBACK, 0, 1, 0),
  1099. AD1848_SINGLE_TLV("Loopback Capture Volume", 0, AD1848_LOOPBACK, 1, 63, 0,
  1100. db_scale_6bit),
  1101. };
  1102. int snd_ad1848_mixer(struct snd_ad1848 *chip)
  1103. {
  1104. struct snd_card *card;
  1105. struct snd_pcm *pcm;
  1106. unsigned int idx;
  1107. int err;
  1108. snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
  1109. pcm = chip->pcm;
  1110. card = chip->card;
  1111. strcpy(card->mixername, pcm->name);
  1112. for (idx = 0; idx < ARRAY_SIZE(snd_ad1848_controls); idx++)
  1113. if ((err = snd_ad1848_add_ctl_elem(chip, &snd_ad1848_controls[idx])) < 0)
  1114. return err;
  1115. return 0;
  1116. }
  1117. EXPORT_SYMBOL(snd_ad1848_mixer);
  1118. /*
  1119. * INIT part
  1120. */
  1121. static int __init alsa_ad1848_init(void)
  1122. {
  1123. return 0;
  1124. }
  1125. static void __exit alsa_ad1848_exit(void)
  1126. {
  1127. }
  1128. module_init(alsa_ad1848_init)
  1129. module_exit(alsa_ad1848_exit)