xhci-hcd.c 41 KB

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  1. /*
  2. * xHCI host controller driver
  3. *
  4. * Copyright (C) 2008 Intel Corp.
  5. *
  6. * Author: Sarah Sharp
  7. * Some code borrowed from the Linux EHCI driver.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  16. * for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software Foundation,
  20. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/irq.h>
  23. #include <linux/module.h>
  24. #include "xhci.h"
  25. #define DRIVER_AUTHOR "Sarah Sharp"
  26. #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
  27. /* TODO: copied from ehci-hcd.c - can this be refactored? */
  28. /*
  29. * handshake - spin reading hc until handshake completes or fails
  30. * @ptr: address of hc register to be read
  31. * @mask: bits to look at in result of read
  32. * @done: value of those bits when handshake succeeds
  33. * @usec: timeout in microseconds
  34. *
  35. * Returns negative errno, or zero on success
  36. *
  37. * Success happens when the "mask" bits have the specified value (hardware
  38. * handshake done). There are two failure modes: "usec" have passed (major
  39. * hardware flakeout), or the register reads as all-ones (hardware removed).
  40. */
  41. static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
  42. u32 mask, u32 done, int usec)
  43. {
  44. u32 result;
  45. do {
  46. result = xhci_readl(xhci, ptr);
  47. if (result == ~(u32)0) /* card removed */
  48. return -ENODEV;
  49. result &= mask;
  50. if (result == done)
  51. return 0;
  52. udelay(1);
  53. usec--;
  54. } while (usec > 0);
  55. return -ETIMEDOUT;
  56. }
  57. /*
  58. * Force HC into halt state.
  59. *
  60. * Disable any IRQs and clear the run/stop bit.
  61. * HC will complete any current and actively pipelined transactions, and
  62. * should halt within 16 microframes of the run/stop bit being cleared.
  63. * Read HC Halted bit in the status register to see when the HC is finished.
  64. * XXX: shouldn't we set HC_STATE_HALT here somewhere?
  65. */
  66. int xhci_halt(struct xhci_hcd *xhci)
  67. {
  68. u32 halted;
  69. u32 cmd;
  70. u32 mask;
  71. xhci_dbg(xhci, "// Halt the HC\n");
  72. /* Disable all interrupts from the host controller */
  73. mask = ~(XHCI_IRQS);
  74. halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
  75. if (!halted)
  76. mask &= ~CMD_RUN;
  77. cmd = xhci_readl(xhci, &xhci->op_regs->command);
  78. cmd &= mask;
  79. xhci_writel(xhci, cmd, &xhci->op_regs->command);
  80. return handshake(xhci, &xhci->op_regs->status,
  81. STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
  82. }
  83. /*
  84. * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
  85. *
  86. * This resets pipelines, timers, counters, state machines, etc.
  87. * Transactions will be terminated immediately, and operational registers
  88. * will be set to their defaults.
  89. */
  90. int xhci_reset(struct xhci_hcd *xhci)
  91. {
  92. u32 command;
  93. u32 state;
  94. state = xhci_readl(xhci, &xhci->op_regs->status);
  95. BUG_ON((state & STS_HALT) == 0);
  96. xhci_dbg(xhci, "// Reset the HC\n");
  97. command = xhci_readl(xhci, &xhci->op_regs->command);
  98. command |= CMD_RESET;
  99. xhci_writel(xhci, command, &xhci->op_regs->command);
  100. /* XXX: Why does EHCI set this here? Shouldn't other code do this? */
  101. xhci_to_hcd(xhci)->state = HC_STATE_HALT;
  102. return handshake(xhci, &xhci->op_regs->command, CMD_RESET, 0, 250 * 1000);
  103. }
  104. /*
  105. * Stop the HC from processing the endpoint queues.
  106. */
  107. static void xhci_quiesce(struct xhci_hcd *xhci)
  108. {
  109. /*
  110. * Queues are per endpoint, so we need to disable an endpoint or slot.
  111. *
  112. * To disable a slot, we need to insert a disable slot command on the
  113. * command ring and ring the doorbell. This will also free any internal
  114. * resources associated with the slot (which might not be what we want).
  115. *
  116. * A Release Endpoint command sounds better - doesn't free internal HC
  117. * memory, but removes the endpoints from the schedule and releases the
  118. * bandwidth, disables the doorbells, and clears the endpoint enable
  119. * flag. Usually used prior to a set interface command.
  120. *
  121. * TODO: Implement after command ring code is done.
  122. */
  123. BUG_ON(!HC_IS_RUNNING(xhci_to_hcd(xhci)->state));
  124. xhci_dbg(xhci, "Finished quiescing -- code not written yet\n");
  125. }
  126. #if 0
  127. /* Set up MSI-X table for entry 0 (may claim other entries later) */
  128. static int xhci_setup_msix(struct xhci_hcd *xhci)
  129. {
  130. int ret;
  131. struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
  132. xhci->msix_count = 0;
  133. /* XXX: did I do this right? ixgbe does kcalloc for more than one */
  134. xhci->msix_entries = kmalloc(sizeof(struct msix_entry), GFP_KERNEL);
  135. if (!xhci->msix_entries) {
  136. xhci_err(xhci, "Failed to allocate MSI-X entries\n");
  137. return -ENOMEM;
  138. }
  139. xhci->msix_entries[0].entry = 0;
  140. ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
  141. if (ret) {
  142. xhci_err(xhci, "Failed to enable MSI-X\n");
  143. goto free_entries;
  144. }
  145. /*
  146. * Pass the xhci pointer value as the request_irq "cookie".
  147. * If more irqs are added, this will need to be unique for each one.
  148. */
  149. ret = request_irq(xhci->msix_entries[0].vector, &xhci_irq, 0,
  150. "xHCI", xhci_to_hcd(xhci));
  151. if (ret) {
  152. xhci_err(xhci, "Failed to allocate MSI-X interrupt\n");
  153. goto disable_msix;
  154. }
  155. xhci_dbg(xhci, "Finished setting up MSI-X\n");
  156. return 0;
  157. disable_msix:
  158. pci_disable_msix(pdev);
  159. free_entries:
  160. kfree(xhci->msix_entries);
  161. xhci->msix_entries = NULL;
  162. return ret;
  163. }
  164. /* XXX: code duplication; can xhci_setup_msix call this? */
  165. /* Free any IRQs and disable MSI-X */
  166. static void xhci_cleanup_msix(struct xhci_hcd *xhci)
  167. {
  168. struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
  169. if (!xhci->msix_entries)
  170. return;
  171. free_irq(xhci->msix_entries[0].vector, xhci);
  172. pci_disable_msix(pdev);
  173. kfree(xhci->msix_entries);
  174. xhci->msix_entries = NULL;
  175. xhci_dbg(xhci, "Finished cleaning up MSI-X\n");
  176. }
  177. #endif
  178. /*
  179. * Initialize memory for HCD and xHC (one-time init).
  180. *
  181. * Program the PAGESIZE register, initialize the device context array, create
  182. * device contexts (?), set up a command ring segment (or two?), create event
  183. * ring (one for now).
  184. */
  185. int xhci_init(struct usb_hcd *hcd)
  186. {
  187. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  188. int retval = 0;
  189. xhci_dbg(xhci, "xhci_init\n");
  190. spin_lock_init(&xhci->lock);
  191. retval = xhci_mem_init(xhci, GFP_KERNEL);
  192. xhci_dbg(xhci, "Finished xhci_init\n");
  193. return retval;
  194. }
  195. /*
  196. * Called in interrupt context when there might be work
  197. * queued on the event ring
  198. *
  199. * xhci->lock must be held by caller.
  200. */
  201. static void xhci_work(struct xhci_hcd *xhci)
  202. {
  203. u32 temp;
  204. u64 temp_64;
  205. /*
  206. * Clear the op reg interrupt status first,
  207. * so we can receive interrupts from other MSI-X interrupters.
  208. * Write 1 to clear the interrupt status.
  209. */
  210. temp = xhci_readl(xhci, &xhci->op_regs->status);
  211. temp |= STS_EINT;
  212. xhci_writel(xhci, temp, &xhci->op_regs->status);
  213. /* FIXME when MSI-X is supported and there are multiple vectors */
  214. /* Clear the MSI-X event interrupt status */
  215. /* Acknowledge the interrupt */
  216. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  217. temp |= 0x3;
  218. xhci_writel(xhci, temp, &xhci->ir_set->irq_pending);
  219. /* Flush posted writes */
  220. xhci_readl(xhci, &xhci->ir_set->irq_pending);
  221. /* FIXME this should be a delayed service routine that clears the EHB */
  222. xhci_handle_event(xhci);
  223. /* Clear the event handler busy flag; the event ring should be empty. */
  224. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  225. xhci_write_64(xhci, temp_64 & ~ERST_EHB, &xhci->ir_set->erst_dequeue);
  226. /* Flush posted writes -- FIXME is this necessary? */
  227. xhci_readl(xhci, &xhci->ir_set->irq_pending);
  228. }
  229. /*-------------------------------------------------------------------------*/
  230. /*
  231. * xHCI spec says we can get an interrupt, and if the HC has an error condition,
  232. * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
  233. * indicators of an event TRB error, but we check the status *first* to be safe.
  234. */
  235. irqreturn_t xhci_irq(struct usb_hcd *hcd)
  236. {
  237. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  238. u32 temp, temp2;
  239. spin_lock(&xhci->lock);
  240. /* Check if the xHC generated the interrupt, or the irq is shared */
  241. temp = xhci_readl(xhci, &xhci->op_regs->status);
  242. temp2 = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  243. if (!(temp & STS_EINT) && !ER_IRQ_PENDING(temp2)) {
  244. spin_unlock(&xhci->lock);
  245. return IRQ_NONE;
  246. }
  247. if (temp & STS_FATAL) {
  248. xhci_warn(xhci, "WARNING: Host System Error\n");
  249. xhci_halt(xhci);
  250. xhci_to_hcd(xhci)->state = HC_STATE_HALT;
  251. spin_unlock(&xhci->lock);
  252. return -ESHUTDOWN;
  253. }
  254. xhci_work(xhci);
  255. spin_unlock(&xhci->lock);
  256. return IRQ_HANDLED;
  257. }
  258. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  259. void xhci_event_ring_work(unsigned long arg)
  260. {
  261. unsigned long flags;
  262. int temp;
  263. u64 temp_64;
  264. struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
  265. int i, j;
  266. xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
  267. spin_lock_irqsave(&xhci->lock, flags);
  268. temp = xhci_readl(xhci, &xhci->op_regs->status);
  269. xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
  270. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  271. xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
  272. xhci_dbg(xhci, "No-op commands handled = %d\n", xhci->noops_handled);
  273. xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
  274. xhci->error_bitmask = 0;
  275. xhci_dbg(xhci, "Event ring:\n");
  276. xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
  277. xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
  278. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  279. temp_64 &= ~ERST_PTR_MASK;
  280. xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
  281. xhci_dbg(xhci, "Command ring:\n");
  282. xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
  283. xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
  284. xhci_dbg_cmd_ptrs(xhci);
  285. for (i = 0; i < MAX_HC_SLOTS; ++i) {
  286. if (xhci->devs[i]) {
  287. for (j = 0; j < 31; ++j) {
  288. if (xhci->devs[i]->ep_rings[j]) {
  289. xhci_dbg(xhci, "Dev %d endpoint ring %d:\n", i, j);
  290. xhci_debug_segment(xhci, xhci->devs[i]->ep_rings[j]->deq_seg);
  291. }
  292. }
  293. }
  294. }
  295. if (xhci->noops_submitted != NUM_TEST_NOOPS)
  296. if (xhci_setup_one_noop(xhci))
  297. xhci_ring_cmd_db(xhci);
  298. spin_unlock_irqrestore(&xhci->lock, flags);
  299. if (!xhci->zombie)
  300. mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
  301. else
  302. xhci_dbg(xhci, "Quit polling the event ring.\n");
  303. }
  304. #endif
  305. /*
  306. * Start the HC after it was halted.
  307. *
  308. * This function is called by the USB core when the HC driver is added.
  309. * Its opposite is xhci_stop().
  310. *
  311. * xhci_init() must be called once before this function can be called.
  312. * Reset the HC, enable device slot contexts, program DCBAAP, and
  313. * set command ring pointer and event ring pointer.
  314. *
  315. * Setup MSI-X vectors and enable interrupts.
  316. */
  317. int xhci_run(struct usb_hcd *hcd)
  318. {
  319. u32 temp;
  320. u64 temp_64;
  321. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  322. void (*doorbell)(struct xhci_hcd *) = NULL;
  323. hcd->uses_new_polling = 1;
  324. hcd->poll_rh = 0;
  325. xhci_dbg(xhci, "xhci_run\n");
  326. #if 0 /* FIXME: MSI not setup yet */
  327. /* Do this at the very last minute */
  328. ret = xhci_setup_msix(xhci);
  329. if (!ret)
  330. return ret;
  331. return -ENOSYS;
  332. #endif
  333. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  334. init_timer(&xhci->event_ring_timer);
  335. xhci->event_ring_timer.data = (unsigned long) xhci;
  336. xhci->event_ring_timer.function = xhci_event_ring_work;
  337. /* Poll the event ring */
  338. xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
  339. xhci->zombie = 0;
  340. xhci_dbg(xhci, "Setting event ring polling timer\n");
  341. add_timer(&xhci->event_ring_timer);
  342. #endif
  343. xhci_dbg(xhci, "// Set the interrupt modulation register\n");
  344. temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
  345. temp &= ~ER_IRQ_INTERVAL_MASK;
  346. temp |= (u32) 160;
  347. xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
  348. /* Set the HCD state before we enable the irqs */
  349. hcd->state = HC_STATE_RUNNING;
  350. temp = xhci_readl(xhci, &xhci->op_regs->command);
  351. temp |= (CMD_EIE);
  352. xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
  353. temp);
  354. xhci_writel(xhci, temp, &xhci->op_regs->command);
  355. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  356. xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
  357. xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
  358. xhci_writel(xhci, ER_IRQ_ENABLE(temp),
  359. &xhci->ir_set->irq_pending);
  360. xhci_print_ir_set(xhci, xhci->ir_set, 0);
  361. if (NUM_TEST_NOOPS > 0)
  362. doorbell = xhci_setup_one_noop(xhci);
  363. xhci_dbg(xhci, "Command ring memory map follows:\n");
  364. xhci_debug_ring(xhci, xhci->cmd_ring);
  365. xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
  366. xhci_dbg_cmd_ptrs(xhci);
  367. xhci_dbg(xhci, "ERST memory map follows:\n");
  368. xhci_dbg_erst(xhci, &xhci->erst);
  369. xhci_dbg(xhci, "Event ring:\n");
  370. xhci_debug_ring(xhci, xhci->event_ring);
  371. xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
  372. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  373. temp_64 &= ~ERST_PTR_MASK;
  374. xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
  375. temp = xhci_readl(xhci, &xhci->op_regs->command);
  376. temp |= (CMD_RUN);
  377. xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
  378. temp);
  379. xhci_writel(xhci, temp, &xhci->op_regs->command);
  380. /* Flush PCI posted writes */
  381. temp = xhci_readl(xhci, &xhci->op_regs->command);
  382. xhci_dbg(xhci, "// @%p = 0x%x\n", &xhci->op_regs->command, temp);
  383. if (doorbell)
  384. (*doorbell)(xhci);
  385. xhci_dbg(xhci, "Finished xhci_run\n");
  386. return 0;
  387. }
  388. /*
  389. * Stop xHCI driver.
  390. *
  391. * This function is called by the USB core when the HC driver is removed.
  392. * Its opposite is xhci_run().
  393. *
  394. * Disable device contexts, disable IRQs, and quiesce the HC.
  395. * Reset the HC, finish any completed transactions, and cleanup memory.
  396. */
  397. void xhci_stop(struct usb_hcd *hcd)
  398. {
  399. u32 temp;
  400. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  401. spin_lock_irq(&xhci->lock);
  402. if (HC_IS_RUNNING(hcd->state))
  403. xhci_quiesce(xhci);
  404. xhci_halt(xhci);
  405. xhci_reset(xhci);
  406. spin_unlock_irq(&xhci->lock);
  407. #if 0 /* No MSI yet */
  408. xhci_cleanup_msix(xhci);
  409. #endif
  410. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  411. /* Tell the event ring poll function not to reschedule */
  412. xhci->zombie = 1;
  413. del_timer_sync(&xhci->event_ring_timer);
  414. #endif
  415. xhci_dbg(xhci, "// Disabling event ring interrupts\n");
  416. temp = xhci_readl(xhci, &xhci->op_regs->status);
  417. xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
  418. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  419. xhci_writel(xhci, ER_IRQ_DISABLE(temp),
  420. &xhci->ir_set->irq_pending);
  421. xhci_print_ir_set(xhci, xhci->ir_set, 0);
  422. xhci_dbg(xhci, "cleaning up memory\n");
  423. xhci_mem_cleanup(xhci);
  424. xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
  425. xhci_readl(xhci, &xhci->op_regs->status));
  426. }
  427. /*
  428. * Shutdown HC (not bus-specific)
  429. *
  430. * This is called when the machine is rebooting or halting. We assume that the
  431. * machine will be powered off, and the HC's internal state will be reset.
  432. * Don't bother to free memory.
  433. */
  434. void xhci_shutdown(struct usb_hcd *hcd)
  435. {
  436. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  437. spin_lock_irq(&xhci->lock);
  438. xhci_halt(xhci);
  439. spin_unlock_irq(&xhci->lock);
  440. #if 0
  441. xhci_cleanup_msix(xhci);
  442. #endif
  443. xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
  444. xhci_readl(xhci, &xhci->op_regs->status));
  445. }
  446. /*-------------------------------------------------------------------------*/
  447. /**
  448. * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
  449. * HCDs. Find the index for an endpoint given its descriptor. Use the return
  450. * value to right shift 1 for the bitmask.
  451. *
  452. * Index = (epnum * 2) + direction - 1,
  453. * where direction = 0 for OUT, 1 for IN.
  454. * For control endpoints, the IN index is used (OUT index is unused), so
  455. * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
  456. */
  457. unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
  458. {
  459. unsigned int index;
  460. if (usb_endpoint_xfer_control(desc))
  461. index = (unsigned int) (usb_endpoint_num(desc)*2);
  462. else
  463. index = (unsigned int) (usb_endpoint_num(desc)*2) +
  464. (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
  465. return index;
  466. }
  467. /* Find the flag for this endpoint (for use in the control context). Use the
  468. * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
  469. * bit 1, etc.
  470. */
  471. unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
  472. {
  473. return 1 << (xhci_get_endpoint_index(desc) + 1);
  474. }
  475. /* Compute the last valid endpoint context index. Basically, this is the
  476. * endpoint index plus one. For slot contexts with more than valid endpoint,
  477. * we find the most significant bit set in the added contexts flags.
  478. * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
  479. * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
  480. */
  481. static inline unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
  482. {
  483. return fls(added_ctxs) - 1;
  484. }
  485. /* Returns 1 if the arguments are OK;
  486. * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
  487. */
  488. int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
  489. struct usb_host_endpoint *ep, int check_ep, const char *func) {
  490. if (!hcd || (check_ep && !ep) || !udev) {
  491. printk(KERN_DEBUG "xHCI %s called with invalid args\n",
  492. func);
  493. return -EINVAL;
  494. }
  495. if (!udev->parent) {
  496. printk(KERN_DEBUG "xHCI %s called for root hub\n",
  497. func);
  498. return 0;
  499. }
  500. if (!udev->slot_id) {
  501. printk(KERN_DEBUG "xHCI %s called with unaddressed device\n",
  502. func);
  503. return -EINVAL;
  504. }
  505. return 1;
  506. }
  507. /*
  508. * non-error returns are a promise to giveback() the urb later
  509. * we drop ownership so next owner (or urb unlink) can get it
  510. */
  511. int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  512. {
  513. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  514. unsigned long flags;
  515. int ret = 0;
  516. unsigned int slot_id, ep_index;
  517. if (!urb || xhci_check_args(hcd, urb->dev, urb->ep, true, __func__) <= 0)
  518. return -EINVAL;
  519. slot_id = urb->dev->slot_id;
  520. ep_index = xhci_get_endpoint_index(&urb->ep->desc);
  521. spin_lock_irqsave(&xhci->lock, flags);
  522. if (!xhci->devs || !xhci->devs[slot_id]) {
  523. if (!in_interrupt())
  524. dev_warn(&urb->dev->dev, "WARN: urb submitted for dev with no Slot ID\n");
  525. ret = -EINVAL;
  526. goto exit;
  527. }
  528. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
  529. if (!in_interrupt())
  530. xhci_dbg(xhci, "urb submitted during PCI suspend\n");
  531. ret = -ESHUTDOWN;
  532. goto exit;
  533. }
  534. if (usb_endpoint_xfer_control(&urb->ep->desc))
  535. /* We have a spinlock and interrupts disabled, so we must pass
  536. * atomic context to this function, which may allocate memory.
  537. */
  538. ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
  539. slot_id, ep_index);
  540. else if (usb_endpoint_xfer_bulk(&urb->ep->desc))
  541. ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
  542. slot_id, ep_index);
  543. else
  544. ret = -EINVAL;
  545. exit:
  546. spin_unlock_irqrestore(&xhci->lock, flags);
  547. return ret;
  548. }
  549. /*
  550. * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
  551. * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
  552. * should pick up where it left off in the TD, unless a Set Transfer Ring
  553. * Dequeue Pointer is issued.
  554. *
  555. * The TRBs that make up the buffers for the canceled URB will be "removed" from
  556. * the ring. Since the ring is a contiguous structure, they can't be physically
  557. * removed. Instead, there are two options:
  558. *
  559. * 1) If the HC is in the middle of processing the URB to be canceled, we
  560. * simply move the ring's dequeue pointer past those TRBs using the Set
  561. * Transfer Ring Dequeue Pointer command. This will be the common case,
  562. * when drivers timeout on the last submitted URB and attempt to cancel.
  563. *
  564. * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
  565. * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
  566. * HC will need to invalidate the any TRBs it has cached after the stop
  567. * endpoint command, as noted in the xHCI 0.95 errata.
  568. *
  569. * 3) The TD may have completed by the time the Stop Endpoint Command
  570. * completes, so software needs to handle that case too.
  571. *
  572. * This function should protect against the TD enqueueing code ringing the
  573. * doorbell while this code is waiting for a Stop Endpoint command to complete.
  574. * It also needs to account for multiple cancellations on happening at the same
  575. * time for the same endpoint.
  576. *
  577. * Note that this function can be called in any context, or so says
  578. * usb_hcd_unlink_urb()
  579. */
  580. int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  581. {
  582. unsigned long flags;
  583. int ret;
  584. struct xhci_hcd *xhci;
  585. struct xhci_td *td;
  586. unsigned int ep_index;
  587. struct xhci_ring *ep_ring;
  588. xhci = hcd_to_xhci(hcd);
  589. spin_lock_irqsave(&xhci->lock, flags);
  590. /* Make sure the URB hasn't completed or been unlinked already */
  591. ret = usb_hcd_check_unlink_urb(hcd, urb, status);
  592. if (ret || !urb->hcpriv)
  593. goto done;
  594. xhci_dbg(xhci, "Cancel URB %p\n", urb);
  595. ep_index = xhci_get_endpoint_index(&urb->ep->desc);
  596. ep_ring = xhci->devs[urb->dev->slot_id]->ep_rings[ep_index];
  597. td = (struct xhci_td *) urb->hcpriv;
  598. ep_ring->cancels_pending++;
  599. list_add_tail(&td->cancelled_td_list, &ep_ring->cancelled_td_list);
  600. /* Queue a stop endpoint command, but only if this is
  601. * the first cancellation to be handled.
  602. */
  603. if (ep_ring->cancels_pending == 1) {
  604. xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index);
  605. xhci_ring_cmd_db(xhci);
  606. }
  607. done:
  608. spin_unlock_irqrestore(&xhci->lock, flags);
  609. return ret;
  610. }
  611. /* Drop an endpoint from a new bandwidth configuration for this device.
  612. * Only one call to this function is allowed per endpoint before
  613. * check_bandwidth() or reset_bandwidth() must be called.
  614. * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
  615. * add the endpoint to the schedule with possibly new parameters denoted by a
  616. * different endpoint descriptor in usb_host_endpoint.
  617. * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
  618. * not allowed.
  619. *
  620. * The USB core will not allow URBs to be queued to an endpoint that is being
  621. * disabled, so there's no need for mutual exclusion to protect
  622. * the xhci->devs[slot_id] structure.
  623. */
  624. int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
  625. struct usb_host_endpoint *ep)
  626. {
  627. struct xhci_hcd *xhci;
  628. struct xhci_device_control *in_ctx;
  629. unsigned int last_ctx;
  630. unsigned int ep_index;
  631. struct xhci_ep_ctx *ep_ctx;
  632. u32 drop_flag;
  633. u32 new_add_flags, new_drop_flags, new_slot_info;
  634. int ret;
  635. ret = xhci_check_args(hcd, udev, ep, 1, __func__);
  636. if (ret <= 0)
  637. return ret;
  638. xhci = hcd_to_xhci(hcd);
  639. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  640. drop_flag = xhci_get_endpoint_flag(&ep->desc);
  641. if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
  642. xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
  643. __func__, drop_flag);
  644. return 0;
  645. }
  646. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  647. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  648. __func__);
  649. return -EINVAL;
  650. }
  651. in_ctx = xhci->devs[udev->slot_id]->in_ctx;
  652. ep_index = xhci_get_endpoint_index(&ep->desc);
  653. ep_ctx = &xhci->devs[udev->slot_id]->out_ctx->ep[ep_index];
  654. /* If the HC already knows the endpoint is disabled,
  655. * or the HCD has noted it is disabled, ignore this request
  656. */
  657. if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED ||
  658. in_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) {
  659. xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
  660. __func__, ep);
  661. return 0;
  662. }
  663. in_ctx->drop_flags |= drop_flag;
  664. new_drop_flags = in_ctx->drop_flags;
  665. in_ctx->add_flags = ~drop_flag;
  666. new_add_flags = in_ctx->add_flags;
  667. last_ctx = xhci_last_valid_endpoint(in_ctx->add_flags);
  668. /* Update the last valid endpoint context, if we deleted the last one */
  669. if ((in_ctx->slot.dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) {
  670. in_ctx->slot.dev_info &= ~LAST_CTX_MASK;
  671. in_ctx->slot.dev_info |= LAST_CTX(last_ctx);
  672. }
  673. new_slot_info = in_ctx->slot.dev_info;
  674. xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
  675. xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
  676. (unsigned int) ep->desc.bEndpointAddress,
  677. udev->slot_id,
  678. (unsigned int) new_drop_flags,
  679. (unsigned int) new_add_flags,
  680. (unsigned int) new_slot_info);
  681. return 0;
  682. }
  683. /* Add an endpoint to a new possible bandwidth configuration for this device.
  684. * Only one call to this function is allowed per endpoint before
  685. * check_bandwidth() or reset_bandwidth() must be called.
  686. * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
  687. * add the endpoint to the schedule with possibly new parameters denoted by a
  688. * different endpoint descriptor in usb_host_endpoint.
  689. * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
  690. * not allowed.
  691. *
  692. * The USB core will not allow URBs to be queued to an endpoint until the
  693. * configuration or alt setting is installed in the device, so there's no need
  694. * for mutual exclusion to protect the xhci->devs[slot_id] structure.
  695. */
  696. int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
  697. struct usb_host_endpoint *ep)
  698. {
  699. struct xhci_hcd *xhci;
  700. struct xhci_device_control *in_ctx;
  701. unsigned int ep_index;
  702. struct xhci_ep_ctx *ep_ctx;
  703. u32 added_ctxs;
  704. unsigned int last_ctx;
  705. u32 new_add_flags, new_drop_flags, new_slot_info;
  706. int ret = 0;
  707. ret = xhci_check_args(hcd, udev, ep, 1, __func__);
  708. if (ret <= 0) {
  709. /* So we won't queue a reset ep command for a root hub */
  710. ep->hcpriv = NULL;
  711. return ret;
  712. }
  713. xhci = hcd_to_xhci(hcd);
  714. added_ctxs = xhci_get_endpoint_flag(&ep->desc);
  715. last_ctx = xhci_last_valid_endpoint(added_ctxs);
  716. if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
  717. /* FIXME when we have to issue an evaluate endpoint command to
  718. * deal with ep0 max packet size changing once we get the
  719. * descriptors
  720. */
  721. xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
  722. __func__, added_ctxs);
  723. return 0;
  724. }
  725. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  726. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  727. __func__);
  728. return -EINVAL;
  729. }
  730. in_ctx = xhci->devs[udev->slot_id]->in_ctx;
  731. ep_index = xhci_get_endpoint_index(&ep->desc);
  732. ep_ctx = &xhci->devs[udev->slot_id]->out_ctx->ep[ep_index];
  733. /* If the HCD has already noted the endpoint is enabled,
  734. * ignore this request.
  735. */
  736. if (in_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) {
  737. xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
  738. __func__, ep);
  739. return 0;
  740. }
  741. /*
  742. * Configuration and alternate setting changes must be done in
  743. * process context, not interrupt context (or so documenation
  744. * for usb_set_interface() and usb_set_configuration() claim).
  745. */
  746. if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id],
  747. udev, ep, GFP_KERNEL) < 0) {
  748. dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
  749. __func__, ep->desc.bEndpointAddress);
  750. return -ENOMEM;
  751. }
  752. in_ctx->add_flags |= added_ctxs;
  753. new_add_flags = in_ctx->add_flags;
  754. /* If xhci_endpoint_disable() was called for this endpoint, but the
  755. * xHC hasn't been notified yet through the check_bandwidth() call,
  756. * this re-adds a new state for the endpoint from the new endpoint
  757. * descriptors. We must drop and re-add this endpoint, so we leave the
  758. * drop flags alone.
  759. */
  760. new_drop_flags = in_ctx->drop_flags;
  761. /* Update the last valid endpoint context, if we just added one past */
  762. if ((in_ctx->slot.dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) {
  763. in_ctx->slot.dev_info &= ~LAST_CTX_MASK;
  764. in_ctx->slot.dev_info |= LAST_CTX(last_ctx);
  765. }
  766. new_slot_info = in_ctx->slot.dev_info;
  767. /* Store the usb_device pointer for later use */
  768. ep->hcpriv = udev;
  769. xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
  770. (unsigned int) ep->desc.bEndpointAddress,
  771. udev->slot_id,
  772. (unsigned int) new_drop_flags,
  773. (unsigned int) new_add_flags,
  774. (unsigned int) new_slot_info);
  775. return 0;
  776. }
  777. static void xhci_zero_in_ctx(struct xhci_virt_device *virt_dev)
  778. {
  779. struct xhci_ep_ctx *ep_ctx;
  780. int i;
  781. /* When a device's add flag and drop flag are zero, any subsequent
  782. * configure endpoint command will leave that endpoint's state
  783. * untouched. Make sure we don't leave any old state in the input
  784. * endpoint contexts.
  785. */
  786. virt_dev->in_ctx->drop_flags = 0;
  787. virt_dev->in_ctx->add_flags = 0;
  788. virt_dev->in_ctx->slot.dev_info &= ~LAST_CTX_MASK;
  789. /* Endpoint 0 is always valid */
  790. virt_dev->in_ctx->slot.dev_info |= LAST_CTX(1);
  791. for (i = 1; i < 31; ++i) {
  792. ep_ctx = &virt_dev->in_ctx->ep[i];
  793. ep_ctx->ep_info = 0;
  794. ep_ctx->ep_info2 = 0;
  795. ep_ctx->deq = 0;
  796. ep_ctx->tx_info = 0;
  797. }
  798. }
  799. /* Called after one or more calls to xhci_add_endpoint() or
  800. * xhci_drop_endpoint(). If this call fails, the USB core is expected
  801. * to call xhci_reset_bandwidth().
  802. *
  803. * Since we are in the middle of changing either configuration or
  804. * installing a new alt setting, the USB core won't allow URBs to be
  805. * enqueued for any endpoint on the old config or interface. Nothing
  806. * else should be touching the xhci->devs[slot_id] structure, so we
  807. * don't need to take the xhci->lock for manipulating that.
  808. */
  809. int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  810. {
  811. int i;
  812. int ret = 0;
  813. int timeleft;
  814. unsigned long flags;
  815. struct xhci_hcd *xhci;
  816. struct xhci_virt_device *virt_dev;
  817. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  818. if (ret <= 0)
  819. return ret;
  820. xhci = hcd_to_xhci(hcd);
  821. if (!udev->slot_id || !xhci->devs || !xhci->devs[udev->slot_id]) {
  822. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  823. __func__);
  824. return -EINVAL;
  825. }
  826. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  827. virt_dev = xhci->devs[udev->slot_id];
  828. /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
  829. virt_dev->in_ctx->add_flags |= SLOT_FLAG;
  830. virt_dev->in_ctx->add_flags &= ~EP0_FLAG;
  831. virt_dev->in_ctx->drop_flags &= ~SLOT_FLAG;
  832. virt_dev->in_ctx->drop_flags &= ~EP0_FLAG;
  833. xhci_dbg(xhci, "New Input Control Context:\n");
  834. xhci_dbg_ctx(xhci, virt_dev->in_ctx, virt_dev->in_ctx_dma,
  835. LAST_CTX_TO_EP_NUM(virt_dev->in_ctx->slot.dev_info));
  836. spin_lock_irqsave(&xhci->lock, flags);
  837. ret = xhci_queue_configure_endpoint(xhci, virt_dev->in_ctx_dma,
  838. udev->slot_id);
  839. if (ret < 0) {
  840. spin_unlock_irqrestore(&xhci->lock, flags);
  841. xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
  842. return -ENOMEM;
  843. }
  844. xhci_ring_cmd_db(xhci);
  845. spin_unlock_irqrestore(&xhci->lock, flags);
  846. /* Wait for the configure endpoint command to complete */
  847. timeleft = wait_for_completion_interruptible_timeout(
  848. &virt_dev->cmd_completion,
  849. USB_CTRL_SET_TIMEOUT);
  850. if (timeleft <= 0) {
  851. xhci_warn(xhci, "%s while waiting for configure endpoint command\n",
  852. timeleft == 0 ? "Timeout" : "Signal");
  853. /* FIXME cancel the configure endpoint command */
  854. return -ETIME;
  855. }
  856. switch (virt_dev->cmd_status) {
  857. case COMP_ENOMEM:
  858. dev_warn(&udev->dev, "Not enough host controller resources "
  859. "for new device state.\n");
  860. ret = -ENOMEM;
  861. /* FIXME: can we allocate more resources for the HC? */
  862. break;
  863. case COMP_BW_ERR:
  864. dev_warn(&udev->dev, "Not enough bandwidth "
  865. "for new device state.\n");
  866. ret = -ENOSPC;
  867. /* FIXME: can we go back to the old state? */
  868. break;
  869. case COMP_TRB_ERR:
  870. /* the HCD set up something wrong */
  871. dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, add flag = 1, "
  872. "and endpoint is not disabled.\n");
  873. ret = -EINVAL;
  874. break;
  875. case COMP_SUCCESS:
  876. dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
  877. break;
  878. default:
  879. xhci_err(xhci, "ERROR: unexpected command completion "
  880. "code 0x%x.\n", virt_dev->cmd_status);
  881. ret = -EINVAL;
  882. break;
  883. }
  884. if (ret) {
  885. /* Callee should call reset_bandwidth() */
  886. return ret;
  887. }
  888. xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
  889. xhci_dbg_ctx(xhci, virt_dev->out_ctx, virt_dev->out_ctx_dma,
  890. LAST_CTX_TO_EP_NUM(virt_dev->in_ctx->slot.dev_info));
  891. xhci_zero_in_ctx(virt_dev);
  892. /* Free any old rings */
  893. for (i = 1; i < 31; ++i) {
  894. if (virt_dev->new_ep_rings[i]) {
  895. xhci_ring_free(xhci, virt_dev->ep_rings[i]);
  896. virt_dev->ep_rings[i] = virt_dev->new_ep_rings[i];
  897. virt_dev->new_ep_rings[i] = NULL;
  898. }
  899. }
  900. return ret;
  901. }
  902. void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  903. {
  904. struct xhci_hcd *xhci;
  905. struct xhci_virt_device *virt_dev;
  906. int i, ret;
  907. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  908. if (ret <= 0)
  909. return;
  910. xhci = hcd_to_xhci(hcd);
  911. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  912. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  913. __func__);
  914. return;
  915. }
  916. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  917. virt_dev = xhci->devs[udev->slot_id];
  918. /* Free any rings allocated for added endpoints */
  919. for (i = 0; i < 31; ++i) {
  920. if (virt_dev->new_ep_rings[i]) {
  921. xhci_ring_free(xhci, virt_dev->new_ep_rings[i]);
  922. virt_dev->new_ep_rings[i] = NULL;
  923. }
  924. }
  925. xhci_zero_in_ctx(virt_dev);
  926. }
  927. /* Deal with stalled endpoints. The core should have sent the control message
  928. * to clear the halt condition. However, we need to make the xHCI hardware
  929. * reset its sequence number, since a device will expect a sequence number of
  930. * zero after the halt condition is cleared.
  931. * Context: in_interrupt
  932. */
  933. void xhci_endpoint_reset(struct usb_hcd *hcd,
  934. struct usb_host_endpoint *ep)
  935. {
  936. struct xhci_hcd *xhci;
  937. struct usb_device *udev;
  938. unsigned int ep_index;
  939. unsigned long flags;
  940. int ret;
  941. xhci = hcd_to_xhci(hcd);
  942. udev = (struct usb_device *) ep->hcpriv;
  943. /* Called with a root hub endpoint (or an endpoint that wasn't added
  944. * with xhci_add_endpoint()
  945. */
  946. if (!ep->hcpriv)
  947. return;
  948. ep_index = xhci_get_endpoint_index(&ep->desc);
  949. xhci_dbg(xhci, "Queueing reset endpoint command\n");
  950. spin_lock_irqsave(&xhci->lock, flags);
  951. ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
  952. if (!ret) {
  953. xhci_ring_cmd_db(xhci);
  954. }
  955. spin_unlock_irqrestore(&xhci->lock, flags);
  956. if (ret)
  957. xhci_warn(xhci, "FIXME allocate a new ring segment\n");
  958. }
  959. /*
  960. * At this point, the struct usb_device is about to go away, the device has
  961. * disconnected, and all traffic has been stopped and the endpoints have been
  962. * disabled. Free any HC data structures associated with that device.
  963. */
  964. void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
  965. {
  966. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  967. unsigned long flags;
  968. if (udev->slot_id == 0)
  969. return;
  970. spin_lock_irqsave(&xhci->lock, flags);
  971. if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
  972. spin_unlock_irqrestore(&xhci->lock, flags);
  973. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  974. return;
  975. }
  976. xhci_ring_cmd_db(xhci);
  977. spin_unlock_irqrestore(&xhci->lock, flags);
  978. /*
  979. * Event command completion handler will free any data structures
  980. * associated with the slot. XXX Can free sleep?
  981. */
  982. }
  983. /*
  984. * Returns 0 if the xHC ran out of device slots, the Enable Slot command
  985. * timed out, or allocating memory failed. Returns 1 on success.
  986. */
  987. int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
  988. {
  989. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  990. unsigned long flags;
  991. int timeleft;
  992. int ret;
  993. spin_lock_irqsave(&xhci->lock, flags);
  994. ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
  995. if (ret) {
  996. spin_unlock_irqrestore(&xhci->lock, flags);
  997. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  998. return 0;
  999. }
  1000. xhci_ring_cmd_db(xhci);
  1001. spin_unlock_irqrestore(&xhci->lock, flags);
  1002. /* XXX: how much time for xHC slot assignment? */
  1003. timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
  1004. USB_CTRL_SET_TIMEOUT);
  1005. if (timeleft <= 0) {
  1006. xhci_warn(xhci, "%s while waiting for a slot\n",
  1007. timeleft == 0 ? "Timeout" : "Signal");
  1008. /* FIXME cancel the enable slot request */
  1009. return 0;
  1010. }
  1011. if (!xhci->slot_id) {
  1012. xhci_err(xhci, "Error while assigning device slot ID\n");
  1013. return 0;
  1014. }
  1015. /* xhci_alloc_virt_device() does not touch rings; no need to lock */
  1016. if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_KERNEL)) {
  1017. /* Disable slot, if we can do it without mem alloc */
  1018. xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
  1019. spin_lock_irqsave(&xhci->lock, flags);
  1020. if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
  1021. xhci_ring_cmd_db(xhci);
  1022. spin_unlock_irqrestore(&xhci->lock, flags);
  1023. return 0;
  1024. }
  1025. udev->slot_id = xhci->slot_id;
  1026. /* Is this a LS or FS device under a HS hub? */
  1027. /* Hub or peripherial? */
  1028. return 1;
  1029. }
  1030. /*
  1031. * Issue an Address Device command (which will issue a SetAddress request to
  1032. * the device).
  1033. * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
  1034. * we should only issue and wait on one address command at the same time.
  1035. *
  1036. * We add one to the device address issued by the hardware because the USB core
  1037. * uses address 1 for the root hubs (even though they're not really devices).
  1038. */
  1039. int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
  1040. {
  1041. unsigned long flags;
  1042. int timeleft;
  1043. struct xhci_virt_device *virt_dev;
  1044. int ret = 0;
  1045. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1046. u64 temp_64;
  1047. if (!udev->slot_id) {
  1048. xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
  1049. return -EINVAL;
  1050. }
  1051. virt_dev = xhci->devs[udev->slot_id];
  1052. /* If this is a Set Address to an unconfigured device, setup ep 0 */
  1053. if (!udev->config)
  1054. xhci_setup_addressable_virt_dev(xhci, udev);
  1055. /* Otherwise, assume the core has the device configured how it wants */
  1056. spin_lock_irqsave(&xhci->lock, flags);
  1057. ret = xhci_queue_address_device(xhci, virt_dev->in_ctx_dma,
  1058. udev->slot_id);
  1059. if (ret) {
  1060. spin_unlock_irqrestore(&xhci->lock, flags);
  1061. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1062. return ret;
  1063. }
  1064. xhci_ring_cmd_db(xhci);
  1065. spin_unlock_irqrestore(&xhci->lock, flags);
  1066. /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
  1067. timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
  1068. USB_CTRL_SET_TIMEOUT);
  1069. /* FIXME: From section 4.3.4: "Software shall be responsible for timing
  1070. * the SetAddress() "recovery interval" required by USB and aborting the
  1071. * command on a timeout.
  1072. */
  1073. if (timeleft <= 0) {
  1074. xhci_warn(xhci, "%s while waiting for a slot\n",
  1075. timeleft == 0 ? "Timeout" : "Signal");
  1076. /* FIXME cancel the address device command */
  1077. return -ETIME;
  1078. }
  1079. switch (virt_dev->cmd_status) {
  1080. case COMP_CTX_STATE:
  1081. case COMP_EBADSLT:
  1082. xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
  1083. udev->slot_id);
  1084. ret = -EINVAL;
  1085. break;
  1086. case COMP_TX_ERR:
  1087. dev_warn(&udev->dev, "Device not responding to set address.\n");
  1088. ret = -EPROTO;
  1089. break;
  1090. case COMP_SUCCESS:
  1091. xhci_dbg(xhci, "Successful Address Device command\n");
  1092. break;
  1093. default:
  1094. xhci_err(xhci, "ERROR: unexpected command completion "
  1095. "code 0x%x.\n", virt_dev->cmd_status);
  1096. ret = -EINVAL;
  1097. break;
  1098. }
  1099. if (ret) {
  1100. return ret;
  1101. }
  1102. temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
  1103. xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
  1104. xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
  1105. udev->slot_id,
  1106. &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
  1107. (unsigned long long)
  1108. xhci->dcbaa->dev_context_ptrs[udev->slot_id]);
  1109. xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
  1110. (unsigned long long)virt_dev->out_ctx_dma);
  1111. xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
  1112. xhci_dbg_ctx(xhci, virt_dev->in_ctx, virt_dev->in_ctx_dma, 2);
  1113. xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
  1114. xhci_dbg_ctx(xhci, virt_dev->out_ctx, virt_dev->out_ctx_dma, 2);
  1115. /*
  1116. * USB core uses address 1 for the roothubs, so we add one to the
  1117. * address given back to us by the HC.
  1118. */
  1119. udev->devnum = (virt_dev->out_ctx->slot.dev_state & DEV_ADDR_MASK) + 1;
  1120. /* Zero the input context control for later use */
  1121. virt_dev->in_ctx->add_flags = 0;
  1122. virt_dev->in_ctx->drop_flags = 0;
  1123. /* Mirror flags in the output context for future ep enable/disable */
  1124. virt_dev->out_ctx->add_flags = SLOT_FLAG | EP0_FLAG;
  1125. virt_dev->out_ctx->drop_flags = 0;
  1126. xhci_dbg(xhci, "Device address = %d\n", udev->devnum);
  1127. /* XXX Meh, not sure if anyone else but choose_address uses this. */
  1128. set_bit(udev->devnum, udev->bus->devmap.devicemap);
  1129. return 0;
  1130. }
  1131. int xhci_get_frame(struct usb_hcd *hcd)
  1132. {
  1133. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1134. /* EHCI mods by the periodic size. Why? */
  1135. return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
  1136. }
  1137. MODULE_DESCRIPTION(DRIVER_DESC);
  1138. MODULE_AUTHOR(DRIVER_AUTHOR);
  1139. MODULE_LICENSE("GPL");
  1140. static int __init xhci_hcd_init(void)
  1141. {
  1142. #ifdef CONFIG_PCI
  1143. int retval = 0;
  1144. retval = xhci_register_pci();
  1145. if (retval < 0) {
  1146. printk(KERN_DEBUG "Problem registering PCI driver.");
  1147. return retval;
  1148. }
  1149. #endif
  1150. /*
  1151. * Check the compiler generated sizes of structures that must be laid
  1152. * out in specific ways for hardware access.
  1153. */
  1154. BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
  1155. BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
  1156. BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
  1157. /* xhci_device_control has eight fields, and also
  1158. * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
  1159. */
  1160. BUILD_BUG_ON(sizeof(struct xhci_device_control) != (8+8+8*31)*32/8);
  1161. BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
  1162. BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
  1163. BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
  1164. BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
  1165. BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
  1166. /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
  1167. BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
  1168. BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
  1169. return 0;
  1170. }
  1171. module_init(xhci_hcd_init);
  1172. static void __exit xhci_hcd_cleanup(void)
  1173. {
  1174. #ifdef CONFIG_PCI
  1175. xhci_unregister_pci();
  1176. #endif
  1177. }
  1178. module_exit(xhci_hcd_cleanup);