twl4030.h 11 KB

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  1. /*
  2. * twl4030.h - header for TWL4030 PM and audio CODEC device
  3. *
  4. * Copyright (C) 2005-2006 Texas Instruments, Inc.
  5. *
  6. * Based on tlv320aic23.c:
  7. * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #ifndef __TWL4030_H_
  25. #define __TWL4030_H_
  26. /*
  27. * Using the twl4030 core we address registers using a pair
  28. * { module id, relative register offset }
  29. * which that core then maps to the relevant
  30. * { i2c slave, absolute register address }
  31. *
  32. * The module IDs are meaningful only to the twl4030 core code,
  33. * which uses them as array indices to look up the first register
  34. * address each module uses within a given i2c slave.
  35. */
  36. /* Slave 0 (i2c address 0x48) */
  37. #define TWL4030_MODULE_USB 0x00
  38. /* Slave 1 (i2c address 0x49) */
  39. #define TWL4030_MODULE_AUDIO_VOICE 0x01
  40. #define TWL4030_MODULE_GPIO 0x02
  41. #define TWL4030_MODULE_INTBR 0x03
  42. #define TWL4030_MODULE_PIH 0x04
  43. #define TWL4030_MODULE_TEST 0x05
  44. /* Slave 2 (i2c address 0x4a) */
  45. #define TWL4030_MODULE_KEYPAD 0x06
  46. #define TWL4030_MODULE_MADC 0x07
  47. #define TWL4030_MODULE_INTERRUPTS 0x08
  48. #define TWL4030_MODULE_LED 0x09
  49. #define TWL4030_MODULE_MAIN_CHARGE 0x0A
  50. #define TWL4030_MODULE_PRECHARGE 0x0B
  51. #define TWL4030_MODULE_PWM0 0x0C
  52. #define TWL4030_MODULE_PWM1 0x0D
  53. #define TWL4030_MODULE_PWMA 0x0E
  54. #define TWL4030_MODULE_PWMB 0x0F
  55. /* Slave 3 (i2c address 0x4b) */
  56. #define TWL4030_MODULE_BACKUP 0x10
  57. #define TWL4030_MODULE_INT 0x11
  58. #define TWL4030_MODULE_PM_MASTER 0x12
  59. #define TWL4030_MODULE_PM_RECEIVER 0x13
  60. #define TWL4030_MODULE_RTC 0x14
  61. #define TWL4030_MODULE_SECURED_REG 0x15
  62. /*
  63. * Read and write single 8-bit registers
  64. */
  65. int twl4030_i2c_write_u8(u8 mod_no, u8 val, u8 reg);
  66. int twl4030_i2c_read_u8(u8 mod_no, u8 *val, u8 reg);
  67. /*
  68. * Read and write several 8-bit registers at once.
  69. *
  70. * IMPORTANT: For twl4030_i2c_write(), allocate num_bytes + 1
  71. * for the value, and populate your data starting at offset 1.
  72. */
  73. int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
  74. int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
  75. /*----------------------------------------------------------------------*/
  76. /*
  77. * NOTE: at up to 1024 registers, this is a big chip.
  78. *
  79. * Avoid putting register declarations in this file, instead of into
  80. * a driver-private file, unless some of the registers in a block
  81. * need to be shared with other drivers. One example is blocks that
  82. * have Secondary IRQ Handler (SIH) registers.
  83. */
  84. #define TWL4030_SIH_CTRL_EXCLEN_MASK BIT(0)
  85. #define TWL4030_SIH_CTRL_PENDDIS_MASK BIT(1)
  86. #define TWL4030_SIH_CTRL_COR_MASK BIT(2)
  87. /*----------------------------------------------------------------------*/
  88. /*
  89. * GPIO Block Register offsets (use TWL4030_MODULE_GPIO)
  90. */
  91. #define REG_GPIODATAIN1 0x0
  92. #define REG_GPIODATAIN2 0x1
  93. #define REG_GPIODATAIN3 0x2
  94. #define REG_GPIODATADIR1 0x3
  95. #define REG_GPIODATADIR2 0x4
  96. #define REG_GPIODATADIR3 0x5
  97. #define REG_GPIODATAOUT1 0x6
  98. #define REG_GPIODATAOUT2 0x7
  99. #define REG_GPIODATAOUT3 0x8
  100. #define REG_CLEARGPIODATAOUT1 0x9
  101. #define REG_CLEARGPIODATAOUT2 0xA
  102. #define REG_CLEARGPIODATAOUT3 0xB
  103. #define REG_SETGPIODATAOUT1 0xC
  104. #define REG_SETGPIODATAOUT2 0xD
  105. #define REG_SETGPIODATAOUT3 0xE
  106. #define REG_GPIO_DEBEN1 0xF
  107. #define REG_GPIO_DEBEN2 0x10
  108. #define REG_GPIO_DEBEN3 0x11
  109. #define REG_GPIO_CTRL 0x12
  110. #define REG_GPIOPUPDCTR1 0x13
  111. #define REG_GPIOPUPDCTR2 0x14
  112. #define REG_GPIOPUPDCTR3 0x15
  113. #define REG_GPIOPUPDCTR4 0x16
  114. #define REG_GPIOPUPDCTR5 0x17
  115. #define REG_GPIO_ISR1A 0x19
  116. #define REG_GPIO_ISR2A 0x1A
  117. #define REG_GPIO_ISR3A 0x1B
  118. #define REG_GPIO_IMR1A 0x1C
  119. #define REG_GPIO_IMR2A 0x1D
  120. #define REG_GPIO_IMR3A 0x1E
  121. #define REG_GPIO_ISR1B 0x1F
  122. #define REG_GPIO_ISR2B 0x20
  123. #define REG_GPIO_ISR3B 0x21
  124. #define REG_GPIO_IMR1B 0x22
  125. #define REG_GPIO_IMR2B 0x23
  126. #define REG_GPIO_IMR3B 0x24
  127. #define REG_GPIO_EDR1 0x28
  128. #define REG_GPIO_EDR2 0x29
  129. #define REG_GPIO_EDR3 0x2A
  130. #define REG_GPIO_EDR4 0x2B
  131. #define REG_GPIO_EDR5 0x2C
  132. #define REG_GPIO_SIH_CTRL 0x2D
  133. /* Up to 18 signals are available as GPIOs, when their
  134. * pins are not assigned to another use (such as ULPI/USB).
  135. */
  136. #define TWL4030_GPIO_MAX 18
  137. /*----------------------------------------------------------------------*/
  138. /*
  139. * Keypad register offsets (use TWL4030_MODULE_KEYPAD)
  140. * ... SIH/interrupt only
  141. */
  142. #define TWL4030_KEYPAD_KEYP_ISR1 0x11
  143. #define TWL4030_KEYPAD_KEYP_IMR1 0x12
  144. #define TWL4030_KEYPAD_KEYP_ISR2 0x13
  145. #define TWL4030_KEYPAD_KEYP_IMR2 0x14
  146. #define TWL4030_KEYPAD_KEYP_SIR 0x15 /* test register */
  147. #define TWL4030_KEYPAD_KEYP_EDR 0x16
  148. #define TWL4030_KEYPAD_KEYP_SIH_CTRL 0x17
  149. /*----------------------------------------------------------------------*/
  150. /*
  151. * Multichannel ADC register offsets (use TWL4030_MODULE_MADC)
  152. * ... SIH/interrupt only
  153. */
  154. #define TWL4030_MADC_ISR1 0x61
  155. #define TWL4030_MADC_IMR1 0x62
  156. #define TWL4030_MADC_ISR2 0x63
  157. #define TWL4030_MADC_IMR2 0x64
  158. #define TWL4030_MADC_SIR 0x65 /* test register */
  159. #define TWL4030_MADC_EDR 0x66
  160. #define TWL4030_MADC_SIH_CTRL 0x67
  161. /*----------------------------------------------------------------------*/
  162. /*
  163. * Battery charger register offsets (use TWL4030_MODULE_INTERRUPTS)
  164. */
  165. #define TWL4030_INTERRUPTS_BCIISR1A 0x0
  166. #define TWL4030_INTERRUPTS_BCIISR2A 0x1
  167. #define TWL4030_INTERRUPTS_BCIIMR1A 0x2
  168. #define TWL4030_INTERRUPTS_BCIIMR2A 0x3
  169. #define TWL4030_INTERRUPTS_BCIISR1B 0x4
  170. #define TWL4030_INTERRUPTS_BCIISR2B 0x5
  171. #define TWL4030_INTERRUPTS_BCIIMR1B 0x6
  172. #define TWL4030_INTERRUPTS_BCIIMR2B 0x7
  173. #define TWL4030_INTERRUPTS_BCISIR1 0x8 /* test register */
  174. #define TWL4030_INTERRUPTS_BCISIR2 0x9 /* test register */
  175. #define TWL4030_INTERRUPTS_BCIEDR1 0xa
  176. #define TWL4030_INTERRUPTS_BCIEDR2 0xb
  177. #define TWL4030_INTERRUPTS_BCIEDR3 0xc
  178. #define TWL4030_INTERRUPTS_BCISIHCTRL 0xd
  179. /*----------------------------------------------------------------------*/
  180. /*
  181. * Power Interrupt block register offsets (use TWL4030_MODULE_INT)
  182. */
  183. #define TWL4030_INT_PWR_ISR1 0x0
  184. #define TWL4030_INT_PWR_IMR1 0x1
  185. #define TWL4030_INT_PWR_ISR2 0x2
  186. #define TWL4030_INT_PWR_IMR2 0x3
  187. #define TWL4030_INT_PWR_SIR 0x4 /* test register */
  188. #define TWL4030_INT_PWR_EDR1 0x5
  189. #define TWL4030_INT_PWR_EDR2 0x6
  190. #define TWL4030_INT_PWR_SIH_CTRL 0x7
  191. /*----------------------------------------------------------------------*/
  192. struct twl4030_bci_platform_data {
  193. int *battery_tmp_tbl;
  194. unsigned int tblsize;
  195. };
  196. /* TWL4030_GPIO_MAX (18) GPIOs, with interrupts */
  197. struct twl4030_gpio_platform_data {
  198. int gpio_base;
  199. unsigned irq_base, irq_end;
  200. /* package the two LED signals as output-only GPIOs? */
  201. bool use_leds;
  202. /* gpio-n should control VMMC(n+1) if BIT(n) in mmc_cd is set */
  203. u8 mmc_cd;
  204. /* For gpio-N, bit (1 << N) in "pullups" is set if that pullup
  205. * should be enabled. Else, if that bit is set in "pulldowns",
  206. * that pulldown is enabled. Don't waste power by letting any
  207. * digital inputs float...
  208. */
  209. u32 pullups;
  210. u32 pulldowns;
  211. int (*setup)(struct device *dev,
  212. unsigned gpio, unsigned ngpio);
  213. int (*teardown)(struct device *dev,
  214. unsigned gpio, unsigned ngpio);
  215. };
  216. struct twl4030_madc_platform_data {
  217. int irq_line;
  218. };
  219. struct twl4030_keypad_data {
  220. int rows;
  221. int cols;
  222. int *keymap;
  223. int irq;
  224. unsigned int keymapsize;
  225. unsigned int rep:1;
  226. };
  227. enum twl4030_usb_mode {
  228. T2_USB_MODE_ULPI = 1,
  229. T2_USB_MODE_CEA2011_3PIN = 2,
  230. };
  231. struct twl4030_usb_data {
  232. enum twl4030_usb_mode usb_mode;
  233. };
  234. struct twl4030_platform_data {
  235. unsigned irq_base, irq_end;
  236. struct twl4030_bci_platform_data *bci;
  237. struct twl4030_gpio_platform_data *gpio;
  238. struct twl4030_madc_platform_data *madc;
  239. struct twl4030_keypad_data *keypad;
  240. struct twl4030_usb_data *usb;
  241. /* LDO regulators */
  242. struct regulator_init_data *vdac;
  243. struct regulator_init_data *vpll1;
  244. struct regulator_init_data *vpll2;
  245. struct regulator_init_data *vmmc1;
  246. struct regulator_init_data *vmmc2;
  247. struct regulator_init_data *vsim;
  248. struct regulator_init_data *vaux1;
  249. struct regulator_init_data *vaux2;
  250. struct regulator_init_data *vaux3;
  251. struct regulator_init_data *vaux4;
  252. /* REVISIT more to come ... _nothing_ should be hard-wired */
  253. };
  254. /*----------------------------------------------------------------------*/
  255. int twl4030_sih_setup(int module);
  256. /* Offsets to Power Registers */
  257. #define TWL4030_VDAC_DEV_GRP 0x3B
  258. #define TWL4030_VDAC_DEDICATED 0x3E
  259. #define TWL4030_VAUX1_DEV_GRP 0x17
  260. #define TWL4030_VAUX1_DEDICATED 0x1A
  261. #define TWL4030_VAUX2_DEV_GRP 0x1B
  262. #define TWL4030_VAUX2_DEDICATED 0x1E
  263. #define TWL4030_VAUX3_DEV_GRP 0x1F
  264. #define TWL4030_VAUX3_DEDICATED 0x22
  265. /*
  266. * Exported TWL4030 GPIO APIs
  267. *
  268. * WARNING -- use standard GPIO and IRQ calls instead; these will vanish.
  269. */
  270. int twl4030_set_gpio_debounce(int gpio, int enable);
  271. #if defined(CONFIG_TWL4030_BCI_BATTERY) || \
  272. defined(CONFIG_TWL4030_BCI_BATTERY_MODULE)
  273. extern int twl4030charger_usb_en(int enable);
  274. #else
  275. static inline int twl4030charger_usb_en(int enable) { return 0; }
  276. #endif
  277. /*----------------------------------------------------------------------*/
  278. /* Linux-specific regulator identifiers ... for now, we only support
  279. * the LDOs, and leave the three buck converters alone. VDD1 and VDD2
  280. * need to tie into hardware based voltage scaling (cpufreq etc), while
  281. * VIO is generally fixed.
  282. */
  283. /* EXTERNAL dc-to-dc buck converters */
  284. #define TWL4030_REG_VDD1 0
  285. #define TWL4030_REG_VDD2 1
  286. #define TWL4030_REG_VIO 2
  287. /* EXTERNAL LDOs */
  288. #define TWL4030_REG_VDAC 3
  289. #define TWL4030_REG_VPLL1 4
  290. #define TWL4030_REG_VPLL2 5 /* not on all chips */
  291. #define TWL4030_REG_VMMC1 6
  292. #define TWL4030_REG_VMMC2 7 /* not on all chips */
  293. #define TWL4030_REG_VSIM 8 /* not on all chips */
  294. #define TWL4030_REG_VAUX1 9 /* not on all chips */
  295. #define TWL4030_REG_VAUX2_4030 10 /* (twl4030-specific) */
  296. #define TWL4030_REG_VAUX2 11 /* (twl5030 and newer) */
  297. #define TWL4030_REG_VAUX3 12 /* not on all chips */
  298. #define TWL4030_REG_VAUX4 13 /* not on all chips */
  299. /* INTERNAL LDOs */
  300. #define TWL4030_REG_VINTANA1 14
  301. #define TWL4030_REG_VINTANA2 15
  302. #define TWL4030_REG_VINTDIG 16
  303. #define TWL4030_REG_VUSB1V5 17
  304. #define TWL4030_REG_VUSB1V8 18
  305. #define TWL4030_REG_VUSB3V1 19
  306. #endif /* End of __TWL4030_H */