recv.c 54 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/dma-mapping.h>
  17. #include "ath9k.h"
  18. #include "ar9003_mac.h"
  19. #define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb))
  20. static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
  21. int mindelta, int main_rssi_avg,
  22. int alt_rssi_avg, int pkt_count)
  23. {
  24. return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
  25. (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
  26. (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
  27. }
  28. static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
  29. int curr_main_set, int curr_alt_set,
  30. int alt_rssi_avg, int main_rssi_avg)
  31. {
  32. bool result = false;
  33. switch (div_group) {
  34. case 0:
  35. if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
  36. result = true;
  37. break;
  38. case 1:
  39. case 2:
  40. if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
  41. (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
  42. (alt_rssi_avg >= (main_rssi_avg - 5))) ||
  43. ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
  44. (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
  45. (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
  46. (alt_rssi_avg >= 4))
  47. result = true;
  48. else
  49. result = false;
  50. break;
  51. }
  52. return result;
  53. }
  54. static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
  55. {
  56. return sc->ps_enabled &&
  57. (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
  58. }
  59. /*
  60. * Setup and link descriptors.
  61. *
  62. * 11N: we can no longer afford to self link the last descriptor.
  63. * MAC acknowledges BA status as long as it copies frames to host
  64. * buffer (or rx fifo). This can incorrectly acknowledge packets
  65. * to a sender if last desc is self-linked.
  66. */
  67. static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
  68. {
  69. struct ath_hw *ah = sc->sc_ah;
  70. struct ath_common *common = ath9k_hw_common(ah);
  71. struct ath_desc *ds;
  72. struct sk_buff *skb;
  73. ATH_RXBUF_RESET(bf);
  74. ds = bf->bf_desc;
  75. ds->ds_link = 0; /* link to null */
  76. ds->ds_data = bf->bf_buf_addr;
  77. /* virtual addr of the beginning of the buffer. */
  78. skb = bf->bf_mpdu;
  79. BUG_ON(skb == NULL);
  80. ds->ds_vdata = skb->data;
  81. /*
  82. * setup rx descriptors. The rx_bufsize here tells the hardware
  83. * how much data it can DMA to us and that we are prepared
  84. * to process
  85. */
  86. ath9k_hw_setuprxdesc(ah, ds,
  87. common->rx_bufsize,
  88. 0);
  89. if (sc->rx.rxlink == NULL)
  90. ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  91. else
  92. *sc->rx.rxlink = bf->bf_daddr;
  93. sc->rx.rxlink = &ds->ds_link;
  94. }
  95. static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
  96. {
  97. /* XXX block beacon interrupts */
  98. ath9k_hw_setantenna(sc->sc_ah, antenna);
  99. sc->rx.defant = antenna;
  100. sc->rx.rxotherant = 0;
  101. }
  102. static void ath_opmode_init(struct ath_softc *sc)
  103. {
  104. struct ath_hw *ah = sc->sc_ah;
  105. struct ath_common *common = ath9k_hw_common(ah);
  106. u32 rfilt, mfilt[2];
  107. /* configure rx filter */
  108. rfilt = ath_calcrxfilter(sc);
  109. ath9k_hw_setrxfilter(ah, rfilt);
  110. /* configure bssid mask */
  111. ath_hw_setbssidmask(common);
  112. /* configure operational mode */
  113. ath9k_hw_setopmode(ah);
  114. /* calculate and install multicast filter */
  115. mfilt[0] = mfilt[1] = ~0;
  116. ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
  117. }
  118. static bool ath_rx_edma_buf_link(struct ath_softc *sc,
  119. enum ath9k_rx_qtype qtype)
  120. {
  121. struct ath_hw *ah = sc->sc_ah;
  122. struct ath_rx_edma *rx_edma;
  123. struct sk_buff *skb;
  124. struct ath_buf *bf;
  125. rx_edma = &sc->rx.rx_edma[qtype];
  126. if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
  127. return false;
  128. bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
  129. list_del_init(&bf->list);
  130. skb = bf->bf_mpdu;
  131. ATH_RXBUF_RESET(bf);
  132. memset(skb->data, 0, ah->caps.rx_status_len);
  133. dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
  134. ah->caps.rx_status_len, DMA_TO_DEVICE);
  135. SKB_CB_ATHBUF(skb) = bf;
  136. ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
  137. skb_queue_tail(&rx_edma->rx_fifo, skb);
  138. return true;
  139. }
  140. static void ath_rx_addbuffer_edma(struct ath_softc *sc,
  141. enum ath9k_rx_qtype qtype, int size)
  142. {
  143. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  144. u32 nbuf = 0;
  145. if (list_empty(&sc->rx.rxbuf)) {
  146. ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n");
  147. return;
  148. }
  149. while (!list_empty(&sc->rx.rxbuf)) {
  150. nbuf++;
  151. if (!ath_rx_edma_buf_link(sc, qtype))
  152. break;
  153. if (nbuf >= size)
  154. break;
  155. }
  156. }
  157. static void ath_rx_remove_buffer(struct ath_softc *sc,
  158. enum ath9k_rx_qtype qtype)
  159. {
  160. struct ath_buf *bf;
  161. struct ath_rx_edma *rx_edma;
  162. struct sk_buff *skb;
  163. rx_edma = &sc->rx.rx_edma[qtype];
  164. while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
  165. bf = SKB_CB_ATHBUF(skb);
  166. BUG_ON(!bf);
  167. list_add_tail(&bf->list, &sc->rx.rxbuf);
  168. }
  169. }
  170. static void ath_rx_edma_cleanup(struct ath_softc *sc)
  171. {
  172. struct ath_hw *ah = sc->sc_ah;
  173. struct ath_common *common = ath9k_hw_common(ah);
  174. struct ath_buf *bf;
  175. ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
  176. ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
  177. list_for_each_entry(bf, &sc->rx.rxbuf, list) {
  178. if (bf->bf_mpdu) {
  179. dma_unmap_single(sc->dev, bf->bf_buf_addr,
  180. common->rx_bufsize,
  181. DMA_BIDIRECTIONAL);
  182. dev_kfree_skb_any(bf->bf_mpdu);
  183. bf->bf_buf_addr = 0;
  184. bf->bf_mpdu = NULL;
  185. }
  186. }
  187. INIT_LIST_HEAD(&sc->rx.rxbuf);
  188. kfree(sc->rx.rx_bufptr);
  189. sc->rx.rx_bufptr = NULL;
  190. }
  191. static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
  192. {
  193. skb_queue_head_init(&rx_edma->rx_fifo);
  194. skb_queue_head_init(&rx_edma->rx_buffers);
  195. rx_edma->rx_fifo_hwsize = size;
  196. }
  197. static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
  198. {
  199. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  200. struct ath_hw *ah = sc->sc_ah;
  201. struct sk_buff *skb;
  202. struct ath_buf *bf;
  203. int error = 0, i;
  204. u32 size;
  205. ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
  206. ah->caps.rx_status_len);
  207. ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
  208. ah->caps.rx_lp_qdepth);
  209. ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
  210. ah->caps.rx_hp_qdepth);
  211. size = sizeof(struct ath_buf) * nbufs;
  212. bf = kzalloc(size, GFP_KERNEL);
  213. if (!bf)
  214. return -ENOMEM;
  215. INIT_LIST_HEAD(&sc->rx.rxbuf);
  216. sc->rx.rx_bufptr = bf;
  217. for (i = 0; i < nbufs; i++, bf++) {
  218. skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
  219. if (!skb) {
  220. error = -ENOMEM;
  221. goto rx_init_fail;
  222. }
  223. memset(skb->data, 0, common->rx_bufsize);
  224. bf->bf_mpdu = skb;
  225. bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
  226. common->rx_bufsize,
  227. DMA_BIDIRECTIONAL);
  228. if (unlikely(dma_mapping_error(sc->dev,
  229. bf->bf_buf_addr))) {
  230. dev_kfree_skb_any(skb);
  231. bf->bf_mpdu = NULL;
  232. bf->bf_buf_addr = 0;
  233. ath_err(common,
  234. "dma_mapping_error() on RX init\n");
  235. error = -ENOMEM;
  236. goto rx_init_fail;
  237. }
  238. list_add_tail(&bf->list, &sc->rx.rxbuf);
  239. }
  240. return 0;
  241. rx_init_fail:
  242. ath_rx_edma_cleanup(sc);
  243. return error;
  244. }
  245. static void ath_edma_start_recv(struct ath_softc *sc)
  246. {
  247. spin_lock_bh(&sc->rx.rxbuflock);
  248. ath9k_hw_rxena(sc->sc_ah);
  249. ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
  250. sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
  251. ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
  252. sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
  253. ath_opmode_init(sc);
  254. ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
  255. spin_unlock_bh(&sc->rx.rxbuflock);
  256. }
  257. static void ath_edma_stop_recv(struct ath_softc *sc)
  258. {
  259. ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
  260. ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
  261. }
  262. int ath_rx_init(struct ath_softc *sc, int nbufs)
  263. {
  264. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  265. struct sk_buff *skb;
  266. struct ath_buf *bf;
  267. int error = 0;
  268. spin_lock_init(&sc->sc_pcu_lock);
  269. sc->sc_flags &= ~SC_OP_RXFLUSH;
  270. spin_lock_init(&sc->rx.rxbuflock);
  271. common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
  272. sc->sc_ah->caps.rx_status_len;
  273. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  274. return ath_rx_edma_init(sc, nbufs);
  275. } else {
  276. ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
  277. common->cachelsz, common->rx_bufsize);
  278. /* Initialize rx descriptors */
  279. error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
  280. "rx", nbufs, 1, 0);
  281. if (error != 0) {
  282. ath_err(common,
  283. "failed to allocate rx descriptors: %d\n",
  284. error);
  285. goto err;
  286. }
  287. list_for_each_entry(bf, &sc->rx.rxbuf, list) {
  288. skb = ath_rxbuf_alloc(common, common->rx_bufsize,
  289. GFP_KERNEL);
  290. if (skb == NULL) {
  291. error = -ENOMEM;
  292. goto err;
  293. }
  294. bf->bf_mpdu = skb;
  295. bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
  296. common->rx_bufsize,
  297. DMA_FROM_DEVICE);
  298. if (unlikely(dma_mapping_error(sc->dev,
  299. bf->bf_buf_addr))) {
  300. dev_kfree_skb_any(skb);
  301. bf->bf_mpdu = NULL;
  302. bf->bf_buf_addr = 0;
  303. ath_err(common,
  304. "dma_mapping_error() on RX init\n");
  305. error = -ENOMEM;
  306. goto err;
  307. }
  308. }
  309. sc->rx.rxlink = NULL;
  310. }
  311. err:
  312. if (error)
  313. ath_rx_cleanup(sc);
  314. return error;
  315. }
  316. void ath_rx_cleanup(struct ath_softc *sc)
  317. {
  318. struct ath_hw *ah = sc->sc_ah;
  319. struct ath_common *common = ath9k_hw_common(ah);
  320. struct sk_buff *skb;
  321. struct ath_buf *bf;
  322. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  323. ath_rx_edma_cleanup(sc);
  324. return;
  325. } else {
  326. list_for_each_entry(bf, &sc->rx.rxbuf, list) {
  327. skb = bf->bf_mpdu;
  328. if (skb) {
  329. dma_unmap_single(sc->dev, bf->bf_buf_addr,
  330. common->rx_bufsize,
  331. DMA_FROM_DEVICE);
  332. dev_kfree_skb(skb);
  333. bf->bf_buf_addr = 0;
  334. bf->bf_mpdu = NULL;
  335. }
  336. }
  337. if (sc->rx.rxdma.dd_desc_len != 0)
  338. ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
  339. }
  340. }
  341. /*
  342. * Calculate the receive filter according to the
  343. * operating mode and state:
  344. *
  345. * o always accept unicast, broadcast, and multicast traffic
  346. * o maintain current state of phy error reception (the hal
  347. * may enable phy error frames for noise immunity work)
  348. * o probe request frames are accepted only when operating in
  349. * hostap, adhoc, or monitor modes
  350. * o enable promiscuous mode according to the interface state
  351. * o accept beacons:
  352. * - when operating in adhoc mode so the 802.11 layer creates
  353. * node table entries for peers,
  354. * - when operating in station mode for collecting rssi data when
  355. * the station is otherwise quiet, or
  356. * - when operating as a repeater so we see repeater-sta beacons
  357. * - when scanning
  358. */
  359. u32 ath_calcrxfilter(struct ath_softc *sc)
  360. {
  361. #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
  362. u32 rfilt;
  363. rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
  364. | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
  365. | ATH9K_RX_FILTER_MCAST;
  366. if (sc->rx.rxfilter & FIF_PROBE_REQ)
  367. rfilt |= ATH9K_RX_FILTER_PROBEREQ;
  368. /*
  369. * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
  370. * mode interface or when in monitor mode. AP mode does not need this
  371. * since it receives all in-BSS frames anyway.
  372. */
  373. if (sc->sc_ah->is_monitoring)
  374. rfilt |= ATH9K_RX_FILTER_PROM;
  375. if (sc->rx.rxfilter & FIF_CONTROL)
  376. rfilt |= ATH9K_RX_FILTER_CONTROL;
  377. if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
  378. (sc->nvifs <= 1) &&
  379. !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
  380. rfilt |= ATH9K_RX_FILTER_MYBEACON;
  381. else
  382. rfilt |= ATH9K_RX_FILTER_BEACON;
  383. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  384. (sc->rx.rxfilter & FIF_PSPOLL))
  385. rfilt |= ATH9K_RX_FILTER_PSPOLL;
  386. if (conf_is_ht(&sc->hw->conf))
  387. rfilt |= ATH9K_RX_FILTER_COMP_BAR;
  388. if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
  389. /* The following may also be needed for other older chips */
  390. if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
  391. rfilt |= ATH9K_RX_FILTER_PROM;
  392. rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
  393. }
  394. return rfilt;
  395. #undef RX_FILTER_PRESERVE
  396. }
  397. int ath_startrecv(struct ath_softc *sc)
  398. {
  399. struct ath_hw *ah = sc->sc_ah;
  400. struct ath_buf *bf, *tbf;
  401. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  402. ath_edma_start_recv(sc);
  403. return 0;
  404. }
  405. spin_lock_bh(&sc->rx.rxbuflock);
  406. if (list_empty(&sc->rx.rxbuf))
  407. goto start_recv;
  408. sc->rx.rxlink = NULL;
  409. list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
  410. ath_rx_buf_link(sc, bf);
  411. }
  412. /* We could have deleted elements so the list may be empty now */
  413. if (list_empty(&sc->rx.rxbuf))
  414. goto start_recv;
  415. bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
  416. ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  417. ath9k_hw_rxena(ah);
  418. start_recv:
  419. ath_opmode_init(sc);
  420. ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
  421. spin_unlock_bh(&sc->rx.rxbuflock);
  422. return 0;
  423. }
  424. bool ath_stoprecv(struct ath_softc *sc)
  425. {
  426. struct ath_hw *ah = sc->sc_ah;
  427. bool stopped, reset = false;
  428. spin_lock_bh(&sc->rx.rxbuflock);
  429. ath9k_hw_abortpcurecv(ah);
  430. ath9k_hw_setrxfilter(ah, 0);
  431. stopped = ath9k_hw_stopdmarecv(ah, &reset);
  432. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  433. ath_edma_stop_recv(sc);
  434. else
  435. sc->rx.rxlink = NULL;
  436. spin_unlock_bh(&sc->rx.rxbuflock);
  437. if (!(ah->ah_flags & AH_UNPLUGGED) &&
  438. unlikely(!stopped)) {
  439. ath_err(ath9k_hw_common(sc->sc_ah),
  440. "Could not stop RX, we could be "
  441. "confusing the DMA engine when we start RX up\n");
  442. ATH_DBG_WARN_ON_ONCE(!stopped);
  443. }
  444. return stopped && !reset;
  445. }
  446. void ath_flushrecv(struct ath_softc *sc)
  447. {
  448. sc->sc_flags |= SC_OP_RXFLUSH;
  449. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  450. ath_rx_tasklet(sc, 1, true);
  451. ath_rx_tasklet(sc, 1, false);
  452. sc->sc_flags &= ~SC_OP_RXFLUSH;
  453. }
  454. static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
  455. {
  456. /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
  457. struct ieee80211_mgmt *mgmt;
  458. u8 *pos, *end, id, elen;
  459. struct ieee80211_tim_ie *tim;
  460. mgmt = (struct ieee80211_mgmt *)skb->data;
  461. pos = mgmt->u.beacon.variable;
  462. end = skb->data + skb->len;
  463. while (pos + 2 < end) {
  464. id = *pos++;
  465. elen = *pos++;
  466. if (pos + elen > end)
  467. break;
  468. if (id == WLAN_EID_TIM) {
  469. if (elen < sizeof(*tim))
  470. break;
  471. tim = (struct ieee80211_tim_ie *) pos;
  472. if (tim->dtim_count != 0)
  473. break;
  474. return tim->bitmap_ctrl & 0x01;
  475. }
  476. pos += elen;
  477. }
  478. return false;
  479. }
  480. static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
  481. {
  482. struct ieee80211_mgmt *mgmt;
  483. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  484. if (skb->len < 24 + 8 + 2 + 2)
  485. return;
  486. mgmt = (struct ieee80211_mgmt *)skb->data;
  487. if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0) {
  488. /* TODO: This doesn't work well if you have stations
  489. * associated to two different APs because curbssid
  490. * is just the last AP that any of the stations associated
  491. * with.
  492. */
  493. return; /* not from our current AP */
  494. }
  495. sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
  496. if (sc->ps_flags & PS_BEACON_SYNC) {
  497. sc->ps_flags &= ~PS_BEACON_SYNC;
  498. ath_dbg(common, ATH_DBG_PS,
  499. "Reconfigure Beacon timers based on timestamp from the AP\n");
  500. ath_set_beacon(sc);
  501. }
  502. if (ath_beacon_dtim_pending_cab(skb)) {
  503. /*
  504. * Remain awake waiting for buffered broadcast/multicast
  505. * frames. If the last broadcast/multicast frame is not
  506. * received properly, the next beacon frame will work as
  507. * a backup trigger for returning into NETWORK SLEEP state,
  508. * so we are waiting for it as well.
  509. */
  510. ath_dbg(common, ATH_DBG_PS,
  511. "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
  512. sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
  513. return;
  514. }
  515. if (sc->ps_flags & PS_WAIT_FOR_CAB) {
  516. /*
  517. * This can happen if a broadcast frame is dropped or the AP
  518. * fails to send a frame indicating that all CAB frames have
  519. * been delivered.
  520. */
  521. sc->ps_flags &= ~PS_WAIT_FOR_CAB;
  522. ath_dbg(common, ATH_DBG_PS,
  523. "PS wait for CAB frames timed out\n");
  524. }
  525. }
  526. static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
  527. {
  528. struct ieee80211_hdr *hdr;
  529. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  530. hdr = (struct ieee80211_hdr *)skb->data;
  531. /* Process Beacon and CAB receive in PS state */
  532. if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
  533. && ieee80211_is_beacon(hdr->frame_control))
  534. ath_rx_ps_beacon(sc, skb);
  535. else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
  536. (ieee80211_is_data(hdr->frame_control) ||
  537. ieee80211_is_action(hdr->frame_control)) &&
  538. is_multicast_ether_addr(hdr->addr1) &&
  539. !ieee80211_has_moredata(hdr->frame_control)) {
  540. /*
  541. * No more broadcast/multicast frames to be received at this
  542. * point.
  543. */
  544. sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
  545. ath_dbg(common, ATH_DBG_PS,
  546. "All PS CAB frames received, back to sleep\n");
  547. } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
  548. !is_multicast_ether_addr(hdr->addr1) &&
  549. !ieee80211_has_morefrags(hdr->frame_control)) {
  550. sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
  551. ath_dbg(common, ATH_DBG_PS,
  552. "Going back to sleep after having received PS-Poll data (0x%lx)\n",
  553. sc->ps_flags & (PS_WAIT_FOR_BEACON |
  554. PS_WAIT_FOR_CAB |
  555. PS_WAIT_FOR_PSPOLL_DATA |
  556. PS_WAIT_FOR_TX_ACK));
  557. }
  558. }
  559. static bool ath_edma_get_buffers(struct ath_softc *sc,
  560. enum ath9k_rx_qtype qtype)
  561. {
  562. struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
  563. struct ath_hw *ah = sc->sc_ah;
  564. struct ath_common *common = ath9k_hw_common(ah);
  565. struct sk_buff *skb;
  566. struct ath_buf *bf;
  567. int ret;
  568. skb = skb_peek(&rx_edma->rx_fifo);
  569. if (!skb)
  570. return false;
  571. bf = SKB_CB_ATHBUF(skb);
  572. BUG_ON(!bf);
  573. dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
  574. common->rx_bufsize, DMA_FROM_DEVICE);
  575. ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
  576. if (ret == -EINPROGRESS) {
  577. /*let device gain the buffer again*/
  578. dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
  579. common->rx_bufsize, DMA_FROM_DEVICE);
  580. return false;
  581. }
  582. __skb_unlink(skb, &rx_edma->rx_fifo);
  583. if (ret == -EINVAL) {
  584. /* corrupt descriptor, skip this one and the following one */
  585. list_add_tail(&bf->list, &sc->rx.rxbuf);
  586. ath_rx_edma_buf_link(sc, qtype);
  587. skb = skb_peek(&rx_edma->rx_fifo);
  588. if (!skb)
  589. return true;
  590. bf = SKB_CB_ATHBUF(skb);
  591. BUG_ON(!bf);
  592. __skb_unlink(skb, &rx_edma->rx_fifo);
  593. list_add_tail(&bf->list, &sc->rx.rxbuf);
  594. ath_rx_edma_buf_link(sc, qtype);
  595. return true;
  596. }
  597. skb_queue_tail(&rx_edma->rx_buffers, skb);
  598. return true;
  599. }
  600. static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
  601. struct ath_rx_status *rs,
  602. enum ath9k_rx_qtype qtype)
  603. {
  604. struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
  605. struct sk_buff *skb;
  606. struct ath_buf *bf;
  607. while (ath_edma_get_buffers(sc, qtype));
  608. skb = __skb_dequeue(&rx_edma->rx_buffers);
  609. if (!skb)
  610. return NULL;
  611. bf = SKB_CB_ATHBUF(skb);
  612. ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
  613. return bf;
  614. }
  615. static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
  616. struct ath_rx_status *rs)
  617. {
  618. struct ath_hw *ah = sc->sc_ah;
  619. struct ath_common *common = ath9k_hw_common(ah);
  620. struct ath_desc *ds;
  621. struct ath_buf *bf;
  622. int ret;
  623. if (list_empty(&sc->rx.rxbuf)) {
  624. sc->rx.rxlink = NULL;
  625. return NULL;
  626. }
  627. bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
  628. ds = bf->bf_desc;
  629. /*
  630. * Must provide the virtual address of the current
  631. * descriptor, the physical address, and the virtual
  632. * address of the next descriptor in the h/w chain.
  633. * This allows the HAL to look ahead to see if the
  634. * hardware is done with a descriptor by checking the
  635. * done bit in the following descriptor and the address
  636. * of the current descriptor the DMA engine is working
  637. * on. All this is necessary because of our use of
  638. * a self-linked list to avoid rx overruns.
  639. */
  640. ret = ath9k_hw_rxprocdesc(ah, ds, rs);
  641. if (ret == -EINPROGRESS) {
  642. struct ath_rx_status trs;
  643. struct ath_buf *tbf;
  644. struct ath_desc *tds;
  645. memset(&trs, 0, sizeof(trs));
  646. if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
  647. sc->rx.rxlink = NULL;
  648. return NULL;
  649. }
  650. tbf = list_entry(bf->list.next, struct ath_buf, list);
  651. /*
  652. * On some hardware the descriptor status words could
  653. * get corrupted, including the done bit. Because of
  654. * this, check if the next descriptor's done bit is
  655. * set or not.
  656. *
  657. * If the next descriptor's done bit is set, the current
  658. * descriptor has been corrupted. Force s/w to discard
  659. * this descriptor and continue...
  660. */
  661. tds = tbf->bf_desc;
  662. ret = ath9k_hw_rxprocdesc(ah, tds, &trs);
  663. if (ret == -EINPROGRESS)
  664. return NULL;
  665. }
  666. if (!bf->bf_mpdu)
  667. return bf;
  668. /*
  669. * Synchronize the DMA transfer with CPU before
  670. * 1. accessing the frame
  671. * 2. requeueing the same buffer to h/w
  672. */
  673. dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
  674. common->rx_bufsize,
  675. DMA_FROM_DEVICE);
  676. return bf;
  677. }
  678. /* Assumes you've already done the endian to CPU conversion */
  679. static bool ath9k_rx_accept(struct ath_common *common,
  680. struct ieee80211_hdr *hdr,
  681. struct ieee80211_rx_status *rxs,
  682. struct ath_rx_status *rx_stats,
  683. bool *decrypt_error)
  684. {
  685. bool is_mc, is_valid_tkip, strip_mic, mic_error;
  686. struct ath_hw *ah = common->ah;
  687. __le16 fc;
  688. u8 rx_status_len = ah->caps.rx_status_len;
  689. fc = hdr->frame_control;
  690. is_mc = !!is_multicast_ether_addr(hdr->addr1);
  691. is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID &&
  692. test_bit(rx_stats->rs_keyix, common->tkip_keymap);
  693. strip_mic = is_valid_tkip && ieee80211_is_data(fc) &&
  694. !(rx_stats->rs_status &
  695. (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC));
  696. if (!rx_stats->rs_datalen)
  697. return false;
  698. /*
  699. * rs_status follows rs_datalen so if rs_datalen is too large
  700. * we can take a hint that hardware corrupted it, so ignore
  701. * those frames.
  702. */
  703. if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
  704. return false;
  705. /* Only use error bits from the last fragment */
  706. if (rx_stats->rs_more)
  707. return true;
  708. mic_error = is_valid_tkip && !ieee80211_is_ctl(fc) &&
  709. !ieee80211_has_morefrags(fc) &&
  710. !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
  711. (rx_stats->rs_status & ATH9K_RXERR_MIC);
  712. /*
  713. * The rx_stats->rs_status will not be set until the end of the
  714. * chained descriptors so it can be ignored if rs_more is set. The
  715. * rs_more will be false at the last element of the chained
  716. * descriptors.
  717. */
  718. if (rx_stats->rs_status != 0) {
  719. if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
  720. rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
  721. mic_error = false;
  722. }
  723. if (rx_stats->rs_status & ATH9K_RXERR_PHY)
  724. return false;
  725. if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
  726. *decrypt_error = true;
  727. mic_error = false;
  728. }
  729. /*
  730. * Reject error frames with the exception of
  731. * decryption and MIC failures. For monitor mode,
  732. * we also ignore the CRC error.
  733. */
  734. if (ah->is_monitoring) {
  735. if (rx_stats->rs_status &
  736. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
  737. ATH9K_RXERR_CRC))
  738. return false;
  739. } else {
  740. if (rx_stats->rs_status &
  741. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
  742. return false;
  743. }
  744. }
  745. }
  746. /*
  747. * For unicast frames the MIC error bit can have false positives,
  748. * so all MIC error reports need to be validated in software.
  749. * False negatives are not common, so skip software verification
  750. * if the hardware considers the MIC valid.
  751. */
  752. if (strip_mic)
  753. rxs->flag |= RX_FLAG_MMIC_STRIPPED;
  754. else if (is_mc && mic_error)
  755. rxs->flag |= RX_FLAG_MMIC_ERROR;
  756. return true;
  757. }
  758. static int ath9k_process_rate(struct ath_common *common,
  759. struct ieee80211_hw *hw,
  760. struct ath_rx_status *rx_stats,
  761. struct ieee80211_rx_status *rxs)
  762. {
  763. struct ieee80211_supported_band *sband;
  764. enum ieee80211_band band;
  765. unsigned int i = 0;
  766. band = hw->conf.channel->band;
  767. sband = hw->wiphy->bands[band];
  768. if (rx_stats->rs_rate & 0x80) {
  769. /* HT rate */
  770. rxs->flag |= RX_FLAG_HT;
  771. if (rx_stats->rs_flags & ATH9K_RX_2040)
  772. rxs->flag |= RX_FLAG_40MHZ;
  773. if (rx_stats->rs_flags & ATH9K_RX_GI)
  774. rxs->flag |= RX_FLAG_SHORT_GI;
  775. rxs->rate_idx = rx_stats->rs_rate & 0x7f;
  776. return 0;
  777. }
  778. for (i = 0; i < sband->n_bitrates; i++) {
  779. if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
  780. rxs->rate_idx = i;
  781. return 0;
  782. }
  783. if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
  784. rxs->flag |= RX_FLAG_SHORTPRE;
  785. rxs->rate_idx = i;
  786. return 0;
  787. }
  788. }
  789. /*
  790. * No valid hardware bitrate found -- we should not get here
  791. * because hardware has already validated this frame as OK.
  792. */
  793. ath_dbg(common, ATH_DBG_ANY,
  794. "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
  795. rx_stats->rs_rate);
  796. return -EINVAL;
  797. }
  798. static void ath9k_process_rssi(struct ath_common *common,
  799. struct ieee80211_hw *hw,
  800. struct ieee80211_hdr *hdr,
  801. struct ath_rx_status *rx_stats)
  802. {
  803. struct ath_softc *sc = hw->priv;
  804. struct ath_hw *ah = common->ah;
  805. int last_rssi;
  806. if (!rx_stats->is_mybeacon ||
  807. ((ah->opmode != NL80211_IFTYPE_STATION) &&
  808. (ah->opmode != NL80211_IFTYPE_ADHOC)))
  809. return;
  810. if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
  811. ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
  812. last_rssi = sc->last_rssi;
  813. if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
  814. rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
  815. ATH_RSSI_EP_MULTIPLIER);
  816. if (rx_stats->rs_rssi < 0)
  817. rx_stats->rs_rssi = 0;
  818. /* Update Beacon RSSI, this is used by ANI. */
  819. ah->stats.avgbrssi = rx_stats->rs_rssi;
  820. }
  821. /*
  822. * For Decrypt or Demic errors, we only mark packet status here and always push
  823. * up the frame up to let mac80211 handle the actual error case, be it no
  824. * decryption key or real decryption error. This let us keep statistics there.
  825. */
  826. static int ath9k_rx_skb_preprocess(struct ath_common *common,
  827. struct ieee80211_hw *hw,
  828. struct ieee80211_hdr *hdr,
  829. struct ath_rx_status *rx_stats,
  830. struct ieee80211_rx_status *rx_status,
  831. bool *decrypt_error)
  832. {
  833. struct ath_hw *ah = common->ah;
  834. memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
  835. /*
  836. * everything but the rate is checked here, the rate check is done
  837. * separately to avoid doing two lookups for a rate for each frame.
  838. */
  839. if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
  840. return -EINVAL;
  841. /* Only use status info from the last fragment */
  842. if (rx_stats->rs_more)
  843. return 0;
  844. ath9k_process_rssi(common, hw, hdr, rx_stats);
  845. if (ath9k_process_rate(common, hw, rx_stats, rx_status))
  846. return -EINVAL;
  847. rx_status->band = hw->conf.channel->band;
  848. rx_status->freq = hw->conf.channel->center_freq;
  849. rx_status->signal = ah->noise + rx_stats->rs_rssi;
  850. rx_status->antenna = rx_stats->rs_antenna;
  851. rx_status->flag |= RX_FLAG_MACTIME_MPDU;
  852. return 0;
  853. }
  854. static void ath9k_rx_skb_postprocess(struct ath_common *common,
  855. struct sk_buff *skb,
  856. struct ath_rx_status *rx_stats,
  857. struct ieee80211_rx_status *rxs,
  858. bool decrypt_error)
  859. {
  860. struct ath_hw *ah = common->ah;
  861. struct ieee80211_hdr *hdr;
  862. int hdrlen, padpos, padsize;
  863. u8 keyix;
  864. __le16 fc;
  865. /* see if any padding is done by the hw and remove it */
  866. hdr = (struct ieee80211_hdr *) skb->data;
  867. hdrlen = ieee80211_get_hdrlen_from_skb(skb);
  868. fc = hdr->frame_control;
  869. padpos = ath9k_cmn_padpos(hdr->frame_control);
  870. /* The MAC header is padded to have 32-bit boundary if the
  871. * packet payload is non-zero. The general calculation for
  872. * padsize would take into account odd header lengths:
  873. * padsize = (4 - padpos % 4) % 4; However, since only
  874. * even-length headers are used, padding can only be 0 or 2
  875. * bytes and we can optimize this a bit. In addition, we must
  876. * not try to remove padding from short control frames that do
  877. * not have payload. */
  878. padsize = padpos & 3;
  879. if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
  880. memmove(skb->data + padsize, skb->data, padpos);
  881. skb_pull(skb, padsize);
  882. }
  883. keyix = rx_stats->rs_keyix;
  884. if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
  885. ieee80211_has_protected(fc)) {
  886. rxs->flag |= RX_FLAG_DECRYPTED;
  887. } else if (ieee80211_has_protected(fc)
  888. && !decrypt_error && skb->len >= hdrlen + 4) {
  889. keyix = skb->data[hdrlen + 3] >> 6;
  890. if (test_bit(keyix, common->keymap))
  891. rxs->flag |= RX_FLAG_DECRYPTED;
  892. }
  893. if (ah->sw_mgmt_crypto &&
  894. (rxs->flag & RX_FLAG_DECRYPTED) &&
  895. ieee80211_is_mgmt(fc))
  896. /* Use software decrypt for management frames. */
  897. rxs->flag &= ~RX_FLAG_DECRYPTED;
  898. }
  899. static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
  900. struct ath_hw_antcomb_conf ant_conf,
  901. int main_rssi_avg)
  902. {
  903. antcomb->quick_scan_cnt = 0;
  904. if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
  905. antcomb->rssi_lna2 = main_rssi_avg;
  906. else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
  907. antcomb->rssi_lna1 = main_rssi_avg;
  908. switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
  909. case 0x10: /* LNA2 A-B */
  910. antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  911. antcomb->first_quick_scan_conf =
  912. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  913. antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
  914. break;
  915. case 0x20: /* LNA1 A-B */
  916. antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  917. antcomb->first_quick_scan_conf =
  918. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  919. antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
  920. break;
  921. case 0x21: /* LNA1 LNA2 */
  922. antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
  923. antcomb->first_quick_scan_conf =
  924. ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  925. antcomb->second_quick_scan_conf =
  926. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  927. break;
  928. case 0x12: /* LNA2 LNA1 */
  929. antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
  930. antcomb->first_quick_scan_conf =
  931. ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  932. antcomb->second_quick_scan_conf =
  933. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  934. break;
  935. case 0x13: /* LNA2 A+B */
  936. antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  937. antcomb->first_quick_scan_conf =
  938. ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  939. antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
  940. break;
  941. case 0x23: /* LNA1 A+B */
  942. antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  943. antcomb->first_quick_scan_conf =
  944. ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  945. antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
  946. break;
  947. default:
  948. break;
  949. }
  950. }
  951. static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
  952. struct ath_hw_antcomb_conf *div_ant_conf,
  953. int main_rssi_avg, int alt_rssi_avg,
  954. int alt_ratio)
  955. {
  956. /* alt_good */
  957. switch (antcomb->quick_scan_cnt) {
  958. case 0:
  959. /* set alt to main, and alt to first conf */
  960. div_ant_conf->main_lna_conf = antcomb->main_conf;
  961. div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
  962. break;
  963. case 1:
  964. /* set alt to main, and alt to first conf */
  965. div_ant_conf->main_lna_conf = antcomb->main_conf;
  966. div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
  967. antcomb->rssi_first = main_rssi_avg;
  968. antcomb->rssi_second = alt_rssi_avg;
  969. if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
  970. /* main is LNA1 */
  971. if (ath_is_alt_ant_ratio_better(alt_ratio,
  972. ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
  973. ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
  974. main_rssi_avg, alt_rssi_avg,
  975. antcomb->total_pkt_count))
  976. antcomb->first_ratio = true;
  977. else
  978. antcomb->first_ratio = false;
  979. } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
  980. if (ath_is_alt_ant_ratio_better(alt_ratio,
  981. ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
  982. ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
  983. main_rssi_avg, alt_rssi_avg,
  984. antcomb->total_pkt_count))
  985. antcomb->first_ratio = true;
  986. else
  987. antcomb->first_ratio = false;
  988. } else {
  989. if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
  990. (alt_rssi_avg > main_rssi_avg +
  991. ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
  992. (alt_rssi_avg > main_rssi_avg)) &&
  993. (antcomb->total_pkt_count > 50))
  994. antcomb->first_ratio = true;
  995. else
  996. antcomb->first_ratio = false;
  997. }
  998. break;
  999. case 2:
  1000. antcomb->alt_good = false;
  1001. antcomb->scan_not_start = false;
  1002. antcomb->scan = false;
  1003. antcomb->rssi_first = main_rssi_avg;
  1004. antcomb->rssi_third = alt_rssi_avg;
  1005. if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
  1006. antcomb->rssi_lna1 = alt_rssi_avg;
  1007. else if (antcomb->second_quick_scan_conf ==
  1008. ATH_ANT_DIV_COMB_LNA2)
  1009. antcomb->rssi_lna2 = alt_rssi_avg;
  1010. else if (antcomb->second_quick_scan_conf ==
  1011. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
  1012. if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
  1013. antcomb->rssi_lna2 = main_rssi_avg;
  1014. else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
  1015. antcomb->rssi_lna1 = main_rssi_avg;
  1016. }
  1017. if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
  1018. ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
  1019. div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
  1020. else
  1021. div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
  1022. if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
  1023. if (ath_is_alt_ant_ratio_better(alt_ratio,
  1024. ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
  1025. ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
  1026. main_rssi_avg, alt_rssi_avg,
  1027. antcomb->total_pkt_count))
  1028. antcomb->second_ratio = true;
  1029. else
  1030. antcomb->second_ratio = false;
  1031. } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
  1032. if (ath_is_alt_ant_ratio_better(alt_ratio,
  1033. ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
  1034. ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
  1035. main_rssi_avg, alt_rssi_avg,
  1036. antcomb->total_pkt_count))
  1037. antcomb->second_ratio = true;
  1038. else
  1039. antcomb->second_ratio = false;
  1040. } else {
  1041. if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
  1042. (alt_rssi_avg > main_rssi_avg +
  1043. ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
  1044. (alt_rssi_avg > main_rssi_avg)) &&
  1045. (antcomb->total_pkt_count > 50))
  1046. antcomb->second_ratio = true;
  1047. else
  1048. antcomb->second_ratio = false;
  1049. }
  1050. /* set alt to the conf with maximun ratio */
  1051. if (antcomb->first_ratio && antcomb->second_ratio) {
  1052. if (antcomb->rssi_second > antcomb->rssi_third) {
  1053. /* first alt*/
  1054. if ((antcomb->first_quick_scan_conf ==
  1055. ATH_ANT_DIV_COMB_LNA1) ||
  1056. (antcomb->first_quick_scan_conf ==
  1057. ATH_ANT_DIV_COMB_LNA2))
  1058. /* Set alt LNA1 or LNA2*/
  1059. if (div_ant_conf->main_lna_conf ==
  1060. ATH_ANT_DIV_COMB_LNA2)
  1061. div_ant_conf->alt_lna_conf =
  1062. ATH_ANT_DIV_COMB_LNA1;
  1063. else
  1064. div_ant_conf->alt_lna_conf =
  1065. ATH_ANT_DIV_COMB_LNA2;
  1066. else
  1067. /* Set alt to A+B or A-B */
  1068. div_ant_conf->alt_lna_conf =
  1069. antcomb->first_quick_scan_conf;
  1070. } else if ((antcomb->second_quick_scan_conf ==
  1071. ATH_ANT_DIV_COMB_LNA1) ||
  1072. (antcomb->second_quick_scan_conf ==
  1073. ATH_ANT_DIV_COMB_LNA2)) {
  1074. /* Set alt LNA1 or LNA2 */
  1075. if (div_ant_conf->main_lna_conf ==
  1076. ATH_ANT_DIV_COMB_LNA2)
  1077. div_ant_conf->alt_lna_conf =
  1078. ATH_ANT_DIV_COMB_LNA1;
  1079. else
  1080. div_ant_conf->alt_lna_conf =
  1081. ATH_ANT_DIV_COMB_LNA2;
  1082. } else {
  1083. /* Set alt to A+B or A-B */
  1084. div_ant_conf->alt_lna_conf =
  1085. antcomb->second_quick_scan_conf;
  1086. }
  1087. } else if (antcomb->first_ratio) {
  1088. /* first alt */
  1089. if ((antcomb->first_quick_scan_conf ==
  1090. ATH_ANT_DIV_COMB_LNA1) ||
  1091. (antcomb->first_quick_scan_conf ==
  1092. ATH_ANT_DIV_COMB_LNA2))
  1093. /* Set alt LNA1 or LNA2 */
  1094. if (div_ant_conf->main_lna_conf ==
  1095. ATH_ANT_DIV_COMB_LNA2)
  1096. div_ant_conf->alt_lna_conf =
  1097. ATH_ANT_DIV_COMB_LNA1;
  1098. else
  1099. div_ant_conf->alt_lna_conf =
  1100. ATH_ANT_DIV_COMB_LNA2;
  1101. else
  1102. /* Set alt to A+B or A-B */
  1103. div_ant_conf->alt_lna_conf =
  1104. antcomb->first_quick_scan_conf;
  1105. } else if (antcomb->second_ratio) {
  1106. /* second alt */
  1107. if ((antcomb->second_quick_scan_conf ==
  1108. ATH_ANT_DIV_COMB_LNA1) ||
  1109. (antcomb->second_quick_scan_conf ==
  1110. ATH_ANT_DIV_COMB_LNA2))
  1111. /* Set alt LNA1 or LNA2 */
  1112. if (div_ant_conf->main_lna_conf ==
  1113. ATH_ANT_DIV_COMB_LNA2)
  1114. div_ant_conf->alt_lna_conf =
  1115. ATH_ANT_DIV_COMB_LNA1;
  1116. else
  1117. div_ant_conf->alt_lna_conf =
  1118. ATH_ANT_DIV_COMB_LNA2;
  1119. else
  1120. /* Set alt to A+B or A-B */
  1121. div_ant_conf->alt_lna_conf =
  1122. antcomb->second_quick_scan_conf;
  1123. } else {
  1124. /* main is largest */
  1125. if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
  1126. (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
  1127. /* Set alt LNA1 or LNA2 */
  1128. if (div_ant_conf->main_lna_conf ==
  1129. ATH_ANT_DIV_COMB_LNA2)
  1130. div_ant_conf->alt_lna_conf =
  1131. ATH_ANT_DIV_COMB_LNA1;
  1132. else
  1133. div_ant_conf->alt_lna_conf =
  1134. ATH_ANT_DIV_COMB_LNA2;
  1135. else
  1136. /* Set alt to A+B or A-B */
  1137. div_ant_conf->alt_lna_conf = antcomb->main_conf;
  1138. }
  1139. break;
  1140. default:
  1141. break;
  1142. }
  1143. }
  1144. static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
  1145. struct ath_ant_comb *antcomb, int alt_ratio)
  1146. {
  1147. if (ant_conf->div_group == 0) {
  1148. /* Adjust the fast_div_bias based on main and alt lna conf */
  1149. switch ((ant_conf->main_lna_conf << 4) |
  1150. ant_conf->alt_lna_conf) {
  1151. case 0x01: /* A-B LNA2 */
  1152. ant_conf->fast_div_bias = 0x3b;
  1153. break;
  1154. case 0x02: /* A-B LNA1 */
  1155. ant_conf->fast_div_bias = 0x3d;
  1156. break;
  1157. case 0x03: /* A-B A+B */
  1158. ant_conf->fast_div_bias = 0x1;
  1159. break;
  1160. case 0x10: /* LNA2 A-B */
  1161. ant_conf->fast_div_bias = 0x7;
  1162. break;
  1163. case 0x12: /* LNA2 LNA1 */
  1164. ant_conf->fast_div_bias = 0x2;
  1165. break;
  1166. case 0x13: /* LNA2 A+B */
  1167. ant_conf->fast_div_bias = 0x7;
  1168. break;
  1169. case 0x20: /* LNA1 A-B */
  1170. ant_conf->fast_div_bias = 0x6;
  1171. break;
  1172. case 0x21: /* LNA1 LNA2 */
  1173. ant_conf->fast_div_bias = 0x0;
  1174. break;
  1175. case 0x23: /* LNA1 A+B */
  1176. ant_conf->fast_div_bias = 0x6;
  1177. break;
  1178. case 0x30: /* A+B A-B */
  1179. ant_conf->fast_div_bias = 0x1;
  1180. break;
  1181. case 0x31: /* A+B LNA2 */
  1182. ant_conf->fast_div_bias = 0x3b;
  1183. break;
  1184. case 0x32: /* A+B LNA1 */
  1185. ant_conf->fast_div_bias = 0x3d;
  1186. break;
  1187. default:
  1188. break;
  1189. }
  1190. } else if (ant_conf->div_group == 1) {
  1191. /* Adjust the fast_div_bias based on main and alt_lna_conf */
  1192. switch ((ant_conf->main_lna_conf << 4) |
  1193. ant_conf->alt_lna_conf) {
  1194. case 0x01: /* A-B LNA2 */
  1195. ant_conf->fast_div_bias = 0x1;
  1196. ant_conf->main_gaintb = 0;
  1197. ant_conf->alt_gaintb = 0;
  1198. break;
  1199. case 0x02: /* A-B LNA1 */
  1200. ant_conf->fast_div_bias = 0x1;
  1201. ant_conf->main_gaintb = 0;
  1202. ant_conf->alt_gaintb = 0;
  1203. break;
  1204. case 0x03: /* A-B A+B */
  1205. ant_conf->fast_div_bias = 0x1;
  1206. ant_conf->main_gaintb = 0;
  1207. ant_conf->alt_gaintb = 0;
  1208. break;
  1209. case 0x10: /* LNA2 A-B */
  1210. if (!(antcomb->scan) &&
  1211. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1212. ant_conf->fast_div_bias = 0x3f;
  1213. else
  1214. ant_conf->fast_div_bias = 0x1;
  1215. ant_conf->main_gaintb = 0;
  1216. ant_conf->alt_gaintb = 0;
  1217. break;
  1218. case 0x12: /* LNA2 LNA1 */
  1219. ant_conf->fast_div_bias = 0x1;
  1220. ant_conf->main_gaintb = 0;
  1221. ant_conf->alt_gaintb = 0;
  1222. break;
  1223. case 0x13: /* LNA2 A+B */
  1224. if (!(antcomb->scan) &&
  1225. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1226. ant_conf->fast_div_bias = 0x3f;
  1227. else
  1228. ant_conf->fast_div_bias = 0x1;
  1229. ant_conf->main_gaintb = 0;
  1230. ant_conf->alt_gaintb = 0;
  1231. break;
  1232. case 0x20: /* LNA1 A-B */
  1233. if (!(antcomb->scan) &&
  1234. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1235. ant_conf->fast_div_bias = 0x3f;
  1236. else
  1237. ant_conf->fast_div_bias = 0x1;
  1238. ant_conf->main_gaintb = 0;
  1239. ant_conf->alt_gaintb = 0;
  1240. break;
  1241. case 0x21: /* LNA1 LNA2 */
  1242. ant_conf->fast_div_bias = 0x1;
  1243. ant_conf->main_gaintb = 0;
  1244. ant_conf->alt_gaintb = 0;
  1245. break;
  1246. case 0x23: /* LNA1 A+B */
  1247. if (!(antcomb->scan) &&
  1248. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1249. ant_conf->fast_div_bias = 0x3f;
  1250. else
  1251. ant_conf->fast_div_bias = 0x1;
  1252. ant_conf->main_gaintb = 0;
  1253. ant_conf->alt_gaintb = 0;
  1254. break;
  1255. case 0x30: /* A+B A-B */
  1256. ant_conf->fast_div_bias = 0x1;
  1257. ant_conf->main_gaintb = 0;
  1258. ant_conf->alt_gaintb = 0;
  1259. break;
  1260. case 0x31: /* A+B LNA2 */
  1261. ant_conf->fast_div_bias = 0x1;
  1262. ant_conf->main_gaintb = 0;
  1263. ant_conf->alt_gaintb = 0;
  1264. break;
  1265. case 0x32: /* A+B LNA1 */
  1266. ant_conf->fast_div_bias = 0x1;
  1267. ant_conf->main_gaintb = 0;
  1268. ant_conf->alt_gaintb = 0;
  1269. break;
  1270. default:
  1271. break;
  1272. }
  1273. } else if (ant_conf->div_group == 2) {
  1274. /* Adjust the fast_div_bias based on main and alt_lna_conf */
  1275. switch ((ant_conf->main_lna_conf << 4) |
  1276. ant_conf->alt_lna_conf) {
  1277. case 0x01: /* A-B LNA2 */
  1278. ant_conf->fast_div_bias = 0x1;
  1279. ant_conf->main_gaintb = 0;
  1280. ant_conf->alt_gaintb = 0;
  1281. break;
  1282. case 0x02: /* A-B LNA1 */
  1283. ant_conf->fast_div_bias = 0x1;
  1284. ant_conf->main_gaintb = 0;
  1285. ant_conf->alt_gaintb = 0;
  1286. break;
  1287. case 0x03: /* A-B A+B */
  1288. ant_conf->fast_div_bias = 0x1;
  1289. ant_conf->main_gaintb = 0;
  1290. ant_conf->alt_gaintb = 0;
  1291. break;
  1292. case 0x10: /* LNA2 A-B */
  1293. if (!(antcomb->scan) &&
  1294. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1295. ant_conf->fast_div_bias = 0x1;
  1296. else
  1297. ant_conf->fast_div_bias = 0x2;
  1298. ant_conf->main_gaintb = 0;
  1299. ant_conf->alt_gaintb = 0;
  1300. break;
  1301. case 0x12: /* LNA2 LNA1 */
  1302. ant_conf->fast_div_bias = 0x1;
  1303. ant_conf->main_gaintb = 0;
  1304. ant_conf->alt_gaintb = 0;
  1305. break;
  1306. case 0x13: /* LNA2 A+B */
  1307. if (!(antcomb->scan) &&
  1308. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1309. ant_conf->fast_div_bias = 0x1;
  1310. else
  1311. ant_conf->fast_div_bias = 0x2;
  1312. ant_conf->main_gaintb = 0;
  1313. ant_conf->alt_gaintb = 0;
  1314. break;
  1315. case 0x20: /* LNA1 A-B */
  1316. if (!(antcomb->scan) &&
  1317. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1318. ant_conf->fast_div_bias = 0x1;
  1319. else
  1320. ant_conf->fast_div_bias = 0x2;
  1321. ant_conf->main_gaintb = 0;
  1322. ant_conf->alt_gaintb = 0;
  1323. break;
  1324. case 0x21: /* LNA1 LNA2 */
  1325. ant_conf->fast_div_bias = 0x1;
  1326. ant_conf->main_gaintb = 0;
  1327. ant_conf->alt_gaintb = 0;
  1328. break;
  1329. case 0x23: /* LNA1 A+B */
  1330. if (!(antcomb->scan) &&
  1331. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1332. ant_conf->fast_div_bias = 0x1;
  1333. else
  1334. ant_conf->fast_div_bias = 0x2;
  1335. ant_conf->main_gaintb = 0;
  1336. ant_conf->alt_gaintb = 0;
  1337. break;
  1338. case 0x30: /* A+B A-B */
  1339. ant_conf->fast_div_bias = 0x1;
  1340. ant_conf->main_gaintb = 0;
  1341. ant_conf->alt_gaintb = 0;
  1342. break;
  1343. case 0x31: /* A+B LNA2 */
  1344. ant_conf->fast_div_bias = 0x1;
  1345. ant_conf->main_gaintb = 0;
  1346. ant_conf->alt_gaintb = 0;
  1347. break;
  1348. case 0x32: /* A+B LNA1 */
  1349. ant_conf->fast_div_bias = 0x1;
  1350. ant_conf->main_gaintb = 0;
  1351. ant_conf->alt_gaintb = 0;
  1352. break;
  1353. default:
  1354. break;
  1355. }
  1356. }
  1357. }
  1358. /* Antenna diversity and combining */
  1359. static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
  1360. {
  1361. struct ath_hw_antcomb_conf div_ant_conf;
  1362. struct ath_ant_comb *antcomb = &sc->ant_comb;
  1363. int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
  1364. int curr_main_set;
  1365. int main_rssi = rs->rs_rssi_ctl0;
  1366. int alt_rssi = rs->rs_rssi_ctl1;
  1367. int rx_ant_conf, main_ant_conf;
  1368. bool short_scan = false;
  1369. rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
  1370. ATH_ANT_RX_MASK;
  1371. main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
  1372. ATH_ANT_RX_MASK;
  1373. /* Record packet only when both main_rssi and alt_rssi is positive */
  1374. if (main_rssi > 0 && alt_rssi > 0) {
  1375. antcomb->total_pkt_count++;
  1376. antcomb->main_total_rssi += main_rssi;
  1377. antcomb->alt_total_rssi += alt_rssi;
  1378. if (main_ant_conf == rx_ant_conf)
  1379. antcomb->main_recv_cnt++;
  1380. else
  1381. antcomb->alt_recv_cnt++;
  1382. }
  1383. /* Short scan check */
  1384. if (antcomb->scan && antcomb->alt_good) {
  1385. if (time_after(jiffies, antcomb->scan_start_time +
  1386. msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
  1387. short_scan = true;
  1388. else
  1389. if (antcomb->total_pkt_count ==
  1390. ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
  1391. alt_ratio = ((antcomb->alt_recv_cnt * 100) /
  1392. antcomb->total_pkt_count);
  1393. if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
  1394. short_scan = true;
  1395. }
  1396. }
  1397. if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
  1398. rs->rs_moreaggr) && !short_scan)
  1399. return;
  1400. if (antcomb->total_pkt_count) {
  1401. alt_ratio = ((antcomb->alt_recv_cnt * 100) /
  1402. antcomb->total_pkt_count);
  1403. main_rssi_avg = (antcomb->main_total_rssi /
  1404. antcomb->total_pkt_count);
  1405. alt_rssi_avg = (antcomb->alt_total_rssi /
  1406. antcomb->total_pkt_count);
  1407. }
  1408. ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
  1409. curr_alt_set = div_ant_conf.alt_lna_conf;
  1410. curr_main_set = div_ant_conf.main_lna_conf;
  1411. antcomb->count++;
  1412. if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
  1413. if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
  1414. ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
  1415. main_rssi_avg);
  1416. antcomb->alt_good = true;
  1417. } else {
  1418. antcomb->alt_good = false;
  1419. }
  1420. antcomb->count = 0;
  1421. antcomb->scan = true;
  1422. antcomb->scan_not_start = true;
  1423. }
  1424. if (!antcomb->scan) {
  1425. if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
  1426. alt_ratio, curr_main_set, curr_alt_set,
  1427. alt_rssi_avg, main_rssi_avg)) {
  1428. if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
  1429. /* Switch main and alt LNA */
  1430. div_ant_conf.main_lna_conf =
  1431. ATH_ANT_DIV_COMB_LNA2;
  1432. div_ant_conf.alt_lna_conf =
  1433. ATH_ANT_DIV_COMB_LNA1;
  1434. } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
  1435. div_ant_conf.main_lna_conf =
  1436. ATH_ANT_DIV_COMB_LNA1;
  1437. div_ant_conf.alt_lna_conf =
  1438. ATH_ANT_DIV_COMB_LNA2;
  1439. }
  1440. goto div_comb_done;
  1441. } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
  1442. (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
  1443. /* Set alt to another LNA */
  1444. if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
  1445. div_ant_conf.alt_lna_conf =
  1446. ATH_ANT_DIV_COMB_LNA1;
  1447. else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
  1448. div_ant_conf.alt_lna_conf =
  1449. ATH_ANT_DIV_COMB_LNA2;
  1450. goto div_comb_done;
  1451. }
  1452. if ((alt_rssi_avg < (main_rssi_avg +
  1453. div_ant_conf.lna1_lna2_delta)))
  1454. goto div_comb_done;
  1455. }
  1456. if (!antcomb->scan_not_start) {
  1457. switch (curr_alt_set) {
  1458. case ATH_ANT_DIV_COMB_LNA2:
  1459. antcomb->rssi_lna2 = alt_rssi_avg;
  1460. antcomb->rssi_lna1 = main_rssi_avg;
  1461. antcomb->scan = true;
  1462. /* set to A+B */
  1463. div_ant_conf.main_lna_conf =
  1464. ATH_ANT_DIV_COMB_LNA1;
  1465. div_ant_conf.alt_lna_conf =
  1466. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  1467. break;
  1468. case ATH_ANT_DIV_COMB_LNA1:
  1469. antcomb->rssi_lna1 = alt_rssi_avg;
  1470. antcomb->rssi_lna2 = main_rssi_avg;
  1471. antcomb->scan = true;
  1472. /* set to A+B */
  1473. div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
  1474. div_ant_conf.alt_lna_conf =
  1475. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  1476. break;
  1477. case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
  1478. antcomb->rssi_add = alt_rssi_avg;
  1479. antcomb->scan = true;
  1480. /* set to A-B */
  1481. div_ant_conf.alt_lna_conf =
  1482. ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  1483. break;
  1484. case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
  1485. antcomb->rssi_sub = alt_rssi_avg;
  1486. antcomb->scan = false;
  1487. if (antcomb->rssi_lna2 >
  1488. (antcomb->rssi_lna1 +
  1489. ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
  1490. /* use LNA2 as main LNA */
  1491. if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
  1492. (antcomb->rssi_add > antcomb->rssi_sub)) {
  1493. /* set to A+B */
  1494. div_ant_conf.main_lna_conf =
  1495. ATH_ANT_DIV_COMB_LNA2;
  1496. div_ant_conf.alt_lna_conf =
  1497. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  1498. } else if (antcomb->rssi_sub >
  1499. antcomb->rssi_lna1) {
  1500. /* set to A-B */
  1501. div_ant_conf.main_lna_conf =
  1502. ATH_ANT_DIV_COMB_LNA2;
  1503. div_ant_conf.alt_lna_conf =
  1504. ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  1505. } else {
  1506. /* set to LNA1 */
  1507. div_ant_conf.main_lna_conf =
  1508. ATH_ANT_DIV_COMB_LNA2;
  1509. div_ant_conf.alt_lna_conf =
  1510. ATH_ANT_DIV_COMB_LNA1;
  1511. }
  1512. } else {
  1513. /* use LNA1 as main LNA */
  1514. if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
  1515. (antcomb->rssi_add > antcomb->rssi_sub)) {
  1516. /* set to A+B */
  1517. div_ant_conf.main_lna_conf =
  1518. ATH_ANT_DIV_COMB_LNA1;
  1519. div_ant_conf.alt_lna_conf =
  1520. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  1521. } else if (antcomb->rssi_sub >
  1522. antcomb->rssi_lna1) {
  1523. /* set to A-B */
  1524. div_ant_conf.main_lna_conf =
  1525. ATH_ANT_DIV_COMB_LNA1;
  1526. div_ant_conf.alt_lna_conf =
  1527. ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  1528. } else {
  1529. /* set to LNA2 */
  1530. div_ant_conf.main_lna_conf =
  1531. ATH_ANT_DIV_COMB_LNA1;
  1532. div_ant_conf.alt_lna_conf =
  1533. ATH_ANT_DIV_COMB_LNA2;
  1534. }
  1535. }
  1536. break;
  1537. default:
  1538. break;
  1539. }
  1540. } else {
  1541. if (!antcomb->alt_good) {
  1542. antcomb->scan_not_start = false;
  1543. /* Set alt to another LNA */
  1544. if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
  1545. div_ant_conf.main_lna_conf =
  1546. ATH_ANT_DIV_COMB_LNA2;
  1547. div_ant_conf.alt_lna_conf =
  1548. ATH_ANT_DIV_COMB_LNA1;
  1549. } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
  1550. div_ant_conf.main_lna_conf =
  1551. ATH_ANT_DIV_COMB_LNA1;
  1552. div_ant_conf.alt_lna_conf =
  1553. ATH_ANT_DIV_COMB_LNA2;
  1554. }
  1555. goto div_comb_done;
  1556. }
  1557. }
  1558. ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
  1559. main_rssi_avg, alt_rssi_avg,
  1560. alt_ratio);
  1561. antcomb->quick_scan_cnt++;
  1562. div_comb_done:
  1563. ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
  1564. ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
  1565. antcomb->scan_start_time = jiffies;
  1566. antcomb->total_pkt_count = 0;
  1567. antcomb->main_total_rssi = 0;
  1568. antcomb->alt_total_rssi = 0;
  1569. antcomb->main_recv_cnt = 0;
  1570. antcomb->alt_recv_cnt = 0;
  1571. }
  1572. int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
  1573. {
  1574. struct ath_buf *bf;
  1575. struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
  1576. struct ieee80211_rx_status *rxs;
  1577. struct ath_hw *ah = sc->sc_ah;
  1578. struct ath_common *common = ath9k_hw_common(ah);
  1579. struct ieee80211_hw *hw = sc->hw;
  1580. struct ieee80211_hdr *hdr;
  1581. int retval;
  1582. bool decrypt_error = false;
  1583. struct ath_rx_status rs;
  1584. enum ath9k_rx_qtype qtype;
  1585. bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
  1586. int dma_type;
  1587. u8 rx_status_len = ah->caps.rx_status_len;
  1588. u64 tsf = 0;
  1589. u32 tsf_lower = 0;
  1590. unsigned long flags;
  1591. if (edma)
  1592. dma_type = DMA_BIDIRECTIONAL;
  1593. else
  1594. dma_type = DMA_FROM_DEVICE;
  1595. qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
  1596. spin_lock_bh(&sc->rx.rxbuflock);
  1597. tsf = ath9k_hw_gettsf64(ah);
  1598. tsf_lower = tsf & 0xffffffff;
  1599. do {
  1600. /* If handling rx interrupt and flush is in progress => exit */
  1601. if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
  1602. break;
  1603. memset(&rs, 0, sizeof(rs));
  1604. if (edma)
  1605. bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
  1606. else
  1607. bf = ath_get_next_rx_buf(sc, &rs);
  1608. if (!bf)
  1609. break;
  1610. skb = bf->bf_mpdu;
  1611. if (!skb)
  1612. continue;
  1613. /*
  1614. * Take frame header from the first fragment and RX status from
  1615. * the last one.
  1616. */
  1617. if (sc->rx.frag)
  1618. hdr_skb = sc->rx.frag;
  1619. else
  1620. hdr_skb = skb;
  1621. hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
  1622. rxs = IEEE80211_SKB_RXCB(hdr_skb);
  1623. if (ieee80211_is_beacon(hdr->frame_control) &&
  1624. !compare_ether_addr(hdr->addr3, common->curbssid))
  1625. rs.is_mybeacon = true;
  1626. else
  1627. rs.is_mybeacon = false;
  1628. ath_debug_stat_rx(sc, &rs);
  1629. /*
  1630. * If we're asked to flush receive queue, directly
  1631. * chain it back at the queue without processing it.
  1632. */
  1633. if (sc->sc_flags & SC_OP_RXFLUSH)
  1634. goto requeue_drop_frag;
  1635. retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
  1636. rxs, &decrypt_error);
  1637. if (retval)
  1638. goto requeue_drop_frag;
  1639. rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
  1640. if (rs.rs_tstamp > tsf_lower &&
  1641. unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
  1642. rxs->mactime -= 0x100000000ULL;
  1643. if (rs.rs_tstamp < tsf_lower &&
  1644. unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
  1645. rxs->mactime += 0x100000000ULL;
  1646. /* Ensure we always have an skb to requeue once we are done
  1647. * processing the current buffer's skb */
  1648. requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
  1649. /* If there is no memory we ignore the current RX'd frame,
  1650. * tell hardware it can give us a new frame using the old
  1651. * skb and put it at the tail of the sc->rx.rxbuf list for
  1652. * processing. */
  1653. if (!requeue_skb)
  1654. goto requeue_drop_frag;
  1655. /* Unmap the frame */
  1656. dma_unmap_single(sc->dev, bf->bf_buf_addr,
  1657. common->rx_bufsize,
  1658. dma_type);
  1659. skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
  1660. if (ah->caps.rx_status_len)
  1661. skb_pull(skb, ah->caps.rx_status_len);
  1662. if (!rs.rs_more)
  1663. ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
  1664. rxs, decrypt_error);
  1665. /* We will now give hardware our shiny new allocated skb */
  1666. bf->bf_mpdu = requeue_skb;
  1667. bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
  1668. common->rx_bufsize,
  1669. dma_type);
  1670. if (unlikely(dma_mapping_error(sc->dev,
  1671. bf->bf_buf_addr))) {
  1672. dev_kfree_skb_any(requeue_skb);
  1673. bf->bf_mpdu = NULL;
  1674. bf->bf_buf_addr = 0;
  1675. ath_err(common, "dma_mapping_error() on RX\n");
  1676. ieee80211_rx(hw, skb);
  1677. break;
  1678. }
  1679. if (rs.rs_more) {
  1680. /*
  1681. * rs_more indicates chained descriptors which can be
  1682. * used to link buffers together for a sort of
  1683. * scatter-gather operation.
  1684. */
  1685. if (sc->rx.frag) {
  1686. /* too many fragments - cannot handle frame */
  1687. dev_kfree_skb_any(sc->rx.frag);
  1688. dev_kfree_skb_any(skb);
  1689. skb = NULL;
  1690. }
  1691. sc->rx.frag = skb;
  1692. goto requeue;
  1693. }
  1694. if (sc->rx.frag) {
  1695. int space = skb->len - skb_tailroom(hdr_skb);
  1696. sc->rx.frag = NULL;
  1697. if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
  1698. dev_kfree_skb(skb);
  1699. goto requeue_drop_frag;
  1700. }
  1701. skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
  1702. skb->len);
  1703. dev_kfree_skb_any(skb);
  1704. skb = hdr_skb;
  1705. }
  1706. /*
  1707. * change the default rx antenna if rx diversity chooses the
  1708. * other antenna 3 times in a row.
  1709. */
  1710. if (sc->rx.defant != rs.rs_antenna) {
  1711. if (++sc->rx.rxotherant >= 3)
  1712. ath_setdefantenna(sc, rs.rs_antenna);
  1713. } else {
  1714. sc->rx.rxotherant = 0;
  1715. }
  1716. if (rxs->flag & RX_FLAG_MMIC_STRIPPED)
  1717. skb_trim(skb, skb->len - 8);
  1718. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1719. if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
  1720. PS_WAIT_FOR_CAB |
  1721. PS_WAIT_FOR_PSPOLL_DATA)) ||
  1722. ath9k_check_auto_sleep(sc))
  1723. ath_rx_ps(sc, skb);
  1724. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1725. if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx == 3)
  1726. ath_ant_comb_scan(sc, &rs);
  1727. ieee80211_rx(hw, skb);
  1728. requeue_drop_frag:
  1729. if (sc->rx.frag) {
  1730. dev_kfree_skb_any(sc->rx.frag);
  1731. sc->rx.frag = NULL;
  1732. }
  1733. requeue:
  1734. if (edma) {
  1735. list_add_tail(&bf->list, &sc->rx.rxbuf);
  1736. ath_rx_edma_buf_link(sc, qtype);
  1737. } else {
  1738. list_move_tail(&bf->list, &sc->rx.rxbuf);
  1739. ath_rx_buf_link(sc, bf);
  1740. if (!flush)
  1741. ath9k_hw_rxena(ah);
  1742. }
  1743. } while (1);
  1744. spin_unlock_bh(&sc->rx.rxbuflock);
  1745. if (!(ah->imask & ATH9K_INT_RXEOL)) {
  1746. ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  1747. ath9k_hw_set_interrupts(ah, ah->imask);
  1748. }
  1749. return 0;
  1750. }