Kconfig 8.1 KB

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  1. # arch/arm/plat-samsung/Kconfig
  2. #
  3. # Copyright 2009 Simtec Electronics
  4. #
  5. # Licensed under GPLv2
  6. config PLAT_SAMSUNG
  7. bool
  8. depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P
  9. select NO_IOPORT
  10. select GENERIC_IRQ_CHIP
  11. default y
  12. help
  13. Base platform code for all Samsung SoC based systems
  14. if PLAT_SAMSUNG
  15. # boot configurations
  16. comment "Boot options"
  17. config S3C_BOOT_WATCHDOG
  18. bool "S3C Initialisation watchdog"
  19. depends on S3C2410_WATCHDOG
  20. help
  21. Say y to enable the watchdog during the kernel decompression
  22. stage. If the kernel fails to uncompress, then the watchdog
  23. will trigger a reset and the system should restart.
  24. config S3C_BOOT_ERROR_RESET
  25. bool "S3C Reboot on decompression error"
  26. help
  27. Say y here to use the watchdog to reset the system if the
  28. kernel decompressor detects an error during decompression.
  29. config S3C_BOOT_UART_FORCE_FIFO
  30. bool "Force UART FIFO on during boot process"
  31. default y
  32. help
  33. Say Y here to force the UART FIFOs on during the kernel
  34. uncompressor
  35. config S3C_LOWLEVEL_UART_PORT
  36. int "S3C UART to use for low-level messages"
  37. default 0
  38. help
  39. Choice of which UART port to use for the low-level messages,
  40. such as the `Uncompressing...` at start time. The value of
  41. this configuration should be between zero and two. The port
  42. must have been initialised by the boot-loader before use.
  43. # clock options
  44. config SAMSUNG_CLKSRC
  45. bool
  46. help
  47. Select the clock code for the clksrc implementation
  48. used by newer systems such as the S3C64XX.
  49. # options for IRQ support
  50. config SAMSUNG_IRQ_VIC_TIMER
  51. bool
  52. help
  53. Internal configuration to build the VIC timer interrupt code.
  54. # options for gpio configuration support
  55. config SAMSUNG_GPIOLIB_4BIT
  56. bool
  57. help
  58. GPIOlib file contains the 4 bit modification functions for gpio
  59. configuration. GPIOlib shall be compiled only for S3C64XX and S5P
  60. series of processors.
  61. config S3C_GPIO_CFG_S3C64XX
  62. bool
  63. help
  64. Internal configuration to enable S3C64XX style GPIO configuration
  65. functions.
  66. config S5P_GPIO_DRVSTR
  67. bool
  68. help
  69. Internal configuration to get and set correct GPIO driver strength
  70. helper
  71. config SAMSUNG_GPIO_EXTRA
  72. int "Number of additional GPIO pins"
  73. default 128 if SAMSUNG_GPIO_EXTRA128
  74. default 64 if SAMSUNG_GPIO_EXTRA64
  75. default 0
  76. help
  77. Use additional GPIO space in addition to the GPIO's the SOC
  78. provides. This allows expanding the GPIO space for use with
  79. GPIO expanders.
  80. config SAMSUNG_GPIO_EXTRA64
  81. bool
  82. config SAMSUNG_GPIO_EXTRA128
  83. bool
  84. config S3C_GPIO_SPACE
  85. int "Space between gpio banks"
  86. default 0
  87. help
  88. Add a number of spare GPIO entries between each bank for debugging
  89. purposes. This allows any problems where an counter overflows from
  90. one bank to another to be caught, at the expense of using a little
  91. more memory.
  92. config S3C_GPIO_TRACK
  93. bool
  94. help
  95. Internal configuration option to enable the s3c specific gpio
  96. chip tracking if the platform requires it.
  97. # ADC driver
  98. config S3C_ADC
  99. bool "ADC common driver support"
  100. help
  101. Core support for the ADC block found in the Samsung SoC systems
  102. for drivers such as the touchscreen and hwmon to use to share
  103. this resource.
  104. # device definitions to compile in
  105. config S3C_DEV_HSMMC
  106. bool
  107. help
  108. Compile in platform device definitions for HSMMC code
  109. config S3C_DEV_HSMMC1
  110. bool
  111. help
  112. Compile in platform device definitions for HSMMC channel 1
  113. config S3C_DEV_HSMMC2
  114. bool
  115. help
  116. Compile in platform device definitions for HSMMC channel 2
  117. config S3C_DEV_HSMMC3
  118. bool
  119. help
  120. Compile in platform device definitions for HSMMC channel 3
  121. config S3C_DEV_HWMON
  122. bool
  123. help
  124. Compile in platform device definitions for HWMON
  125. config S3C_DEV_I2C1
  126. bool
  127. help
  128. Compile in platform device definitions for I2C channel 1
  129. config S3C_DEV_I2C2
  130. bool
  131. help
  132. Compile in platform device definitions for I2C channel 2
  133. config S3C_DEV_I2C3
  134. bool
  135. help
  136. Compile in platform device definition for I2C controller 3
  137. config S3C_DEV_I2C4
  138. bool
  139. help
  140. Compile in platform device definition for I2C controller 4
  141. config S3C_DEV_I2C5
  142. bool
  143. help
  144. Compile in platform device definition for I2C controller 5
  145. config S3C_DEV_I2C6
  146. bool
  147. help
  148. Compile in platform device definition for I2C controller 6
  149. config S3C_DEV_I2C7
  150. bool
  151. help
  152. Compile in platform device definition for I2C controller 7
  153. config S3C_DEV_FB
  154. bool
  155. help
  156. Compile in platform device definition for framebuffer
  157. config S3C_DEV_USB_HOST
  158. bool
  159. help
  160. Compile in platform device definition for USB host.
  161. config S3C_DEV_USB_HSOTG
  162. bool
  163. help
  164. Compile in platform device definition for USB high-speed OtG
  165. config S3C_DEV_WDT
  166. bool
  167. default y if ARCH_S3C2410
  168. help
  169. Complie in platform device definition for Watchdog Timer
  170. config S3C_DEV_NAND
  171. bool
  172. help
  173. Compile in platform device definition for NAND controller
  174. config S3C_DEV_ONENAND
  175. bool
  176. help
  177. Compile in platform device definition for OneNAND controller
  178. config S3C_DEV_RTC
  179. bool
  180. help
  181. Complie in platform device definition for RTC
  182. config SAMSUNG_DEV_ADC
  183. bool
  184. help
  185. Compile in platform device definition for ADC controller
  186. config SAMSUNG_DEV_IDE
  187. bool
  188. help
  189. Compile in platform device definitions for IDE
  190. config S3C64XX_DEV_SPI
  191. bool
  192. help
  193. Compile in platform device definitions for S3C64XX's type
  194. SPI controllers.
  195. config SAMSUNG_DEV_TS
  196. bool
  197. help
  198. Common in platform device definitions for touchscreen device
  199. config SAMSUNG_DEV_KEYPAD
  200. bool
  201. help
  202. Compile in platform device definitions for keypad
  203. config SAMSUNG_DEV_PWM
  204. bool
  205. default y if ARCH_S3C2410
  206. help
  207. Compile in platform device definition for PWM Timer
  208. config SAMSUNG_DEV_BACKLIGHT
  209. bool
  210. depends on SAMSUNG_DEV_PWM
  211. help
  212. Compile in platform device definition LCD backlight with PWM Timer
  213. config S3C24XX_PWM
  214. bool "PWM device support"
  215. select HAVE_PWM
  216. help
  217. Support for exporting the PWM timer blocks via the pwm device
  218. system
  219. # DMA
  220. config S3C_DMA
  221. bool
  222. help
  223. Internal configuration for S3C DMA core
  224. config SAMSUNG_DMADEV
  225. bool
  226. select DMADEVICES
  227. select PL330_DMA if (CPU_EXYNOS4210 || CPU_S5PV210 || CPU_S5PC100 || \
  228. CPU_S5P6450 || CPU_S5P6440)
  229. select ARM_AMBA
  230. help
  231. Use DMA device engine for PL330 DMAC.
  232. comment "Power management"
  233. config SAMSUNG_PM_DEBUG
  234. bool "S3C2410 PM Suspend debug"
  235. depends on PM
  236. help
  237. Say Y here if you want verbose debugging from the PM Suspend and
  238. Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
  239. for more information.
  240. config S3C_PM_DEBUG_LED_SMDK
  241. bool "SMDK LED suspend/resume debugging"
  242. depends on PM && (MACH_SMDK6410)
  243. help
  244. Say Y here to enable the use of the SMDK LEDs on the baseboard
  245. for debugging of the state of the suspend and resume process.
  246. Note, this currently only works for S3C64XX based SMDK boards.
  247. config SAMSUNG_PM_CHECK
  248. bool "S3C2410 PM Suspend Memory CRC"
  249. depends on PM && CRC32
  250. help
  251. Enable the PM code's memory area checksum over sleep. This option
  252. will generate CRCs of all blocks of memory, and store them before
  253. going to sleep. The blocks are then checked on resume for any
  254. errors.
  255. Note, this can take several seconds depending on memory size
  256. and CPU speed.
  257. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
  258. config SAMSUNG_PM_CHECK_CHUNKSIZE
  259. int "S3C2410 PM Suspend CRC Chunksize (KiB)"
  260. depends on PM && SAMSUNG_PM_CHECK
  261. default 64
  262. help
  263. Set the chunksize in Kilobytes of the CRC for checking memory
  264. corruption over suspend and resume. A smaller value will mean that
  265. the CRC data block will take more memory, but wil identify any
  266. faults with better precision.
  267. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
  268. config SAMSUNG_WAKEMASK
  269. bool
  270. depends on PM
  271. help
  272. Compile support for wakeup-mask controls found on the S3C6400
  273. and above. This code allows a set of interrupt to wakeup-mask
  274. mappings. See <plat/wakeup-mask.h>
  275. comment "Power Domain"
  276. config SAMSUNG_PD
  277. bool "Samsung Power Domain"
  278. depends on PM_RUNTIME
  279. help
  280. Say Y here if you want to control Power Domain by Runtime PM.
  281. config DEBUG_S3C_UART
  282. depends on PLAT_SAMSUNG
  283. int
  284. default "0" if DEBUG_S3C_UART0
  285. default "1" if DEBUG_S3C_UART1
  286. default "2" if DEBUG_S3C_UART2
  287. endif