registers.h 32 KB

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  1. /*
  2. * Registers definition for DA9063 modules
  3. *
  4. * Copyright 2012 Dialog Semiconductor Ltd.
  5. *
  6. * Author: Michal Hajduk <michal.hajduk@diasemi.com>
  7. * Krystian Garbaciak <krystian.garbaciak@diasemi.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #ifndef _DA9063_REG_H
  16. #define _DA9063_REG_H
  17. #define DA9063_I2C_PAGE_SEL_SHIFT 1
  18. #define DA9063_EVENT_REG_NUM 4
  19. #define DA9210_EVENT_REG_NUM 2
  20. #define DA9063_EXT_EVENT_REG_NUM (DA9063_EVENT_REG_NUM + \
  21. DA9210_EVENT_REG_NUM)
  22. /* Page selection I2C or SPI always in the begining of any page. */
  23. /* Page 0 : I2C access 0x000 - 0x0FF SPI access 0x000 - 0x07F */
  24. /* Page 1 : SPI access 0x080 - 0x0FF */
  25. /* Page 2 : I2C access 0x100 - 0x1FF SPI access 0x100 - 0x17F */
  26. /* Page 3 : SPI access 0x180 - 0x1FF */
  27. #define DA9063_REG_PAGE_CON 0x00
  28. /* System Control and Event Registers */
  29. #define DA9063_REG_STATUS_A 0x01
  30. #define DA9063_REG_STATUS_B 0x02
  31. #define DA9063_REG_STATUS_C 0x03
  32. #define DA9063_REG_STATUS_D 0x04
  33. #define DA9063_REG_FAULT_LOG 0x05
  34. #define DA9063_REG_EVENT_A 0x06
  35. #define DA9063_REG_EVENT_B 0x07
  36. #define DA9063_REG_EVENT_C 0x08
  37. #define DA9063_REG_EVENT_D 0x09
  38. #define DA9063_REG_IRQ_MASK_A 0x0A
  39. #define DA9063_REG_IRQ_MASK_B 0x0B
  40. #define DA9063_REG_IRQ_MASK_C 0x0C
  41. #define DA9063_REG_IRQ_MASK_D 0x0D
  42. #define DA9063_REG_CONTROL_A 0x0E
  43. #define DA9063_REG_CONTROL_B 0x0F
  44. #define DA9063_REG_CONTROL_C 0x10
  45. #define DA9063_REG_CONTROL_D 0x11
  46. #define DA9063_REG_CONTROL_E 0x12
  47. #define DA9063_REG_CONTROL_F 0x13
  48. #define DA9063_REG_PD_DIS 0x14
  49. /* GPIO Control Registers */
  50. #define DA9063_REG_GPIO_0_1 0x15
  51. #define DA9063_REG_GPIO_2_3 0x16
  52. #define DA9063_REG_GPIO_4_5 0x17
  53. #define DA9063_REG_GPIO_6_7 0x18
  54. #define DA9063_REG_GPIO_8_9 0x19
  55. #define DA9063_REG_GPIO_10_11 0x1A
  56. #define DA9063_REG_GPIO_12_13 0x1B
  57. #define DA9063_REG_GPIO_14_15 0x1C
  58. #define DA9063_REG_GPIO_MODE_0_7 0x1D
  59. #define DA9063_REG_GPIO_MODE_8_15 0x1E
  60. #define DA9063_REG_GPIO_SWITCH_CONT 0x1F
  61. /* Regulator Control Registers */
  62. #define DA9063_REG_BCORE2_CONT 0x20
  63. #define DA9063_REG_BCORE1_CONT 0x21
  64. #define DA9063_REG_BPRO_CONT 0x22
  65. #define DA9063_REG_BMEM_CONT 0x23
  66. #define DA9063_REG_BIO_CONT 0x24
  67. #define DA9063_REG_BPERI_CONT 0x25
  68. #define DA9063_REG_LDO1_CONT 0x26
  69. #define DA9063_REG_LDO2_CONT 0x27
  70. #define DA9063_REG_LDO3_CONT 0x28
  71. #define DA9063_REG_LDO4_CONT 0x29
  72. #define DA9063_REG_LDO5_CONT 0x2A
  73. #define DA9063_REG_LDO6_CONT 0x2B
  74. #define DA9063_REG_LDO7_CONT 0x2C
  75. #define DA9063_REG_LDO8_CONT 0x2D
  76. #define DA9063_REG_LDO9_CONT 0x2E
  77. #define DA9063_REG_LDO10_CONT 0x2F
  78. #define DA9063_REG_LDO11_CONT 0x30
  79. #define DA9063_REG_VIB 0x31
  80. #define DA9063_REG_DVC_1 0x32
  81. #define DA9063_REG_DVC_2 0x33
  82. /* GP-ADC Control Registers */
  83. #define DA9063_REG_ADC_MAN 0x34
  84. #define DA9063_REG_ADC_CONT 0x35
  85. #define DA9063_REG_VSYS_MON 0x36
  86. #define DA9063_REG_ADC_RES_L 0x37
  87. #define DA9063_REG_ADC_RES_H 0x38
  88. #define DA9063_REG_VSYS_RES 0x39
  89. #define DA9063_REG_ADCIN1_RES 0x3A
  90. #define DA9063_REG_ADCIN2_RES 0x3B
  91. #define DA9063_REG_ADCIN3_RES 0x3C
  92. #define DA9063_REG_MON1_RES 0x3D
  93. #define DA9063_REG_MON2_RES 0x3E
  94. #define DA9063_REG_MON3_RES 0x3F
  95. /* RTC Calendar and Alarm Registers */
  96. #define DA9063_REG_COUNT_S 0x40
  97. #define DA9063_REG_COUNT_MI 0x41
  98. #define DA9063_REG_COUNT_H 0x42
  99. #define DA9063_REG_COUNT_D 0x43
  100. #define DA9063_REG_COUNT_MO 0x44
  101. #define DA9063_REG_COUNT_Y 0x45
  102. #define DA9063_REG_ALARM_MI 0x46
  103. #define DA9063_REG_ALARM_H 0x47
  104. #define DA9063_REG_ALARM_D 0x48
  105. #define DA9063_REG_ALARM_MO 0x49
  106. #define DA9063_REG_ALARM_Y 0x4A
  107. #define DA9063_REG_SECOND_A 0x4B
  108. #define DA9063_REG_SECOND_B 0x4C
  109. #define DA9063_REG_SECOND_C 0x4D
  110. #define DA9063_REG_SECOND_D 0x4E
  111. /* Sequencer Control Registers */
  112. #define DA9063_REG_SEQ 0x81
  113. #define DA9063_REG_SEQ_TIMER 0x82
  114. #define DA9063_REG_ID_2_1 0x83
  115. #define DA9063_REG_ID_4_3 0x84
  116. #define DA9063_REG_ID_6_5 0x85
  117. #define DA9063_REG_ID_8_7 0x86
  118. #define DA9063_REG_ID_10_9 0x87
  119. #define DA9063_REG_ID_12_11 0x88
  120. #define DA9063_REG_ID_14_13 0x89
  121. #define DA9063_REG_ID_16_15 0x8A
  122. #define DA9063_REG_ID_18_17 0x8B
  123. #define DA9063_REG_ID_20_19 0x8C
  124. #define DA9063_REG_ID_22_21 0x8D
  125. #define DA9063_REG_ID_24_23 0x8E
  126. #define DA9063_REG_ID_26_25 0x8F
  127. #define DA9063_REG_ID_28_27 0x90
  128. #define DA9063_REG_ID_30_29 0x91
  129. #define DA9063_REG_ID_32_31 0x92
  130. #define DA9063_REG_SEQ_A 0x95
  131. #define DA9063_REG_SEQ_B 0x96
  132. #define DA9063_REG_WAIT 0x97
  133. #define DA9063_REG_EN_32K 0x98
  134. #define DA9063_REG_RESET 0x99
  135. /* Regulator Setting Registers */
  136. #define DA9063_REG_BUCK_ILIM_A 0x9A
  137. #define DA9063_REG_BUCK_ILIM_B 0x9B
  138. #define DA9063_REG_BUCK_ILIM_C 0x9C
  139. #define DA9063_REG_BCORE2_CFG 0x9D
  140. #define DA9063_REG_BCORE1_CFG 0x9E
  141. #define DA9063_REG_BPRO_CFG 0x9F
  142. #define DA9063_REG_BIO_CFG 0xA0
  143. #define DA9063_REG_BMEM_CFG 0xA1
  144. #define DA9063_REG_BPERI_CFG 0xA2
  145. #define DA9063_REG_VBCORE2_A 0xA3
  146. #define DA9063_REG_VBCORE1_A 0xA4
  147. #define DA9063_REG_VBPRO_A 0xA5
  148. #define DA9063_REG_VBMEM_A 0xA6
  149. #define DA9063_REG_VBIO_A 0xA7
  150. #define DA9063_REG_VBPERI_A 0xA8
  151. #define DA9063_REG_VLDO1_A 0xA9
  152. #define DA9063_REG_VLDO2_A 0xAA
  153. #define DA9063_REG_VLDO3_A 0xAB
  154. #define DA9063_REG_VLDO4_A 0xAC
  155. #define DA9063_REG_VLDO5_A 0xAD
  156. #define DA9063_REG_VLDO6_A 0xAE
  157. #define DA9063_REG_VLDO7_A 0xAF
  158. #define DA9063_REG_VLDO8_A 0xB0
  159. #define DA9063_REG_VLDO9_A 0xB1
  160. #define DA9063_REG_VLDO10_A 0xB2
  161. #define DA9063_REG_VLDO11_A 0xB3
  162. #define DA9063_REG_VBCORE2_B 0xB4
  163. #define DA9063_REG_VBCORE1_B 0xB5
  164. #define DA9063_REG_VBPRO_B 0xB6
  165. #define DA9063_REG_VBMEM_B 0xB7
  166. #define DA9063_REG_VBIO_B 0xB8
  167. #define DA9063_REG_VBPERI_B 0xB9
  168. #define DA9063_REG_VLDO1_B 0xBA
  169. #define DA9063_REG_VLDO2_B 0xBB
  170. #define DA9063_REG_VLDO3_B 0xBC
  171. #define DA9063_REG_VLDO4_B 0xBD
  172. #define DA9063_REG_VLDO5_B 0xBE
  173. #define DA9063_REG_VLDO6_B 0xBF
  174. #define DA9063_REG_VLDO7_B 0xC0
  175. #define DA9063_REG_VLDO8_B 0xC1
  176. #define DA9063_REG_VLDO9_B 0xC2
  177. #define DA9063_REG_VLDO10_B 0xC3
  178. #define DA9063_REG_VLDO11_B 0xC4
  179. /* Backup Battery Charger Control Register */
  180. #define DA9063_REG_BBAT_CONT 0xC5
  181. /* GPIO PWM (LED) */
  182. #define DA9063_REG_GPO11_LED 0xC6
  183. #define DA9063_REG_GPO14_LED 0xC7
  184. #define DA9063_REG_GPO15_LED 0xC8
  185. /* GP-ADC Threshold Registers */
  186. #define DA9063_REG_ADC_CFG 0xC9
  187. #define DA9063_REG_AUTO1_HIGH 0xCA
  188. #define DA9063_REG_AUTO1_LOW 0xCB
  189. #define DA9063_REG_AUTO2_HIGH 0xCC
  190. #define DA9063_REG_AUTO2_LOW 0xCD
  191. #define DA9063_REG_AUTO3_HIGH 0xCE
  192. #define DA9063_REG_AUTO3_LOW 0xCF
  193. /* DA9063 Configuration registers */
  194. /* OTP */
  195. #define DA9063_REG_OPT_COUNT 0x101
  196. #define DA9063_REG_OPT_ADDR 0x102
  197. #define DA9063_REG_OPT_DATA 0x103
  198. /* Customer Trim and Configuration */
  199. #define DA9063_REG_T_OFFSET 0x104
  200. #define DA9063_REG_INTERFACE 0x105
  201. #define DA9063_REG_CONFIG_A 0x106
  202. #define DA9063_REG_CONFIG_B 0x107
  203. #define DA9063_REG_CONFIG_C 0x108
  204. #define DA9063_REG_CONFIG_D 0x109
  205. #define DA9063_REG_CONFIG_E 0x10A
  206. #define DA9063_REG_CONFIG_F 0x10B
  207. #define DA9063_REG_CONFIG_G 0x10C
  208. #define DA9063_REG_CONFIG_H 0x10D
  209. #define DA9063_REG_CONFIG_I 0x10E
  210. #define DA9063_REG_CONFIG_J 0x10F
  211. #define DA9063_REG_CONFIG_K 0x110
  212. #define DA9063_REG_CONFIG_L 0x111
  213. #define DA9063_REG_MON_REG_1 0x112
  214. #define DA9063_REG_MON_REG_2 0x113
  215. #define DA9063_REG_MON_REG_3 0x114
  216. #define DA9063_REG_MON_REG_4 0x115
  217. #define DA9063_REG_MON_REG_5 0x116
  218. #define DA9063_REG_MON_REG_6 0x117
  219. #define DA9063_REG_TRIM_CLDR 0x118
  220. /* General Purpose Registers */
  221. #define DA9063_REG_GP_ID_0 0x119
  222. #define DA9063_REG_GP_ID_1 0x11A
  223. #define DA9063_REG_GP_ID_2 0x11B
  224. #define DA9063_REG_GP_ID_3 0x11C
  225. #define DA9063_REG_GP_ID_4 0x11D
  226. #define DA9063_REG_GP_ID_5 0x11E
  227. #define DA9063_REG_GP_ID_6 0x11F
  228. #define DA9063_REG_GP_ID_7 0x120
  229. #define DA9063_REG_GP_ID_8 0x121
  230. #define DA9063_REG_GP_ID_9 0x122
  231. #define DA9063_REG_GP_ID_10 0x123
  232. #define DA9063_REG_GP_ID_11 0x124
  233. #define DA9063_REG_GP_ID_12 0x125
  234. #define DA9063_REG_GP_ID_13 0x126
  235. #define DA9063_REG_GP_ID_14 0x127
  236. #define DA9063_REG_GP_ID_15 0x128
  237. #define DA9063_REG_GP_ID_16 0x129
  238. #define DA9063_REG_GP_ID_17 0x12A
  239. #define DA9063_REG_GP_ID_18 0x12B
  240. #define DA9063_REG_GP_ID_19 0x12C
  241. /* Chip ID and variant */
  242. #define DA9063_REG_CHIP_ID 0x181
  243. #define DA9063_REG_CHIP_VARIANT 0x182
  244. /*
  245. * PMIC registers bits
  246. */
  247. /* DA9063_REG_PAGE_CON (addr=0x00) */
  248. #define DA9063_PEG_PAGE_SHIFT 0
  249. #define DA9063_REG_PAGE_MASK 0x07
  250. #define DA9063_REG_PAGE0 0x00
  251. #define DA9063_REG_PAGE2 0x02
  252. #define DA9063_PAGE_WRITE_MODE 0x00
  253. #define DA9063_REPEAT_WRITE_MODE 0x40
  254. #define DA9063_PAGE_REVERT 0x80
  255. /* DA9063_REG_STATUS_A (addr=0x01) */
  256. #define DA9063_NONKEY 0x01
  257. #define DA9063_WAKE 0x02
  258. #define DA9063_DVC_BUSY 0x04
  259. #define DA9063_COMP_1V2 0x08
  260. /* DA9063_REG_STATUS_B (addr=0x02) */
  261. #define DA9063_GPI0 0x01
  262. #define DA9063_GPI1 0x02
  263. #define DA9063_GPI2 0x04
  264. #define DA9063_GPI3 0x08
  265. #define DA9063_GPI4 0x10
  266. #define DA9063_GPI5 0x20
  267. #define DA9063_GPI6 0x40
  268. #define DA9063_GPI7 0x80
  269. /* DA9063_REG_STATUS_C (addr=0x03) */
  270. #define DA9063_GPI8 0x01
  271. #define DA9063_GPI9 0x02
  272. #define DA9063_GPI10 0x04
  273. #define DA9063_GPI11 0x08
  274. #define DA9063_GPI12 0x10
  275. #define DA9063_GPI13 0x20
  276. #define DA9063_GPI14 0x40
  277. #define DA9063_GPI15 0x80
  278. /* DA9063_REG_STATUS_D (addr=0x04) */
  279. #define DA9063_LDO3_LIM 0x08
  280. #define DA9063_LDO4_LIM 0x10
  281. #define DA9063_LDO7_LIM 0x20
  282. #define DA9063_LDO8_LIM 0x40
  283. #define DA9063_LDO11_LIM 0x80
  284. /* DA9063_REG_FAULT_LOG (addr=0x05) */
  285. #define DA9063_TWD_ERROR 0x01
  286. #define DA9063_POR 0x02
  287. #define DA9063_VDD_FAULT 0x04
  288. #define DA9063_VDD_START 0x08
  289. #define DA9063_TEMP_CRIT 0x10
  290. #define DA9063_KEY_RESET 0x20
  291. #define DA9063_NSHUTDOWN 0x40
  292. #define DA9063_WAIT_SHUT 0x80
  293. /* DA9063_REG_EVENT_A (addr=0x06) */
  294. #define DA9063_E_NONKEY 0x01
  295. #define DA9063_E_ALARM 0x02
  296. #define DA9063_E_TICK 0x04
  297. #define DA9063_E_ADC_RDY 0x08
  298. #define DA9063_E_SEQ_RDY 0x10
  299. #define DA9063_EVENTS_B 0x20
  300. #define DA9063_EVENTS_C 0x40
  301. #define DA9063_EVENTS_D 0x80
  302. /* DA9063_REG_EVENT_B (addr=0x07) */
  303. #define DA9063_E_WAKE 0x01
  304. #define DA9063_E_TEMP 0x02
  305. #define DA9063_E_COMP_1V2 0x04
  306. #define DA9063_E_LDO_LIM 0x08
  307. #define DA9063_E_REG_UVOV 0x10
  308. #define DA9063_E_DVC_RDY 0x20
  309. #define DA9063_E_VDD_MON 0x40
  310. #define DA9063_E_VDD_WARN 0x80
  311. /* DA9063_REG_EVENT_C (addr=0x08) */
  312. #define DA9063_E_GPI0 0x01
  313. #define DA9063_E_GPI1 0x02
  314. #define DA9063_E_GPI2 0x04
  315. #define DA9063_E_GPI3 0x08
  316. #define DA9063_E_GPI4 0x10
  317. #define DA9063_E_GPI5 0x20
  318. #define DA9063_E_GPI6 0x40
  319. #define DA9063_E_GPI7 0x80
  320. /* DA9063_REG_EVENT_D (addr=0x09) */
  321. #define DA9063_E_GPI8 0x01
  322. #define DA9063_E_GPI9 0x02
  323. #define DA9063_E_GPI10 0x04
  324. #define DA9063_E_GPI11 0x08
  325. #define DA9063_E_GPI12 0x10
  326. #define DA9063_E_GPI13 0x20
  327. #define DA9063_E_GPI14 0x40
  328. #define DA9063_E_GPI15 0x80
  329. /* DA9063_REG_IRQ_MASK_A (addr=0x0A) */
  330. #define DA9063_M_ONKEY 0x01
  331. #define DA9063_M_ALARM 0x02
  332. #define DA9063_M_TICK 0x04
  333. #define DA9063_M_ADC_RDY 0x08
  334. #define DA9063_M_SEQ_RDY 0x10
  335. /* DA9063_REG_IRQ_MASK_B (addr=0x0B) */
  336. #define DA9063_M_WAKE 0x01
  337. #define DA9063_M_TEMP 0x02
  338. #define DA9063_M_COMP_1V2 0x04
  339. #define DA9063_M_LDO_LIM 0x08
  340. #define DA9063_M_UVOV 0x10
  341. #define DA9063_M_DVC_RDY 0x20
  342. #define DA9063_M_VDD_MON 0x40
  343. #define DA9063_M_VDD_WARN 0x80
  344. /* DA9063_REG_IRQ_MASK_C (addr=0x0C) */
  345. #define DA9063_M_GPI0 0x01
  346. #define DA9063_M_GPI1 0x02
  347. #define DA9063_M_GPI2 0x04
  348. #define DA9063_M_GPI3 0x08
  349. #define DA9063_M_GPI4 0x10
  350. #define DA9063_M_GPI5 0x20
  351. #define DA9063_M_GPI6 0x40
  352. #define DA9063_M_GPI7 0x80
  353. /* DA9063_REG_IRQ_MASK_D (addr=0x0D) */
  354. #define DA9063_M_GPI8 0x01
  355. #define DA9063_M_GPI9 0x02
  356. #define DA9063_M_GPI10 0x04
  357. #define DA9063_M_GPI11 0x08
  358. #define DA9063_M_GPI12 0x10
  359. #define DA9063_M_GPI13 0x20
  360. #define DA9063_M_GPI14 0x40
  361. #define DA9063_M_GPI15 0x80
  362. /* DA9063_REG_CONTROL_A (addr=0x0E) */
  363. #define DA9063_SYSTEM_EN 0x01
  364. #define DA9063_POWER_EN 0x02
  365. #define DA9063_POWER1_EN 0x04
  366. #define DA9063_STANDBY 0x08
  367. #define DA9063_M_SYSTEM_EN 0x10
  368. #define DA9063_M_POWER_EN 0x20
  369. #define DA9063_M_POWER1_EN 0x40
  370. #define DA9063_CP_EN 0x80
  371. /* DA9063_REG_CONTROL_B (addr=0x0F) */
  372. #define DA9063_CHG_SEL 0x01
  373. #define DA9063_WATCHDOG_PD 0x02
  374. #define DA9063_NRES_MODE 0x08
  375. #define DA9063_NONKEY_LOCK 0x10
  376. /* DA9063_REG_CONTROL_C (addr=0x10) */
  377. #define DA9063_DEBOUNCING_MASK 0x07
  378. #define DA9063_DEBOUNCING_OFF 0x0
  379. #define DA9063_DEBOUNCING_0MS1 0x1
  380. #define DA9063_DEBOUNCING_1MS 0x2
  381. #define DA9063_DEBOUNCING_10MS24 0x3
  382. #define DA9063_DEBOUNCING_51MS2 0x4
  383. #define DA9063_DEBOUNCING_256MS 0x5
  384. #define DA9063_DEBOUNCING_512MS 0x6
  385. #define DA9063_DEBOUNCING_1024MS 0x7
  386. #define DA9063_AUTO_BOOT 0x08
  387. #define DA9063_OTPREAD_EN 0x10
  388. #define DA9063_SLEW_RATE_MASK 0x60
  389. #define DA9063_SLEW_RATE_4US 0x00
  390. #define DA9063_SLEW_RATE_3US 0x20
  391. #define DA9063_SLEW_RATE_1US 0x40
  392. #define DA9063_SLEW_RATE_0US5 0x60
  393. #define DA9063_DEF_SUPPLY 0x80
  394. /* DA9063_REG_CONTROL_D (addr=0x11) */
  395. #define DA9063_TWDSCALE_MASK 0x07
  396. #define DA9063_BLINK_FRQ_MASK 0x38
  397. #define DA9063_BLINK_FRQ_OFF 0x00
  398. #define DA9063_BLINK_FRQ_1S0 0x08
  399. #define DA9063_BLINK_FRQ_2S0 0x10
  400. #define DA9063_BLINK_FRQ_4S0 0x18
  401. #define DA9063_BLINK_FRQ_0S18 0x20
  402. #define DA9063_BLINK_FRQ_2S0_VDD 0x28
  403. #define DA9063_BLINK_FRQ_4S0_VDD 0x30
  404. #define DA9063_BLINK_FRQ_0S18_VDD 0x38
  405. #define DA9063_BLINK_DUR_MASK 0xC0
  406. #define DA9063_BLINK_DUR_10MS 0x00
  407. #define DA9063_BLINK_DUR_20MS 0x40
  408. #define DA9063_BLINK_DUR_40MS 0x80
  409. #define DA9063_BLINK_DUR_20MSDBL 0xC0
  410. /* DA9063_REG_CONTROL_E (addr=0x12) */
  411. #define DA9063_RTC_MODE_PD 0x01
  412. #define DA9063_RTC_MODE_SD 0x02
  413. #define DA9063_RTC_EN 0x04
  414. #define DA9063_ECO_MODE 0x08
  415. #define DA9063_PM_FB1_PIN 0x10
  416. #define DA9063_PM_FB2_PIN 0x20
  417. #define DA9063_PM_FB3_PIN 0x40
  418. #define DA9063_V_LOCK 0x80
  419. /* DA9063_REG_CONTROL_F (addr=0x13) */
  420. #define DA9063_WATCHDOG 0x01
  421. #define DA9063_SHUTDOWN 0x02
  422. #define DA9063_WAKE_UP 0x04
  423. /* DA9063_REG_PD_DIS (addr=0x14) */
  424. #define DA9063_GPI_DIS 0x01
  425. #define DA9063_GPADC_PAUSE 0x02
  426. #define DA9063_PMIF_DIS 0x04
  427. #define DA9063_HS2WIRE_DIS 0x08
  428. #define DA9063_BBAT_DIS 0x20
  429. #define DA9063_OUT_32K_PAUSE 0x40
  430. #define DA9063_PMCONT_DIS 0x80
  431. /* DA9063_REG_GPIO_0_1 (addr=0x15) */
  432. #define DA9063_GPIO0_PIN_MASK 0x03
  433. #define DA9063_GPIO0_PIN_ADCIN1 0x00
  434. #define DA9063_GPIO0_PIN_GPI 0x01
  435. #define DA9063_GPIO0_PIN_GPO_OD 0x02
  436. #define DA9063_GPIO0_PIN_GPO 0x03
  437. #define DA9063_GPIO0_TYPE 0x04
  438. #define DA9063_GPIO0_TYPE_GPI_ACT_LOW 0x00
  439. #define DA9063_GPIO0_TYPE_GPO_VDD_IO1 0x00
  440. #define DA9063_GPIO0_TYPE_GPI_ACT_HIGH 0x04
  441. #define DA9063_GPIO0_TYPE_GPO_VDD_IO2 0x04
  442. #define DA9063_GPIO0_NO_WAKEUP 0x08
  443. #define DA9063_GPIO1_PIN_MASK 0x30
  444. #define DA9063_GPIO1_PIN_ADCIN2_COMP 0x00
  445. #define DA9063_GPIO1_PIN_GPI 0x10
  446. #define DA9063_GPIO1_PIN_GPO_OD 0x20
  447. #define DA9063_GPIO1_PIN_GPO 0x30
  448. #define DA9063_GPIO1_TYPE 0x40
  449. #define DA9063_GPIO1_TYPE_GPI_ACT_LOW 0x00
  450. #define DA9063_GPIO1_TYPE_GPO_VDD_IO1 0x00
  451. #define DA9063_GPIO1_TYPE_GPI_ACT_HIGH 0x04
  452. #define DA9063_GPIO1_TYPE_GPO_VDD_IO2 0x04
  453. #define DA9063_GPIO1_NO_WAKEUP 0x80
  454. /* DA9063_REG_GPIO_2_3 (addr=0x16) */
  455. #define DA9063_GPIO2_PIN_MASK 0x03
  456. #define DA9063_GPIO2_PIN_ADCIN3 0x00
  457. #define DA9063_GPIO2_PIN_GPI 0x01
  458. #define DA9063_GPIO2_PIN_GPO_PSS 0x02
  459. #define DA9063_GPIO2_PIN_GPO 0x03
  460. #define DA9063_GPIO2_TYPE 0x04
  461. #define DA9063_GPIO2_TYPE_GPI_ACT_LOW 0x00
  462. #define DA9063_GPIO2_TYPE_GPO_VDD_IO1 0x00
  463. #define DA9063_GPIO2_TYPE_GPI_ACT_HIGH 0x04
  464. #define DA9063_GPIO2_TYPE_GPO_VDD_IO2 0x04
  465. #define DA9063_GPIO2_NO_WAKEUP 0x08
  466. #define DA9063_GPIO3_PIN_MASK 0x30
  467. #define DA9063_GPIO3_PIN_CORE_SW_G 0x00
  468. #define DA9063_GPIO3_PIN_GPI 0x10
  469. #define DA9063_GPIO3_PIN_GPO_OD 0x20
  470. #define DA9063_GPIO3_PIN_GPO 0x30
  471. #define DA9063_GPIO3_TYPE 0x40
  472. #define DA9063_GPIO3_TYPE_GPI_ACT_LOW 0x00
  473. #define DA9063_GPIO3_TYPE_GPO_VDD_IO1 0x00
  474. #define DA9063_GPIO3_TYPE_GPI_ACT_HIGH 0x04
  475. #define DA9063_GPIO3_TYPE_GPO_VDD_IO2 0x04
  476. #define DA9063_GPIO3_NO_WAKEUP 0x80
  477. /* DA9063_REG_GPIO_4_5 (addr=0x17) */
  478. #define DA9063_GPIO4_PIN_MASK 0x03
  479. #define DA9063_GPIO4_PIN_CORE_SW_S 0x00
  480. #define DA9063_GPIO4_PIN_GPI 0x01
  481. #define DA9063_GPIO4_PIN_GPO_OD 0x02
  482. #define DA9063_GPIO4_PIN_GPO 0x03
  483. #define DA9063_GPIO4_TYPE 0x04
  484. #define DA9063_GPIO4_TYPE_GPI_ACT_LOW 0x00
  485. #define DA9063_GPIO4_TYPE_GPO_VDD_IO1 0x00
  486. #define DA9063_GPIO4_TYPE_GPI_ACT_HIGH 0x04
  487. #define DA9063_GPIO4_TYPE_GPO_VDD_IO2 0x04
  488. #define DA9063_GPIO4_NO_WAKEUP 0x08
  489. #define DA9063_GPIO5_PIN_MASK 0x30
  490. #define DA9063_GPIO5_PIN_PERI_SW_G 0x00
  491. #define DA9063_GPIO5_PIN_GPI 0x10
  492. #define DA9063_GPIO5_PIN_GPO_OD 0x20
  493. #define DA9063_GPIO5_PIN_GPO 0x30
  494. #define DA9063_GPIO5_TYPE 0x40
  495. #define DA9063_GPIO5_TYPE_GPI_ACT_LOW 0x00
  496. #define DA9063_GPIO5_TYPE_GPO_VDD_IO1 0x00
  497. #define DA9063_GPIO5_TYPE_GPI_ACT_HIGH 0x04
  498. #define DA9063_GPIO5_TYPE_GPO_VDD_IO2 0x04
  499. #define DA9063_GPIO5_NO_WAKEUP 0x80
  500. /* DA9063_REG_GPIO_6_7 (addr=0x18) */
  501. #define DA9063_GPIO6_PIN_MASK 0x03
  502. #define DA9063_GPIO6_PIN_PERI_SW_S 0x00
  503. #define DA9063_GPIO6_PIN_GPI 0x01
  504. #define DA9063_GPIO6_PIN_GPO_OD 0x02
  505. #define DA9063_GPIO6_PIN_GPO 0x03
  506. #define DA9063_GPIO6_TYPE 0x04
  507. #define DA9063_GPIO6_TYPE_GPI_ACT_LOW 0x00
  508. #define DA9063_GPIO6_TYPE_GPO_VDD_IO1 0x00
  509. #define DA9063_GPIO6_TYPE_GPI_ACT_HIGH 0x04
  510. #define DA9063_GPIO6_TYPE_GPO_VDD_IO2 0x04
  511. #define DA9063_GPIO6_NO_WAKEUP 0x08
  512. #define DA9063_GPIO7_PIN_MASK 0x30
  513. #define DA9063_GPIO7_PIN_GPI 0x10
  514. #define DA9063_GPIO7_PIN_GPO_PSS 0x20
  515. #define DA9063_GPIO7_PIN_GPO 0x30
  516. #define DA9063_GPIO7_TYPE 0x40
  517. #define DA9063_GPIO7_TYPE_GPI_ACT_LOW 0x00
  518. #define DA9063_GPIO7_TYPE_GPO_VDD_IO1 0x00
  519. #define DA9063_GPIO7_TYPE_GPI_ACT_HIGH 0x04
  520. #define DA9063_GPIO7_TYPE_GPO_VDD_IO2 0x04
  521. #define DA9063_GPIO7_NO_WAKEUP 0x80
  522. /* DA9063_REG_GPIO_8_9 (addr=0x19) */
  523. #define DA9063_GPIO8_PIN_MASK 0x03
  524. #define DA9063_GPIO8_PIN_GPI_SYS_EN 0x00
  525. #define DA9063_GPIO8_PIN_GPI 0x01
  526. #define DA9063_GPIO8_PIN_GPO_PSS 0x02
  527. #define DA9063_GPIO8_PIN_GPO 0x03
  528. #define DA9063_GPIO8_TYPE 0x04
  529. #define DA9063_GPIO8_TYPE_GPI_ACT_LOW 0x00
  530. #define DA9063_GPIO8_TYPE_GPO_VDD_IO1 0x00
  531. #define DA9063_GPIO8_TYPE_GPI_ACT_HIGH 0x04
  532. #define DA9063_GPIO8_TYPE_GPO_VDD_IO2 0x04
  533. #define DA9063_GPIO8_NO_WAKEUP 0x08
  534. #define DA9063_GPIO9_PIN_MASK 0x30
  535. #define DA9063_GPIO9_PIN_GPI_PWR_EN 0x00
  536. #define DA9063_GPIO9_PIN_GPI 0x10
  537. #define DA9063_GPIO9_PIN_GPO_PSS 0x20
  538. #define DA9063_GPIO9_PIN_GPO 0x30
  539. #define DA9063_GPIO9_TYPE 0x40
  540. #define DA9063_GPIO9_TYPE_GPI_ACT_LOW 0x00
  541. #define DA9063_GPIO9_TYPE_GPO_VDD_IO1 0x00
  542. #define DA9063_GPIO9_TYPE_GPI_ACT_HIGH 0x04
  543. #define DA9063_GPIO9_TYPE_GPO_VDD_IO2 0x04
  544. #define DA9063_GPIO9_NO_WAKEUP 0x80
  545. /* DA9063_REG_GPIO_10_11 (addr=0x1A) */
  546. #define DA9063_GPIO10_PIN_MASK 0x03
  547. #define DA9063_GPIO10_PIN_GPI_PWR1_EN 0x00
  548. #define DA9063_GPIO10_PIN_GPI 0x01
  549. #define DA9063_GPIO10_PIN_GPO_OD 0x02
  550. #define DA9063_GPIO10_PIN_GPO 0x03
  551. #define DA9063_GPIO10_TYPE 0x04
  552. #define DA9063_GPIO10_TYPE_GPI_ACT_LOW 0x00
  553. #define DA9063_GPIO10_TYPE_GPO_VDD_IO1 0x00
  554. #define DA9063_GPIO10_TYPE_GPI_ACT_HIGH 0x04
  555. #define DA9063_GPIO10_TYPE_GPO_VDD_IO2 0x04
  556. #define DA9063_GPIO10_NO_WAKEUP 0x08
  557. #define DA9063_GPIO11_PIN_MASK 0x30
  558. #define DA9063_GPIO11_PIN_GPO_OD 0x00
  559. #define DA9063_GPIO11_PIN_GPI 0x10
  560. #define DA9063_GPIO11_PIN_GPO_PSS 0x20
  561. #define DA9063_GPIO11_PIN_GPO 0x30
  562. #define DA9063_GPIO11_TYPE 0x40
  563. #define DA9063_GPIO11_TYPE_GPI_ACT_LOW 0x00
  564. #define DA9063_GPIO11_TYPE_GPO_VDD_IO1 0x00
  565. #define DA9063_GPIO11_TYPE_GPI_ACT_HIGH 0x04
  566. #define DA9063_GPIO11_TYPE_GPO_VDD_IO2 0x04
  567. #define DA9063_GPIO11_NO_WAKEUP 0x80
  568. /* DA9063_REG_GPIO_12_13 (addr=0x1B) */
  569. #define DA9063_GPIO12_PIN_MASK 0x03
  570. #define DA9063_GPIO12_PIN_NVDDFLT_OUT 0x00
  571. #define DA9063_GPIO12_PIN_GPI 0x01
  572. #define DA9063_GPIO12_PIN_VSYSMON_OUT 0x02
  573. #define DA9063_GPIO12_PIN_GPO 0x03
  574. #define DA9063_GPIO12_TYPE 0x04
  575. #define DA9063_GPIO12_TYPE_GPI_ACT_LOW 0x00
  576. #define DA9063_GPIO12_TYPE_GPO_VDD_IO1 0x00
  577. #define DA9063_GPIO12_TYPE_GPI_ACT_HIGH 0x04
  578. #define DA9063_GPIO12_TYPE_GPO_VDD_IO2 0x04
  579. #define DA9063_GPIO12_NO_WAKEUP 0x08
  580. #define DA9063_GPIO13_PIN_MASK 0x30
  581. #define DA9063_GPIO13_PIN_GPFB1_OUT 0x00
  582. #define DA9063_GPIO13_PIN_GPI 0x10
  583. #define DA9063_GPIO13_PIN_GPFB1_OUTOD 0x20
  584. #define DA9063_GPIO13_PIN_GPO 0x30
  585. #define DA9063_GPIO13_TYPE 0x40
  586. #define DA9063_GPIO13_TYPE_GPFB1_OUT 0x00
  587. #define DA9063_GPIO13_TYPE_GPI 0x00
  588. #define DA9063_GPIO13_TYPE_GPFB1_OUTOD 0x04
  589. #define DA9063_GPIO13_TYPE_GPO 0x04
  590. #define DA9063_GPIO13_NO_WAKEUP 0x80
  591. /* DA9063_REG_GPIO_14_15 (addr=0x1C) */
  592. #define DA9063_GPIO14_PIN_MASK 0x03
  593. #define DA9063_GPIO14_PIN_GPO_OD 0x00
  594. #define DA9063_GPIO14_PIN_GPI 0x01
  595. #define DA9063_GPIO14_PIN_HS2DATA 0x02
  596. #define DA9063_GPIO14_PIN_GPO 0x03
  597. #define DA9063_GPIO14_TYPE 0x04
  598. #define DA9063_GPIO14_TYPE_GPI_ACT_LOW 0x00
  599. #define DA9063_GPIO14_TYPE_GPO_VDD_IO1 0x00
  600. #define DA9063_GPIO14_TYPE_GPI_ACT_HIGH 0x04
  601. #define DA9063_GPIO14_TYPE_GPO_VDD_IO2 0x04
  602. #define DA9063_GPIO14_NO_WAKEUP 0x08
  603. #define DA9063_GPIO15_PIN_MASK 0x30
  604. #define DA9063_GPIO15_PIN_GPO_OD 0x00
  605. #define DA9063_GPIO15_PIN_GPI 0x10
  606. #define DA9063_GPIO15_PIN_GPO 0x30
  607. #define DA9063_GPIO15_TYPE 0x40
  608. #define DA9063_GPIO15_TYPE_GPFB1_OUT 0x00
  609. #define DA9063_GPIO15_TYPE_GPI 0x00
  610. #define DA9063_GPIO15_TYPE_GPFB1_OUTOD 0x04
  611. #define DA9063_GPIO15_TYPE_GPO 0x04
  612. #define DA9063_GPIO15_NO_WAKEUP 0x80
  613. /* DA9063_REG_GPIO_MODE_0_7 (addr=0x1D) */
  614. #define DA9063_GPIO0_MODE 0x01
  615. #define DA9063_GPIO1_MODE 0x02
  616. #define DA9063_GPIO2_MODE 0x04
  617. #define DA9063_GPIO3_MODE 0x08
  618. #define DA9063_GPIO4_MODE 0x10
  619. #define DA9063_GPIO5_MODE 0x20
  620. #define DA9063_GPIO6_MODE 0x40
  621. #define DA9063_GPIO7_MODE 0x80
  622. /* DA9063_REG_GPIO_MODE_8_15 (addr=0x1E) */
  623. #define DA9063_GPIO8_MODE 0x01
  624. #define DA9063_GPIO9_MODE 0x02
  625. #define DA9063_GPIO10_MODE 0x04
  626. #define DA9063_GPIO11_MODE 0x08
  627. #define DA9063_GPIO11_MODE_LED_ACT_HIGH 0x00
  628. #define DA9063_GPIO11_MODE_LED_ACT_LOW 0x08
  629. #define DA9063_GPIO12_MODE 0x10
  630. #define DA9063_GPIO13_MODE 0x20
  631. #define DA9063_GPIO14_MODE 0x40
  632. #define DA9063_GPIO14_MODE_LED_ACT_HIGH 0x00
  633. #define DA9063_GPIO14_MODE_LED_ACT_LOW 0x40
  634. #define DA9063_GPIO15_MODE 0x80
  635. #define DA9063_GPIO15_MODE_LED_ACT_HIGH 0x00
  636. #define DA9063_GPIO15_MODE_LED_ACT_LOW 0x80
  637. /* DA9063_REG_SWITCH_CONT (addr=0x1F) */
  638. #define DA9063_CORE_SW_GPI_MASK 0x03
  639. #define DA9063_CORE_SW_GPI_OFF 0x00
  640. #define DA9063_CORE_SW_GPI_GPIO1 0x01
  641. #define DA9063_CORE_SW_GPI_GPIO2 0x02
  642. #define DA9063_CORE_SW_GPI_GPIO13 0x03
  643. #define DA9063_PERI_SW_GPI_MASK 0x0C
  644. #define DA9063_PERI_SW_GPI_OFF 0x00
  645. #define DA9063_PERI_SW_GPI_GPIO1 0x04
  646. #define DA9063_PERI_SW_GPI_GPIO2 0x08
  647. #define DA9063_PERI_SW_GPI_GPIO13 0x0C
  648. #define DA9063_SWITCH_SR_MASK 0x30
  649. #define DA9063_SWITCH_SR_1MV 0x00
  650. #define DA9063_SWITCH_SR_5MV 0x10
  651. #define DA9063_SWITCH_SR_10MV 0x20
  652. #define DA9063_SWITCH_SR_50MV 0x30
  653. #define DA9063_SWITCH_SR_DIS 0x40
  654. #define DA9063_CP_EN_MODE 0x80
  655. /* DA9063_REGL_Bxxxx_CONT common bits (addr=0x20-0x25) */
  656. #define DA9063_BUCK_EN 0x01
  657. #define DA9063_BUCK_GPI_MASK 0x06
  658. #define DA9063_BUCK_GPI_OFF 0x00
  659. #define DA9063_BUCK_GPI_GPIO1 0x02
  660. #define DA9063_BUCK_GPI_GPIO2 0x04
  661. #define DA9063_BUCK_GPI_GPIO13 0x06
  662. #define DA9063_BUCK_CONF 0x08
  663. #define DA9063_VBUCK_GPI_MASK 0x60
  664. #define DA9063_VBUCK_GPI_OFF 0x00
  665. #define DA9063_VBUCK_GPI_GPIO1 0x20
  666. #define DA9063_VBUCK_GPI_GPIO2 0x40
  667. #define DA9063_VBUCK_GPI_GPIO13 0x60
  668. /* DA9063_REG_BCORE1_CONT specific bits (addr=0x21) */
  669. #define DA9063_CORE_SW_EN 0x10
  670. #define DA9063_CORE_SW_CONF 0x80
  671. /* DA9063_REG_BPERI_CONT specific bits (addr=0x25) */
  672. #define DA9063_PERI_SW_EN 0x10
  673. #define DA9063_PERI_SW_CONF 0x80
  674. /* DA9063_REG_LDOx_CONT common bits (addr=0x26-0x30) */
  675. #define DA9063_LDO_EN 0x01
  676. #define DA9063_LDO_GPI_MASK 0x06
  677. #define DA9063_LDO_GPI_OFF 0x00
  678. #define DA9063_LDO_GPI_GPIO1 0x02
  679. #define DA9063_LDO_GPI_GPIO2 0x04
  680. #define DA9063_LDO_GPI_GPIO13 0x06
  681. #define DA9063_LDO_PD_DIS 0x08
  682. #define DA9063_VLDO_GPI_MASK 0x60
  683. #define DA9063_VLDO_GPI_OFF 0x00
  684. #define DA9063_VLDO_GPI_GPIO1 0x20
  685. #define DA9063_VLDO_GPI_GPIO2 0x40
  686. #define DA9063_VLDO_GPI_GPIO13 0x60
  687. #define DA9063_LDO_CONF 0x80
  688. /* DA9063_REG_LDO5_CONT specific bits (addr=0x2A) */
  689. #define DA9063_VLDO5_SEL 0x10
  690. /* DA9063_REG_LDO6_CONT specific bits (addr=0x2B) */
  691. #define DA9063_VLDO6_SEL 0x10
  692. /* DA9063_REG_LDO7_CONT specific bits (addr=0x2C) */
  693. #define DA9063_VLDO7_SEL 0x10
  694. /* DA9063_REG_LDO8_CONT specific bits (addr=0x2D) */
  695. #define DA9063_VLDO8_SEL 0x10
  696. /* DA9063_REG_LDO9_CONT specific bits (addr=0x2E) */
  697. #define DA9063_VLDO9_SEL 0x10
  698. /* DA9063_REG_LDO10_CONT specific bits (addr=0x2F) */
  699. #define DA9063_VLDO10_SEL 0x10
  700. /* DA9063_REG_LDO11_CONT specific bits (addr=0x30) */
  701. #define DA9063_VLDO11_SEL 0x10
  702. /* DA9063_REG_VIB (addr=0x31) */
  703. #define DA9063_VIB_SET_MASK 0x3F
  704. #define DA9063_VIB_SET_OFF 0
  705. #define DA9063_VIB_SET_MAX 0x3F
  706. /* DA9063_REG_DVC_1 (addr=0x32) */
  707. #define DA9063_VBCORE1_SEL 0x01
  708. #define DA9063_VBCORE2_SEL 0x02
  709. #define DA9063_VBPRO_SEL 0x04
  710. #define DA9063_VBMEM_SEL 0x08
  711. #define DA9063_VBPERI_SEL 0x10
  712. #define DA9063_VLDO1_SEL 0x20
  713. #define DA9063_VLDO2_SEL 0x40
  714. #define DA9063_VLDO3_SEL 0x80
  715. /* DA9063_REG_DVC_2 (addr=0x33) */
  716. #define DA9063_VBIO_SEL 0x01
  717. #define DA9063_VLDO4_SEL 0x80
  718. /* DA9063_REG_ADC_MAN (addr=0x34) */
  719. #define DA9063_ADC_MUX_MASK 0x0F
  720. #define DA9063_ADC_MUX_VSYS 0x00
  721. #define DA9063_ADC_MUX_ADCIN1 0x01
  722. #define DA9063_ADC_MUX_ADCIN2 0x02
  723. #define DA9063_ADC_MUX_ADCIN3 0x03
  724. #define DA9063_ADC_MUX_T_SENSE 0x04
  725. #define DA9063_ADC_MUX_VBBAT 0x05
  726. #define DA9063_ADC_MUX_LDO_G1 0x08
  727. #define DA9063_ADC_MUX_LDO_G2 0x09
  728. #define DA9063_ADC_MUX_LDO_G3 0x0A
  729. #define DA9063_ADC_MAN 0x10
  730. #define DA9063_ADC_MODE 0x20
  731. /* DA9063_REG_ADC_CONT (addr=0x35) */
  732. #define DA9063_ADC_AUTO_VSYS_EN 0x01
  733. #define DA9063_ADC_AUTO_AD1_EN 0x02
  734. #define DA9063_ADC_AUTO_AD2_EN 0x04
  735. #define DA9063_ADC_AUTO_AD3_EN 0x08
  736. #define DA9063_ADC_AD1_ISRC_EN 0x10
  737. #define DA9063_ADC_AD2_ISRC_EN 0x20
  738. #define DA9063_ADC_AD3_ISRC_EN 0x40
  739. #define DA9063_COMP1V2_EN 0x80
  740. /* DA9063_REG_VSYS_MON (addr=0x36) */
  741. #define DA9063_VSYS_VAL_MASK 0xFF
  742. #define DA9063_VSYS_VAL_BASE 0x00
  743. /* DA9063_REG_ADC_RES_L (addr=0x37) */
  744. #define DA9063_ADC_RES_L_BITS 2
  745. #define DA9063_ADC_RES_L_MASK 0xC0
  746. /* DA9063_REG_ADC_RES_H (addr=0x38) */
  747. #define DA9063_ADC_RES_M_BITS 8
  748. #define DA9063_ADC_RES_M_MASK 0xFF
  749. /* DA9063_REG_(xxx_RES/ADC_RES_H) (addr=0x39-0x3F) */
  750. #define DA9063_ADC_VAL_MASK 0xFF
  751. /* DA9063_REG_COUNT_S (addr=0x40) */
  752. #define DA9063_RTC_READ 0x80
  753. #define DA9063_COUNT_SEC_MASK 0x3F
  754. /* DA9063_REG_COUNT_MI (addr=0x41) */
  755. #define DA9063_COUNT_MIN_MASK 0x3F
  756. /* DA9063_REG_COUNT_H (addr=0x42) */
  757. #define DA9063_COUNT_HOUR_MASK 0x1F
  758. /* DA9063_REG_COUNT_D (addr=0x43) */
  759. #define DA9063_COUNT_DAY_MASK 0x1F
  760. /* DA9063_REG_COUNT_MO (addr=0x44) */
  761. #define DA9063_COUNT_MONTH_MASK 0x0F
  762. /* DA9063_REG_COUNT_Y (addr=0x45) */
  763. #define DA9063_COUNT_YEAR_MASK 0x3F
  764. #define DA9063_MONITOR 0x40
  765. /* DA9063_REG_ALARM_MI (addr=0x46) */
  766. #define DA9063_ALARM_STATUS_ALARM 0x80
  767. #define DA9063_ALARM_STATUS_TICK 0x40
  768. #define DA9063_ALARM_MIN_MASK 0x3F
  769. /* DA9063_REG_ALARM_H (addr=0x47) */
  770. #define DA9063_ALARM_HOUR_MASK 0x1F
  771. /* DA9063_REG_ALARM_D (addr=0x48) */
  772. #define DA9063_ALARM_DAY_MASK 0x1F
  773. /* DA9063_REG_ALARM_MO (addr=0x49) */
  774. #define DA9063_TICK_WAKE 0x20
  775. #define DA9063_TICK_TYPE 0x10
  776. #define DA9063_TICK_TYPE_SEC 0x00
  777. #define DA9063_TICK_TYPE_MIN 0x10
  778. #define DA9063_ALARM_MONTH_MASK 0x0F
  779. /* DA9063_REG_ALARM_Y (addr=0x4A) */
  780. #define DA9063_TICK_ON 0x80
  781. #define DA9063_ALARM_ON 0x40
  782. #define DA9063_ALARM_YEAR_MASK 0x3F
  783. /* DA9063_REG_WAIT (addr=0x97)*/
  784. #define DA9063_REG_WAIT_TIME_MASK 0xF
  785. #define DA9063_WAIT_TIME_0_US 0x0
  786. #define DA9063_WAIT_TIME_512_US 0x1
  787. #define DA9063_WAIT_TIME_1_MS 0x2
  788. #define DA9063_WAIT_TIME_2_MS 0x3
  789. #define DA9063_WAIT_TIME_4_1_MS 0x4
  790. #define DA9063_WAIT_TIME_8_2_MS 0x5
  791. #define DA9063_WAIT_TIME_16_4_MS 0x6
  792. #define DA9063_WAIT_TIME_32_8_MS 0x7
  793. #define DA9063_WAIT_TIME_65_5_MS 0x8
  794. #define DA9063_WAIT_TIME_128_MS 0x9
  795. #define DA9063_WAIT_TIME_256_MS 0xA
  796. #define DA9063_WAIT_TIME_512_MS 0xB
  797. #define DA9063_WAIT_TIME_1_S 0xC
  798. #define DA9063_WAIT_TIME_2_1_S 0xD
  799. /* DA9063_REG_EN_32K (addr=0x98)*/
  800. #define DA9063_STABILIZ_TIME_MASK 0x7
  801. #define DA9063_CRYSTAL 0x08
  802. #define DA9063_DELAY_MODE 0x10
  803. #define DA9063_OUT_CLOCK 0x20
  804. #define DA9063_RTC_CLOCK 0x40
  805. #define DA9063_OUT_32K_EN 0x80
  806. /* DA9063_REG_CHIP_VARIANT */
  807. #define DA9063_CHIP_VARIANT_SHIFT 4
  808. /* DA9063_REG_BUCK_ILIM_A (addr=0x9A) */
  809. #define DA9063_BIO_ILIM_MASK 0x0F
  810. #define DA9063_BMEM_ILIM_MASK 0xF0
  811. /* DA9063_REG_BUCK_ILIM_B (addr=0x9B) */
  812. #define DA9063_BPRO_ILIM_MASK 0x0F
  813. #define DA9063_BPERI_ILIM_MASK 0xF0
  814. /* DA9063_REG_BUCK_ILIM_C (addr=0x9C) */
  815. #define DA9063_BCORE1_ILIM_MASK 0x0F
  816. #define DA9063_BCORE2_ILIM_MASK 0xF0
  817. /* DA9063_REG_Bxxxx_CFG common bits (addr=0x9D-0xA2) */
  818. #define DA9063_BUCK_FB_MASK 0x07
  819. #define DA9063_BUCK_PD_DIS_SHIFT 5
  820. #define DA9063_BUCK_MODE_MASK 0xC0
  821. #define DA9063_BUCK_MODE_MANUAL 0x00
  822. #define DA9063_BUCK_MODE_SLEEP 0x40
  823. #define DA9063_BUCK_MODE_SYNC 0x80
  824. #define DA9063_BUCK_MODE_AUTO 0xC0
  825. /* DA9063_REG_BPRO_CFG (addr=0x9F) */
  826. #define DA9063_BPRO_VTTR_EN 0x08
  827. #define DA9063_BPRO_VTT_EN 0x10
  828. /* DA9063_REG_VBxxxx_A/B (addr=0xA3-0xA8, 0xB4-0xB9) */
  829. #define DA9063_VBUCK_MASK 0x7F
  830. #define DA9063_VBUCK_BIAS 0
  831. #define DA9063_BUCK_SL 0x80
  832. /* DA9063_REG_VLDOx_A/B (addr=0xA9-0x3, 0xBA-0xC4) */
  833. #define DA9063_LDO_SL 0x80
  834. /* DA9063_REG_VLDO1_A/B (addr=0xA9, 0xBA) */
  835. #define DA9063_VLDO1_MASK 0x3F
  836. #define DA9063_VLDO1_BIAS 0
  837. /* DA9063_REG_VLDO2_A/B (addr=0xAA, 0xBB) */
  838. #define DA9063_VLDO2_MASK 0x3F
  839. #define DA9063_VLDO2_BIAS 0
  840. /* DA9063_REG_VLDO3_A/B (addr=0xAB, 0xBC) */
  841. #define DA9063_VLDO3_MASK 0x7F
  842. #define DA9063_VLDO3_BIAS 0
  843. /* DA9063_REG_VLDO4_A/B (addr=0xAC, 0xBD) */
  844. #define DA9063_VLDO4_MASK 0x7F
  845. #define DA9063_VLDO4_BIAS 0
  846. /* DA9063_REG_VLDO5_A/B (addr=0xAD, 0xBE) */
  847. #define DA9063_VLDO5_MASK 0x3F
  848. #define DA9063_VLDO5_BIAS 2
  849. /* DA9063_REG_VLDO6_A/B (addr=0xAE, 0xBF) */
  850. #define DA9063_VLDO6_MASK 0x3F
  851. #define DA9063_VLDO6_BIAS 2
  852. /* DA9063_REG_VLDO7_A/B (addr=0xAF, 0xC0) */
  853. #define DA9063_VLDO7_MASK 0x3F
  854. #define DA9063_VLDO7_BIAS 2
  855. /* DA9063_REG_VLDO8_A/B (addr=0xB0, 0xC1) */
  856. #define DA9063_VLDO8_MASK 0x3F
  857. #define DA9063_VLDO8_BIAS 2
  858. /* DA9063_REG_VLDO9_A/B (addr=0xB1, 0xC2) */
  859. #define DA9063_VLDO9_MASK 0x3F
  860. #define DA9063_VLDO9_BIAS 3
  861. /* DA9063_REG_VLDO10_A/B (addr=0xB2, 0xC3) */
  862. #define DA9063_VLDO10_MASK 0x3F
  863. #define DA9063_VLDO10_BIAS 2
  864. /* DA9063_REG_VLDO11_A/B (addr=0xB3, 0xC4) */
  865. #define DA9063_VLDO11_MASK 0x3F
  866. #define DA9063_VLDO11_BIAS 2
  867. /* DA9063_REG_GPO11_LED (addr=0xC6) */
  868. /* DA9063_REG_GPO14_LED (addr=0xC7) */
  869. /* DA9063_REG_GPO15_LED (addr=0xC8) */
  870. #define DA9063_GPIO_DIM 0x80
  871. #define DA9063_GPIO_PWM_MASK 0x7F
  872. /* DA9063_REG_CONFIG_H (addr=0x10D) */
  873. #define DA9063_PWM_CLK_MASK 0x01
  874. #define DA9063_PWM_CLK_PWM2MHZ 0x00
  875. #define DA9063_PWM_CLK_PWM1MHZ 0x01
  876. #define DA9063_LDO8_MODE_MASK 0x02
  877. #define DA9063_LDO8_MODE_LDO 0
  878. #define DA9063_LDO8_MODE_VIBR 0x02
  879. #define DA9063_MERGE_SENSE_MASK 0x04
  880. #define DA9063_MERGE_SENSE_GP_FB2 0x00
  881. #define DA9063_MERGE_SENSE_GPIO4 0x04
  882. #define DA9063_BCORE_MERGE 0x08
  883. #define DA9063_BPRO_OD 0x10
  884. #define DA9063_BCORE2_OD 0x20
  885. #define DA9063_BCORE1_OD 0x40
  886. #define DA9063_BUCK_MERGE 0x80
  887. /* DA9063_REG_CONFIG_I (addr=0x10E) */
  888. #define DA9063_NONKEY_PIN_MASK 0x03
  889. #define DA9063_NONKEY_PIN_PORT 0x00
  890. #define DA9063_NONKEY_PIN_SWDOWN 0x01
  891. #define DA9063_NONKEY_PIN_AUTODOWN 0x02
  892. #define DA9063_NONKEY_PIN_AUTOFLPRT 0x03
  893. /* DA9063_REG_MON_REG_5 (addr=0x116) */
  894. #define DA9063_MON_A8_IDX_MASK 0x07
  895. #define DA9063_MON_A8_IDX_NONE 0x00
  896. #define DA9063_MON_A8_IDX_BCORE1 0x01
  897. #define DA9063_MON_A8_IDX_BCORE2 0x02
  898. #define DA9063_MON_A8_IDX_BPRO 0x03
  899. #define DA9063_MON_A8_IDX_LDO3 0x04
  900. #define DA9063_MON_A8_IDX_LDO4 0x05
  901. #define DA9063_MON_A8_IDX_LDO11 0x06
  902. #define DA9063_MON_A9_IDX_MASK 0x70
  903. #define DA9063_MON_A9_IDX_NONE 0x00
  904. #define DA9063_MON_A9_IDX_BIO 0x01
  905. #define DA9063_MON_A9_IDX_BMEM 0x02
  906. #define DA9063_MON_A9_IDX_BPERI 0x03
  907. #define DA9063_MON_A9_IDX_LDO1 0x04
  908. #define DA9063_MON_A9_IDX_LDO2 0x05
  909. #define DA9063_MON_A9_IDX_LDO5 0x06
  910. /* DA9063_REG_MON_REG_6 (addr=0x117) */
  911. #define DA9063_MON_A10_IDX_MASK 0x07
  912. #define DA9063_MON_A10_IDX_NONE 0x00
  913. #define DA9063_MON_A10_IDX_LDO6 0x01
  914. #define DA9063_MON_A10_IDX_LDO7 0x02
  915. #define DA9063_MON_A10_IDX_LDO8 0x03
  916. #define DA9063_MON_A10_IDX_LDO9 0x04
  917. #define DA9063_MON_A10_IDX_LDO10 0x05
  918. #endif /* _DA9063_REG_H */