pasemi_mac.c 35 KB

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  1. /*
  2. * Copyright (C) 2006-2007 PA Semi, Inc
  3. *
  4. * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/init.h>
  20. #include <linux/module.h>
  21. #include <linux/pci.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/dmaengine.h>
  24. #include <linux/delay.h>
  25. #include <linux/netdevice.h>
  26. #include <linux/etherdevice.h>
  27. #include <asm/dma-mapping.h>
  28. #include <linux/in.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/ip.h>
  31. #include <linux/tcp.h>
  32. #include <net/checksum.h>
  33. #include <asm/irq.h>
  34. #include "pasemi_mac.h"
  35. /* We have our own align, since ppc64 in general has it at 0 because
  36. * of design flaws in some of the server bridge chips. However, for
  37. * PWRficient doing the unaligned copies is more expensive than doing
  38. * unaligned DMA, so make sure the data is aligned instead.
  39. */
  40. #define LOCAL_SKB_ALIGN 2
  41. /* TODO list
  42. *
  43. * - Get rid of pci_{read,write}_config(), map registers with ioremap
  44. * for performance
  45. * - PHY support
  46. * - Multicast support
  47. * - Large MTU support
  48. * - Other performance improvements
  49. */
  50. /* Must be a power of two */
  51. #define RX_RING_SIZE 512
  52. #define TX_RING_SIZE 512
  53. #define DEFAULT_MSG_ENABLE \
  54. (NETIF_MSG_DRV | \
  55. NETIF_MSG_PROBE | \
  56. NETIF_MSG_LINK | \
  57. NETIF_MSG_TIMER | \
  58. NETIF_MSG_IFDOWN | \
  59. NETIF_MSG_IFUP | \
  60. NETIF_MSG_RX_ERR | \
  61. NETIF_MSG_TX_ERR)
  62. #define TX_RING(mac, num) ((mac)->tx->ring[(num) & (TX_RING_SIZE-1)])
  63. #define TX_RING_INFO(mac, num) ((mac)->tx->ring_info[(num) & (TX_RING_SIZE-1)])
  64. #define RX_RING(mac, num) ((mac)->rx->ring[(num) & (RX_RING_SIZE-1)])
  65. #define RX_RING_INFO(mac, num) ((mac)->rx->ring_info[(num) & (RX_RING_SIZE-1)])
  66. #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
  67. #define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \
  68. & ((ring)->size - 1))
  69. #define RING_AVAIL(ring) ((ring->size) - RING_USED(ring))
  70. #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
  71. MODULE_LICENSE("GPL");
  72. MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
  73. MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
  74. static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
  75. module_param(debug, int, 0);
  76. MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
  77. static struct pasdma_status *dma_status;
  78. static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
  79. unsigned int val)
  80. {
  81. out_le32(mac->iob_regs+reg, val);
  82. }
  83. static unsigned int read_mac_reg(struct pasemi_mac *mac, unsigned int reg)
  84. {
  85. return in_le32(mac->regs+reg);
  86. }
  87. static void write_mac_reg(struct pasemi_mac *mac, unsigned int reg,
  88. unsigned int val)
  89. {
  90. out_le32(mac->regs+reg, val);
  91. }
  92. static unsigned int read_dma_reg(struct pasemi_mac *mac, unsigned int reg)
  93. {
  94. return in_le32(mac->dma_regs+reg);
  95. }
  96. static void write_dma_reg(struct pasemi_mac *mac, unsigned int reg,
  97. unsigned int val)
  98. {
  99. out_le32(mac->dma_regs+reg, val);
  100. }
  101. static int pasemi_get_mac_addr(struct pasemi_mac *mac)
  102. {
  103. struct pci_dev *pdev = mac->pdev;
  104. struct device_node *dn = pci_device_to_OF_node(pdev);
  105. int len;
  106. const u8 *maddr;
  107. u8 addr[6];
  108. if (!dn) {
  109. dev_dbg(&pdev->dev,
  110. "No device node for mac, not configuring\n");
  111. return -ENOENT;
  112. }
  113. maddr = of_get_property(dn, "local-mac-address", &len);
  114. if (maddr && len == 6) {
  115. memcpy(mac->mac_addr, maddr, 6);
  116. return 0;
  117. }
  118. /* Some old versions of firmware mistakenly uses mac-address
  119. * (and as a string) instead of a byte array in local-mac-address.
  120. */
  121. if (maddr == NULL)
  122. maddr = of_get_property(dn, "mac-address", NULL);
  123. if (maddr == NULL) {
  124. dev_warn(&pdev->dev,
  125. "no mac address in device tree, not configuring\n");
  126. return -ENOENT;
  127. }
  128. if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
  129. &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
  130. dev_warn(&pdev->dev,
  131. "can't parse mac address, not configuring\n");
  132. return -EINVAL;
  133. }
  134. memcpy(mac->mac_addr, addr, 6);
  135. return 0;
  136. }
  137. static int pasemi_mac_unmap_tx_skb(struct pasemi_mac *mac,
  138. struct sk_buff *skb,
  139. dma_addr_t *dmas)
  140. {
  141. int f;
  142. int nfrags = skb_shinfo(skb)->nr_frags;
  143. pci_unmap_single(mac->dma_pdev, dmas[0], skb_headlen(skb),
  144. PCI_DMA_TODEVICE);
  145. for (f = 0; f < nfrags; f++) {
  146. skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
  147. pci_unmap_page(mac->dma_pdev, dmas[f+1], frag->size,
  148. PCI_DMA_TODEVICE);
  149. }
  150. dev_kfree_skb_irq(skb);
  151. /* Freed descriptor slot + main SKB ptr + nfrags additional ptrs,
  152. * aligned up to a power of 2
  153. */
  154. return (nfrags + 3) & ~1;
  155. }
  156. static int pasemi_mac_setup_rx_resources(struct net_device *dev)
  157. {
  158. struct pasemi_mac_rxring *ring;
  159. struct pasemi_mac *mac = netdev_priv(dev);
  160. int chan_id = mac->dma_rxch;
  161. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  162. if (!ring)
  163. goto out_ring;
  164. spin_lock_init(&ring->lock);
  165. ring->size = RX_RING_SIZE;
  166. ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
  167. RX_RING_SIZE, GFP_KERNEL);
  168. if (!ring->ring_info)
  169. goto out_ring_info;
  170. /* Allocate descriptors */
  171. ring->ring = dma_alloc_coherent(&mac->dma_pdev->dev,
  172. RX_RING_SIZE * sizeof(u64),
  173. &ring->dma, GFP_KERNEL);
  174. if (!ring->ring)
  175. goto out_ring_desc;
  176. memset(ring->ring, 0, RX_RING_SIZE * sizeof(u64));
  177. ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
  178. RX_RING_SIZE * sizeof(u64),
  179. &ring->buf_dma, GFP_KERNEL);
  180. if (!ring->buffers)
  181. goto out_buffers;
  182. memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
  183. write_dma_reg(mac, PAS_DMA_RXCHAN_BASEL(chan_id), PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
  184. write_dma_reg(mac, PAS_DMA_RXCHAN_BASEU(chan_id),
  185. PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
  186. PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 3));
  187. write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id),
  188. PAS_DMA_RXCHAN_CFG_HBU(2));
  189. write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
  190. PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
  191. write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
  192. PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
  193. PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
  194. write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if),
  195. PAS_DMA_RXINT_CFG_DHL(3) |
  196. PAS_DMA_RXINT_CFG_L2 |
  197. PAS_DMA_RXINT_CFG_LW);
  198. ring->next_to_fill = 0;
  199. ring->next_to_clean = 0;
  200. snprintf(ring->irq_name, sizeof(ring->irq_name),
  201. "%s rx", dev->name);
  202. mac->rx = ring;
  203. return 0;
  204. out_buffers:
  205. dma_free_coherent(&mac->dma_pdev->dev,
  206. RX_RING_SIZE * sizeof(u64),
  207. mac->rx->ring, mac->rx->dma);
  208. out_ring_desc:
  209. kfree(ring->ring_info);
  210. out_ring_info:
  211. kfree(ring);
  212. out_ring:
  213. return -ENOMEM;
  214. }
  215. static int pasemi_mac_setup_tx_resources(struct net_device *dev)
  216. {
  217. struct pasemi_mac *mac = netdev_priv(dev);
  218. u32 val;
  219. int chan_id = mac->dma_txch;
  220. struct pasemi_mac_txring *ring;
  221. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  222. if (!ring)
  223. goto out_ring;
  224. spin_lock_init(&ring->lock);
  225. ring->size = TX_RING_SIZE;
  226. ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
  227. TX_RING_SIZE, GFP_KERNEL);
  228. if (!ring->ring_info)
  229. goto out_ring_info;
  230. /* Allocate descriptors */
  231. ring->ring = dma_alloc_coherent(&mac->dma_pdev->dev,
  232. TX_RING_SIZE * sizeof(u64),
  233. &ring->dma, GFP_KERNEL);
  234. if (!ring->ring)
  235. goto out_ring_desc;
  236. memset(ring->ring, 0, TX_RING_SIZE * sizeof(u64));
  237. write_dma_reg(mac, PAS_DMA_TXCHAN_BASEL(chan_id),
  238. PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
  239. val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
  240. val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 3);
  241. write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
  242. write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id),
  243. PAS_DMA_TXCHAN_CFG_TY_IFACE |
  244. PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
  245. PAS_DMA_TXCHAN_CFG_UP |
  246. PAS_DMA_TXCHAN_CFG_WT(2));
  247. ring->next_to_fill = 0;
  248. ring->next_to_clean = 0;
  249. snprintf(ring->irq_name, sizeof(ring->irq_name),
  250. "%s tx", dev->name);
  251. mac->tx = ring;
  252. return 0;
  253. out_ring_desc:
  254. kfree(ring->ring_info);
  255. out_ring_info:
  256. kfree(ring);
  257. out_ring:
  258. return -ENOMEM;
  259. }
  260. static void pasemi_mac_free_tx_resources(struct net_device *dev)
  261. {
  262. struct pasemi_mac *mac = netdev_priv(dev);
  263. unsigned int i, j;
  264. struct pasemi_mac_buffer *info;
  265. dma_addr_t dmas[MAX_SKB_FRAGS+1];
  266. int freed;
  267. for (i = 0; i < TX_RING_SIZE; i += freed) {
  268. info = &TX_RING_INFO(mac, i+1);
  269. if (info->dma && info->skb) {
  270. for (j = 0; j <= skb_shinfo(info->skb)->nr_frags; j++)
  271. dmas[j] = TX_RING_INFO(mac, i+1+j).dma;
  272. freed = pasemi_mac_unmap_tx_skb(mac, info->skb, dmas);
  273. } else
  274. freed = 2;
  275. }
  276. for (i = 0; i < TX_RING_SIZE; i++)
  277. TX_RING(mac, i) = 0;
  278. dma_free_coherent(&mac->dma_pdev->dev,
  279. TX_RING_SIZE * sizeof(u64),
  280. mac->tx->ring, mac->tx->dma);
  281. kfree(mac->tx->ring_info);
  282. kfree(mac->tx);
  283. mac->tx = NULL;
  284. }
  285. static void pasemi_mac_free_rx_resources(struct net_device *dev)
  286. {
  287. struct pasemi_mac *mac = netdev_priv(dev);
  288. unsigned int i;
  289. struct pasemi_mac_buffer *info;
  290. for (i = 0; i < RX_RING_SIZE; i++) {
  291. info = &RX_RING_INFO(mac, i);
  292. if (info->skb && info->dma) {
  293. pci_unmap_single(mac->dma_pdev,
  294. info->dma,
  295. info->skb->len,
  296. PCI_DMA_FROMDEVICE);
  297. dev_kfree_skb_any(info->skb);
  298. }
  299. info->dma = 0;
  300. info->skb = NULL;
  301. }
  302. for (i = 0; i < RX_RING_SIZE; i++)
  303. RX_RING(mac, i) = 0;
  304. dma_free_coherent(&mac->dma_pdev->dev,
  305. RX_RING_SIZE * sizeof(u64),
  306. mac->rx->ring, mac->rx->dma);
  307. dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
  308. mac->rx->buffers, mac->rx->buf_dma);
  309. kfree(mac->rx->ring_info);
  310. kfree(mac->rx);
  311. mac->rx = NULL;
  312. }
  313. static void pasemi_mac_replenish_rx_ring(struct net_device *dev, int limit)
  314. {
  315. struct pasemi_mac *mac = netdev_priv(dev);
  316. int start = mac->rx->next_to_fill;
  317. unsigned int fill, count;
  318. if (limit <= 0)
  319. return;
  320. fill = start;
  321. for (count = 0; count < limit; count++) {
  322. struct pasemi_mac_buffer *info = &RX_RING_INFO(mac, fill);
  323. u64 *buff = &RX_BUFF(mac, fill);
  324. struct sk_buff *skb;
  325. dma_addr_t dma;
  326. /* Entry in use? */
  327. WARN_ON(*buff);
  328. /* skb might still be in there for recycle on short receives */
  329. if (info->skb)
  330. skb = info->skb;
  331. else {
  332. skb = dev_alloc_skb(BUF_SIZE);
  333. skb_reserve(skb, LOCAL_SKB_ALIGN);
  334. }
  335. if (unlikely(!skb))
  336. break;
  337. dma = pci_map_single(mac->dma_pdev, skb->data,
  338. BUF_SIZE - LOCAL_SKB_ALIGN,
  339. PCI_DMA_FROMDEVICE);
  340. if (unlikely(dma_mapping_error(dma))) {
  341. dev_kfree_skb_irq(info->skb);
  342. break;
  343. }
  344. info->skb = skb;
  345. info->dma = dma;
  346. *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
  347. fill++;
  348. }
  349. wmb();
  350. write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), count);
  351. write_dma_reg(mac, PAS_DMA_RXINT_INCR(mac->dma_if), count);
  352. mac->rx->next_to_fill += count;
  353. }
  354. static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
  355. {
  356. unsigned int reg, pcnt;
  357. /* Re-enable packet count interrupts: finally
  358. * ack the packet count interrupt we got in rx_intr.
  359. */
  360. pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
  361. reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
  362. write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
  363. }
  364. static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
  365. {
  366. unsigned int reg, pcnt;
  367. /* Re-enable packet count interrupts */
  368. pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
  369. reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
  370. write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
  371. }
  372. static inline void pasemi_mac_rx_error(struct pasemi_mac *mac, u64 macrx)
  373. {
  374. unsigned int rcmdsta, ccmdsta;
  375. if (!netif_msg_rx_err(mac))
  376. return;
  377. rcmdsta = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
  378. ccmdsta = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
  379. printk(KERN_ERR "pasemi_mac: rx error. macrx %016lx, rx status %lx\n",
  380. macrx, *mac->rx_status);
  381. printk(KERN_ERR "pasemi_mac: rcmdsta %08x ccmdsta %08x\n",
  382. rcmdsta, ccmdsta);
  383. }
  384. static inline void pasemi_mac_tx_error(struct pasemi_mac *mac, u64 mactx)
  385. {
  386. unsigned int cmdsta;
  387. if (!netif_msg_tx_err(mac))
  388. return;
  389. cmdsta = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
  390. printk(KERN_ERR "pasemi_mac: tx error. mactx 0x%016lx, "\
  391. "tx status 0x%016lx\n", mactx, *mac->tx_status);
  392. printk(KERN_ERR "pasemi_mac: tcmdsta 0x%08x\n", cmdsta);
  393. }
  394. static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
  395. {
  396. unsigned int n;
  397. int count;
  398. struct pasemi_mac_buffer *info;
  399. struct sk_buff *skb;
  400. unsigned int i, len;
  401. u64 macrx;
  402. dma_addr_t dma;
  403. spin_lock(&mac->rx->lock);
  404. n = mac->rx->next_to_clean;
  405. for (count = limit; count; count--) {
  406. rmb();
  407. macrx = RX_RING(mac, n);
  408. if ((macrx & XCT_MACRX_E) ||
  409. (*mac->rx_status & PAS_STATUS_ERROR))
  410. pasemi_mac_rx_error(mac, macrx);
  411. if (!(macrx & XCT_MACRX_O))
  412. break;
  413. info = NULL;
  414. /* We have to scan for our skb since there's no way
  415. * to back-map them from the descriptor, and if we
  416. * have several receive channels then they might not
  417. * show up in the same order as they were put on the
  418. * interface ring.
  419. */
  420. dma = (RX_RING(mac, n+1) & XCT_PTR_ADDR_M);
  421. for (i = mac->rx->next_to_fill;
  422. i < (mac->rx->next_to_fill + RX_RING_SIZE);
  423. i++) {
  424. info = &RX_RING_INFO(mac, i);
  425. if (info->dma == dma)
  426. break;
  427. }
  428. prefetchw(info);
  429. skb = info->skb;
  430. prefetchw(skb);
  431. info->dma = 0;
  432. pci_unmap_single(mac->dma_pdev, dma, skb->len,
  433. PCI_DMA_FROMDEVICE);
  434. len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
  435. if (len < 256) {
  436. struct sk_buff *new_skb;
  437. new_skb = netdev_alloc_skb(mac->netdev,
  438. len + LOCAL_SKB_ALIGN);
  439. if (new_skb) {
  440. skb_reserve(new_skb, LOCAL_SKB_ALIGN);
  441. memcpy(new_skb->data, skb->data, len);
  442. /* save the skb in buffer_info as good */
  443. skb = new_skb;
  444. }
  445. /* else just continue with the old one */
  446. } else
  447. info->skb = NULL;
  448. /* Need to zero it out since hardware doesn't, since the
  449. * replenish loop uses it to tell when it's done.
  450. */
  451. RX_BUFF(mac, i) = 0;
  452. skb_put(skb, len);
  453. if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
  454. skb->ip_summed = CHECKSUM_UNNECESSARY;
  455. skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
  456. XCT_MACRX_CSUM_S;
  457. } else
  458. skb->ip_summed = CHECKSUM_NONE;
  459. mac->netdev->stats.rx_bytes += len;
  460. mac->netdev->stats.rx_packets++;
  461. skb->protocol = eth_type_trans(skb, mac->netdev);
  462. netif_receive_skb(skb);
  463. RX_RING(mac, n) = 0;
  464. RX_RING(mac, n+1) = 0;
  465. n += 2;
  466. }
  467. if (n > RX_RING_SIZE) {
  468. /* Errata 5971 workaround: L2 target of headers */
  469. write_iob_reg(mac, PAS_IOB_COM_PKTHDRCNT, 0);
  470. n &= (RX_RING_SIZE-1);
  471. }
  472. mac->rx->next_to_clean = n;
  473. pasemi_mac_replenish_rx_ring(mac->netdev, limit-count);
  474. spin_unlock(&mac->rx->lock);
  475. return count;
  476. }
  477. /* Can't make this too large or we blow the kernel stack limits */
  478. #define TX_CLEAN_BATCHSIZE (128/MAX_SKB_FRAGS)
  479. static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
  480. {
  481. int i, j;
  482. struct pasemi_mac_buffer *info;
  483. unsigned int start, descr_count, buf_count, limit;
  484. unsigned int total_count;
  485. unsigned long flags;
  486. struct sk_buff *skbs[TX_CLEAN_BATCHSIZE];
  487. dma_addr_t dmas[TX_CLEAN_BATCHSIZE][MAX_SKB_FRAGS+1];
  488. total_count = 0;
  489. limit = TX_CLEAN_BATCHSIZE;
  490. restart:
  491. spin_lock_irqsave(&mac->tx->lock, flags);
  492. start = mac->tx->next_to_clean;
  493. buf_count = 0;
  494. descr_count = 0;
  495. for (i = start;
  496. descr_count < limit && i < mac->tx->next_to_fill;
  497. i += buf_count) {
  498. u64 mactx = TX_RING(mac, i);
  499. if ((mactx & XCT_MACTX_E) ||
  500. (*mac->tx_status & PAS_STATUS_ERROR))
  501. pasemi_mac_tx_error(mac, mactx);
  502. if (unlikely(mactx & XCT_MACTX_O))
  503. /* Not yet transmitted */
  504. break;
  505. info = &TX_RING_INFO(mac, i+1);
  506. skbs[descr_count] = info->skb;
  507. buf_count = 2 + skb_shinfo(info->skb)->nr_frags;
  508. for (j = 0; j <= skb_shinfo(info->skb)->nr_frags; j++)
  509. dmas[descr_count][j] = TX_RING_INFO(mac, i+1+j).dma;
  510. info->dma = 0;
  511. TX_RING(mac, i) = 0;
  512. TX_RING(mac, i+1) = 0;
  513. TX_RING_INFO(mac, i+1).skb = 0;
  514. TX_RING_INFO(mac, i+1).dma = 0;
  515. /* Since we always fill with an even number of entries, make
  516. * sure we skip any unused one at the end as well.
  517. */
  518. if (buf_count & 1)
  519. buf_count++;
  520. descr_count++;
  521. }
  522. mac->tx->next_to_clean = i;
  523. spin_unlock_irqrestore(&mac->tx->lock, flags);
  524. netif_wake_queue(mac->netdev);
  525. for (i = 0; i < descr_count; i++)
  526. pasemi_mac_unmap_tx_skb(mac, skbs[i], dmas[i]);
  527. total_count += descr_count;
  528. /* If the batch was full, try to clean more */
  529. if (descr_count == limit)
  530. goto restart;
  531. return total_count;
  532. }
  533. static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
  534. {
  535. struct net_device *dev = data;
  536. struct pasemi_mac *mac = netdev_priv(dev);
  537. unsigned int reg;
  538. if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
  539. return IRQ_NONE;
  540. /* Don't reset packet count so it won't fire again but clear
  541. * all others.
  542. */
  543. reg = 0;
  544. if (*mac->rx_status & PAS_STATUS_SOFT)
  545. reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
  546. if (*mac->rx_status & PAS_STATUS_ERROR)
  547. reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
  548. if (*mac->rx_status & PAS_STATUS_TIMER)
  549. reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
  550. netif_rx_schedule(dev, &mac->napi);
  551. write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
  552. return IRQ_HANDLED;
  553. }
  554. static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
  555. {
  556. struct net_device *dev = data;
  557. struct pasemi_mac *mac = netdev_priv(dev);
  558. unsigned int reg, pcnt;
  559. if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
  560. return IRQ_NONE;
  561. pasemi_mac_clean_tx(mac);
  562. pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
  563. reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
  564. if (*mac->tx_status & PAS_STATUS_SOFT)
  565. reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
  566. if (*mac->tx_status & PAS_STATUS_ERROR)
  567. reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
  568. write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
  569. return IRQ_HANDLED;
  570. }
  571. static void pasemi_adjust_link(struct net_device *dev)
  572. {
  573. struct pasemi_mac *mac = netdev_priv(dev);
  574. int msg;
  575. unsigned int flags;
  576. unsigned int new_flags;
  577. if (!mac->phydev->link) {
  578. /* If no link, MAC speed settings don't matter. Just report
  579. * link down and return.
  580. */
  581. if (mac->link && netif_msg_link(mac))
  582. printk(KERN_INFO "%s: Link is down.\n", dev->name);
  583. netif_carrier_off(dev);
  584. mac->link = 0;
  585. return;
  586. } else
  587. netif_carrier_on(dev);
  588. flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
  589. new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
  590. PAS_MAC_CFG_PCFG_TSR_M);
  591. if (!mac->phydev->duplex)
  592. new_flags |= PAS_MAC_CFG_PCFG_HD;
  593. switch (mac->phydev->speed) {
  594. case 1000:
  595. new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
  596. PAS_MAC_CFG_PCFG_TSR_1G;
  597. break;
  598. case 100:
  599. new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
  600. PAS_MAC_CFG_PCFG_TSR_100M;
  601. break;
  602. case 10:
  603. new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
  604. PAS_MAC_CFG_PCFG_TSR_10M;
  605. break;
  606. default:
  607. printk("Unsupported speed %d\n", mac->phydev->speed);
  608. }
  609. /* Print on link or speed/duplex change */
  610. msg = mac->link != mac->phydev->link || flags != new_flags;
  611. mac->duplex = mac->phydev->duplex;
  612. mac->speed = mac->phydev->speed;
  613. mac->link = mac->phydev->link;
  614. if (new_flags != flags)
  615. write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
  616. if (msg && netif_msg_link(mac))
  617. printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
  618. dev->name, mac->speed, mac->duplex ? "full" : "half");
  619. }
  620. static int pasemi_mac_phy_init(struct net_device *dev)
  621. {
  622. struct pasemi_mac *mac = netdev_priv(dev);
  623. struct device_node *dn, *phy_dn;
  624. struct phy_device *phydev;
  625. unsigned int phy_id;
  626. const phandle *ph;
  627. const unsigned int *prop;
  628. struct resource r;
  629. int ret;
  630. dn = pci_device_to_OF_node(mac->pdev);
  631. ph = of_get_property(dn, "phy-handle", NULL);
  632. if (!ph)
  633. return -ENODEV;
  634. phy_dn = of_find_node_by_phandle(*ph);
  635. prop = of_get_property(phy_dn, "reg", NULL);
  636. ret = of_address_to_resource(phy_dn->parent, 0, &r);
  637. if (ret)
  638. goto err;
  639. phy_id = *prop;
  640. snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
  641. of_node_put(phy_dn);
  642. mac->link = 0;
  643. mac->speed = 0;
  644. mac->duplex = -1;
  645. phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
  646. if (IS_ERR(phydev)) {
  647. printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
  648. return PTR_ERR(phydev);
  649. }
  650. mac->phydev = phydev;
  651. return 0;
  652. err:
  653. of_node_put(phy_dn);
  654. return -ENODEV;
  655. }
  656. static int pasemi_mac_open(struct net_device *dev)
  657. {
  658. struct pasemi_mac *mac = netdev_priv(dev);
  659. int base_irq;
  660. unsigned int flags;
  661. int ret;
  662. /* enable rx section */
  663. write_dma_reg(mac, PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
  664. /* enable tx section */
  665. write_dma_reg(mac, PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
  666. flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
  667. PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
  668. PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
  669. write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
  670. write_iob_reg(mac, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
  671. PAS_IOB_DMA_RXCH_CFG_CNTTH(0));
  672. write_iob_reg(mac, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
  673. PAS_IOB_DMA_TXCH_CFG_CNTTH(128));
  674. /* Clear out any residual packet count state from firmware */
  675. pasemi_mac_restart_rx_intr(mac);
  676. pasemi_mac_restart_tx_intr(mac);
  677. /* 0xffffff is max value, about 16ms */
  678. write_iob_reg(mac, PAS_IOB_DMA_COM_TIMEOUTCFG,
  679. PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
  680. ret = pasemi_mac_setup_rx_resources(dev);
  681. if (ret)
  682. goto out_rx_resources;
  683. ret = pasemi_mac_setup_tx_resources(dev);
  684. if (ret)
  685. goto out_tx_resources;
  686. write_mac_reg(mac, PAS_MAC_IPC_CHNL,
  687. PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
  688. PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
  689. /* enable rx if */
  690. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
  691. PAS_DMA_RXINT_RCMDSTA_EN);
  692. /* enable rx channel */
  693. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
  694. PAS_DMA_RXCHAN_CCMDSTA_EN |
  695. PAS_DMA_RXCHAN_CCMDSTA_DU);
  696. /* enable tx channel */
  697. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
  698. PAS_DMA_TXCHAN_TCMDSTA_EN);
  699. pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE);
  700. flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
  701. PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
  702. if (mac->type == MAC_TYPE_GMAC)
  703. flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
  704. else
  705. flags |= PAS_MAC_CFG_PCFG_TSR_10G | PAS_MAC_CFG_PCFG_SPD_10G;
  706. /* Enable interface in MAC */
  707. write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
  708. ret = pasemi_mac_phy_init(dev);
  709. /* Some configs don't have PHYs (XAUI etc), so don't complain about
  710. * failed init due to -ENODEV.
  711. */
  712. if (ret && ret != -ENODEV)
  713. dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
  714. netif_start_queue(dev);
  715. napi_enable(&mac->napi);
  716. /* Interrupts are a bit different for our DMA controller: While
  717. * it's got one a regular PCI device header, the interrupt there
  718. * is really the base of the range it's using. Each tx and rx
  719. * channel has it's own interrupt source.
  720. */
  721. base_irq = virq_to_hw(mac->dma_pdev->irq);
  722. mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
  723. mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
  724. ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
  725. mac->tx->irq_name, dev);
  726. if (ret) {
  727. dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
  728. base_irq + mac->dma_txch, ret);
  729. goto out_tx_int;
  730. }
  731. ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
  732. mac->rx->irq_name, dev);
  733. if (ret) {
  734. dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
  735. base_irq + 20 + mac->dma_rxch, ret);
  736. goto out_rx_int;
  737. }
  738. if (mac->phydev)
  739. phy_start(mac->phydev);
  740. return 0;
  741. out_rx_int:
  742. free_irq(mac->tx_irq, dev);
  743. out_tx_int:
  744. napi_disable(&mac->napi);
  745. netif_stop_queue(dev);
  746. pasemi_mac_free_tx_resources(dev);
  747. out_tx_resources:
  748. pasemi_mac_free_rx_resources(dev);
  749. out_rx_resources:
  750. return ret;
  751. }
  752. #define MAX_RETRIES 5000
  753. static int pasemi_mac_close(struct net_device *dev)
  754. {
  755. struct pasemi_mac *mac = netdev_priv(dev);
  756. unsigned int stat;
  757. int retries;
  758. if (mac->phydev) {
  759. phy_stop(mac->phydev);
  760. phy_disconnect(mac->phydev);
  761. }
  762. netif_stop_queue(dev);
  763. napi_disable(&mac->napi);
  764. /* Clean out any pending buffers */
  765. pasemi_mac_clean_tx(mac);
  766. pasemi_mac_clean_rx(mac, RX_RING_SIZE);
  767. /* Disable interface */
  768. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), PAS_DMA_TXCHAN_TCMDSTA_ST);
  769. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), PAS_DMA_RXINT_RCMDSTA_ST);
  770. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), PAS_DMA_RXCHAN_CCMDSTA_ST);
  771. for (retries = 0; retries < MAX_RETRIES; retries++) {
  772. stat = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
  773. if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
  774. break;
  775. cond_resched();
  776. }
  777. if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
  778. dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
  779. for (retries = 0; retries < MAX_RETRIES; retries++) {
  780. stat = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
  781. if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
  782. break;
  783. cond_resched();
  784. }
  785. if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
  786. dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
  787. for (retries = 0; retries < MAX_RETRIES; retries++) {
  788. stat = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
  789. if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
  790. break;
  791. cond_resched();
  792. }
  793. if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
  794. dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
  795. /* Then, disable the channel. This must be done separately from
  796. * stopping, since you can't disable when active.
  797. */
  798. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
  799. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
  800. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
  801. free_irq(mac->tx_irq, dev);
  802. free_irq(mac->rx_irq, dev);
  803. /* Free resources */
  804. pasemi_mac_free_rx_resources(dev);
  805. pasemi_mac_free_tx_resources(dev);
  806. return 0;
  807. }
  808. static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
  809. {
  810. struct pasemi_mac *mac = netdev_priv(dev);
  811. struct pasemi_mac_txring *txring;
  812. u64 dflags, mactx;
  813. dma_addr_t map[MAX_SKB_FRAGS+1];
  814. unsigned int map_size[MAX_SKB_FRAGS+1];
  815. unsigned long flags;
  816. int i, nfrags;
  817. dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
  818. if (skb->ip_summed == CHECKSUM_PARTIAL) {
  819. const unsigned char *nh = skb_network_header(skb);
  820. switch (ip_hdr(skb)->protocol) {
  821. case IPPROTO_TCP:
  822. dflags |= XCT_MACTX_CSUM_TCP;
  823. dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
  824. dflags |= XCT_MACTX_IPO(nh - skb->data);
  825. break;
  826. case IPPROTO_UDP:
  827. dflags |= XCT_MACTX_CSUM_UDP;
  828. dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
  829. dflags |= XCT_MACTX_IPO(nh - skb->data);
  830. break;
  831. }
  832. }
  833. nfrags = skb_shinfo(skb)->nr_frags;
  834. map[0] = pci_map_single(mac->dma_pdev, skb->data, skb_headlen(skb),
  835. PCI_DMA_TODEVICE);
  836. map_size[0] = skb_headlen(skb);
  837. if (dma_mapping_error(map[0]))
  838. goto out_err_nolock;
  839. for (i = 0; i < nfrags; i++) {
  840. skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
  841. map[i+1] = pci_map_page(mac->dma_pdev, frag->page,
  842. frag->page_offset, frag->size,
  843. PCI_DMA_TODEVICE);
  844. map_size[i+1] = frag->size;
  845. if (dma_mapping_error(map[i+1])) {
  846. nfrags = i;
  847. goto out_err_nolock;
  848. }
  849. }
  850. mactx = dflags | XCT_MACTX_LLEN(skb->len);
  851. txring = mac->tx;
  852. spin_lock_irqsave(&txring->lock, flags);
  853. if (RING_AVAIL(txring) <= nfrags+3) {
  854. spin_unlock_irqrestore(&txring->lock, flags);
  855. pasemi_mac_clean_tx(mac);
  856. pasemi_mac_restart_tx_intr(mac);
  857. spin_lock_irqsave(&txring->lock, flags);
  858. if (RING_AVAIL(txring) <= nfrags+3) {
  859. /* Still no room -- stop the queue and wait for tx
  860. * intr when there's room.
  861. */
  862. netif_stop_queue(dev);
  863. goto out_err;
  864. }
  865. }
  866. TX_RING(mac, txring->next_to_fill) = mactx;
  867. txring->next_to_fill++;
  868. TX_RING_INFO(mac, txring->next_to_fill).skb = skb;
  869. for (i = 0; i <= nfrags; i++) {
  870. TX_RING(mac, txring->next_to_fill+i) =
  871. XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
  872. TX_RING_INFO(mac, txring->next_to_fill+i).dma = map[i];
  873. }
  874. /* We have to add an even number of 8-byte entries to the ring
  875. * even if the last one is unused. That means always an odd number
  876. * of pointers + one mactx descriptor.
  877. */
  878. if (nfrags & 1)
  879. nfrags++;
  880. txring->next_to_fill += nfrags + 1;
  881. dev->stats.tx_packets++;
  882. dev->stats.tx_bytes += skb->len;
  883. spin_unlock_irqrestore(&txring->lock, flags);
  884. write_dma_reg(mac, PAS_DMA_TXCHAN_INCR(mac->dma_txch), (nfrags+2) >> 1);
  885. return NETDEV_TX_OK;
  886. out_err:
  887. spin_unlock_irqrestore(&txring->lock, flags);
  888. out_err_nolock:
  889. while (nfrags--)
  890. pci_unmap_single(mac->dma_pdev, map[nfrags], map_size[nfrags],
  891. PCI_DMA_TODEVICE);
  892. return NETDEV_TX_BUSY;
  893. }
  894. static void pasemi_mac_set_rx_mode(struct net_device *dev)
  895. {
  896. struct pasemi_mac *mac = netdev_priv(dev);
  897. unsigned int flags;
  898. flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
  899. /* Set promiscuous */
  900. if (dev->flags & IFF_PROMISC)
  901. flags |= PAS_MAC_CFG_PCFG_PR;
  902. else
  903. flags &= ~PAS_MAC_CFG_PCFG_PR;
  904. write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
  905. }
  906. static int pasemi_mac_poll(struct napi_struct *napi, int budget)
  907. {
  908. struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
  909. struct net_device *dev = mac->netdev;
  910. int pkts;
  911. pasemi_mac_clean_tx(mac);
  912. pkts = pasemi_mac_clean_rx(mac, budget);
  913. if (pkts < budget) {
  914. /* all done, no more packets present */
  915. netif_rx_complete(dev, napi);
  916. pasemi_mac_restart_rx_intr(mac);
  917. }
  918. return pkts;
  919. }
  920. static void __iomem * __devinit map_onedev(struct pci_dev *p, int index)
  921. {
  922. struct device_node *dn;
  923. void __iomem *ret;
  924. dn = pci_device_to_OF_node(p);
  925. if (!dn)
  926. goto fallback;
  927. ret = of_iomap(dn, index);
  928. if (!ret)
  929. goto fallback;
  930. return ret;
  931. fallback:
  932. /* This is hardcoded and ugly, but we have some firmware versions
  933. * that don't provide the register space in the device tree. Luckily
  934. * they are at well-known locations so we can just do the math here.
  935. */
  936. return ioremap(0xe0000000 + (p->devfn << 12), 0x2000);
  937. }
  938. static int __devinit pasemi_mac_map_regs(struct pasemi_mac *mac)
  939. {
  940. struct resource res;
  941. struct device_node *dn;
  942. int err;
  943. mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
  944. if (!mac->dma_pdev) {
  945. dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
  946. return -ENODEV;
  947. }
  948. mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
  949. if (!mac->iob_pdev) {
  950. dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
  951. return -ENODEV;
  952. }
  953. mac->regs = map_onedev(mac->pdev, 0);
  954. mac->dma_regs = map_onedev(mac->dma_pdev, 0);
  955. mac->iob_regs = map_onedev(mac->iob_pdev, 0);
  956. if (!mac->regs || !mac->dma_regs || !mac->iob_regs) {
  957. dev_err(&mac->pdev->dev, "Can't map registers\n");
  958. return -ENODEV;
  959. }
  960. /* The dma status structure is located in the I/O bridge, and
  961. * is cache coherent.
  962. */
  963. if (!dma_status) {
  964. dn = pci_device_to_OF_node(mac->iob_pdev);
  965. if (dn)
  966. err = of_address_to_resource(dn, 1, &res);
  967. if (!dn || err) {
  968. /* Fallback for old firmware */
  969. res.start = 0xfd800000;
  970. res.end = res.start + 0x1000;
  971. }
  972. dma_status = __ioremap(res.start, res.end-res.start, 0);
  973. }
  974. return 0;
  975. }
  976. static int __devinit
  977. pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  978. {
  979. static int index = 0;
  980. struct net_device *dev;
  981. struct pasemi_mac *mac;
  982. int err;
  983. DECLARE_MAC_BUF(mac_buf);
  984. err = pci_enable_device(pdev);
  985. if (err)
  986. return err;
  987. dev = alloc_etherdev(sizeof(struct pasemi_mac));
  988. if (dev == NULL) {
  989. dev_err(&pdev->dev,
  990. "pasemi_mac: Could not allocate ethernet device.\n");
  991. err = -ENOMEM;
  992. goto out_disable_device;
  993. }
  994. pci_set_drvdata(pdev, dev);
  995. SET_NETDEV_DEV(dev, &pdev->dev);
  996. mac = netdev_priv(dev);
  997. mac->pdev = pdev;
  998. mac->netdev = dev;
  999. netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
  1000. dev->features = NETIF_F_HW_CSUM | NETIF_F_LLTX | NETIF_F_SG;
  1001. /* These should come out of the device tree eventually */
  1002. mac->dma_txch = index;
  1003. mac->dma_rxch = index;
  1004. /* We probe GMAC before XAUI, but the DMA interfaces are
  1005. * in XAUI, GMAC order.
  1006. */
  1007. if (index < 4)
  1008. mac->dma_if = index + 2;
  1009. else
  1010. mac->dma_if = index - 4;
  1011. index++;
  1012. switch (pdev->device) {
  1013. case 0xa005:
  1014. mac->type = MAC_TYPE_GMAC;
  1015. break;
  1016. case 0xa006:
  1017. mac->type = MAC_TYPE_XAUI;
  1018. break;
  1019. default:
  1020. err = -ENODEV;
  1021. goto out;
  1022. }
  1023. /* get mac addr from device tree */
  1024. if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
  1025. err = -ENODEV;
  1026. goto out;
  1027. }
  1028. memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
  1029. dev->open = pasemi_mac_open;
  1030. dev->stop = pasemi_mac_close;
  1031. dev->hard_start_xmit = pasemi_mac_start_tx;
  1032. dev->set_multicast_list = pasemi_mac_set_rx_mode;
  1033. err = pasemi_mac_map_regs(mac);
  1034. if (err)
  1035. goto out;
  1036. mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
  1037. mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
  1038. mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  1039. /* Enable most messages by default */
  1040. mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
  1041. err = register_netdev(dev);
  1042. if (err) {
  1043. dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
  1044. err);
  1045. goto out;
  1046. } else if netif_msg_probe(mac)
  1047. printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
  1048. "hw addr %s\n",
  1049. dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
  1050. mac->dma_if, mac->dma_txch, mac->dma_rxch,
  1051. print_mac(mac_buf, dev->dev_addr));
  1052. return err;
  1053. out:
  1054. if (mac->iob_pdev)
  1055. pci_dev_put(mac->iob_pdev);
  1056. if (mac->dma_pdev)
  1057. pci_dev_put(mac->dma_pdev);
  1058. if (mac->dma_regs)
  1059. iounmap(mac->dma_regs);
  1060. if (mac->iob_regs)
  1061. iounmap(mac->iob_regs);
  1062. if (mac->regs)
  1063. iounmap(mac->regs);
  1064. free_netdev(dev);
  1065. out_disable_device:
  1066. pci_disable_device(pdev);
  1067. return err;
  1068. }
  1069. static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
  1070. {
  1071. struct net_device *netdev = pci_get_drvdata(pdev);
  1072. struct pasemi_mac *mac;
  1073. if (!netdev)
  1074. return;
  1075. mac = netdev_priv(netdev);
  1076. unregister_netdev(netdev);
  1077. pci_disable_device(pdev);
  1078. pci_dev_put(mac->dma_pdev);
  1079. pci_dev_put(mac->iob_pdev);
  1080. iounmap(mac->regs);
  1081. iounmap(mac->dma_regs);
  1082. iounmap(mac->iob_regs);
  1083. pci_set_drvdata(pdev, NULL);
  1084. free_netdev(netdev);
  1085. }
  1086. static struct pci_device_id pasemi_mac_pci_tbl[] = {
  1087. { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
  1088. { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
  1089. { },
  1090. };
  1091. MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
  1092. static struct pci_driver pasemi_mac_driver = {
  1093. .name = "pasemi_mac",
  1094. .id_table = pasemi_mac_pci_tbl,
  1095. .probe = pasemi_mac_probe,
  1096. .remove = __devexit_p(pasemi_mac_remove),
  1097. };
  1098. static void __exit pasemi_mac_cleanup_module(void)
  1099. {
  1100. pci_unregister_driver(&pasemi_mac_driver);
  1101. __iounmap(dma_status);
  1102. dma_status = NULL;
  1103. }
  1104. int pasemi_mac_init_module(void)
  1105. {
  1106. return pci_register_driver(&pasemi_mac_driver);
  1107. }
  1108. module_init(pasemi_mac_init_module);
  1109. module_exit(pasemi_mac_cleanup_module);