cimax2.c 11 KB

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  1. /*
  2. * cimax2.c
  3. *
  4. * CIMax2(R) SP2 driver in conjunction with NetUp Dual DVB-S2 CI card
  5. *
  6. * Copyright (C) 2009 NetUP Inc.
  7. * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
  8. * Copyright (C) 2009 Abylay Ospan <aospan@netup.ru>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. *
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24. */
  25. #include "cx23885.h"
  26. #include "dvb_ca_en50221.h"
  27. /**** Bit definitions for MC417_RWD and MC417_OEN registers ***
  28. bits 31-16
  29. +-----------+
  30. | Reserved |
  31. +-----------+
  32. bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
  33. +-------+-------+-------+-------+-------+-------+-------+-------+
  34. | WR# | RD# | | ACK# | ADHI | ADLO | CS1# | CS0# |
  35. +-------+-------+-------+-------+-------+-------+-------+-------+
  36. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
  37. +-------+-------+-------+-------+-------+-------+-------+-------+
  38. | DATA7| DATA6| DATA5| DATA4| DATA3| DATA2| DATA1| DATA0|
  39. +-------+-------+-------+-------+-------+-------+-------+-------+
  40. ***/
  41. /* MC417 */
  42. #define NETUP_DATA 0x000000ff
  43. #define NETUP_WR 0x00008000
  44. #define NETUP_RD 0x00004000
  45. #define NETUP_ACK 0x00001000
  46. #define NETUP_ADHI 0x00000800
  47. #define NETUP_ADLO 0x00000400
  48. #define NETUP_CS1 0x00000200
  49. #define NETUP_CS0 0x00000100
  50. #define NETUP_EN_ALL 0x00001000
  51. #define NETUP_CTRL_OFF (NETUP_CS1 | NETUP_CS0 | NETUP_WR | NETUP_RD)
  52. #define NETUP_CI_CTL 0x04
  53. #define NETUP_CI_RD 1
  54. static unsigned int ci_dbg;
  55. module_param(ci_dbg, int, 0644);
  56. MODULE_PARM_DESC(ci_dbg, "Enable CI debugging");
  57. #define ci_dbg_print(args...) \
  58. do { \
  59. if (ci_dbg) \
  60. printk(KERN_DEBUG args); \
  61. } while (0)
  62. /* stores all private variables for communication with CI */
  63. struct netup_ci_state {
  64. struct dvb_ca_en50221 ca;
  65. struct mutex ca_mutex;
  66. struct i2c_adapter *i2c_adap;
  67. u8 ci_i2c_addr;
  68. int status;
  69. struct work_struct work;
  70. void *priv;
  71. };
  72. struct mutex gpio_mutex;/* Two CiMax's uses same GPIO lines */
  73. int netup_read_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
  74. u8 *buf, int len)
  75. {
  76. int ret;
  77. struct i2c_msg msg[] = {
  78. {
  79. .addr = addr,
  80. .flags = 0,
  81. .buf = &reg,
  82. .len = 1
  83. }, {
  84. .addr = addr,
  85. .flags = I2C_M_RD,
  86. .buf = buf,
  87. .len = len
  88. }
  89. };
  90. ret = i2c_transfer(i2c_adap, msg, 2);
  91. if (ret != 2) {
  92. ci_dbg_print("%s: i2c read error, Reg = 0x%02x, Status = %d\n",
  93. __func__, reg, ret);
  94. return -1;
  95. }
  96. ci_dbg_print("%s: i2c read Addr=0x%04x, Reg = 0x%02x, data = %02x\n",
  97. __func__, addr, reg, buf[0]);
  98. return 0;
  99. }
  100. int netup_write_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
  101. u8 *buf, int len)
  102. {
  103. int ret;
  104. u8 buffer[len + 1];
  105. struct i2c_msg msg = {
  106. .addr = addr,
  107. .flags = 0,
  108. .buf = &buffer[0],
  109. .len = len + 1
  110. };
  111. buffer[0] = reg;
  112. memcpy(&buffer[1], buf, len);
  113. ret = i2c_transfer(i2c_adap, &msg, 1);
  114. if (ret != 1) {
  115. ci_dbg_print("%s: i2c write error, Reg=[0x%02x], Status=%d\n",
  116. __func__, reg, ret);
  117. return -1;
  118. }
  119. return 0;
  120. }
  121. int netup_ci_get_mem(struct cx23885_dev *dev)
  122. {
  123. int mem;
  124. unsigned long timeout = jiffies + msecs_to_jiffies(1);
  125. for (;;) {
  126. mem = cx_read(MC417_RWD);
  127. if ((mem & NETUP_ACK) == 0)
  128. break;
  129. if (time_after(jiffies, timeout))
  130. break;
  131. udelay(1);
  132. }
  133. cx_set(MC417_RWD, NETUP_CTRL_OFF);
  134. return mem & 0xff;
  135. }
  136. int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
  137. u8 flag, u8 read, int addr, u8 data)
  138. {
  139. struct netup_ci_state *state = en50221->data;
  140. struct cx23885_tsport *port = state->priv;
  141. struct cx23885_dev *dev = port->dev;
  142. u8 store;
  143. int mem;
  144. int ret;
  145. if (0 != slot)
  146. return -EINVAL;
  147. ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
  148. 0, &store, 1);
  149. if (ret != 0)
  150. return ret;
  151. store &= ~0x0c;
  152. store |= flag;
  153. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  154. 0, &store, 1);
  155. if (ret != 0)
  156. return ret;
  157. mutex_lock(&gpio_mutex);
  158. /* write addr */
  159. cx_write(MC417_OEN, NETUP_EN_ALL);
  160. cx_write(MC417_RWD, NETUP_CTRL_OFF |
  161. NETUP_ADLO | (0xff & addr));
  162. cx_clear(MC417_RWD, NETUP_ADLO);
  163. cx_write(MC417_RWD, NETUP_CTRL_OFF |
  164. NETUP_ADHI | (0xff & (addr >> 8)));
  165. cx_clear(MC417_RWD, NETUP_ADHI);
  166. if (read) /* data in */
  167. cx_write(MC417_OEN, NETUP_EN_ALL | NETUP_DATA);
  168. else /* data out */
  169. cx_write(MC417_RWD, NETUP_CTRL_OFF | data);
  170. /* choose chip */
  171. cx_clear(MC417_RWD,
  172. (state->ci_i2c_addr == 0x40) ? NETUP_CS0 : NETUP_CS1);
  173. /* read/write */
  174. cx_clear(MC417_RWD, (read) ? NETUP_RD : NETUP_WR);
  175. mem = netup_ci_get_mem(dev);
  176. mutex_unlock(&gpio_mutex);
  177. if (!read)
  178. if (mem < 0)
  179. return -EREMOTEIO;
  180. ci_dbg_print("%s: %s: addr=[0x%02x], %s=%x\n", __func__,
  181. (read) ? "read" : "write", addr,
  182. (flag == NETUP_CI_CTL) ? "ctl" : "mem",
  183. (read) ? mem : data);
  184. if (read)
  185. return mem;
  186. return 0;
  187. }
  188. int netup_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
  189. int slot, int addr)
  190. {
  191. return netup_ci_op_cam(en50221, slot, 0, NETUP_CI_RD, addr, 0);
  192. }
  193. int netup_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
  194. int slot, int addr, u8 data)
  195. {
  196. return netup_ci_op_cam(en50221, slot, 0, 0, addr, data);
  197. }
  198. int netup_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221, int slot, u8 addr)
  199. {
  200. return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL,
  201. NETUP_CI_RD, addr, 0);
  202. }
  203. int netup_ci_write_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
  204. u8 addr, u8 data)
  205. {
  206. return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL, 0, addr, data);
  207. }
  208. int netup_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
  209. {
  210. struct netup_ci_state *state = en50221->data;
  211. u8 buf = 0x80;
  212. int ret;
  213. if (0 != slot)
  214. return -EINVAL;
  215. udelay(500);
  216. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  217. 0, &buf, 1);
  218. if (ret != 0)
  219. return ret;
  220. udelay(500);
  221. buf = 0x00;
  222. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  223. 0, &buf, 1);
  224. msleep(1000);
  225. dvb_ca_en50221_camready_irq(&state->ca, 0);
  226. return 0;
  227. }
  228. int netup_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
  229. {
  230. /* not implemented */
  231. return 0;
  232. }
  233. int netup_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
  234. {
  235. struct netup_ci_state *state = en50221->data;
  236. u8 buf = 0x60;
  237. if (0 != slot)
  238. return -EINVAL;
  239. return netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  240. 0, &buf, 1);
  241. }
  242. /* work handler */
  243. static void netup_read_ci_status(struct work_struct *work)
  244. {
  245. struct netup_ci_state *state =
  246. container_of(work, struct netup_ci_state, work);
  247. u8 buf[33];
  248. int ret;
  249. ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
  250. 0, &buf[0], 33);
  251. if (ret != 0)
  252. return;
  253. ci_dbg_print("%s: Slot Status Addr=[0x%04x], Reg=[0x%02x], data=%02x, "
  254. "TS config = %02x\n", __func__, state->ci_i2c_addr, 0, buf[0],
  255. buf[32]);
  256. if (buf[0] & 1)
  257. state->status = DVB_CA_EN50221_POLL_CAM_PRESENT |
  258. DVB_CA_EN50221_POLL_CAM_READY;
  259. else
  260. state->status = 0;
  261. }
  262. /* CI irq handler */
  263. int netup_ci_slot_status(struct cx23885_dev *dev, u32 pci_status)
  264. {
  265. struct cx23885_tsport *port = NULL;
  266. struct netup_ci_state *state = NULL;
  267. if (pci_status & PCI_MSK_GPIO0)
  268. port = &dev->ts1;
  269. else if (pci_status & PCI_MSK_GPIO1)
  270. port = &dev->ts2;
  271. else /* who calls ? */
  272. return 0;
  273. state = port->port_priv;
  274. schedule_work(&state->work);
  275. return 1;
  276. }
  277. int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, int slot, int open)
  278. {
  279. struct netup_ci_state *state = en50221->data;
  280. if (0 != slot)
  281. return -EINVAL;
  282. return state->status;
  283. }
  284. int netup_ci_init(struct cx23885_tsport *port)
  285. {
  286. struct netup_ci_state *state;
  287. u8 cimax_init[34] = {
  288. 0x00, /* module A control*/
  289. 0x00, /* auto select mask high A */
  290. 0x00, /* auto select mask low A */
  291. 0x00, /* auto select pattern high A */
  292. 0x00, /* auto select pattern low A */
  293. 0x44, /* memory access time A */
  294. 0x00, /* invert input A */
  295. 0x00, /* RFU */
  296. 0x00, /* RFU */
  297. 0x00, /* module B control*/
  298. 0x00, /* auto select mask high B */
  299. 0x00, /* auto select mask low B */
  300. 0x00, /* auto select pattern high B */
  301. 0x00, /* auto select pattern low B */
  302. 0x44, /* memory access time B */
  303. 0x00, /* invert input B */
  304. 0x00, /* RFU */
  305. 0x00, /* RFU */
  306. 0x00, /* auto select mask high Ext */
  307. 0x00, /* auto select mask low Ext */
  308. 0x00, /* auto select pattern high Ext */
  309. 0x00, /* auto select pattern low Ext */
  310. 0x00, /* RFU */
  311. 0x02, /* destination - module A */
  312. 0x01, /* power on (use it like store place) */
  313. 0x00, /* RFU */
  314. 0x00, /* int status read only */
  315. 0x01, /* all int unmasked */
  316. 0x04, /* int config */
  317. 0x00, /* USCG1 */
  318. 0x04, /* ack active low */
  319. 0x00, /* LOCK = 0 */
  320. 0x33, /* serial mode, rising in, rising out, MSB first*/
  321. 0x31, /* syncronization */
  322. };
  323. int ret;
  324. ci_dbg_print("%s\n", __func__);
  325. state = kzalloc(sizeof(struct netup_ci_state), GFP_KERNEL);
  326. if (!state) {
  327. ci_dbg_print("%s: Unable create CI structure!\n", __func__);
  328. ret = -ENOMEM;
  329. goto err;
  330. }
  331. port->port_priv = state;
  332. switch (port->nr) {
  333. case 1:
  334. state->ci_i2c_addr = 0x40;
  335. mutex_init(&gpio_mutex);
  336. break;
  337. case 2:
  338. state->ci_i2c_addr = 0x41;
  339. break;
  340. }
  341. state->i2c_adap = &port->dev->i2c_bus[0].i2c_adap;
  342. state->ca.owner = THIS_MODULE;
  343. state->ca.read_attribute_mem = netup_ci_read_attribute_mem;
  344. state->ca.write_attribute_mem = netup_ci_write_attribute_mem;
  345. state->ca.read_cam_control = netup_ci_read_cam_ctl;
  346. state->ca.write_cam_control = netup_ci_write_cam_ctl;
  347. state->ca.slot_reset = netup_ci_slot_reset;
  348. state->ca.slot_shutdown = netup_ci_slot_shutdown;
  349. state->ca.slot_ts_enable = netup_ci_slot_ts_ctl;
  350. state->ca.poll_slot_status = netup_poll_ci_slot_status;
  351. state->ca.data = state;
  352. state->priv = port;
  353. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  354. 0, &cimax_init[0], 34);
  355. /* lock registers */
  356. ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  357. 0x1f, &cimax_init[0x18], 1);
  358. /* power on slots */
  359. ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  360. 0x18, &cimax_init[0x18], 1);
  361. if (0 != ret)
  362. goto err;
  363. ret = dvb_ca_en50221_init(&port->frontends.adapter,
  364. &state->ca,
  365. /* flags */ 0,
  366. /* n_slots */ 1);
  367. if (0 != ret)
  368. goto err;
  369. INIT_WORK(&state->work, netup_read_ci_status);
  370. schedule_work(&state->work);
  371. ci_dbg_print("%s: CI initialized!\n", __func__);
  372. return 0;
  373. err:
  374. ci_dbg_print("%s: Cannot initialize CI: Error %d.\n", __func__, ret);
  375. kfree(state);
  376. return ret;
  377. }
  378. void netup_ci_exit(struct cx23885_tsport *port)
  379. {
  380. struct netup_ci_state *state;
  381. if (NULL == port)
  382. return;
  383. state = (struct netup_ci_state *)port->port_priv;
  384. if (NULL == state)
  385. return;
  386. if (NULL == state->ca.data)
  387. return;
  388. dvb_ca_en50221_release(&state->ca);
  389. kfree(state);
  390. }