omap_hwmod.c 59 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220
  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2010 Nokia Corporation
  5. *
  6. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  7. *
  8. * Created in collaboration with (alphabetical order): Thara Gopinath,
  9. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  10. * Sawant, Santosh Shilimkar, Richard Woodruff
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * Introduction
  17. * ------------
  18. * One way to view an OMAP SoC is as a collection of largely unrelated
  19. * IP blocks connected by interconnects. The IP blocks include
  20. * devices such as ARM processors, audio serial interfaces, UARTs,
  21. * etc. Some of these devices, like the DSP, are created by TI;
  22. * others, like the SGX, largely originate from external vendors. In
  23. * TI's documentation, on-chip devices are referred to as "OMAP
  24. * modules." Some of these IP blocks are identical across several
  25. * OMAP versions. Others are revised frequently.
  26. *
  27. * These OMAP modules are tied together by various interconnects.
  28. * Most of the address and data flow between modules is via OCP-based
  29. * interconnects such as the L3 and L4 buses; but there are other
  30. * interconnects that distribute the hardware clock tree, handle idle
  31. * and reset signaling, supply power, and connect the modules to
  32. * various pads or balls on the OMAP package.
  33. *
  34. * OMAP hwmod provides a consistent way to describe the on-chip
  35. * hardware blocks and their integration into the rest of the chip.
  36. * This description can be automatically generated from the TI
  37. * hardware database. OMAP hwmod provides a standard, consistent API
  38. * to reset, enable, idle, and disable these hardware blocks. And
  39. * hwmod provides a way for other core code, such as the Linux device
  40. * code or the OMAP power management and address space mapping code,
  41. * to query the hardware database.
  42. *
  43. * Using hwmod
  44. * -----------
  45. * Drivers won't call hwmod functions directly. That is done by the
  46. * omap_device code, and in rare occasions, by custom integration code
  47. * in arch/arm/ *omap*. The omap_device code includes functions to
  48. * build a struct platform_device using omap_hwmod data, and that is
  49. * currently how hwmod data is communicated to drivers and to the
  50. * Linux driver model. Most drivers will call omap_hwmod functions only
  51. * indirectly, via pm_runtime*() functions.
  52. *
  53. * From a layering perspective, here is where the OMAP hwmod code
  54. * fits into the kernel software stack:
  55. *
  56. * +-------------------------------+
  57. * | Device driver code |
  58. * | (e.g., drivers/) |
  59. * +-------------------------------+
  60. * | Linux driver model |
  61. * | (platform_device / |
  62. * | platform_driver data/code) |
  63. * +-------------------------------+
  64. * | OMAP core-driver integration |
  65. * |(arch/arm/mach-omap2/devices.c)|
  66. * +-------------------------------+
  67. * | omap_device code |
  68. * | (../plat-omap/omap_device.c) |
  69. * +-------------------------------+
  70. * ----> | omap_hwmod code/data | <-----
  71. * | (../mach-omap2/omap_hwmod*) |
  72. * +-------------------------------+
  73. * | OMAP clock/PRCM/register fns |
  74. * | (__raw_{read,write}l, clk*) |
  75. * +-------------------------------+
  76. *
  77. * Device drivers should not contain any OMAP-specific code or data in
  78. * them. They should only contain code to operate the IP block that
  79. * the driver is responsible for. This is because these IP blocks can
  80. * also appear in other SoCs, either from TI (such as DaVinci) or from
  81. * other manufacturers; and drivers should be reusable across other
  82. * platforms.
  83. *
  84. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  85. * devices upon boot. The goal here is for the kernel to be
  86. * completely self-reliant and independent from bootloaders. This is
  87. * to ensure a repeatable configuration, both to ensure consistent
  88. * runtime behavior, and to make it easier for others to reproduce
  89. * bugs.
  90. *
  91. * OMAP module activity states
  92. * ---------------------------
  93. * The hwmod code considers modules to be in one of several activity
  94. * states. IP blocks start out in an UNKNOWN state, then once they
  95. * are registered via the hwmod code, proceed to the REGISTERED state.
  96. * Once their clock names are resolved to clock pointers, the module
  97. * enters the CLKS_INITED state; and finally, once the module has been
  98. * reset and the integration registers programmed, the INITIALIZED state
  99. * is entered. The hwmod code will then place the module into either
  100. * the IDLE state to save power, or in the case of a critical system
  101. * module, the ENABLED state.
  102. *
  103. * OMAP core integration code can then call omap_hwmod*() functions
  104. * directly to move the module between the IDLE, ENABLED, and DISABLED
  105. * states, as needed. This is done during both the PM idle loop, and
  106. * in the OMAP core integration code's implementation of the PM runtime
  107. * functions.
  108. *
  109. * References
  110. * ----------
  111. * This is a partial list.
  112. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  113. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  114. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  115. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  116. * - Open Core Protocol Specification 2.2
  117. *
  118. * To do:
  119. * - handle IO mapping
  120. * - bus throughput & module latency measurement code
  121. *
  122. * XXX add tests at the beginning of each function to ensure the hwmod is
  123. * in the appropriate state
  124. * XXX error return values should be checked to ensure that they are
  125. * appropriate
  126. */
  127. #undef DEBUG
  128. #include <linux/kernel.h>
  129. #include <linux/errno.h>
  130. #include <linux/io.h>
  131. #include <linux/clk.h>
  132. #include <linux/delay.h>
  133. #include <linux/err.h>
  134. #include <linux/list.h>
  135. #include <linux/mutex.h>
  136. #include <linux/spinlock.h>
  137. #include <plat/common.h>
  138. #include <plat/cpu.h>
  139. #include "clockdomain.h"
  140. #include "powerdomain.h"
  141. #include <plat/clock.h>
  142. #include <plat/omap_hwmod.h>
  143. #include <plat/prcm.h>
  144. #include "cm2xxx_3xxx.h"
  145. #include "cm44xx.h"
  146. #include "prm2xxx_3xxx.h"
  147. #include "prm44xx.h"
  148. #include "mux.h"
  149. /* Maximum microseconds to wait for OMAP module to softreset */
  150. #define MAX_MODULE_SOFTRESET_WAIT 10000
  151. /* Name of the OMAP hwmod for the MPU */
  152. #define MPU_INITIATOR_NAME "mpu"
  153. /* omap_hwmod_list contains all registered struct omap_hwmods */
  154. static LIST_HEAD(omap_hwmod_list);
  155. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  156. static struct omap_hwmod *mpu_oh;
  157. /* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
  158. static u8 inited;
  159. /* Private functions */
  160. /**
  161. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  162. * @oh: struct omap_hwmod *
  163. *
  164. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  165. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  166. * OCP_SYSCONFIG register or 0 upon success.
  167. */
  168. static int _update_sysc_cache(struct omap_hwmod *oh)
  169. {
  170. if (!oh->class->sysc) {
  171. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  172. return -EINVAL;
  173. }
  174. /* XXX ensure module interface clock is up */
  175. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  176. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  177. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  178. return 0;
  179. }
  180. /**
  181. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  182. * @v: OCP_SYSCONFIG value to write
  183. * @oh: struct omap_hwmod *
  184. *
  185. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  186. * one. No return value.
  187. */
  188. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  189. {
  190. if (!oh->class->sysc) {
  191. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  192. return;
  193. }
  194. /* XXX ensure module interface clock is up */
  195. /* Module might have lost context, always update cache and register */
  196. oh->_sysc_cache = v;
  197. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  198. }
  199. /**
  200. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  201. * @oh: struct omap_hwmod *
  202. * @standbymode: MIDLEMODE field bits
  203. * @v: pointer to register contents to modify
  204. *
  205. * Update the master standby mode bits in @v to be @standbymode for
  206. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  207. * upon error or 0 upon success.
  208. */
  209. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  210. u32 *v)
  211. {
  212. u32 mstandby_mask;
  213. u8 mstandby_shift;
  214. if (!oh->class->sysc ||
  215. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  216. return -EINVAL;
  217. if (!oh->class->sysc->sysc_fields) {
  218. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  219. return -EINVAL;
  220. }
  221. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  222. mstandby_mask = (0x3 << mstandby_shift);
  223. *v &= ~mstandby_mask;
  224. *v |= __ffs(standbymode) << mstandby_shift;
  225. return 0;
  226. }
  227. /**
  228. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  229. * @oh: struct omap_hwmod *
  230. * @idlemode: SIDLEMODE field bits
  231. * @v: pointer to register contents to modify
  232. *
  233. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  234. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  235. * or 0 upon success.
  236. */
  237. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  238. {
  239. u32 sidle_mask;
  240. u8 sidle_shift;
  241. if (!oh->class->sysc ||
  242. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  243. return -EINVAL;
  244. if (!oh->class->sysc->sysc_fields) {
  245. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  246. return -EINVAL;
  247. }
  248. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  249. sidle_mask = (0x3 << sidle_shift);
  250. *v &= ~sidle_mask;
  251. *v |= __ffs(idlemode) << sidle_shift;
  252. return 0;
  253. }
  254. /**
  255. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  256. * @oh: struct omap_hwmod *
  257. * @clockact: CLOCKACTIVITY field bits
  258. * @v: pointer to register contents to modify
  259. *
  260. * Update the clockactivity mode bits in @v to be @clockact for the
  261. * @oh hwmod. Used for additional powersaving on some modules. Does
  262. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  263. * success.
  264. */
  265. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  266. {
  267. u32 clkact_mask;
  268. u8 clkact_shift;
  269. if (!oh->class->sysc ||
  270. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  271. return -EINVAL;
  272. if (!oh->class->sysc->sysc_fields) {
  273. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  274. return -EINVAL;
  275. }
  276. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  277. clkact_mask = (0x3 << clkact_shift);
  278. *v &= ~clkact_mask;
  279. *v |= clockact << clkact_shift;
  280. return 0;
  281. }
  282. /**
  283. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  284. * @oh: struct omap_hwmod *
  285. * @v: pointer to register contents to modify
  286. *
  287. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  288. * error or 0 upon success.
  289. */
  290. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  291. {
  292. u32 softrst_mask;
  293. if (!oh->class->sysc ||
  294. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  295. return -EINVAL;
  296. if (!oh->class->sysc->sysc_fields) {
  297. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  298. return -EINVAL;
  299. }
  300. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  301. *v |= softrst_mask;
  302. return 0;
  303. }
  304. /**
  305. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  306. * @oh: struct omap_hwmod *
  307. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  308. * @v: pointer to register contents to modify
  309. *
  310. * Update the module autoidle bit in @v to be @autoidle for the @oh
  311. * hwmod. The autoidle bit controls whether the module can gate
  312. * internal clocks automatically when it isn't doing anything; the
  313. * exact function of this bit varies on a per-module basis. This
  314. * function does not write to the hardware. Returns -EINVAL upon
  315. * error or 0 upon success.
  316. */
  317. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  318. u32 *v)
  319. {
  320. u32 autoidle_mask;
  321. u8 autoidle_shift;
  322. if (!oh->class->sysc ||
  323. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  324. return -EINVAL;
  325. if (!oh->class->sysc->sysc_fields) {
  326. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  327. return -EINVAL;
  328. }
  329. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  330. autoidle_mask = (0x3 << autoidle_shift);
  331. *v &= ~autoidle_mask;
  332. *v |= autoidle << autoidle_shift;
  333. return 0;
  334. }
  335. /**
  336. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  337. * @oh: struct omap_hwmod *
  338. *
  339. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  340. * upon error or 0 upon success.
  341. */
  342. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  343. {
  344. u32 wakeup_mask;
  345. if (!oh->class->sysc ||
  346. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  347. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
  348. return -EINVAL;
  349. if (!oh->class->sysc->sysc_fields) {
  350. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  351. return -EINVAL;
  352. }
  353. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  354. *v |= wakeup_mask;
  355. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  356. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  357. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  358. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  359. return 0;
  360. }
  361. /**
  362. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  363. * @oh: struct omap_hwmod *
  364. *
  365. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  366. * upon error or 0 upon success.
  367. */
  368. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  369. {
  370. u32 wakeup_mask;
  371. if (!oh->class->sysc ||
  372. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  373. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
  374. return -EINVAL;
  375. if (!oh->class->sysc->sysc_fields) {
  376. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  377. return -EINVAL;
  378. }
  379. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  380. *v &= ~wakeup_mask;
  381. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  382. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  383. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  384. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  385. return 0;
  386. }
  387. /**
  388. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  389. * @oh: struct omap_hwmod *
  390. *
  391. * Prevent the hardware module @oh from entering idle while the
  392. * hardare module initiator @init_oh is active. Useful when a module
  393. * will be accessed by a particular initiator (e.g., if a module will
  394. * be accessed by the IVA, there should be a sleepdep between the IVA
  395. * initiator and the module). Only applies to modules in smart-idle
  396. * mode. Returns -EINVAL upon error or passes along
  397. * clkdm_add_sleepdep() value upon success.
  398. */
  399. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  400. {
  401. if (!oh->_clk)
  402. return -EINVAL;
  403. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  404. }
  405. /**
  406. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  407. * @oh: struct omap_hwmod *
  408. *
  409. * Allow the hardware module @oh to enter idle while the hardare
  410. * module initiator @init_oh is active. Useful when a module will not
  411. * be accessed by a particular initiator (e.g., if a module will not
  412. * be accessed by the IVA, there should be no sleepdep between the IVA
  413. * initiator and the module). Only applies to modules in smart-idle
  414. * mode. Returns -EINVAL upon error or passes along
  415. * clkdm_del_sleepdep() value upon success.
  416. */
  417. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  418. {
  419. if (!oh->_clk)
  420. return -EINVAL;
  421. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  422. }
  423. /**
  424. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  425. * @oh: struct omap_hwmod *
  426. *
  427. * Called from _init_clocks(). Populates the @oh _clk (main
  428. * functional clock pointer) if a main_clk is present. Returns 0 on
  429. * success or -EINVAL on error.
  430. */
  431. static int _init_main_clk(struct omap_hwmod *oh)
  432. {
  433. int ret = 0;
  434. if (!oh->main_clk)
  435. return 0;
  436. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  437. if (!oh->_clk) {
  438. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  439. oh->name, oh->main_clk);
  440. return -EINVAL;
  441. }
  442. if (!oh->_clk->clkdm)
  443. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  444. oh->main_clk, oh->_clk->name);
  445. return ret;
  446. }
  447. /**
  448. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  449. * @oh: struct omap_hwmod *
  450. *
  451. * Called from _init_clocks(). Populates the @oh OCP slave interface
  452. * clock pointers. Returns 0 on success or -EINVAL on error.
  453. */
  454. static int _init_interface_clks(struct omap_hwmod *oh)
  455. {
  456. struct clk *c;
  457. int i;
  458. int ret = 0;
  459. if (oh->slaves_cnt == 0)
  460. return 0;
  461. for (i = 0; i < oh->slaves_cnt; i++) {
  462. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  463. if (!os->clk)
  464. continue;
  465. c = omap_clk_get_by_name(os->clk);
  466. if (!c) {
  467. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  468. oh->name, os->clk);
  469. ret = -EINVAL;
  470. }
  471. os->_clk = c;
  472. }
  473. return ret;
  474. }
  475. /**
  476. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  477. * @oh: struct omap_hwmod *
  478. *
  479. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  480. * clock pointers. Returns 0 on success or -EINVAL on error.
  481. */
  482. static int _init_opt_clks(struct omap_hwmod *oh)
  483. {
  484. struct omap_hwmod_opt_clk *oc;
  485. struct clk *c;
  486. int i;
  487. int ret = 0;
  488. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  489. c = omap_clk_get_by_name(oc->clk);
  490. if (!c) {
  491. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  492. oh->name, oc->clk);
  493. ret = -EINVAL;
  494. }
  495. oc->_clk = c;
  496. }
  497. return ret;
  498. }
  499. /**
  500. * _enable_clocks - enable hwmod main clock and interface clocks
  501. * @oh: struct omap_hwmod *
  502. *
  503. * Enables all clocks necessary for register reads and writes to succeed
  504. * on the hwmod @oh. Returns 0.
  505. */
  506. static int _enable_clocks(struct omap_hwmod *oh)
  507. {
  508. int i;
  509. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  510. if (oh->_clk)
  511. clk_enable(oh->_clk);
  512. if (oh->slaves_cnt > 0) {
  513. for (i = 0; i < oh->slaves_cnt; i++) {
  514. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  515. struct clk *c = os->_clk;
  516. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  517. clk_enable(c);
  518. }
  519. }
  520. /* The opt clocks are controlled by the device driver. */
  521. return 0;
  522. }
  523. /**
  524. * _disable_clocks - disable hwmod main clock and interface clocks
  525. * @oh: struct omap_hwmod *
  526. *
  527. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  528. */
  529. static int _disable_clocks(struct omap_hwmod *oh)
  530. {
  531. int i;
  532. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  533. if (oh->_clk)
  534. clk_disable(oh->_clk);
  535. if (oh->slaves_cnt > 0) {
  536. for (i = 0; i < oh->slaves_cnt; i++) {
  537. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  538. struct clk *c = os->_clk;
  539. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  540. clk_disable(c);
  541. }
  542. }
  543. /* The opt clocks are controlled by the device driver. */
  544. return 0;
  545. }
  546. static void _enable_optional_clocks(struct omap_hwmod *oh)
  547. {
  548. struct omap_hwmod_opt_clk *oc;
  549. int i;
  550. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  551. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  552. if (oc->_clk) {
  553. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  554. oc->_clk->name);
  555. clk_enable(oc->_clk);
  556. }
  557. }
  558. static void _disable_optional_clocks(struct omap_hwmod *oh)
  559. {
  560. struct omap_hwmod_opt_clk *oc;
  561. int i;
  562. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  563. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  564. if (oc->_clk) {
  565. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  566. oc->_clk->name);
  567. clk_disable(oc->_clk);
  568. }
  569. }
  570. /**
  571. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  572. * @oh: struct omap_hwmod *
  573. *
  574. * Returns the array index of the OCP slave port that the MPU
  575. * addresses the device on, or -EINVAL upon error or not found.
  576. */
  577. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  578. {
  579. int i;
  580. int found = 0;
  581. if (!oh || oh->slaves_cnt == 0)
  582. return -EINVAL;
  583. for (i = 0; i < oh->slaves_cnt; i++) {
  584. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  585. if (os->user & OCP_USER_MPU) {
  586. found = 1;
  587. break;
  588. }
  589. }
  590. if (found)
  591. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  592. oh->name, i);
  593. else
  594. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  595. oh->name);
  596. return (found) ? i : -EINVAL;
  597. }
  598. /**
  599. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  600. * @oh: struct omap_hwmod *
  601. *
  602. * Return the virtual address of the base of the register target of
  603. * device @oh, or NULL on error.
  604. */
  605. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  606. {
  607. struct omap_hwmod_ocp_if *os;
  608. struct omap_hwmod_addr_space *mem;
  609. int i;
  610. int found = 0;
  611. void __iomem *va_start;
  612. if (!oh || oh->slaves_cnt == 0)
  613. return NULL;
  614. os = oh->slaves[index];
  615. for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
  616. if (mem->flags & ADDR_TYPE_RT) {
  617. found = 1;
  618. break;
  619. }
  620. }
  621. if (found) {
  622. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  623. if (!va_start) {
  624. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  625. return NULL;
  626. }
  627. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  628. oh->name, va_start);
  629. } else {
  630. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  631. oh->name);
  632. }
  633. return (found) ? va_start : NULL;
  634. }
  635. /**
  636. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  637. * @oh: struct omap_hwmod *
  638. *
  639. * If module is marked as SWSUP_SIDLE, force the module out of slave
  640. * idle; otherwise, configure it for smart-idle. If module is marked
  641. * as SWSUP_MSUSPEND, force the module out of master standby;
  642. * otherwise, configure it for smart-standby. No return value.
  643. */
  644. static void _enable_sysc(struct omap_hwmod *oh)
  645. {
  646. u8 idlemode, sf;
  647. u32 v;
  648. if (!oh->class->sysc)
  649. return;
  650. v = oh->_sysc_cache;
  651. sf = oh->class->sysc->sysc_flags;
  652. if (sf & SYSC_HAS_SIDLEMODE) {
  653. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  654. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  655. _set_slave_idlemode(oh, idlemode, &v);
  656. }
  657. if (sf & SYSC_HAS_MIDLEMODE) {
  658. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  659. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  660. _set_master_standbymode(oh, idlemode, &v);
  661. }
  662. /*
  663. * XXX The clock framework should handle this, by
  664. * calling into this code. But this must wait until the
  665. * clock structures are tagged with omap_hwmod entries
  666. */
  667. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  668. (sf & SYSC_HAS_CLOCKACTIVITY))
  669. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  670. /* If slave is in SMARTIDLE, also enable wakeup */
  671. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  672. _enable_wakeup(oh, &v);
  673. _write_sysconfig(v, oh);
  674. /*
  675. * Set the autoidle bit only after setting the smartidle bit
  676. * Setting this will not have any impact on the other modules.
  677. */
  678. if (sf & SYSC_HAS_AUTOIDLE) {
  679. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  680. 0 : 1;
  681. _set_module_autoidle(oh, idlemode, &v);
  682. _write_sysconfig(v, oh);
  683. }
  684. }
  685. /**
  686. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  687. * @oh: struct omap_hwmod *
  688. *
  689. * If module is marked as SWSUP_SIDLE, force the module into slave
  690. * idle; otherwise, configure it for smart-idle. If module is marked
  691. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  692. * configure it for smart-standby. No return value.
  693. */
  694. static void _idle_sysc(struct omap_hwmod *oh)
  695. {
  696. u8 idlemode, sf;
  697. u32 v;
  698. if (!oh->class->sysc)
  699. return;
  700. v = oh->_sysc_cache;
  701. sf = oh->class->sysc->sysc_flags;
  702. if (sf & SYSC_HAS_SIDLEMODE) {
  703. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  704. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  705. _set_slave_idlemode(oh, idlemode, &v);
  706. }
  707. if (sf & SYSC_HAS_MIDLEMODE) {
  708. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  709. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  710. _set_master_standbymode(oh, idlemode, &v);
  711. }
  712. /* If slave is in SMARTIDLE, also enable wakeup */
  713. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  714. _enable_wakeup(oh, &v);
  715. _write_sysconfig(v, oh);
  716. }
  717. /**
  718. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  719. * @oh: struct omap_hwmod *
  720. *
  721. * Force the module into slave idle and master suspend. No return
  722. * value.
  723. */
  724. static void _shutdown_sysc(struct omap_hwmod *oh)
  725. {
  726. u32 v;
  727. u8 sf;
  728. if (!oh->class->sysc)
  729. return;
  730. v = oh->_sysc_cache;
  731. sf = oh->class->sysc->sysc_flags;
  732. if (sf & SYSC_HAS_SIDLEMODE)
  733. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  734. if (sf & SYSC_HAS_MIDLEMODE)
  735. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  736. if (sf & SYSC_HAS_AUTOIDLE)
  737. _set_module_autoidle(oh, 1, &v);
  738. _write_sysconfig(v, oh);
  739. }
  740. /**
  741. * _lookup - find an omap_hwmod by name
  742. * @name: find an omap_hwmod by name
  743. *
  744. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  745. */
  746. static struct omap_hwmod *_lookup(const char *name)
  747. {
  748. struct omap_hwmod *oh, *temp_oh;
  749. oh = NULL;
  750. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  751. if (!strcmp(name, temp_oh->name)) {
  752. oh = temp_oh;
  753. break;
  754. }
  755. }
  756. return oh;
  757. }
  758. /**
  759. * _init_clocks - clk_get() all clocks associated with this hwmod
  760. * @oh: struct omap_hwmod *
  761. * @data: not used; pass NULL
  762. *
  763. * Called by omap_hwmod_late_init() (after omap2_clk_init()).
  764. * Resolves all clock names embedded in the hwmod. Returns -EINVAL if
  765. * the omap_hwmod has not yet been registered or if the clocks have
  766. * already been initialized, 0 on success, or a non-zero error on
  767. * failure.
  768. */
  769. static int _init_clocks(struct omap_hwmod *oh, void *data)
  770. {
  771. int ret = 0;
  772. if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
  773. return -EINVAL;
  774. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  775. ret |= _init_main_clk(oh);
  776. ret |= _init_interface_clks(oh);
  777. ret |= _init_opt_clks(oh);
  778. if (!ret)
  779. oh->_state = _HWMOD_STATE_CLKS_INITED;
  780. return 0;
  781. }
  782. /**
  783. * _wait_target_ready - wait for a module to leave slave idle
  784. * @oh: struct omap_hwmod *
  785. *
  786. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  787. * does not have an IDLEST bit or if the module successfully leaves
  788. * slave idle; otherwise, pass along the return value of the
  789. * appropriate *_cm_wait_module_ready() function.
  790. */
  791. static int _wait_target_ready(struct omap_hwmod *oh)
  792. {
  793. struct omap_hwmod_ocp_if *os;
  794. int ret;
  795. if (!oh)
  796. return -EINVAL;
  797. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  798. return 0;
  799. os = oh->slaves[oh->_mpu_port_index];
  800. if (oh->flags & HWMOD_NO_IDLEST)
  801. return 0;
  802. /* XXX check module SIDLEMODE */
  803. /* XXX check clock enable states */
  804. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  805. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  806. oh->prcm.omap2.idlest_reg_id,
  807. oh->prcm.omap2.idlest_idle_bit);
  808. } else if (cpu_is_omap44xx()) {
  809. ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
  810. } else {
  811. BUG();
  812. };
  813. return ret;
  814. }
  815. /**
  816. * _lookup_hardreset - return the register bit shift for this hwmod/reset line
  817. * @oh: struct omap_hwmod *
  818. * @name: name of the reset line in the context of this hwmod
  819. *
  820. * Return the bit position of the reset line that match the
  821. * input name. Return -ENOENT if not found.
  822. */
  823. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
  824. {
  825. int i;
  826. for (i = 0; i < oh->rst_lines_cnt; i++) {
  827. const char *rst_line = oh->rst_lines[i].name;
  828. if (!strcmp(rst_line, name)) {
  829. u8 shift = oh->rst_lines[i].rst_shift;
  830. pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
  831. oh->name, rst_line, shift);
  832. return shift;
  833. }
  834. }
  835. return -ENOENT;
  836. }
  837. /**
  838. * _assert_hardreset - assert the HW reset line of submodules
  839. * contained in the hwmod module.
  840. * @oh: struct omap_hwmod *
  841. * @name: name of the reset line to lookup and assert
  842. *
  843. * Some IP like dsp, ipu or iva contain processor that require
  844. * an HW reset line to be assert / deassert in order to enable fully
  845. * the IP.
  846. */
  847. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  848. {
  849. u8 shift;
  850. if (!oh)
  851. return -EINVAL;
  852. shift = _lookup_hardreset(oh, name);
  853. if (IS_ERR_VALUE(shift))
  854. return shift;
  855. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  856. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  857. shift);
  858. else if (cpu_is_omap44xx())
  859. return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
  860. shift);
  861. else
  862. return -EINVAL;
  863. }
  864. /**
  865. * _deassert_hardreset - deassert the HW reset line of submodules contained
  866. * in the hwmod module.
  867. * @oh: struct omap_hwmod *
  868. * @name: name of the reset line to look up and deassert
  869. *
  870. * Some IP like dsp, ipu or iva contain processor that require
  871. * an HW reset line to be assert / deassert in order to enable fully
  872. * the IP.
  873. */
  874. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  875. {
  876. u8 shift;
  877. int r;
  878. if (!oh)
  879. return -EINVAL;
  880. shift = _lookup_hardreset(oh, name);
  881. if (IS_ERR_VALUE(shift))
  882. return shift;
  883. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  884. r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  885. shift);
  886. else if (cpu_is_omap44xx())
  887. r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
  888. shift);
  889. else
  890. return -EINVAL;
  891. if (r == -EBUSY)
  892. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  893. return r;
  894. }
  895. /**
  896. * _read_hardreset - read the HW reset line state of submodules
  897. * contained in the hwmod module
  898. * @oh: struct omap_hwmod *
  899. * @name: name of the reset line to look up and read
  900. *
  901. * Return the state of the reset line.
  902. */
  903. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  904. {
  905. u8 shift;
  906. if (!oh)
  907. return -EINVAL;
  908. shift = _lookup_hardreset(oh, name);
  909. if (IS_ERR_VALUE(shift))
  910. return shift;
  911. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  912. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  913. shift);
  914. } else if (cpu_is_omap44xx()) {
  915. return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
  916. shift);
  917. } else {
  918. return -EINVAL;
  919. }
  920. }
  921. /**
  922. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  923. * @oh: struct omap_hwmod *
  924. *
  925. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  926. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  927. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  928. * the module did not reset in time, or 0 upon success.
  929. *
  930. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  931. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  932. * use the SYSCONFIG softreset bit to provide the status.
  933. *
  934. * Note that some IP like McBSP do have reset control but don't have
  935. * reset status.
  936. */
  937. static int _ocp_softreset(struct omap_hwmod *oh)
  938. {
  939. u32 v;
  940. int c = 0;
  941. int ret = 0;
  942. if (!oh->class->sysc ||
  943. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  944. return -EINVAL;
  945. /* clocks must be on for this operation */
  946. if (oh->_state != _HWMOD_STATE_ENABLED) {
  947. pr_warning("omap_hwmod: %s: reset can only be entered from "
  948. "enabled state\n", oh->name);
  949. return -EINVAL;
  950. }
  951. /* For some modules, all optionnal clocks need to be enabled as well */
  952. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  953. _enable_optional_clocks(oh);
  954. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  955. v = oh->_sysc_cache;
  956. ret = _set_softreset(oh, &v);
  957. if (ret)
  958. goto dis_opt_clks;
  959. _write_sysconfig(v, oh);
  960. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  961. omap_test_timeout((omap_hwmod_read(oh,
  962. oh->class->sysc->syss_offs)
  963. & SYSS_RESETDONE_MASK),
  964. MAX_MODULE_SOFTRESET_WAIT, c);
  965. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  966. omap_test_timeout(!(omap_hwmod_read(oh,
  967. oh->class->sysc->sysc_offs)
  968. & SYSC_TYPE2_SOFTRESET_MASK),
  969. MAX_MODULE_SOFTRESET_WAIT, c);
  970. if (c == MAX_MODULE_SOFTRESET_WAIT)
  971. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  972. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  973. else
  974. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  975. /*
  976. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  977. * _wait_target_ready() or _reset()
  978. */
  979. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  980. dis_opt_clks:
  981. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  982. _disable_optional_clocks(oh);
  983. return ret;
  984. }
  985. /**
  986. * _reset - reset an omap_hwmod
  987. * @oh: struct omap_hwmod *
  988. *
  989. * Resets an omap_hwmod @oh. The default software reset mechanism for
  990. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  991. * bit. However, some hwmods cannot be reset via this method: some
  992. * are not targets and therefore have no OCP header registers to
  993. * access; others (like the IVA) have idiosyncratic reset sequences.
  994. * So for these relatively rare cases, custom reset code can be
  995. * supplied in the struct omap_hwmod_class .reset function pointer.
  996. * Passes along the return value from either _reset() or the custom
  997. * reset function - these must return -EINVAL if the hwmod cannot be
  998. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  999. * the module did not reset in time, or 0 upon success.
  1000. */
  1001. static int _reset(struct omap_hwmod *oh)
  1002. {
  1003. int ret;
  1004. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1005. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1006. return ret;
  1007. }
  1008. /**
  1009. * _enable - enable an omap_hwmod
  1010. * @oh: struct omap_hwmod *
  1011. *
  1012. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1013. * register target. Returns -EINVAL if the hwmod is in the wrong
  1014. * state or passes along the return value of _wait_target_ready().
  1015. */
  1016. static int _enable(struct omap_hwmod *oh)
  1017. {
  1018. int r;
  1019. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1020. oh->_state != _HWMOD_STATE_IDLE &&
  1021. oh->_state != _HWMOD_STATE_DISABLED) {
  1022. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1023. "from initialized, idle, or disabled state\n", oh->name);
  1024. return -EINVAL;
  1025. }
  1026. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1027. /*
  1028. * If an IP contains only one HW reset line, then de-assert it in order
  1029. * to allow to enable the clocks. Otherwise the PRCM will return
  1030. * Intransition status, and the init will failed.
  1031. */
  1032. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1033. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1034. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1035. /* Mux pins for device runtime if populated */
  1036. if (oh->mux)
  1037. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1038. _add_initiator_dep(oh, mpu_oh);
  1039. _enable_clocks(oh);
  1040. r = _wait_target_ready(oh);
  1041. if (!r) {
  1042. oh->_state = _HWMOD_STATE_ENABLED;
  1043. /* Access the sysconfig only if the target is ready */
  1044. if (oh->class->sysc) {
  1045. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1046. _update_sysc_cache(oh);
  1047. _enable_sysc(oh);
  1048. }
  1049. } else {
  1050. _disable_clocks(oh);
  1051. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1052. oh->name, r);
  1053. }
  1054. return r;
  1055. }
  1056. /**
  1057. * _idle - idle an omap_hwmod
  1058. * @oh: struct omap_hwmod *
  1059. *
  1060. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1061. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1062. * state or returns 0.
  1063. */
  1064. static int _idle(struct omap_hwmod *oh)
  1065. {
  1066. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1067. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1068. "enabled state\n", oh->name);
  1069. return -EINVAL;
  1070. }
  1071. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1072. if (oh->class->sysc)
  1073. _idle_sysc(oh);
  1074. _del_initiator_dep(oh, mpu_oh);
  1075. _disable_clocks(oh);
  1076. /* Mux pins for device idle if populated */
  1077. if (oh->mux)
  1078. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1079. oh->_state = _HWMOD_STATE_IDLE;
  1080. return 0;
  1081. }
  1082. /**
  1083. * _shutdown - shutdown an omap_hwmod
  1084. * @oh: struct omap_hwmod *
  1085. *
  1086. * Shut down an omap_hwmod @oh. This should be called when the driver
  1087. * used for the hwmod is removed or unloaded or if the driver is not
  1088. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1089. * state or returns 0.
  1090. */
  1091. static int _shutdown(struct omap_hwmod *oh)
  1092. {
  1093. int ret;
  1094. u8 prev_state;
  1095. if (oh->_state != _HWMOD_STATE_IDLE &&
  1096. oh->_state != _HWMOD_STATE_ENABLED) {
  1097. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1098. "from idle, or enabled state\n", oh->name);
  1099. return -EINVAL;
  1100. }
  1101. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1102. if (oh->class->pre_shutdown) {
  1103. prev_state = oh->_state;
  1104. if (oh->_state == _HWMOD_STATE_IDLE)
  1105. _enable(oh);
  1106. ret = oh->class->pre_shutdown(oh);
  1107. if (ret) {
  1108. if (prev_state == _HWMOD_STATE_IDLE)
  1109. _idle(oh);
  1110. return ret;
  1111. }
  1112. }
  1113. if (oh->class->sysc)
  1114. _shutdown_sysc(oh);
  1115. /*
  1116. * If an IP contains only one HW reset line, then assert it
  1117. * before disabling the clocks and shutting down the IP.
  1118. */
  1119. if (oh->rst_lines_cnt == 1)
  1120. _assert_hardreset(oh, oh->rst_lines[0].name);
  1121. /* clocks and deps are already disabled in idle */
  1122. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1123. _del_initiator_dep(oh, mpu_oh);
  1124. /* XXX what about the other system initiators here? dma, dsp */
  1125. _disable_clocks(oh);
  1126. }
  1127. /* XXX Should this code also force-disable the optional clocks? */
  1128. /* Mux pins to safe mode or use populated off mode values */
  1129. if (oh->mux)
  1130. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1131. oh->_state = _HWMOD_STATE_DISABLED;
  1132. return 0;
  1133. }
  1134. /**
  1135. * _setup - do initial configuration of omap_hwmod
  1136. * @oh: struct omap_hwmod *
  1137. *
  1138. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1139. * OCP_SYSCONFIG register. Returns -EINVAL if the hwmod is in the
  1140. * wrong state or returns 0.
  1141. */
  1142. static int _setup(struct omap_hwmod *oh, void *data)
  1143. {
  1144. int i, r;
  1145. u8 postsetup_state;
  1146. /* Set iclk autoidle mode */
  1147. if (oh->slaves_cnt > 0) {
  1148. for (i = 0; i < oh->slaves_cnt; i++) {
  1149. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1150. struct clk *c = os->_clk;
  1151. if (!c)
  1152. continue;
  1153. if (os->flags & OCPIF_SWSUP_IDLE) {
  1154. /* XXX omap_iclk_deny_idle(c); */
  1155. } else {
  1156. /* XXX omap_iclk_allow_idle(c); */
  1157. clk_enable(c);
  1158. }
  1159. }
  1160. }
  1161. oh->_state = _HWMOD_STATE_INITIALIZED;
  1162. /*
  1163. * In the case of hwmod with hardreset that should not be
  1164. * de-assert at boot time, we have to keep the module
  1165. * initialized, because we cannot enable it properly with the
  1166. * reset asserted. Exit without warning because that behavior is
  1167. * expected.
  1168. */
  1169. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1170. return 0;
  1171. r = _enable(oh);
  1172. if (r) {
  1173. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1174. oh->name, oh->_state);
  1175. return 0;
  1176. }
  1177. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1178. _reset(oh);
  1179. /*
  1180. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1181. * The _enable() function should be split to
  1182. * avoid the rewrite of the OCP_SYSCONFIG register.
  1183. */
  1184. if (oh->class->sysc) {
  1185. _update_sysc_cache(oh);
  1186. _enable_sysc(oh);
  1187. }
  1188. }
  1189. postsetup_state = oh->_postsetup_state;
  1190. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1191. postsetup_state = _HWMOD_STATE_ENABLED;
  1192. /*
  1193. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1194. * it should be set by the core code as a runtime flag during startup
  1195. */
  1196. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1197. (postsetup_state == _HWMOD_STATE_IDLE))
  1198. postsetup_state = _HWMOD_STATE_ENABLED;
  1199. if (postsetup_state == _HWMOD_STATE_IDLE)
  1200. _idle(oh);
  1201. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1202. _shutdown(oh);
  1203. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1204. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1205. oh->name, postsetup_state);
  1206. return 0;
  1207. }
  1208. /**
  1209. * _register - register a struct omap_hwmod
  1210. * @oh: struct omap_hwmod *
  1211. *
  1212. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1213. * already has been registered by the same name; -EINVAL if the
  1214. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1215. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1216. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1217. * success.
  1218. *
  1219. * XXX The data should be copied into bootmem, so the original data
  1220. * should be marked __initdata and freed after init. This would allow
  1221. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1222. * that the copy process would be relatively complex due to the large number
  1223. * of substructures.
  1224. */
  1225. static int __init _register(struct omap_hwmod *oh)
  1226. {
  1227. int ret, ms_id;
  1228. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1229. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1230. return -EINVAL;
  1231. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1232. if (_lookup(oh->name))
  1233. return -EEXIST;
  1234. ms_id = _find_mpu_port_index(oh);
  1235. if (!IS_ERR_VALUE(ms_id)) {
  1236. oh->_mpu_port_index = ms_id;
  1237. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1238. } else {
  1239. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1240. }
  1241. list_add_tail(&oh->node, &omap_hwmod_list);
  1242. spin_lock_init(&oh->_lock);
  1243. oh->_state = _HWMOD_STATE_REGISTERED;
  1244. ret = 0;
  1245. return ret;
  1246. }
  1247. /* Public functions */
  1248. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1249. {
  1250. if (oh->flags & HWMOD_16BIT_REG)
  1251. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1252. else
  1253. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1254. }
  1255. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1256. {
  1257. if (oh->flags & HWMOD_16BIT_REG)
  1258. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1259. else
  1260. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1261. }
  1262. /**
  1263. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1264. * @oh: struct omap_hwmod *
  1265. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1266. *
  1267. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1268. * local copy. Intended to be used by drivers that have some erratum
  1269. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1270. * -EINVAL if @oh is null, or passes along the return value from
  1271. * _set_slave_idlemode().
  1272. *
  1273. * XXX Does this function have any current users? If not, we should
  1274. * remove it; it is better to let the rest of the hwmod code handle this.
  1275. * Any users of this function should be scrutinized carefully.
  1276. */
  1277. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1278. {
  1279. u32 v;
  1280. int retval = 0;
  1281. if (!oh)
  1282. return -EINVAL;
  1283. v = oh->_sysc_cache;
  1284. retval = _set_slave_idlemode(oh, idlemode, &v);
  1285. if (!retval)
  1286. _write_sysconfig(v, oh);
  1287. return retval;
  1288. }
  1289. /**
  1290. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1291. * @name: name of the omap_hwmod to look up
  1292. *
  1293. * Given a @name of an omap_hwmod, return a pointer to the registered
  1294. * struct omap_hwmod *, or NULL upon error.
  1295. */
  1296. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1297. {
  1298. struct omap_hwmod *oh;
  1299. if (!name)
  1300. return NULL;
  1301. oh = _lookup(name);
  1302. return oh;
  1303. }
  1304. /**
  1305. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1306. * @fn: pointer to a callback function
  1307. * @data: void * data to pass to callback function
  1308. *
  1309. * Call @fn for each registered omap_hwmod, passing @data to each
  1310. * function. @fn must return 0 for success or any other value for
  1311. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1312. * will stop and the non-zero return value will be passed to the
  1313. * caller of omap_hwmod_for_each(). @fn is called with
  1314. * omap_hwmod_for_each() held.
  1315. */
  1316. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1317. void *data)
  1318. {
  1319. struct omap_hwmod *temp_oh;
  1320. int ret;
  1321. if (!fn)
  1322. return -EINVAL;
  1323. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1324. ret = (*fn)(temp_oh, data);
  1325. if (ret)
  1326. break;
  1327. }
  1328. return ret;
  1329. }
  1330. /**
  1331. * omap_hwmod_init - init omap_hwmod code and register hwmods
  1332. * @ohs: pointer to an array of omap_hwmods to register
  1333. *
  1334. * Intended to be called early in boot before the clock framework is
  1335. * initialized. If @ohs is not null, will register all omap_hwmods
  1336. * listed in @ohs that are valid for this chip. Returns -EINVAL if
  1337. * omap_hwmod_init() has already been called or 0 otherwise.
  1338. */
  1339. int __init omap_hwmod_init(struct omap_hwmod **ohs)
  1340. {
  1341. struct omap_hwmod *oh;
  1342. int r;
  1343. if (inited)
  1344. return -EINVAL;
  1345. inited = 1;
  1346. if (!ohs)
  1347. return 0;
  1348. oh = *ohs;
  1349. while (oh) {
  1350. if (omap_chip_is(oh->omap_chip)) {
  1351. r = _register(oh);
  1352. WARN(r, "omap_hwmod: %s: _register returned "
  1353. "%d\n", oh->name, r);
  1354. }
  1355. oh = *++ohs;
  1356. }
  1357. return 0;
  1358. }
  1359. /**
  1360. * omap_hwmod_late_init - do some post-clock framework initialization
  1361. *
  1362. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1363. * to struct clk pointers for each registered omap_hwmod. Also calls
  1364. * _setup() on each hwmod. Returns 0.
  1365. */
  1366. int omap_hwmod_late_init(void)
  1367. {
  1368. int r;
  1369. /* XXX check return value */
  1370. r = omap_hwmod_for_each(_init_clocks, NULL);
  1371. WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
  1372. mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
  1373. WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
  1374. MPU_INITIATOR_NAME);
  1375. omap_hwmod_for_each(_setup, NULL);
  1376. return 0;
  1377. }
  1378. /**
  1379. * omap_hwmod_enable - enable an omap_hwmod
  1380. * @oh: struct omap_hwmod *
  1381. *
  1382. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1383. * Returns -EINVAL on error or passes along the return value from _enable().
  1384. */
  1385. int omap_hwmod_enable(struct omap_hwmod *oh)
  1386. {
  1387. int r;
  1388. unsigned long flags;
  1389. if (!oh)
  1390. return -EINVAL;
  1391. spin_lock_irqsave(&oh->_lock, flags);
  1392. r = _enable(oh);
  1393. spin_unlock_irqrestore(&oh->_lock, flags);
  1394. return r;
  1395. }
  1396. /**
  1397. * omap_hwmod_idle - idle an omap_hwmod
  1398. * @oh: struct omap_hwmod *
  1399. *
  1400. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1401. * Returns -EINVAL on error or passes along the return value from _idle().
  1402. */
  1403. int omap_hwmod_idle(struct omap_hwmod *oh)
  1404. {
  1405. unsigned long flags;
  1406. if (!oh)
  1407. return -EINVAL;
  1408. spin_lock_irqsave(&oh->_lock, flags);
  1409. _idle(oh);
  1410. spin_unlock_irqrestore(&oh->_lock, flags);
  1411. return 0;
  1412. }
  1413. /**
  1414. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1415. * @oh: struct omap_hwmod *
  1416. *
  1417. * Shutdown an omap_hwmod @oh. Intended to be called by
  1418. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1419. * the return value from _shutdown().
  1420. */
  1421. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1422. {
  1423. unsigned long flags;
  1424. if (!oh)
  1425. return -EINVAL;
  1426. spin_lock_irqsave(&oh->_lock, flags);
  1427. _shutdown(oh);
  1428. spin_unlock_irqrestore(&oh->_lock, flags);
  1429. return 0;
  1430. }
  1431. /**
  1432. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1433. * @oh: struct omap_hwmod *oh
  1434. *
  1435. * Intended to be called by the omap_device code.
  1436. */
  1437. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1438. {
  1439. unsigned long flags;
  1440. spin_lock_irqsave(&oh->_lock, flags);
  1441. _enable_clocks(oh);
  1442. spin_unlock_irqrestore(&oh->_lock, flags);
  1443. return 0;
  1444. }
  1445. /**
  1446. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1447. * @oh: struct omap_hwmod *oh
  1448. *
  1449. * Intended to be called by the omap_device code.
  1450. */
  1451. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1452. {
  1453. unsigned long flags;
  1454. spin_lock_irqsave(&oh->_lock, flags);
  1455. _disable_clocks(oh);
  1456. spin_unlock_irqrestore(&oh->_lock, flags);
  1457. return 0;
  1458. }
  1459. /**
  1460. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1461. * @oh: struct omap_hwmod *oh
  1462. *
  1463. * Intended to be called by drivers and core code when all posted
  1464. * writes to a device must complete before continuing further
  1465. * execution (for example, after clearing some device IRQSTATUS
  1466. * register bits)
  1467. *
  1468. * XXX what about targets with multiple OCP threads?
  1469. */
  1470. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1471. {
  1472. BUG_ON(!oh);
  1473. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1474. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1475. "device configuration\n", oh->name);
  1476. return;
  1477. }
  1478. /*
  1479. * Forces posted writes to complete on the OCP thread handling
  1480. * register writes
  1481. */
  1482. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1483. }
  1484. /**
  1485. * omap_hwmod_reset - reset the hwmod
  1486. * @oh: struct omap_hwmod *
  1487. *
  1488. * Under some conditions, a driver may wish to reset the entire device.
  1489. * Called from omap_device code. Returns -EINVAL on error or passes along
  1490. * the return value from _reset().
  1491. */
  1492. int omap_hwmod_reset(struct omap_hwmod *oh)
  1493. {
  1494. int r;
  1495. unsigned long flags;
  1496. if (!oh)
  1497. return -EINVAL;
  1498. spin_lock_irqsave(&oh->_lock, flags);
  1499. r = _reset(oh);
  1500. spin_unlock_irqrestore(&oh->_lock, flags);
  1501. return r;
  1502. }
  1503. /**
  1504. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1505. * @oh: struct omap_hwmod *
  1506. * @res: pointer to the first element of an array of struct resource to fill
  1507. *
  1508. * Count the number of struct resource array elements necessary to
  1509. * contain omap_hwmod @oh resources. Intended to be called by code
  1510. * that registers omap_devices. Intended to be used to determine the
  1511. * size of a dynamically-allocated struct resource array, before
  1512. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1513. * resource array elements needed.
  1514. *
  1515. * XXX This code is not optimized. It could attempt to merge adjacent
  1516. * resource IDs.
  1517. *
  1518. */
  1519. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1520. {
  1521. int ret, i;
  1522. ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
  1523. for (i = 0; i < oh->slaves_cnt; i++)
  1524. ret += oh->slaves[i]->addr_cnt;
  1525. return ret;
  1526. }
  1527. /**
  1528. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1529. * @oh: struct omap_hwmod *
  1530. * @res: pointer to the first element of an array of struct resource to fill
  1531. *
  1532. * Fill the struct resource array @res with resource data from the
  1533. * omap_hwmod @oh. Intended to be called by code that registers
  1534. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1535. * number of array elements filled.
  1536. */
  1537. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1538. {
  1539. int i, j;
  1540. int r = 0;
  1541. /* For each IRQ, DMA, memory area, fill in array.*/
  1542. for (i = 0; i < oh->mpu_irqs_cnt; i++) {
  1543. (res + r)->name = (oh->mpu_irqs + i)->name;
  1544. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1545. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1546. (res + r)->flags = IORESOURCE_IRQ;
  1547. r++;
  1548. }
  1549. for (i = 0; i < oh->sdma_reqs_cnt; i++) {
  1550. (res + r)->name = (oh->sdma_reqs + i)->name;
  1551. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1552. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1553. (res + r)->flags = IORESOURCE_DMA;
  1554. r++;
  1555. }
  1556. for (i = 0; i < oh->slaves_cnt; i++) {
  1557. struct omap_hwmod_ocp_if *os;
  1558. os = oh->slaves[i];
  1559. for (j = 0; j < os->addr_cnt; j++) {
  1560. (res + r)->start = (os->addr + j)->pa_start;
  1561. (res + r)->end = (os->addr + j)->pa_end;
  1562. (res + r)->flags = IORESOURCE_MEM;
  1563. r++;
  1564. }
  1565. }
  1566. return r;
  1567. }
  1568. /**
  1569. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1570. * @oh: struct omap_hwmod *
  1571. *
  1572. * Return the powerdomain pointer associated with the OMAP module
  1573. * @oh's main clock. If @oh does not have a main clk, return the
  1574. * powerdomain associated with the interface clock associated with the
  1575. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1576. * instead?) Returns NULL on error, or a struct powerdomain * on
  1577. * success.
  1578. */
  1579. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1580. {
  1581. struct clk *c;
  1582. if (!oh)
  1583. return NULL;
  1584. if (oh->_clk) {
  1585. c = oh->_clk;
  1586. } else {
  1587. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1588. return NULL;
  1589. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1590. }
  1591. if (!c->clkdm)
  1592. return NULL;
  1593. return c->clkdm->pwrdm.ptr;
  1594. }
  1595. /**
  1596. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1597. * @oh: struct omap_hwmod *
  1598. *
  1599. * Returns the virtual address corresponding to the beginning of the
  1600. * module's register target, in the address range that is intended to
  1601. * be used by the MPU. Returns the virtual address upon success or NULL
  1602. * upon error.
  1603. */
  1604. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1605. {
  1606. if (!oh)
  1607. return NULL;
  1608. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1609. return NULL;
  1610. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1611. return NULL;
  1612. return oh->_mpu_rt_va;
  1613. }
  1614. /**
  1615. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1616. * @oh: struct omap_hwmod *
  1617. * @init_oh: struct omap_hwmod * (initiator)
  1618. *
  1619. * Add a sleep dependency between the initiator @init_oh and @oh.
  1620. * Intended to be called by DSP/Bridge code via platform_data for the
  1621. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1622. * code needs to add/del initiator dependencies dynamically
  1623. * before/after accessing a device. Returns the return value from
  1624. * _add_initiator_dep().
  1625. *
  1626. * XXX Keep a usecount in the clockdomain code
  1627. */
  1628. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1629. struct omap_hwmod *init_oh)
  1630. {
  1631. return _add_initiator_dep(oh, init_oh);
  1632. }
  1633. /*
  1634. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1635. * for context save/restore operations?
  1636. */
  1637. /**
  1638. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1639. * @oh: struct omap_hwmod *
  1640. * @init_oh: struct omap_hwmod * (initiator)
  1641. *
  1642. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1643. * Intended to be called by DSP/Bridge code via platform_data for the
  1644. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1645. * code needs to add/del initiator dependencies dynamically
  1646. * before/after accessing a device. Returns the return value from
  1647. * _del_initiator_dep().
  1648. *
  1649. * XXX Keep a usecount in the clockdomain code
  1650. */
  1651. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1652. struct omap_hwmod *init_oh)
  1653. {
  1654. return _del_initiator_dep(oh, init_oh);
  1655. }
  1656. /**
  1657. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1658. * @oh: struct omap_hwmod *
  1659. *
  1660. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1661. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1662. * registers to cause the PRCM to receive wakeup events from the
  1663. * module. Does not set any wakeup routing registers beyond this
  1664. * point - if the module is to wake up any other module or subsystem,
  1665. * that must be set separately. Called by omap_device code. Returns
  1666. * -EINVAL on error or 0 upon success.
  1667. */
  1668. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1669. {
  1670. unsigned long flags;
  1671. u32 v;
  1672. if (!oh->class->sysc ||
  1673. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1674. return -EINVAL;
  1675. spin_lock_irqsave(&oh->_lock, flags);
  1676. v = oh->_sysc_cache;
  1677. _enable_wakeup(oh, &v);
  1678. _write_sysconfig(v, oh);
  1679. spin_unlock_irqrestore(&oh->_lock, flags);
  1680. return 0;
  1681. }
  1682. /**
  1683. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1684. * @oh: struct omap_hwmod *
  1685. *
  1686. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1687. * from sending wakeups to the PRCM. Eventually this should clear
  1688. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1689. * from the module. Does not set any wakeup routing registers beyond
  1690. * this point - if the module is to wake up any other module or
  1691. * subsystem, that must be set separately. Called by omap_device
  1692. * code. Returns -EINVAL on error or 0 upon success.
  1693. */
  1694. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1695. {
  1696. unsigned long flags;
  1697. u32 v;
  1698. if (!oh->class->sysc ||
  1699. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1700. return -EINVAL;
  1701. spin_lock_irqsave(&oh->_lock, flags);
  1702. v = oh->_sysc_cache;
  1703. _disable_wakeup(oh, &v);
  1704. _write_sysconfig(v, oh);
  1705. spin_unlock_irqrestore(&oh->_lock, flags);
  1706. return 0;
  1707. }
  1708. /**
  1709. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1710. * contained in the hwmod module.
  1711. * @oh: struct omap_hwmod *
  1712. * @name: name of the reset line to lookup and assert
  1713. *
  1714. * Some IP like dsp, ipu or iva contain processor that require
  1715. * an HW reset line to be assert / deassert in order to enable fully
  1716. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1717. * yet supported on this OMAP; otherwise, passes along the return value
  1718. * from _assert_hardreset().
  1719. */
  1720. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  1721. {
  1722. int ret;
  1723. unsigned long flags;
  1724. if (!oh)
  1725. return -EINVAL;
  1726. spin_lock_irqsave(&oh->_lock, flags);
  1727. ret = _assert_hardreset(oh, name);
  1728. spin_unlock_irqrestore(&oh->_lock, flags);
  1729. return ret;
  1730. }
  1731. /**
  1732. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  1733. * contained in the hwmod module.
  1734. * @oh: struct omap_hwmod *
  1735. * @name: name of the reset line to look up and deassert
  1736. *
  1737. * Some IP like dsp, ipu or iva contain processor that require
  1738. * an HW reset line to be assert / deassert in order to enable fully
  1739. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1740. * yet supported on this OMAP; otherwise, passes along the return value
  1741. * from _deassert_hardreset().
  1742. */
  1743. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1744. {
  1745. int ret;
  1746. unsigned long flags;
  1747. if (!oh)
  1748. return -EINVAL;
  1749. spin_lock_irqsave(&oh->_lock, flags);
  1750. ret = _deassert_hardreset(oh, name);
  1751. spin_unlock_irqrestore(&oh->_lock, flags);
  1752. return ret;
  1753. }
  1754. /**
  1755. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  1756. * contained in the hwmod module
  1757. * @oh: struct omap_hwmod *
  1758. * @name: name of the reset line to look up and read
  1759. *
  1760. * Return the current state of the hwmod @oh's reset line named @name:
  1761. * returns -EINVAL upon parameter error or if this operation
  1762. * is unsupported on the current OMAP; otherwise, passes along the return
  1763. * value from _read_hardreset().
  1764. */
  1765. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  1766. {
  1767. int ret;
  1768. unsigned long flags;
  1769. if (!oh)
  1770. return -EINVAL;
  1771. spin_lock_irqsave(&oh->_lock, flags);
  1772. ret = _read_hardreset(oh, name);
  1773. spin_unlock_irqrestore(&oh->_lock, flags);
  1774. return ret;
  1775. }
  1776. /**
  1777. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  1778. * @classname: struct omap_hwmod_class name to search for
  1779. * @fn: callback function pointer to call for each hwmod in class @classname
  1780. * @user: arbitrary context data to pass to the callback function
  1781. *
  1782. * For each omap_hwmod of class @classname, call @fn.
  1783. * If the callback function returns something other than
  1784. * zero, the iterator is terminated, and the callback function's return
  1785. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  1786. * if @classname or @fn are NULL, or passes back the error code from @fn.
  1787. */
  1788. int omap_hwmod_for_each_by_class(const char *classname,
  1789. int (*fn)(struct omap_hwmod *oh,
  1790. void *user),
  1791. void *user)
  1792. {
  1793. struct omap_hwmod *temp_oh;
  1794. int ret = 0;
  1795. if (!classname || !fn)
  1796. return -EINVAL;
  1797. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  1798. __func__, classname);
  1799. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1800. if (!strcmp(temp_oh->class->name, classname)) {
  1801. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  1802. __func__, temp_oh->name);
  1803. ret = (*fn)(temp_oh, user);
  1804. if (ret)
  1805. break;
  1806. }
  1807. }
  1808. if (ret)
  1809. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  1810. __func__, ret);
  1811. return ret;
  1812. }
  1813. /**
  1814. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  1815. * @oh: struct omap_hwmod *
  1816. * @state: state that _setup() should leave the hwmod in
  1817. *
  1818. * Sets the hwmod state that @oh will enter at the end of _setup() (called by
  1819. * omap_hwmod_late_init()). Only valid to call between calls to
  1820. * omap_hwmod_init() and omap_hwmod_late_init(). Returns 0 upon success or
  1821. * -EINVAL if there is a problem with the arguments or if the hwmod is
  1822. * in the wrong state.
  1823. */
  1824. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  1825. {
  1826. int ret;
  1827. unsigned long flags;
  1828. if (!oh)
  1829. return -EINVAL;
  1830. if (state != _HWMOD_STATE_DISABLED &&
  1831. state != _HWMOD_STATE_ENABLED &&
  1832. state != _HWMOD_STATE_IDLE)
  1833. return -EINVAL;
  1834. spin_lock_irqsave(&oh->_lock, flags);
  1835. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  1836. ret = -EINVAL;
  1837. goto ohsps_unlock;
  1838. }
  1839. oh->_postsetup_state = state;
  1840. ret = 0;
  1841. ohsps_unlock:
  1842. spin_unlock_irqrestore(&oh->_lock, flags);
  1843. return ret;
  1844. }
  1845. /**
  1846. * omap_hwmod_get_context_loss_count - get lost context count
  1847. * @oh: struct omap_hwmod *
  1848. *
  1849. * Query the powerdomain of of @oh to get the context loss
  1850. * count for this device.
  1851. *
  1852. * Returns the context loss count of the powerdomain assocated with @oh
  1853. * upon success, or zero if no powerdomain exists for @oh.
  1854. */
  1855. u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  1856. {
  1857. struct powerdomain *pwrdm;
  1858. int ret = 0;
  1859. pwrdm = omap_hwmod_get_pwrdm(oh);
  1860. if (pwrdm)
  1861. ret = pwrdm_get_context_loss_count(pwrdm);
  1862. return ret;
  1863. }