recov_ssse3.c 9.1 KB

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  1. /*
  2. * Copyright (C) 2012 Intel Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation; version 2
  7. * of the License.
  8. */
  9. #include <linux/raid/pq.h>
  10. #include "x86.h"
  11. static int raid6_has_ssse3(void)
  12. {
  13. return boot_cpu_has(X86_FEATURE_XMM) &&
  14. boot_cpu_has(X86_FEATURE_XMM2) &&
  15. boot_cpu_has(X86_FEATURE_SSSE3);
  16. }
  17. static void raid6_2data_recov_ssse3(int disks, size_t bytes, int faila,
  18. int failb, void **ptrs)
  19. {
  20. u8 *p, *q, *dp, *dq;
  21. const u8 *pbmul; /* P multiplier table for B data */
  22. const u8 *qmul; /* Q multiplier table (for both) */
  23. static const u8 __aligned(16) x0f[16] = {
  24. 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
  25. 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f};
  26. p = (u8 *)ptrs[disks-2];
  27. q = (u8 *)ptrs[disks-1];
  28. /* Compute syndrome with zero for the missing data pages
  29. Use the dead data pages as temporary storage for
  30. delta p and delta q */
  31. dp = (u8 *)ptrs[faila];
  32. ptrs[faila] = (void *)raid6_empty_zero_page;
  33. ptrs[disks-2] = dp;
  34. dq = (u8 *)ptrs[failb];
  35. ptrs[failb] = (void *)raid6_empty_zero_page;
  36. ptrs[disks-1] = dq;
  37. raid6_call.gen_syndrome(disks, bytes, ptrs);
  38. /* Restore pointer table */
  39. ptrs[faila] = dp;
  40. ptrs[failb] = dq;
  41. ptrs[disks-2] = p;
  42. ptrs[disks-1] = q;
  43. /* Now, pick the proper data tables */
  44. pbmul = raid6_vgfmul[raid6_gfexi[failb-faila]];
  45. qmul = raid6_vgfmul[raid6_gfinv[raid6_gfexp[faila] ^
  46. raid6_gfexp[failb]]];
  47. kernel_fpu_begin();
  48. asm volatile("movdqa %0,%%xmm7" : : "m" (x0f[0]));
  49. #ifdef CONFIG_X86_64
  50. asm volatile("movdqa %0,%%xmm6" : : "m" (qmul[0]));
  51. asm volatile("movdqa %0,%%xmm14" : : "m" (pbmul[0]));
  52. asm volatile("movdqa %0,%%xmm15" : : "m" (pbmul[16]));
  53. #endif
  54. /* Now do it... */
  55. while (bytes) {
  56. #ifdef CONFIG_X86_64
  57. /* xmm6, xmm14, xmm15 */
  58. asm volatile("movdqa %0,%%xmm1" : : "m" (q[0]));
  59. asm volatile("movdqa %0,%%xmm9" : : "m" (q[16]));
  60. asm volatile("movdqa %0,%%xmm0" : : "m" (p[0]));
  61. asm volatile("movdqa %0,%%xmm8" : : "m" (p[16]));
  62. asm volatile("pxor %0,%%xmm1" : : "m" (dq[0]));
  63. asm volatile("pxor %0,%%xmm9" : : "m" (dq[16]));
  64. asm volatile("pxor %0,%%xmm0" : : "m" (dp[0]));
  65. asm volatile("pxor %0,%%xmm8" : : "m" (dp[16]));
  66. /* xmm0/8 = px */
  67. asm volatile("movdqa %xmm6,%xmm4");
  68. asm volatile("movdqa %0,%%xmm5" : : "m" (qmul[16]));
  69. asm volatile("movdqa %xmm6,%xmm12");
  70. asm volatile("movdqa %xmm5,%xmm13");
  71. asm volatile("movdqa %xmm1,%xmm3");
  72. asm volatile("movdqa %xmm9,%xmm11");
  73. asm volatile("movdqa %xmm0,%xmm2"); /* xmm2/10 = px */
  74. asm volatile("movdqa %xmm8,%xmm10");
  75. asm volatile("psraw $4,%xmm1");
  76. asm volatile("psraw $4,%xmm9");
  77. asm volatile("pand %xmm7,%xmm3");
  78. asm volatile("pand %xmm7,%xmm11");
  79. asm volatile("pand %xmm7,%xmm1");
  80. asm volatile("pand %xmm7,%xmm9");
  81. asm volatile("pshufb %xmm3,%xmm4");
  82. asm volatile("pshufb %xmm11,%xmm12");
  83. asm volatile("pshufb %xmm1,%xmm5");
  84. asm volatile("pshufb %xmm9,%xmm13");
  85. asm volatile("pxor %xmm4,%xmm5");
  86. asm volatile("pxor %xmm12,%xmm13");
  87. /* xmm5/13 = qx */
  88. asm volatile("movdqa %xmm14,%xmm4");
  89. asm volatile("movdqa %xmm15,%xmm1");
  90. asm volatile("movdqa %xmm14,%xmm12");
  91. asm volatile("movdqa %xmm15,%xmm9");
  92. asm volatile("movdqa %xmm2,%xmm3");
  93. asm volatile("movdqa %xmm10,%xmm11");
  94. asm volatile("psraw $4,%xmm2");
  95. asm volatile("psraw $4,%xmm10");
  96. asm volatile("pand %xmm7,%xmm3");
  97. asm volatile("pand %xmm7,%xmm11");
  98. asm volatile("pand %xmm7,%xmm2");
  99. asm volatile("pand %xmm7,%xmm10");
  100. asm volatile("pshufb %xmm3,%xmm4");
  101. asm volatile("pshufb %xmm11,%xmm12");
  102. asm volatile("pshufb %xmm2,%xmm1");
  103. asm volatile("pshufb %xmm10,%xmm9");
  104. asm volatile("pxor %xmm4,%xmm1");
  105. asm volatile("pxor %xmm12,%xmm9");
  106. /* xmm1/9 = pbmul[px] */
  107. asm volatile("pxor %xmm5,%xmm1");
  108. asm volatile("pxor %xmm13,%xmm9");
  109. /* xmm1/9 = db = DQ */
  110. asm volatile("movdqa %%xmm1,%0" : "=m" (dq[0]));
  111. asm volatile("movdqa %%xmm9,%0" : "=m" (dq[16]));
  112. asm volatile("pxor %xmm1,%xmm0");
  113. asm volatile("pxor %xmm9,%xmm8");
  114. asm volatile("movdqa %%xmm0,%0" : "=m" (dp[0]));
  115. asm volatile("movdqa %%xmm8,%0" : "=m" (dp[16]));
  116. bytes -= 32;
  117. p += 32;
  118. q += 32;
  119. dp += 32;
  120. dq += 32;
  121. #else
  122. asm volatile("movdqa %0,%%xmm1" : : "m" (*q));
  123. asm volatile("movdqa %0,%%xmm0" : : "m" (*p));
  124. asm volatile("pxor %0,%%xmm1" : : "m" (*dq));
  125. asm volatile("pxor %0,%%xmm0" : : "m" (*dp));
  126. /* 1 = dq ^ q
  127. * 0 = dp ^ p
  128. */
  129. asm volatile("movdqa %0,%%xmm4" : : "m" (qmul[0]));
  130. asm volatile("movdqa %0,%%xmm5" : : "m" (qmul[16]));
  131. asm volatile("movdqa %xmm1,%xmm3");
  132. asm volatile("psraw $4,%xmm1");
  133. asm volatile("pand %xmm7,%xmm3");
  134. asm volatile("pand %xmm7,%xmm1");
  135. asm volatile("pshufb %xmm3,%xmm4");
  136. asm volatile("pshufb %xmm1,%xmm5");
  137. asm volatile("pxor %xmm4,%xmm5");
  138. asm volatile("movdqa %xmm0,%xmm2"); /* xmm2 = px */
  139. /* xmm5 = qx */
  140. asm volatile("movdqa %0,%%xmm4" : : "m" (pbmul[0]));
  141. asm volatile("movdqa %0,%%xmm1" : : "m" (pbmul[16]));
  142. asm volatile("movdqa %xmm2,%xmm3");
  143. asm volatile("psraw $4,%xmm2");
  144. asm volatile("pand %xmm7,%xmm3");
  145. asm volatile("pand %xmm7,%xmm2");
  146. asm volatile("pshufb %xmm3,%xmm4");
  147. asm volatile("pshufb %xmm2,%xmm1");
  148. asm volatile("pxor %xmm4,%xmm1");
  149. /* xmm1 = pbmul[px] */
  150. asm volatile("pxor %xmm5,%xmm1");
  151. /* xmm1 = db = DQ */
  152. asm volatile("movdqa %%xmm1,%0" : "=m" (*dq));
  153. asm volatile("pxor %xmm1,%xmm0");
  154. asm volatile("movdqa %%xmm0,%0" : "=m" (*dp));
  155. bytes -= 16;
  156. p += 16;
  157. q += 16;
  158. dp += 16;
  159. dq += 16;
  160. #endif
  161. }
  162. kernel_fpu_end();
  163. }
  164. static void raid6_datap_recov_ssse3(int disks, size_t bytes, int faila,
  165. void **ptrs)
  166. {
  167. u8 *p, *q, *dq;
  168. const u8 *qmul; /* Q multiplier table */
  169. static const u8 __aligned(16) x0f[16] = {
  170. 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
  171. 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f};
  172. p = (u8 *)ptrs[disks-2];
  173. q = (u8 *)ptrs[disks-1];
  174. /* Compute syndrome with zero for the missing data page
  175. Use the dead data page as temporary storage for delta q */
  176. dq = (u8 *)ptrs[faila];
  177. ptrs[faila] = (void *)raid6_empty_zero_page;
  178. ptrs[disks-1] = dq;
  179. raid6_call.gen_syndrome(disks, bytes, ptrs);
  180. /* Restore pointer table */
  181. ptrs[faila] = dq;
  182. ptrs[disks-1] = q;
  183. /* Now, pick the proper data tables */
  184. qmul = raid6_vgfmul[raid6_gfinv[raid6_gfexp[faila]]];
  185. kernel_fpu_begin();
  186. asm volatile("movdqa %0, %%xmm7" : : "m" (x0f[0]));
  187. while (bytes) {
  188. #ifdef CONFIG_X86_64
  189. asm volatile("movdqa %0, %%xmm3" : : "m" (dq[0]));
  190. asm volatile("movdqa %0, %%xmm4" : : "m" (dq[16]));
  191. asm volatile("pxor %0, %%xmm3" : : "m" (q[0]));
  192. asm volatile("movdqa %0, %%xmm0" : : "m" (qmul[0]));
  193. /* xmm3 = q[0] ^ dq[0] */
  194. asm volatile("pxor %0, %%xmm4" : : "m" (q[16]));
  195. asm volatile("movdqa %0, %%xmm1" : : "m" (qmul[16]));
  196. /* xmm4 = q[16] ^ dq[16] */
  197. asm volatile("movdqa %xmm3, %xmm6");
  198. asm volatile("movdqa %xmm4, %xmm8");
  199. /* xmm4 = xmm8 = q[16] ^ dq[16] */
  200. asm volatile("psraw $4, %xmm3");
  201. asm volatile("pand %xmm7, %xmm6");
  202. asm volatile("pand %xmm7, %xmm3");
  203. asm volatile("pshufb %xmm6, %xmm0");
  204. asm volatile("pshufb %xmm3, %xmm1");
  205. asm volatile("movdqa %0, %%xmm10" : : "m" (qmul[0]));
  206. asm volatile("pxor %xmm0, %xmm1");
  207. asm volatile("movdqa %0, %%xmm11" : : "m" (qmul[16]));
  208. /* xmm1 = qmul[q[0] ^ dq[0]] */
  209. asm volatile("psraw $4, %xmm4");
  210. asm volatile("pand %xmm7, %xmm8");
  211. asm volatile("pand %xmm7, %xmm4");
  212. asm volatile("pshufb %xmm8, %xmm10");
  213. asm volatile("pshufb %xmm4, %xmm11");
  214. asm volatile("movdqa %0, %%xmm2" : : "m" (p[0]));
  215. asm volatile("pxor %xmm10, %xmm11");
  216. asm volatile("movdqa %0, %%xmm12" : : "m" (p[16]));
  217. /* xmm11 = qmul[q[16] ^ dq[16]] */
  218. asm volatile("pxor %xmm1, %xmm2");
  219. /* xmm2 = p[0] ^ qmul[q[0] ^ dq[0]] */
  220. asm volatile("pxor %xmm11, %xmm12");
  221. /* xmm12 = p[16] ^ qmul[q[16] ^ dq[16]] */
  222. asm volatile("movdqa %%xmm1, %0" : "=m" (dq[0]));
  223. asm volatile("movdqa %%xmm11, %0" : "=m" (dq[16]));
  224. asm volatile("movdqa %%xmm2, %0" : "=m" (p[0]));
  225. asm volatile("movdqa %%xmm12, %0" : "=m" (p[16]));
  226. bytes -= 32;
  227. p += 32;
  228. q += 32;
  229. dq += 32;
  230. #else
  231. asm volatile("movdqa %0, %%xmm3" : : "m" (dq[0]));
  232. asm volatile("movdqa %0, %%xmm0" : : "m" (qmul[0]));
  233. asm volatile("pxor %0, %%xmm3" : : "m" (q[0]));
  234. asm volatile("movdqa %0, %%xmm1" : : "m" (qmul[16]));
  235. /* xmm3 = *q ^ *dq */
  236. asm volatile("movdqa %xmm3, %xmm6");
  237. asm volatile("movdqa %0, %%xmm2" : : "m" (p[0]));
  238. asm volatile("psraw $4, %xmm3");
  239. asm volatile("pand %xmm7, %xmm6");
  240. asm volatile("pand %xmm7, %xmm3");
  241. asm volatile("pshufb %xmm6, %xmm0");
  242. asm volatile("pshufb %xmm3, %xmm1");
  243. asm volatile("pxor %xmm0, %xmm1");
  244. /* xmm1 = qmul[*q ^ *dq */
  245. asm volatile("pxor %xmm1, %xmm2");
  246. /* xmm2 = *p ^ qmul[*q ^ *dq] */
  247. asm volatile("movdqa %%xmm1, %0" : "=m" (dq[0]));
  248. asm volatile("movdqa %%xmm2, %0" : "=m" (p[0]));
  249. bytes -= 16;
  250. p += 16;
  251. q += 16;
  252. dq += 16;
  253. #endif
  254. }
  255. kernel_fpu_end();
  256. }
  257. const struct raid6_recov_calls raid6_recov_ssse3 = {
  258. .data2 = raid6_2data_recov_ssse3,
  259. .datap = raid6_datap_recov_ssse3,
  260. .valid = raid6_has_ssse3,
  261. #ifdef CONFIG_X86_64
  262. .name = "ssse3x2",
  263. #else
  264. .name = "ssse3x1",
  265. #endif
  266. .priority = 1,
  267. };