s5p_fimc.h 5.0 KB

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  1. /*
  2. * Samsung S5P/Exynos4 SoC series camera interface driver header
  3. *
  4. * Copyright (C) 2010 - 2013 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #ifndef S5P_FIMC_H_
  12. #define S5P_FIMC_H_
  13. #include <media/media-entity.h>
  14. #include <media/v4l2-mediabus.h>
  15. /*
  16. * Enumeration of data inputs to the camera subsystem.
  17. */
  18. enum fimc_input {
  19. FIMC_INPUT_PARALLEL_0 = 1,
  20. FIMC_INPUT_PARALLEL_1,
  21. FIMC_INPUT_MIPI_CSI2_0 = 3,
  22. FIMC_INPUT_MIPI_CSI2_1,
  23. FIMC_INPUT_WRITEBACK_A = 5,
  24. FIMC_INPUT_WRITEBACK_B,
  25. FIMC_INPUT_WRITEBACK_ISP = 5,
  26. };
  27. /*
  28. * Enumeration of the FIMC data bus types.
  29. */
  30. enum fimc_bus_type {
  31. /* Camera parallel bus */
  32. FIMC_BUS_TYPE_ITU_601 = 1,
  33. /* Camera parallel bus with embedded synchronization */
  34. FIMC_BUS_TYPE_ITU_656,
  35. /* Camera MIPI-CSI2 serial bus */
  36. FIMC_BUS_TYPE_MIPI_CSI2,
  37. /* FIFO link from LCD controller (WriteBack A) */
  38. FIMC_BUS_TYPE_LCD_WRITEBACK_A,
  39. /* FIFO link from LCD controller (WriteBack B) */
  40. FIMC_BUS_TYPE_LCD_WRITEBACK_B,
  41. /* FIFO link from FIMC-IS */
  42. FIMC_BUS_TYPE_ISP_WRITEBACK = FIMC_BUS_TYPE_LCD_WRITEBACK_B,
  43. };
  44. #define fimc_input_is_parallel(x) ((x) == 1 || (x) == 2)
  45. #define fimc_input_is_mipi_csi(x) ((x) == 3 || (x) == 4)
  46. /*
  47. * The subdevices' group IDs.
  48. */
  49. #define GRP_ID_SENSOR (1 << 8)
  50. #define GRP_ID_FIMC_IS_SENSOR (1 << 9)
  51. #define GRP_ID_WRITEBACK (1 << 10)
  52. #define GRP_ID_CSIS (1 << 11)
  53. #define GRP_ID_FIMC (1 << 12)
  54. #define GRP_ID_FLITE (1 << 13)
  55. #define GRP_ID_FIMC_IS (1 << 14)
  56. struct i2c_board_info;
  57. /**
  58. * struct fimc_source_info - video source description required for the host
  59. * interface configuration
  60. *
  61. * @board_info: pointer to I2C subdevice's board info
  62. * @clk_frequency: frequency of the clock the host interface provides to sensor
  63. * @fimc_bus_type: FIMC camera input type
  64. * @sensor_bus_type: image sensor bus type, MIPI, ITU-R BT.601 etc.
  65. * @flags: the parallel sensor bus flags defining signals polarity (V4L2_MBUS_*)
  66. * @i2c_bus_num: i2c control bus id the sensor is attached to
  67. * @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)
  68. * @clk_id: index of the SoC peripheral clock for sensors
  69. */
  70. struct fimc_source_info {
  71. struct i2c_board_info *board_info;
  72. unsigned long clk_frequency;
  73. enum fimc_bus_type fimc_bus_type;
  74. enum fimc_bus_type sensor_bus_type;
  75. u16 flags;
  76. u16 i2c_bus_num;
  77. u16 mux_id;
  78. u8 clk_id;
  79. };
  80. /**
  81. * struct s5p_platform_fimc - camera host interface platform data
  82. *
  83. * @source_info: properties of an image source for the host interface setup
  84. * @num_clients: the number of attached image sources
  85. */
  86. struct s5p_platform_fimc {
  87. struct fimc_source_info *source_info;
  88. int num_clients;
  89. };
  90. /*
  91. * v4l2_device notification id. This is only for internal use in the kernel.
  92. * Sensor subdevs should issue S5P_FIMC_TX_END_NOTIFY notification in single
  93. * frame capture mode when there is only one VSYNC pulse issued by the sensor
  94. * at begining of the frame transmission.
  95. */
  96. #define S5P_FIMC_TX_END_NOTIFY _IO('e', 0)
  97. #define FIMC_MAX_PLANES 3
  98. /**
  99. * struct fimc_fmt - color format data structure
  100. * @mbus_code: media bus pixel code, -1 if not applicable
  101. * @name: format description
  102. * @fourcc: fourcc code for this format, 0 if not applicable
  103. * @color: the driver's private color format id
  104. * @memplanes: number of physically non-contiguous data planes
  105. * @colplanes: number of physically contiguous data planes
  106. * @depth: per plane driver's private 'number of bits per pixel'
  107. * @mdataplanes: bitmask indicating meta data plane(s), (1 << plane_no)
  108. * @flags: flags indicating which operation mode format applies to
  109. */
  110. struct fimc_fmt {
  111. enum v4l2_mbus_pixelcode mbus_code;
  112. char *name;
  113. u32 fourcc;
  114. u32 color;
  115. u16 memplanes;
  116. u16 colplanes;
  117. u8 depth[FIMC_MAX_PLANES];
  118. u16 mdataplanes;
  119. u16 flags;
  120. #define FMT_FLAGS_CAM (1 << 0)
  121. #define FMT_FLAGS_M2M_IN (1 << 1)
  122. #define FMT_FLAGS_M2M_OUT (1 << 2)
  123. #define FMT_FLAGS_M2M (1 << 1 | 1 << 2)
  124. #define FMT_HAS_ALPHA (1 << 3)
  125. #define FMT_FLAGS_COMPRESSED (1 << 4)
  126. #define FMT_FLAGS_WRITEBACK (1 << 5)
  127. #define FMT_FLAGS_RAW_BAYER (1 << 6)
  128. #define FMT_FLAGS_YUV (1 << 7)
  129. };
  130. enum fimc_subdev_index {
  131. IDX_SENSOR,
  132. IDX_CSIS,
  133. IDX_FLITE,
  134. IDX_IS_ISP,
  135. IDX_FIMC,
  136. IDX_MAX,
  137. };
  138. struct media_pipeline;
  139. struct v4l2_subdev;
  140. struct fimc_pipeline {
  141. struct v4l2_subdev *subdevs[IDX_MAX];
  142. struct media_pipeline *m_pipeline;
  143. };
  144. /*
  145. * Media pipeline operations to be called from within the fimc(-lite)
  146. * video node when it is the last entity of the pipeline. Implemented
  147. * by corresponding media device driver.
  148. */
  149. struct fimc_pipeline_ops {
  150. int (*open)(struct fimc_pipeline *p, struct media_entity *me,
  151. bool resume);
  152. int (*close)(struct fimc_pipeline *p);
  153. int (*set_stream)(struct fimc_pipeline *p, bool state);
  154. };
  155. #define fimc_pipeline_call(f, op, p, args...) \
  156. (!(f) ? -ENODEV : (((f)->pipeline_ops && (f)->pipeline_ops->op) ? \
  157. (f)->pipeline_ops->op((p), ##args) : -ENOIOCTLCMD))
  158. #endif /* S5P_FIMC_H_ */