rtc-stmp3xxx.c 9.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344
  1. /*
  2. * Freescale STMP37XX/STMP378X Real Time Clock driver
  3. *
  4. * Copyright (c) 2007 Sigmatel, Inc.
  5. * Peter Hartley, <peter.hartley@sigmatel.com>
  6. *
  7. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  8. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
  9. * Copyright 2011 Wolfram Sang, Pengutronix e.K.
  10. */
  11. /*
  12. * The code contained herein is licensed under the GNU General Public
  13. * License. You may obtain a copy of the GNU General Public License
  14. * Version 2 or later at the following locations:
  15. *
  16. * http://www.opensource.org/licenses/gpl-license.html
  17. * http://www.gnu.org/copyleft/gpl.html
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/io.h>
  22. #include <linux/init.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/rtc.h>
  26. #include <linux/slab.h>
  27. #include <linux/of_device.h>
  28. #include <linux/of.h>
  29. #include <linux/stmp_device.h>
  30. #include <linux/stmp3xxx_rtc_wdt.h>
  31. #include <mach/common.h>
  32. #define STMP3XXX_RTC_CTRL 0x0
  33. #define STMP3XXX_RTC_CTRL_SET 0x4
  34. #define STMP3XXX_RTC_CTRL_CLR 0x8
  35. #define STMP3XXX_RTC_CTRL_ALARM_IRQ_EN 0x00000001
  36. #define STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN 0x00000002
  37. #define STMP3XXX_RTC_CTRL_ALARM_IRQ 0x00000004
  38. #define STMP3XXX_RTC_CTRL_WATCHDOGEN 0x00000010
  39. #define STMP3XXX_RTC_STAT 0x10
  40. #define STMP3XXX_RTC_STAT_STALE_SHIFT 16
  41. #define STMP3XXX_RTC_STAT_RTC_PRESENT 0x80000000
  42. #define STMP3XXX_RTC_SECONDS 0x30
  43. #define STMP3XXX_RTC_ALARM 0x40
  44. #define STMP3XXX_RTC_WATCHDOG 0x50
  45. #define STMP3XXX_RTC_PERSISTENT0 0x60
  46. #define STMP3XXX_RTC_PERSISTENT0_SET 0x64
  47. #define STMP3XXX_RTC_PERSISTENT0_CLR 0x68
  48. #define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN 0x00000002
  49. #define STMP3XXX_RTC_PERSISTENT0_ALARM_EN 0x00000004
  50. #define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE 0x00000080
  51. #define STMP3XXX_RTC_PERSISTENT1 0x70
  52. /* missing bitmask in headers */
  53. #define STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER 0x80000000
  54. struct stmp3xxx_rtc_data {
  55. struct rtc_device *rtc;
  56. void __iomem *io;
  57. int irq_alarm;
  58. };
  59. #if IS_ENABLED(CONFIG_STMP3XXX_RTC_WATCHDOG)
  60. /**
  61. * stmp3xxx_wdt_set_timeout - configure the watchdog inside the STMP3xxx RTC
  62. * @dev: the parent device of the watchdog (= the RTC)
  63. * @timeout: the desired value for the timeout register of the watchdog.
  64. * 0 disables the watchdog
  65. *
  66. * The watchdog needs one register and two bits which are in the RTC domain.
  67. * To handle the resource conflict, the RTC driver will create another
  68. * platform_device for the watchdog driver as a child of the RTC device.
  69. * The watchdog driver is passed the below accessor function via platform_data
  70. * to configure the watchdog. Locking is not needed because accessing SET/CLR
  71. * registers is atomic.
  72. */
  73. static void stmp3xxx_wdt_set_timeout(struct device *dev, u32 timeout)
  74. {
  75. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  76. if (timeout) {
  77. writel(timeout, rtc_data->io + STMP3XXX_RTC_WATCHDOG);
  78. writel(STMP3XXX_RTC_CTRL_WATCHDOGEN,
  79. rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_SET);
  80. writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER,
  81. rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_SET);
  82. } else {
  83. writel(STMP3XXX_RTC_CTRL_WATCHDOGEN,
  84. rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);
  85. writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER,
  86. rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_CLR);
  87. }
  88. }
  89. static struct stmp3xxx_wdt_pdata wdt_pdata = {
  90. .wdt_set_timeout = stmp3xxx_wdt_set_timeout,
  91. };
  92. static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev)
  93. {
  94. struct platform_device *wdt_pdev =
  95. platform_device_alloc("stmp3xxx_rtc_wdt", rtc_pdev->id);
  96. if (wdt_pdev) {
  97. wdt_pdev->dev.parent = &rtc_pdev->dev;
  98. wdt_pdev->dev.platform_data = &wdt_pdata;
  99. platform_device_add(wdt_pdev);
  100. }
  101. }
  102. #else
  103. static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev)
  104. {
  105. }
  106. #endif /* CONFIG_STMP3XXX_RTC_WATCHDOG */
  107. static void stmp3xxx_wait_time(struct stmp3xxx_rtc_data *rtc_data)
  108. {
  109. /*
  110. * The datasheet doesn't say which way round the
  111. * NEW_REGS/STALE_REGS bitfields go. In fact it's 0x1=P0,
  112. * 0x2=P1, .., 0x20=P5, 0x40=ALARM, 0x80=SECONDS
  113. */
  114. while (readl(rtc_data->io + STMP3XXX_RTC_STAT) &
  115. (0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT))
  116. cpu_relax();
  117. }
  118. /* Time read/write */
  119. static int stmp3xxx_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  120. {
  121. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  122. stmp3xxx_wait_time(rtc_data);
  123. rtc_time_to_tm(readl(rtc_data->io + STMP3XXX_RTC_SECONDS), rtc_tm);
  124. return 0;
  125. }
  126. static int stmp3xxx_rtc_set_mmss(struct device *dev, unsigned long t)
  127. {
  128. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  129. writel(t, rtc_data->io + STMP3XXX_RTC_SECONDS);
  130. stmp3xxx_wait_time(rtc_data);
  131. return 0;
  132. }
  133. /* interrupt(s) handler */
  134. static irqreturn_t stmp3xxx_rtc_interrupt(int irq, void *dev_id)
  135. {
  136. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev_id);
  137. u32 status = readl(rtc_data->io + STMP3XXX_RTC_CTRL);
  138. if (status & STMP3XXX_RTC_CTRL_ALARM_IRQ) {
  139. writel(STMP3XXX_RTC_CTRL_ALARM_IRQ,
  140. rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
  141. rtc_update_irq(rtc_data->rtc, 1, RTC_AF | RTC_IRQF);
  142. return IRQ_HANDLED;
  143. }
  144. return IRQ_NONE;
  145. }
  146. static int stmp3xxx_alarm_irq_enable(struct device *dev, unsigned int enabled)
  147. {
  148. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  149. if (enabled) {
  150. writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
  151. STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN,
  152. rtc_data->io + STMP3XXX_RTC_PERSISTENT0_SET);
  153. writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
  154. rtc_data->io + STMP3XXX_RTC_CTRL_SET);
  155. } else {
  156. writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
  157. STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN,
  158. rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
  159. writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
  160. rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
  161. }
  162. return 0;
  163. }
  164. static int stmp3xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  165. {
  166. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  167. rtc_time_to_tm(readl(rtc_data->io + STMP3XXX_RTC_ALARM), &alm->time);
  168. return 0;
  169. }
  170. static int stmp3xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  171. {
  172. unsigned long t;
  173. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  174. rtc_tm_to_time(&alm->time, &t);
  175. writel(t, rtc_data->io + STMP3XXX_RTC_ALARM);
  176. stmp3xxx_alarm_irq_enable(dev, alm->enabled);
  177. return 0;
  178. }
  179. static struct rtc_class_ops stmp3xxx_rtc_ops = {
  180. .alarm_irq_enable =
  181. stmp3xxx_alarm_irq_enable,
  182. .read_time = stmp3xxx_rtc_gettime,
  183. .set_mmss = stmp3xxx_rtc_set_mmss,
  184. .read_alarm = stmp3xxx_rtc_read_alarm,
  185. .set_alarm = stmp3xxx_rtc_set_alarm,
  186. };
  187. static int stmp3xxx_rtc_remove(struct platform_device *pdev)
  188. {
  189. struct stmp3xxx_rtc_data *rtc_data = platform_get_drvdata(pdev);
  190. if (!rtc_data)
  191. return 0;
  192. writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
  193. rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
  194. platform_set_drvdata(pdev, NULL);
  195. return 0;
  196. }
  197. static int stmp3xxx_rtc_probe(struct platform_device *pdev)
  198. {
  199. struct stmp3xxx_rtc_data *rtc_data;
  200. struct resource *r;
  201. int err;
  202. rtc_data = devm_kzalloc(&pdev->dev, sizeof(*rtc_data), GFP_KERNEL);
  203. if (!rtc_data)
  204. return -ENOMEM;
  205. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  206. if (!r) {
  207. dev_err(&pdev->dev, "failed to get resource\n");
  208. return -ENXIO;
  209. }
  210. rtc_data->io = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  211. if (!rtc_data->io) {
  212. dev_err(&pdev->dev, "ioremap failed\n");
  213. return -EIO;
  214. }
  215. rtc_data->irq_alarm = platform_get_irq(pdev, 0);
  216. if (!(readl(STMP3XXX_RTC_STAT + rtc_data->io) &
  217. STMP3XXX_RTC_STAT_RTC_PRESENT)) {
  218. dev_err(&pdev->dev, "no device onboard\n");
  219. return -ENODEV;
  220. }
  221. platform_set_drvdata(pdev, rtc_data);
  222. mxs_reset_block(rtc_data->io);
  223. writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
  224. STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN |
  225. STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE,
  226. rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
  227. writel(STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN |
  228. STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
  229. rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
  230. rtc_data->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
  231. &stmp3xxx_rtc_ops, THIS_MODULE);
  232. if (IS_ERR(rtc_data->rtc)) {
  233. err = PTR_ERR(rtc_data->rtc);
  234. goto out;
  235. }
  236. err = devm_request_irq(&pdev->dev, rtc_data->irq_alarm,
  237. stmp3xxx_rtc_interrupt, 0, "RTC alarm", &pdev->dev);
  238. if (err) {
  239. dev_err(&pdev->dev, "Cannot claim IRQ%d\n",
  240. rtc_data->irq_alarm);
  241. goto out;
  242. }
  243. stmp3xxx_wdt_register(pdev);
  244. return 0;
  245. out:
  246. platform_set_drvdata(pdev, NULL);
  247. return err;
  248. }
  249. #ifdef CONFIG_PM_SLEEP
  250. static int stmp3xxx_rtc_suspend(struct device *dev)
  251. {
  252. return 0;
  253. }
  254. static int stmp3xxx_rtc_resume(struct device *dev)
  255. {
  256. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  257. mxs_reset_block(rtc_data->io);
  258. writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
  259. STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN |
  260. STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE,
  261. rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
  262. return 0;
  263. }
  264. #endif
  265. static SIMPLE_DEV_PM_OPS(stmp3xxx_rtc_pm_ops, stmp3xxx_rtc_suspend,
  266. stmp3xxx_rtc_resume);
  267. static const struct of_device_id rtc_dt_ids[] = {
  268. { .compatible = "fsl,stmp3xxx-rtc", },
  269. { /* sentinel */ }
  270. };
  271. MODULE_DEVICE_TABLE(of, rtc_dt_ids);
  272. static struct platform_driver stmp3xxx_rtcdrv = {
  273. .probe = stmp3xxx_rtc_probe,
  274. .remove = stmp3xxx_rtc_remove,
  275. .driver = {
  276. .name = "stmp3xxx-rtc",
  277. .owner = THIS_MODULE,
  278. .pm = &stmp3xxx_rtc_pm_ops,
  279. .of_match_table = of_match_ptr(rtc_dt_ids),
  280. },
  281. };
  282. module_platform_driver(stmp3xxx_rtcdrv);
  283. MODULE_DESCRIPTION("STMP3xxx RTC Driver");
  284. MODULE_AUTHOR("dmitry pervushin <dpervushin@embeddedalley.com> and "
  285. "Wolfram Sang <w.sang@pengutronix.de>");
  286. MODULE_LICENSE("GPL");