fimc-capture.c 50 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893
  1. /*
  2. * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
  3. *
  4. * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/errno.h>
  15. #include <linux/bug.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/list.h>
  20. #include <linux/slab.h>
  21. #include <linux/videodev2.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-ioctl.h>
  24. #include <media/v4l2-mem2mem.h>
  25. #include <media/videobuf2-core.h>
  26. #include <media/videobuf2-dma-contig.h>
  27. #include "media-dev.h"
  28. #include "fimc-core.h"
  29. #include "fimc-reg.h"
  30. static int fimc_capture_hw_init(struct fimc_dev *fimc)
  31. {
  32. struct fimc_source_info *si = &fimc->vid_cap.source_config;
  33. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  34. int ret;
  35. unsigned long flags;
  36. if (ctx == NULL || ctx->s_frame.fmt == NULL)
  37. return -EINVAL;
  38. if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) {
  39. ret = fimc_hw_camblk_cfg_writeback(fimc);
  40. if (ret < 0)
  41. return ret;
  42. }
  43. spin_lock_irqsave(&fimc->slock, flags);
  44. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  45. fimc_set_yuv_order(ctx);
  46. fimc_hw_set_camera_polarity(fimc, si);
  47. fimc_hw_set_camera_type(fimc, si);
  48. fimc_hw_set_camera_source(fimc, si);
  49. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  50. ret = fimc_set_scaler_info(ctx);
  51. if (!ret) {
  52. fimc_hw_set_input_path(ctx);
  53. fimc_hw_set_prescaler(ctx);
  54. fimc_hw_set_mainscaler(ctx);
  55. fimc_hw_set_target_format(ctx);
  56. fimc_hw_set_rotation(ctx);
  57. fimc_hw_set_effect(ctx);
  58. fimc_hw_set_output_path(ctx);
  59. fimc_hw_set_out_dma(ctx);
  60. if (fimc->drv_data->alpha_color)
  61. fimc_hw_set_rgb_alpha(ctx);
  62. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  63. }
  64. spin_unlock_irqrestore(&fimc->slock, flags);
  65. return ret;
  66. }
  67. /*
  68. * Reinitialize the driver so it is ready to start the streaming again.
  69. * Set fimc->state to indicate stream off and the hardware shut down state.
  70. * If not suspending (@suspend is false), return any buffers to videobuf2.
  71. * Otherwise put any owned buffers onto the pending buffers queue, so they
  72. * can be re-spun when the device is being resumed. Also perform FIMC
  73. * software reset and disable streaming on the whole pipeline if required.
  74. */
  75. static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
  76. {
  77. struct fimc_vid_cap *cap = &fimc->vid_cap;
  78. struct fimc_vid_buffer *buf;
  79. unsigned long flags;
  80. bool streaming;
  81. spin_lock_irqsave(&fimc->slock, flags);
  82. streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
  83. fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
  84. 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
  85. if (suspend)
  86. fimc->state |= (1 << ST_CAPT_SUSPENDED);
  87. else
  88. fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
  89. /* Release unused buffers */
  90. while (!suspend && !list_empty(&cap->pending_buf_q)) {
  91. buf = fimc_pending_queue_pop(cap);
  92. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  93. }
  94. /* If suspending put unused buffers onto pending queue */
  95. while (!list_empty(&cap->active_buf_q)) {
  96. buf = fimc_active_queue_pop(cap);
  97. if (suspend)
  98. fimc_pending_queue_add(cap, buf);
  99. else
  100. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  101. }
  102. fimc_hw_reset(fimc);
  103. cap->buf_index = 0;
  104. spin_unlock_irqrestore(&fimc->slock, flags);
  105. if (streaming)
  106. return fimc_pipeline_call(fimc, set_stream,
  107. &fimc->pipeline, 0);
  108. else
  109. return 0;
  110. }
  111. static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
  112. {
  113. unsigned long flags;
  114. if (!fimc_capture_active(fimc))
  115. return 0;
  116. spin_lock_irqsave(&fimc->slock, flags);
  117. set_bit(ST_CAPT_SHUT, &fimc->state);
  118. fimc_deactivate_capture(fimc);
  119. spin_unlock_irqrestore(&fimc->slock, flags);
  120. wait_event_timeout(fimc->irq_queue,
  121. !test_bit(ST_CAPT_SHUT, &fimc->state),
  122. (2*HZ/10)); /* 200 ms */
  123. return fimc_capture_state_cleanup(fimc, suspend);
  124. }
  125. /**
  126. * fimc_capture_config_update - apply the camera interface configuration
  127. *
  128. * To be called from within the interrupt handler with fimc.slock
  129. * spinlock held. It updates the camera pixel crop, rotation and
  130. * image flip in H/W.
  131. */
  132. static int fimc_capture_config_update(struct fimc_ctx *ctx)
  133. {
  134. struct fimc_dev *fimc = ctx->fimc_dev;
  135. int ret;
  136. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  137. ret = fimc_set_scaler_info(ctx);
  138. if (ret)
  139. return ret;
  140. fimc_hw_set_prescaler(ctx);
  141. fimc_hw_set_mainscaler(ctx);
  142. fimc_hw_set_target_format(ctx);
  143. fimc_hw_set_rotation(ctx);
  144. fimc_hw_set_effect(ctx);
  145. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  146. fimc_hw_set_out_dma(ctx);
  147. if (fimc->drv_data->alpha_color)
  148. fimc_hw_set_rgb_alpha(ctx);
  149. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  150. return ret;
  151. }
  152. void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
  153. {
  154. struct v4l2_subdev *csis = fimc->pipeline.subdevs[IDX_CSIS];
  155. struct fimc_vid_cap *cap = &fimc->vid_cap;
  156. struct fimc_frame *f = &cap->ctx->d_frame;
  157. struct fimc_vid_buffer *v_buf;
  158. struct timeval *tv;
  159. struct timespec ts;
  160. if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
  161. wake_up(&fimc->irq_queue);
  162. goto done;
  163. }
  164. if (!list_empty(&cap->active_buf_q) &&
  165. test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
  166. ktime_get_real_ts(&ts);
  167. v_buf = fimc_active_queue_pop(cap);
  168. tv = &v_buf->vb.v4l2_buf.timestamp;
  169. tv->tv_sec = ts.tv_sec;
  170. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  171. v_buf->vb.v4l2_buf.sequence = cap->frame_count++;
  172. vb2_buffer_done(&v_buf->vb, VB2_BUF_STATE_DONE);
  173. }
  174. if (!list_empty(&cap->pending_buf_q)) {
  175. v_buf = fimc_pending_queue_pop(cap);
  176. fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
  177. v_buf->index = cap->buf_index;
  178. /* Move the buffer to the capture active queue */
  179. fimc_active_queue_add(cap, v_buf);
  180. dbg("next frame: %d, done frame: %d",
  181. fimc_hw_get_frame_index(fimc), v_buf->index);
  182. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  183. cap->buf_index = 0;
  184. }
  185. /*
  186. * Set up a buffer at MIPI-CSIS if current image format
  187. * requires the frame embedded data capture.
  188. */
  189. if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
  190. unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
  191. unsigned int size = f->payload[plane];
  192. s32 index = fimc_hw_get_frame_index(fimc);
  193. void *vaddr;
  194. list_for_each_entry(v_buf, &cap->active_buf_q, list) {
  195. if (v_buf->index != index)
  196. continue;
  197. vaddr = vb2_plane_vaddr(&v_buf->vb, plane);
  198. v4l2_subdev_call(csis, video, s_rx_buffer,
  199. vaddr, &size);
  200. break;
  201. }
  202. }
  203. if (cap->active_buf_cnt == 0) {
  204. if (deq_buf)
  205. clear_bit(ST_CAPT_RUN, &fimc->state);
  206. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  207. cap->buf_index = 0;
  208. } else {
  209. set_bit(ST_CAPT_RUN, &fimc->state);
  210. }
  211. if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
  212. fimc_capture_config_update(cap->ctx);
  213. done:
  214. if (cap->active_buf_cnt == 1) {
  215. fimc_deactivate_capture(fimc);
  216. clear_bit(ST_CAPT_STREAM, &fimc->state);
  217. }
  218. dbg("frame: %d, active_buf_cnt: %d",
  219. fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
  220. }
  221. static int start_streaming(struct vb2_queue *q, unsigned int count)
  222. {
  223. struct fimc_ctx *ctx = q->drv_priv;
  224. struct fimc_dev *fimc = ctx->fimc_dev;
  225. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  226. int min_bufs;
  227. int ret;
  228. vid_cap->frame_count = 0;
  229. ret = fimc_capture_hw_init(fimc);
  230. if (ret) {
  231. fimc_capture_state_cleanup(fimc, false);
  232. return ret;
  233. }
  234. set_bit(ST_CAPT_PEND, &fimc->state);
  235. min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
  236. if (vid_cap->active_buf_cnt >= min_bufs &&
  237. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  238. fimc_activate_capture(ctx);
  239. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  240. return fimc_pipeline_call(fimc, set_stream,
  241. &fimc->pipeline, 1);
  242. }
  243. return 0;
  244. }
  245. static int stop_streaming(struct vb2_queue *q)
  246. {
  247. struct fimc_ctx *ctx = q->drv_priv;
  248. struct fimc_dev *fimc = ctx->fimc_dev;
  249. if (!fimc_capture_active(fimc))
  250. return -EINVAL;
  251. return fimc_stop_capture(fimc, false);
  252. }
  253. int fimc_capture_suspend(struct fimc_dev *fimc)
  254. {
  255. bool suspend = fimc_capture_busy(fimc);
  256. int ret = fimc_stop_capture(fimc, suspend);
  257. if (ret)
  258. return ret;
  259. return fimc_pipeline_call(fimc, close, &fimc->pipeline);
  260. }
  261. static void buffer_queue(struct vb2_buffer *vb);
  262. int fimc_capture_resume(struct fimc_dev *fimc)
  263. {
  264. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  265. struct fimc_vid_buffer *buf;
  266. int i;
  267. if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
  268. return 0;
  269. INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
  270. vid_cap->buf_index = 0;
  271. fimc_pipeline_call(fimc, open, &fimc->pipeline,
  272. &vid_cap->vfd.entity, false);
  273. fimc_capture_hw_init(fimc);
  274. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  275. for (i = 0; i < vid_cap->reqbufs_count; i++) {
  276. if (list_empty(&vid_cap->pending_buf_q))
  277. break;
  278. buf = fimc_pending_queue_pop(vid_cap);
  279. buffer_queue(&buf->vb);
  280. }
  281. return 0;
  282. }
  283. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  284. unsigned int *num_buffers, unsigned int *num_planes,
  285. unsigned int sizes[], void *allocators[])
  286. {
  287. const struct v4l2_pix_format_mplane *pixm = NULL;
  288. struct fimc_ctx *ctx = vq->drv_priv;
  289. struct fimc_frame *frame = &ctx->d_frame;
  290. struct fimc_fmt *fmt = frame->fmt;
  291. unsigned long wh;
  292. int i;
  293. if (pfmt) {
  294. pixm = &pfmt->fmt.pix_mp;
  295. fmt = fimc_find_format(&pixm->pixelformat, NULL,
  296. FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1);
  297. wh = pixm->width * pixm->height;
  298. } else {
  299. wh = frame->f_width * frame->f_height;
  300. }
  301. if (fmt == NULL)
  302. return -EINVAL;
  303. *num_planes = fmt->memplanes;
  304. for (i = 0; i < fmt->memplanes; i++) {
  305. unsigned int size = (wh * fmt->depth[i]) / 8;
  306. if (pixm)
  307. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  308. else if (fimc_fmt_is_user_defined(fmt->color))
  309. sizes[i] = frame->payload[i];
  310. else
  311. sizes[i] = max_t(u32, size, frame->payload[i]);
  312. allocators[i] = ctx->fimc_dev->alloc_ctx;
  313. }
  314. return 0;
  315. }
  316. static int buffer_prepare(struct vb2_buffer *vb)
  317. {
  318. struct vb2_queue *vq = vb->vb2_queue;
  319. struct fimc_ctx *ctx = vq->drv_priv;
  320. int i;
  321. if (ctx->d_frame.fmt == NULL)
  322. return -EINVAL;
  323. for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
  324. unsigned long size = ctx->d_frame.payload[i];
  325. if (vb2_plane_size(vb, i) < size) {
  326. v4l2_err(&ctx->fimc_dev->vid_cap.vfd,
  327. "User buffer too small (%ld < %ld)\n",
  328. vb2_plane_size(vb, i), size);
  329. return -EINVAL;
  330. }
  331. vb2_set_plane_payload(vb, i, size);
  332. }
  333. return 0;
  334. }
  335. static void buffer_queue(struct vb2_buffer *vb)
  336. {
  337. struct fimc_vid_buffer *buf
  338. = container_of(vb, struct fimc_vid_buffer, vb);
  339. struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  340. struct fimc_dev *fimc = ctx->fimc_dev;
  341. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  342. unsigned long flags;
  343. int min_bufs;
  344. spin_lock_irqsave(&fimc->slock, flags);
  345. fimc_prepare_addr(ctx, &buf->vb, &ctx->d_frame, &buf->paddr);
  346. if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
  347. !test_bit(ST_CAPT_STREAM, &fimc->state) &&
  348. vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
  349. /* Setup the buffer directly for processing. */
  350. int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
  351. vid_cap->buf_index;
  352. fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
  353. buf->index = vid_cap->buf_index;
  354. fimc_active_queue_add(vid_cap, buf);
  355. if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
  356. vid_cap->buf_index = 0;
  357. } else {
  358. fimc_pending_queue_add(vid_cap, buf);
  359. }
  360. min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
  361. if (vb2_is_streaming(&vid_cap->vbq) &&
  362. vid_cap->active_buf_cnt >= min_bufs &&
  363. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  364. int ret;
  365. fimc_activate_capture(ctx);
  366. spin_unlock_irqrestore(&fimc->slock, flags);
  367. if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  368. return;
  369. ret = fimc_pipeline_call(fimc, set_stream, &fimc->pipeline, 1);
  370. if (ret < 0)
  371. v4l2_err(&vid_cap->vfd, "stream on failed: %d\n", ret);
  372. return;
  373. }
  374. spin_unlock_irqrestore(&fimc->slock, flags);
  375. }
  376. static struct vb2_ops fimc_capture_qops = {
  377. .queue_setup = queue_setup,
  378. .buf_prepare = buffer_prepare,
  379. .buf_queue = buffer_queue,
  380. .wait_prepare = vb2_ops_wait_prepare,
  381. .wait_finish = vb2_ops_wait_finish,
  382. .start_streaming = start_streaming,
  383. .stop_streaming = stop_streaming,
  384. };
  385. /**
  386. * fimc_capture_ctrls_create - initialize the control handler
  387. * Initialize the capture video node control handler and fill it
  388. * with the FIMC controls. Inherit any sensor's controls if the
  389. * 'user_subdev_api' flag is false (default behaviour).
  390. * This function need to be called with the graph mutex held.
  391. */
  392. int fimc_capture_ctrls_create(struct fimc_dev *fimc)
  393. {
  394. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  395. struct v4l2_subdev *sensor = fimc->pipeline.subdevs[IDX_SENSOR];
  396. int ret;
  397. if (WARN_ON(vid_cap->ctx == NULL))
  398. return -ENXIO;
  399. if (vid_cap->ctx->ctrls.ready)
  400. return 0;
  401. ret = fimc_ctrls_create(vid_cap->ctx);
  402. if (ret || vid_cap->user_subdev_api || !sensor ||
  403. !vid_cap->ctx->ctrls.ready)
  404. return ret;
  405. return v4l2_ctrl_add_handler(&vid_cap->ctx->ctrls.handler,
  406. sensor->ctrl_handler, NULL);
  407. }
  408. static int fimc_capture_set_default_format(struct fimc_dev *fimc);
  409. static int fimc_capture_open(struct file *file)
  410. {
  411. struct fimc_dev *fimc = video_drvdata(file);
  412. int ret = -EBUSY;
  413. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  414. fimc_md_graph_lock(fimc);
  415. mutex_lock(&fimc->lock);
  416. if (fimc_m2m_active(fimc))
  417. goto unlock;
  418. set_bit(ST_CAPT_BUSY, &fimc->state);
  419. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  420. if (ret < 0)
  421. goto unlock;
  422. ret = v4l2_fh_open(file);
  423. if (ret) {
  424. pm_runtime_put(&fimc->pdev->dev);
  425. goto unlock;
  426. }
  427. if (v4l2_fh_is_singular_file(file)) {
  428. ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
  429. &fimc->vid_cap.vfd.entity, true);
  430. if (!ret && !fimc->vid_cap.user_subdev_api)
  431. ret = fimc_capture_set_default_format(fimc);
  432. if (!ret)
  433. ret = fimc_capture_ctrls_create(fimc);
  434. if (ret < 0) {
  435. clear_bit(ST_CAPT_BUSY, &fimc->state);
  436. pm_runtime_put_sync(&fimc->pdev->dev);
  437. v4l2_fh_release(file);
  438. } else {
  439. fimc->vid_cap.refcnt++;
  440. }
  441. }
  442. unlock:
  443. mutex_unlock(&fimc->lock);
  444. fimc_md_graph_unlock(fimc);
  445. return ret;
  446. }
  447. static int fimc_capture_release(struct file *file)
  448. {
  449. struct fimc_dev *fimc = video_drvdata(file);
  450. struct fimc_vid_cap *vc = &fimc->vid_cap;
  451. int ret;
  452. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  453. mutex_lock(&fimc->lock);
  454. if (v4l2_fh_is_singular_file(file)) {
  455. if (vc->streaming) {
  456. media_entity_pipeline_stop(&vc->vfd.entity);
  457. vc->streaming = false;
  458. }
  459. clear_bit(ST_CAPT_BUSY, &fimc->state);
  460. fimc_stop_capture(fimc, false);
  461. fimc_pipeline_call(fimc, close, &fimc->pipeline);
  462. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  463. fimc->vid_cap.refcnt--;
  464. }
  465. pm_runtime_put(&fimc->pdev->dev);
  466. if (v4l2_fh_is_singular_file(file))
  467. fimc_ctrls_delete(fimc->vid_cap.ctx);
  468. ret = vb2_fop_release(file);
  469. mutex_unlock(&fimc->lock);
  470. return ret;
  471. }
  472. static const struct v4l2_file_operations fimc_capture_fops = {
  473. .owner = THIS_MODULE,
  474. .open = fimc_capture_open,
  475. .release = fimc_capture_release,
  476. .poll = vb2_fop_poll,
  477. .unlocked_ioctl = video_ioctl2,
  478. .mmap = vb2_fop_mmap,
  479. };
  480. /*
  481. * Format and crop negotiation helpers
  482. */
  483. static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
  484. u32 *width, u32 *height,
  485. u32 *code, u32 *fourcc, int pad)
  486. {
  487. bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
  488. struct fimc_dev *fimc = ctx->fimc_dev;
  489. const struct fimc_variant *var = fimc->variant;
  490. const struct fimc_pix_limit *pl = var->pix_limit;
  491. struct fimc_frame *dst = &ctx->d_frame;
  492. u32 depth, min_w, max_w, min_h, align_h = 3;
  493. u32 mask = FMT_FLAGS_CAM;
  494. struct fimc_fmt *ffmt;
  495. /* Conversion from/to JPEG or User Defined format is not supported */
  496. if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
  497. fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
  498. *code = ctx->s_frame.fmt->mbus_code;
  499. if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE)
  500. mask |= FMT_FLAGS_M2M;
  501. if (pad == FIMC_SD_PAD_SINK_FIFO)
  502. mask = FMT_FLAGS_WRITEBACK;
  503. ffmt = fimc_find_format(fourcc, code, mask, 0);
  504. if (WARN_ON(!ffmt))
  505. return NULL;
  506. if (code)
  507. *code = ffmt->mbus_code;
  508. if (fourcc)
  509. *fourcc = ffmt->fourcc;
  510. if (pad != FIMC_SD_PAD_SOURCE) {
  511. max_w = fimc_fmt_is_user_defined(ffmt->color) ?
  512. pl->scaler_dis_w : pl->scaler_en_w;
  513. /* Apply the camera input interface pixel constraints */
  514. v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
  515. height, max_t(u32, *height, 32),
  516. FIMC_CAMIF_MAX_HEIGHT,
  517. fimc_fmt_is_user_defined(ffmt->color) ?
  518. 3 : 1,
  519. 0);
  520. return ffmt;
  521. }
  522. /* Can't scale or crop in transparent (JPEG) transfer mode */
  523. if (fimc_fmt_is_user_defined(ffmt->color)) {
  524. *width = ctx->s_frame.f_width;
  525. *height = ctx->s_frame.f_height;
  526. return ffmt;
  527. }
  528. /* Apply the scaler and the output DMA constraints */
  529. max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
  530. if (ctx->state & FIMC_COMPOSE) {
  531. min_w = dst->offs_h + dst->width;
  532. min_h = dst->offs_v + dst->height;
  533. } else {
  534. min_w = var->min_out_pixsize;
  535. min_h = var->min_out_pixsize;
  536. }
  537. if (var->min_vsize_align == 1 && !rotation)
  538. align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
  539. depth = fimc_get_format_depth(ffmt);
  540. v4l_bound_align_image(width, min_w, max_w,
  541. ffs(var->min_out_pixsize) - 1,
  542. height, min_h, FIMC_CAMIF_MAX_HEIGHT,
  543. align_h,
  544. 64/(ALIGN(depth, 8)));
  545. dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
  546. pad, code ? *code : 0, *width, *height,
  547. dst->f_width, dst->f_height);
  548. return ffmt;
  549. }
  550. static void fimc_capture_try_selection(struct fimc_ctx *ctx,
  551. struct v4l2_rect *r,
  552. int target)
  553. {
  554. bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
  555. struct fimc_dev *fimc = ctx->fimc_dev;
  556. const struct fimc_variant *var = fimc->variant;
  557. const struct fimc_pix_limit *pl = var->pix_limit;
  558. struct fimc_frame *sink = &ctx->s_frame;
  559. u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
  560. u32 align_sz = 0, align_h = 4;
  561. u32 max_sc_h, max_sc_v;
  562. /* In JPEG transparent transfer mode cropping is not supported */
  563. if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
  564. r->width = sink->f_width;
  565. r->height = sink->f_height;
  566. r->left = r->top = 0;
  567. return;
  568. }
  569. if (target == V4L2_SEL_TGT_COMPOSE) {
  570. if (ctx->rotation != 90 && ctx->rotation != 270)
  571. align_h = 1;
  572. max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3));
  573. max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1));
  574. min_sz = var->min_out_pixsize;
  575. } else {
  576. u32 depth = fimc_get_format_depth(sink->fmt);
  577. align_sz = 64/ALIGN(depth, 8);
  578. min_sz = var->min_inp_pixsize;
  579. min_w = min_h = min_sz;
  580. max_sc_h = max_sc_v = 1;
  581. }
  582. /*
  583. * For the compose rectangle the following constraints must be met:
  584. * - it must fit in the sink pad format rectangle (f_width/f_height);
  585. * - maximum downscaling ratio is 64;
  586. * - maximum crop size depends if the rotator is used or not;
  587. * - the sink pad format width/height must be 4 multiple of the
  588. * prescaler ratios determined by sink pad size and source pad crop,
  589. * the prescaler ratio is returned by fimc_get_scaler_factor().
  590. */
  591. max_w = min_t(u32,
  592. rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
  593. rotate ? sink->f_height : sink->f_width);
  594. max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
  595. if (target == V4L2_SEL_TGT_COMPOSE) {
  596. min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
  597. min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
  598. if (rotate) {
  599. swap(max_sc_h, max_sc_v);
  600. swap(min_w, min_h);
  601. }
  602. }
  603. v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
  604. &r->height, min_h, max_h, align_h,
  605. align_sz);
  606. /* Adjust left/top if crop/compose rectangle is out of bounds */
  607. r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
  608. r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
  609. r->left = round_down(r->left, var->hor_offs_align);
  610. dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
  611. target, r->left, r->top, r->width, r->height,
  612. sink->f_width, sink->f_height);
  613. }
  614. /*
  615. * The video node ioctl operations
  616. */
  617. static int fimc_cap_querycap(struct file *file, void *priv,
  618. struct v4l2_capability *cap)
  619. {
  620. struct fimc_dev *fimc = video_drvdata(file);
  621. __fimc_vidioc_querycap(&fimc->pdev->dev, cap, V4L2_CAP_STREAMING |
  622. V4L2_CAP_VIDEO_CAPTURE_MPLANE);
  623. return 0;
  624. }
  625. static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
  626. struct v4l2_fmtdesc *f)
  627. {
  628. struct fimc_fmt *fmt;
  629. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
  630. f->index);
  631. if (!fmt)
  632. return -EINVAL;
  633. strncpy(f->description, fmt->name, sizeof(f->description) - 1);
  634. f->pixelformat = fmt->fourcc;
  635. if (fmt->fourcc == V4L2_MBUS_FMT_JPEG_1X8)
  636. f->flags |= V4L2_FMT_FLAG_COMPRESSED;
  637. return 0;
  638. }
  639. static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
  640. {
  641. struct media_pad *pad = &me->pads[0];
  642. while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
  643. pad = media_entity_remote_source(pad);
  644. if (!pad)
  645. break;
  646. me = pad->entity;
  647. pad = &me->pads[0];
  648. }
  649. return me;
  650. }
  651. /**
  652. * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
  653. * elements
  654. * @ctx: FIMC capture context
  655. * @tfmt: media bus format to try/set on subdevs
  656. * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
  657. * @set: true to set format on subdevs, false to try only
  658. */
  659. static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
  660. struct v4l2_mbus_framefmt *tfmt,
  661. struct fimc_fmt **fmt_id,
  662. bool set)
  663. {
  664. struct fimc_dev *fimc = ctx->fimc_dev;
  665. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  666. struct v4l2_subdev_format sfmt;
  667. struct v4l2_mbus_framefmt *mf = &sfmt.format;
  668. struct media_entity *me;
  669. struct fimc_fmt *ffmt;
  670. struct media_pad *pad;
  671. int ret, i = 1;
  672. u32 fcc;
  673. if (WARN_ON(!sd || !tfmt))
  674. return -EINVAL;
  675. memset(&sfmt, 0, sizeof(sfmt));
  676. sfmt.format = *tfmt;
  677. sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
  678. me = fimc_pipeline_get_head(&sd->entity);
  679. while (1) {
  680. ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
  681. FMT_FLAGS_CAM, i++);
  682. if (ffmt == NULL) {
  683. /*
  684. * Notify user-space if common pixel code for
  685. * host and sensor does not exist.
  686. */
  687. return -EINVAL;
  688. }
  689. mf->code = tfmt->code = ffmt->mbus_code;
  690. /* set format on all pipeline subdevs */
  691. while (me != &fimc->vid_cap.subdev.entity) {
  692. sd = media_entity_to_v4l2_subdev(me);
  693. sfmt.pad = 0;
  694. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
  695. if (ret)
  696. return ret;
  697. if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
  698. sfmt.pad = me->num_pads - 1;
  699. mf->code = tfmt->code;
  700. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
  701. &sfmt);
  702. if (ret)
  703. return ret;
  704. }
  705. pad = media_entity_remote_source(&me->pads[sfmt.pad]);
  706. if (!pad)
  707. return -EINVAL;
  708. me = pad->entity;
  709. }
  710. if (mf->code != tfmt->code)
  711. continue;
  712. fcc = ffmt->fourcc;
  713. tfmt->width = mf->width;
  714. tfmt->height = mf->height;
  715. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  716. NULL, &fcc, FIMC_SD_PAD_SINK_CAM);
  717. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  718. NULL, &fcc, FIMC_SD_PAD_SOURCE);
  719. if (ffmt && ffmt->mbus_code)
  720. mf->code = ffmt->mbus_code;
  721. if (mf->width != tfmt->width || mf->height != tfmt->height)
  722. continue;
  723. tfmt->code = mf->code;
  724. break;
  725. }
  726. if (fmt_id && ffmt)
  727. *fmt_id = ffmt;
  728. *tfmt = *mf;
  729. return 0;
  730. }
  731. /**
  732. * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters
  733. * @sensor: pointer to the sensor subdev
  734. * @plane_fmt: provides plane sizes corresponding to the frame layout entries
  735. * @try: true to set the frame parameters, false to query only
  736. *
  737. * This function is used by this driver only for compressed/blob data formats.
  738. */
  739. static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
  740. struct v4l2_plane_pix_format *plane_fmt,
  741. unsigned int num_planes, bool try)
  742. {
  743. struct v4l2_mbus_frame_desc fd;
  744. int i, ret;
  745. int pad;
  746. for (i = 0; i < num_planes; i++)
  747. fd.entry[i].length = plane_fmt[i].sizeimage;
  748. pad = sensor->entity.num_pads - 1;
  749. if (try)
  750. ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
  751. else
  752. ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
  753. if (ret < 0)
  754. return ret;
  755. if (num_planes != fd.num_entries)
  756. return -EINVAL;
  757. for (i = 0; i < num_planes; i++)
  758. plane_fmt[i].sizeimage = fd.entry[i].length;
  759. if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
  760. v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
  761. fd.entry[0].length);
  762. return -EINVAL;
  763. }
  764. return 0;
  765. }
  766. static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
  767. struct v4l2_format *f)
  768. {
  769. struct fimc_dev *fimc = video_drvdata(file);
  770. __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
  771. return 0;
  772. }
  773. static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
  774. struct v4l2_format *f)
  775. {
  776. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  777. struct fimc_dev *fimc = video_drvdata(file);
  778. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  779. struct v4l2_mbus_framefmt mf;
  780. struct fimc_fmt *ffmt = NULL;
  781. int ret = 0;
  782. fimc_md_graph_lock(fimc);
  783. mutex_lock(&fimc->lock);
  784. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  785. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  786. NULL, &pix->pixelformat,
  787. FIMC_SD_PAD_SINK_CAM);
  788. ctx->s_frame.f_width = pix->width;
  789. ctx->s_frame.f_height = pix->height;
  790. }
  791. ffmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  792. NULL, &pix->pixelformat,
  793. FIMC_SD_PAD_SOURCE);
  794. if (!ffmt) {
  795. ret = -EINVAL;
  796. goto unlock;
  797. }
  798. if (!fimc->vid_cap.user_subdev_api) {
  799. mf.width = pix->width;
  800. mf.height = pix->height;
  801. mf.code = ffmt->mbus_code;
  802. fimc_pipeline_try_format(ctx, &mf, &ffmt, false);
  803. pix->width = mf.width;
  804. pix->height = mf.height;
  805. if (ffmt)
  806. pix->pixelformat = ffmt->fourcc;
  807. }
  808. fimc_adjust_mplane_format(ffmt, pix->width, pix->height, pix);
  809. if (ffmt->flags & FMT_FLAGS_COMPRESSED)
  810. fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR],
  811. pix->plane_fmt, ffmt->memplanes, true);
  812. unlock:
  813. mutex_unlock(&fimc->lock);
  814. fimc_md_graph_unlock(fimc);
  815. return ret;
  816. }
  817. static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
  818. enum fimc_color_fmt color)
  819. {
  820. bool jpeg = fimc_fmt_is_user_defined(color);
  821. ctx->scaler.enabled = !jpeg;
  822. fimc_ctrls_activate(ctx, !jpeg);
  823. if (jpeg)
  824. set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  825. else
  826. clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  827. }
  828. static int __fimc_capture_set_format(struct fimc_dev *fimc,
  829. struct v4l2_format *f)
  830. {
  831. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  832. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  833. struct v4l2_mbus_framefmt *mf = &fimc->vid_cap.ci_fmt;
  834. struct fimc_frame *ff = &ctx->d_frame;
  835. struct fimc_fmt *s_fmt = NULL;
  836. int ret, i;
  837. if (vb2_is_busy(&fimc->vid_cap.vbq))
  838. return -EBUSY;
  839. /* Pre-configure format at camera interface input, for JPEG only */
  840. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  841. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  842. NULL, &pix->pixelformat,
  843. FIMC_SD_PAD_SINK_CAM);
  844. ctx->s_frame.f_width = pix->width;
  845. ctx->s_frame.f_height = pix->height;
  846. }
  847. /* Try the format at the scaler and the DMA output */
  848. ff->fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  849. NULL, &pix->pixelformat,
  850. FIMC_SD_PAD_SOURCE);
  851. if (!ff->fmt)
  852. return -EINVAL;
  853. /* Update RGB Alpha control state and value range */
  854. fimc_alpha_ctrl_update(ctx);
  855. /* Try to match format at the host and the sensor */
  856. if (!fimc->vid_cap.user_subdev_api) {
  857. mf->code = ff->fmt->mbus_code;
  858. mf->width = pix->width;
  859. mf->height = pix->height;
  860. ret = fimc_pipeline_try_format(ctx, mf, &s_fmt, true);
  861. if (ret)
  862. return ret;
  863. pix->width = mf->width;
  864. pix->height = mf->height;
  865. }
  866. fimc_adjust_mplane_format(ff->fmt, pix->width, pix->height, pix);
  867. if (ff->fmt->flags & FMT_FLAGS_COMPRESSED) {
  868. ret = fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR],
  869. pix->plane_fmt, ff->fmt->memplanes,
  870. true);
  871. if (ret < 0)
  872. return ret;
  873. }
  874. for (i = 0; i < ff->fmt->memplanes; i++) {
  875. ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
  876. ff->payload[i] = pix->plane_fmt[i].sizeimage;
  877. }
  878. set_frame_bounds(ff, pix->width, pix->height);
  879. /* Reset the composition rectangle if not yet configured */
  880. if (!(ctx->state & FIMC_COMPOSE))
  881. set_frame_crop(ff, 0, 0, pix->width, pix->height);
  882. fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
  883. /* Reset cropping and set format at the camera interface input */
  884. if (!fimc->vid_cap.user_subdev_api) {
  885. ctx->s_frame.fmt = s_fmt;
  886. set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
  887. set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
  888. }
  889. return ret;
  890. }
  891. static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
  892. struct v4l2_format *f)
  893. {
  894. struct fimc_dev *fimc = video_drvdata(file);
  895. int ret;
  896. fimc_md_graph_lock(fimc);
  897. mutex_lock(&fimc->lock);
  898. /*
  899. * The graph is walked within __fimc_capture_set_format() to set
  900. * the format at subdevs thus the graph mutex needs to be held at
  901. * this point and acquired before the video mutex, to avoid AB-BA
  902. * deadlock when fimc_md_link_notify() is called by other thread.
  903. * Ideally the graph walking and setting format at the whole pipeline
  904. * should be removed from this driver and handled in userspace only.
  905. */
  906. ret = __fimc_capture_set_format(fimc, f);
  907. mutex_unlock(&fimc->lock);
  908. fimc_md_graph_unlock(fimc);
  909. return ret;
  910. }
  911. static int fimc_cap_enum_input(struct file *file, void *priv,
  912. struct v4l2_input *i)
  913. {
  914. struct fimc_dev *fimc = video_drvdata(file);
  915. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  916. if (i->index != 0)
  917. return -EINVAL;
  918. i->type = V4L2_INPUT_TYPE_CAMERA;
  919. if (sd)
  920. strlcpy(i->name, sd->name, sizeof(i->name));
  921. return 0;
  922. }
  923. static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
  924. {
  925. return i == 0 ? i : -EINVAL;
  926. }
  927. static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
  928. {
  929. *i = 0;
  930. return 0;
  931. }
  932. /**
  933. * fimc_pipeline_validate - check for formats inconsistencies
  934. * between source and sink pad of each link
  935. *
  936. * Return 0 if all formats match or -EPIPE otherwise.
  937. */
  938. static int fimc_pipeline_validate(struct fimc_dev *fimc)
  939. {
  940. struct v4l2_subdev_format sink_fmt, src_fmt;
  941. struct fimc_vid_cap *vc = &fimc->vid_cap;
  942. struct v4l2_subdev *sd = &vc->subdev;
  943. struct media_pad *sink_pad, *src_pad;
  944. int i, ret;
  945. while (1) {
  946. /*
  947. * Find current entity sink pad and any remote sink pad linked
  948. * to it. We stop if there is no sink pad in current entity or
  949. * it is not linked to any other remote entity.
  950. */
  951. src_pad = NULL;
  952. for (i = 0; i < sd->entity.num_pads; i++) {
  953. struct media_pad *p = &sd->entity.pads[i];
  954. if (p->flags & MEDIA_PAD_FL_SINK) {
  955. sink_pad = p;
  956. src_pad = media_entity_remote_source(sink_pad);
  957. if (src_pad)
  958. break;
  959. }
  960. }
  961. if (src_pad == NULL ||
  962. media_entity_type(src_pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  963. break;
  964. /* Don't call FIMC subdev operation to avoid nested locking */
  965. if (sd == &vc->subdev) {
  966. struct fimc_frame *ff = &vc->ctx->s_frame;
  967. sink_fmt.format.width = ff->f_width;
  968. sink_fmt.format.height = ff->f_height;
  969. sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
  970. } else {
  971. sink_fmt.pad = sink_pad->index;
  972. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  973. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
  974. if (ret < 0 && ret != -ENOIOCTLCMD)
  975. return -EPIPE;
  976. }
  977. /* Retrieve format at the source pad */
  978. sd = media_entity_to_v4l2_subdev(src_pad->entity);
  979. src_fmt.pad = src_pad->index;
  980. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  981. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  982. if (ret < 0 && ret != -ENOIOCTLCMD)
  983. return -EPIPE;
  984. if (src_fmt.format.width != sink_fmt.format.width ||
  985. src_fmt.format.height != sink_fmt.format.height ||
  986. src_fmt.format.code != sink_fmt.format.code)
  987. return -EPIPE;
  988. if (sd == fimc->pipeline.subdevs[IDX_SENSOR] &&
  989. fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
  990. struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
  991. struct fimc_frame *frame = &vc->ctx->d_frame;
  992. unsigned int i;
  993. ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
  994. frame->fmt->memplanes,
  995. false);
  996. if (ret < 0)
  997. return -EPIPE;
  998. for (i = 0; i < frame->fmt->memplanes; i++)
  999. if (frame->payload[i] < plane_fmt[i].sizeimage)
  1000. return -EPIPE;
  1001. }
  1002. }
  1003. return 0;
  1004. }
  1005. static int fimc_cap_streamon(struct file *file, void *priv,
  1006. enum v4l2_buf_type type)
  1007. {
  1008. struct fimc_dev *fimc = video_drvdata(file);
  1009. struct fimc_pipeline *p = &fimc->pipeline;
  1010. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1011. struct media_entity *entity = &vc->vfd.entity;
  1012. struct fimc_source_info *si = NULL;
  1013. struct v4l2_subdev *sd;
  1014. int ret;
  1015. if (fimc_capture_active(fimc))
  1016. return -EBUSY;
  1017. ret = media_entity_pipeline_start(entity, p->m_pipeline);
  1018. if (ret < 0)
  1019. return ret;
  1020. sd = p->subdevs[IDX_SENSOR];
  1021. if (sd)
  1022. si = v4l2_get_subdev_hostdata(sd);
  1023. if (si == NULL) {
  1024. ret = -EPIPE;
  1025. goto err_p_stop;
  1026. }
  1027. /*
  1028. * Save configuration data related to currently attached image
  1029. * sensor or other data source, e.g. FIMC-IS.
  1030. */
  1031. vc->source_config = *si;
  1032. if (vc->input == GRP_ID_FIMC_IS)
  1033. vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
  1034. if (vc->user_subdev_api) {
  1035. ret = fimc_pipeline_validate(fimc);
  1036. if (ret < 0)
  1037. goto err_p_stop;
  1038. }
  1039. ret = vb2_ioctl_streamon(file, priv, type);
  1040. if (!ret) {
  1041. vc->streaming = true;
  1042. return ret;
  1043. }
  1044. err_p_stop:
  1045. media_entity_pipeline_stop(entity);
  1046. return ret;
  1047. }
  1048. static int fimc_cap_streamoff(struct file *file, void *priv,
  1049. enum v4l2_buf_type type)
  1050. {
  1051. struct fimc_dev *fimc = video_drvdata(file);
  1052. int ret;
  1053. ret = vb2_ioctl_streamoff(file, priv, type);
  1054. if (ret < 0)
  1055. return ret;
  1056. media_entity_pipeline_stop(&fimc->vid_cap.vfd.entity);
  1057. fimc->vid_cap.streaming = false;
  1058. return 0;
  1059. }
  1060. static int fimc_cap_reqbufs(struct file *file, void *priv,
  1061. struct v4l2_requestbuffers *reqbufs)
  1062. {
  1063. struct fimc_dev *fimc = video_drvdata(file);
  1064. int ret;
  1065. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  1066. if (!ret)
  1067. fimc->vid_cap.reqbufs_count = reqbufs->count;
  1068. return ret;
  1069. }
  1070. static int fimc_cap_g_selection(struct file *file, void *fh,
  1071. struct v4l2_selection *s)
  1072. {
  1073. struct fimc_dev *fimc = video_drvdata(file);
  1074. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1075. struct fimc_frame *f = &ctx->s_frame;
  1076. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1077. return -EINVAL;
  1078. switch (s->target) {
  1079. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  1080. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1081. f = &ctx->d_frame;
  1082. case V4L2_SEL_TGT_CROP_BOUNDS:
  1083. case V4L2_SEL_TGT_CROP_DEFAULT:
  1084. s->r.left = 0;
  1085. s->r.top = 0;
  1086. s->r.width = f->o_width;
  1087. s->r.height = f->o_height;
  1088. return 0;
  1089. case V4L2_SEL_TGT_COMPOSE:
  1090. f = &ctx->d_frame;
  1091. case V4L2_SEL_TGT_CROP:
  1092. s->r.left = f->offs_h;
  1093. s->r.top = f->offs_v;
  1094. s->r.width = f->width;
  1095. s->r.height = f->height;
  1096. return 0;
  1097. }
  1098. return -EINVAL;
  1099. }
  1100. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  1101. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  1102. {
  1103. if (a->left < b->left || a->top < b->top)
  1104. return 0;
  1105. if (a->left + a->width > b->left + b->width)
  1106. return 0;
  1107. if (a->top + a->height > b->top + b->height)
  1108. return 0;
  1109. return 1;
  1110. }
  1111. static int fimc_cap_s_selection(struct file *file, void *fh,
  1112. struct v4l2_selection *s)
  1113. {
  1114. struct fimc_dev *fimc = video_drvdata(file);
  1115. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1116. struct v4l2_rect rect = s->r;
  1117. struct fimc_frame *f;
  1118. unsigned long flags;
  1119. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1120. return -EINVAL;
  1121. if (s->target == V4L2_SEL_TGT_COMPOSE)
  1122. f = &ctx->d_frame;
  1123. else if (s->target == V4L2_SEL_TGT_CROP)
  1124. f = &ctx->s_frame;
  1125. else
  1126. return -EINVAL;
  1127. fimc_capture_try_selection(ctx, &rect, s->target);
  1128. if (s->flags & V4L2_SEL_FLAG_LE &&
  1129. !enclosed_rectangle(&rect, &s->r))
  1130. return -ERANGE;
  1131. if (s->flags & V4L2_SEL_FLAG_GE &&
  1132. !enclosed_rectangle(&s->r, &rect))
  1133. return -ERANGE;
  1134. s->r = rect;
  1135. spin_lock_irqsave(&fimc->slock, flags);
  1136. set_frame_crop(f, s->r.left, s->r.top, s->r.width,
  1137. s->r.height);
  1138. spin_unlock_irqrestore(&fimc->slock, flags);
  1139. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1140. return 0;
  1141. }
  1142. static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
  1143. .vidioc_querycap = fimc_cap_querycap,
  1144. .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
  1145. .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
  1146. .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
  1147. .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
  1148. .vidioc_reqbufs = fimc_cap_reqbufs,
  1149. .vidioc_querybuf = vb2_ioctl_querybuf,
  1150. .vidioc_qbuf = vb2_ioctl_qbuf,
  1151. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  1152. .vidioc_expbuf = vb2_ioctl_expbuf,
  1153. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  1154. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  1155. .vidioc_streamon = fimc_cap_streamon,
  1156. .vidioc_streamoff = fimc_cap_streamoff,
  1157. .vidioc_g_selection = fimc_cap_g_selection,
  1158. .vidioc_s_selection = fimc_cap_s_selection,
  1159. .vidioc_enum_input = fimc_cap_enum_input,
  1160. .vidioc_s_input = fimc_cap_s_input,
  1161. .vidioc_g_input = fimc_cap_g_input,
  1162. };
  1163. /* Capture subdev media entity operations */
  1164. static int fimc_link_setup(struct media_entity *entity,
  1165. const struct media_pad *local,
  1166. const struct media_pad *remote, u32 flags)
  1167. {
  1168. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1169. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1170. if (media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  1171. return -EINVAL;
  1172. if (WARN_ON(fimc == NULL))
  1173. return 0;
  1174. dbg("%s --> %s, flags: 0x%x. input: 0x%x",
  1175. local->entity->name, remote->entity->name, flags,
  1176. fimc->vid_cap.input);
  1177. if (flags & MEDIA_LNK_FL_ENABLED) {
  1178. if (fimc->vid_cap.input != 0)
  1179. return -EBUSY;
  1180. fimc->vid_cap.input = sd->grp_id;
  1181. return 0;
  1182. }
  1183. fimc->vid_cap.input = 0;
  1184. return 0;
  1185. }
  1186. static const struct media_entity_operations fimc_sd_media_ops = {
  1187. .link_setup = fimc_link_setup,
  1188. };
  1189. /**
  1190. * fimc_sensor_notify - v4l2_device notification from a sensor subdev
  1191. * @sd: pointer to a subdev generating the notification
  1192. * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
  1193. * @arg: pointer to an u32 type integer that stores the frame payload value
  1194. *
  1195. * The End Of Frame notification sent by sensor subdev in its still capture
  1196. * mode. If there is only a single VSYNC generated by the sensor at the
  1197. * beginning of a frame transmission, FIMC does not issue the LastIrq
  1198. * (end of frame) interrupt. And this notification is used to complete the
  1199. * frame capture and returning a buffer to user-space. Subdev drivers should
  1200. * call this notification from their last 'End of frame capture' interrupt.
  1201. */
  1202. void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
  1203. void *arg)
  1204. {
  1205. struct fimc_source_info *si;
  1206. struct fimc_vid_buffer *buf;
  1207. struct fimc_md *fmd;
  1208. struct fimc_dev *fimc;
  1209. unsigned long flags;
  1210. if (sd == NULL)
  1211. return;
  1212. si = v4l2_get_subdev_hostdata(sd);
  1213. fmd = entity_to_fimc_mdev(&sd->entity);
  1214. spin_lock_irqsave(&fmd->slock, flags);
  1215. fimc = si ? source_to_sensor_info(si)->host : NULL;
  1216. if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
  1217. test_bit(ST_CAPT_PEND, &fimc->state)) {
  1218. unsigned long irq_flags;
  1219. spin_lock_irqsave(&fimc->slock, irq_flags);
  1220. if (!list_empty(&fimc->vid_cap.active_buf_q)) {
  1221. buf = list_entry(fimc->vid_cap.active_buf_q.next,
  1222. struct fimc_vid_buffer, list);
  1223. vb2_set_plane_payload(&buf->vb, 0, *((u32 *)arg));
  1224. }
  1225. fimc_capture_irq_handler(fimc, 1);
  1226. fimc_deactivate_capture(fimc);
  1227. spin_unlock_irqrestore(&fimc->slock, irq_flags);
  1228. }
  1229. spin_unlock_irqrestore(&fmd->slock, flags);
  1230. }
  1231. static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  1232. struct v4l2_subdev_fh *fh,
  1233. struct v4l2_subdev_mbus_code_enum *code)
  1234. {
  1235. struct fimc_fmt *fmt;
  1236. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
  1237. if (!fmt)
  1238. return -EINVAL;
  1239. code->code = fmt->mbus_code;
  1240. return 0;
  1241. }
  1242. static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
  1243. struct v4l2_subdev_fh *fh,
  1244. struct v4l2_subdev_format *fmt)
  1245. {
  1246. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1247. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1248. struct fimc_frame *ff = &ctx->s_frame;
  1249. struct v4l2_mbus_framefmt *mf;
  1250. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1251. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1252. fmt->format = *mf;
  1253. return 0;
  1254. }
  1255. mf = &fmt->format;
  1256. mutex_lock(&fimc->lock);
  1257. switch (fmt->pad) {
  1258. case FIMC_SD_PAD_SOURCE:
  1259. if (!WARN_ON(ff->fmt == NULL))
  1260. mf->code = ff->fmt->mbus_code;
  1261. /* Sink pads crop rectangle size */
  1262. mf->width = ff->width;
  1263. mf->height = ff->height;
  1264. break;
  1265. case FIMC_SD_PAD_SINK_FIFO:
  1266. *mf = fimc->vid_cap.wb_fmt;
  1267. break;
  1268. case FIMC_SD_PAD_SINK_CAM:
  1269. default:
  1270. *mf = fimc->vid_cap.ci_fmt;
  1271. break;
  1272. }
  1273. mutex_unlock(&fimc->lock);
  1274. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1275. return 0;
  1276. }
  1277. static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
  1278. struct v4l2_subdev_fh *fh,
  1279. struct v4l2_subdev_format *fmt)
  1280. {
  1281. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1282. struct v4l2_mbus_framefmt *mf = &fmt->format;
  1283. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1284. struct fimc_ctx *ctx = vc->ctx;
  1285. struct fimc_frame *ff;
  1286. struct fimc_fmt *ffmt;
  1287. dbg("pad%d: code: 0x%x, %dx%d",
  1288. fmt->pad, mf->code, mf->width, mf->height);
  1289. if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq))
  1290. return -EBUSY;
  1291. mutex_lock(&fimc->lock);
  1292. ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
  1293. &mf->code, NULL, fmt->pad);
  1294. mutex_unlock(&fimc->lock);
  1295. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1296. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1297. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1298. *mf = fmt->format;
  1299. return 0;
  1300. }
  1301. /* There must be a bug in the driver if this happens */
  1302. if (WARN_ON(ffmt == NULL))
  1303. return -EINVAL;
  1304. /* Update RGB Alpha control state and value range */
  1305. fimc_alpha_ctrl_update(ctx);
  1306. fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
  1307. if (fmt->pad == FIMC_SD_PAD_SOURCE) {
  1308. ff = &ctx->d_frame;
  1309. /* Sink pads crop rectangle size */
  1310. mf->width = ctx->s_frame.width;
  1311. mf->height = ctx->s_frame.height;
  1312. } else {
  1313. ff = &ctx->s_frame;
  1314. }
  1315. mutex_lock(&fimc->lock);
  1316. set_frame_bounds(ff, mf->width, mf->height);
  1317. if (fmt->pad == FIMC_SD_PAD_SINK_FIFO)
  1318. vc->wb_fmt = *mf;
  1319. else if (fmt->pad == FIMC_SD_PAD_SINK_CAM)
  1320. vc->ci_fmt = *mf;
  1321. ff->fmt = ffmt;
  1322. /* Reset the crop rectangle if required. */
  1323. if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
  1324. set_frame_crop(ff, 0, 0, mf->width, mf->height);
  1325. if (fmt->pad != FIMC_SD_PAD_SOURCE)
  1326. ctx->state &= ~FIMC_COMPOSE;
  1327. mutex_unlock(&fimc->lock);
  1328. return 0;
  1329. }
  1330. static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
  1331. struct v4l2_subdev_fh *fh,
  1332. struct v4l2_subdev_selection *sel)
  1333. {
  1334. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1335. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1336. struct fimc_frame *f = &ctx->s_frame;
  1337. struct v4l2_rect *r = &sel->r;
  1338. struct v4l2_rect *try_sel;
  1339. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1340. return -EINVAL;
  1341. mutex_lock(&fimc->lock);
  1342. switch (sel->target) {
  1343. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1344. f = &ctx->d_frame;
  1345. case V4L2_SEL_TGT_CROP_BOUNDS:
  1346. r->width = f->o_width;
  1347. r->height = f->o_height;
  1348. r->left = 0;
  1349. r->top = 0;
  1350. mutex_unlock(&fimc->lock);
  1351. return 0;
  1352. case V4L2_SEL_TGT_CROP:
  1353. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1354. break;
  1355. case V4L2_SEL_TGT_COMPOSE:
  1356. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1357. f = &ctx->d_frame;
  1358. break;
  1359. default:
  1360. mutex_unlock(&fimc->lock);
  1361. return -EINVAL;
  1362. }
  1363. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1364. sel->r = *try_sel;
  1365. } else {
  1366. r->left = f->offs_h;
  1367. r->top = f->offs_v;
  1368. r->width = f->width;
  1369. r->height = f->height;
  1370. }
  1371. dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
  1372. sel->pad, r->left, r->top, r->width, r->height,
  1373. f->f_width, f->f_height);
  1374. mutex_unlock(&fimc->lock);
  1375. return 0;
  1376. }
  1377. static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
  1378. struct v4l2_subdev_fh *fh,
  1379. struct v4l2_subdev_selection *sel)
  1380. {
  1381. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1382. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1383. struct fimc_frame *f = &ctx->s_frame;
  1384. struct v4l2_rect *r = &sel->r;
  1385. struct v4l2_rect *try_sel;
  1386. unsigned long flags;
  1387. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1388. return -EINVAL;
  1389. mutex_lock(&fimc->lock);
  1390. fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
  1391. switch (sel->target) {
  1392. case V4L2_SEL_TGT_CROP:
  1393. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1394. break;
  1395. case V4L2_SEL_TGT_COMPOSE:
  1396. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1397. f = &ctx->d_frame;
  1398. break;
  1399. default:
  1400. mutex_unlock(&fimc->lock);
  1401. return -EINVAL;
  1402. }
  1403. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1404. *try_sel = sel->r;
  1405. } else {
  1406. spin_lock_irqsave(&fimc->slock, flags);
  1407. set_frame_crop(f, r->left, r->top, r->width, r->height);
  1408. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1409. if (sel->target == V4L2_SEL_TGT_COMPOSE)
  1410. ctx->state |= FIMC_COMPOSE;
  1411. spin_unlock_irqrestore(&fimc->slock, flags);
  1412. }
  1413. dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
  1414. r->width, r->height);
  1415. mutex_unlock(&fimc->lock);
  1416. return 0;
  1417. }
  1418. static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
  1419. .enum_mbus_code = fimc_subdev_enum_mbus_code,
  1420. .get_selection = fimc_subdev_get_selection,
  1421. .set_selection = fimc_subdev_set_selection,
  1422. .get_fmt = fimc_subdev_get_fmt,
  1423. .set_fmt = fimc_subdev_set_fmt,
  1424. };
  1425. static struct v4l2_subdev_ops fimc_subdev_ops = {
  1426. .pad = &fimc_subdev_pad_ops,
  1427. };
  1428. /* Set default format at the sensor and host interface */
  1429. static int fimc_capture_set_default_format(struct fimc_dev *fimc)
  1430. {
  1431. struct v4l2_format fmt = {
  1432. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  1433. .fmt.pix_mp = {
  1434. .width = 640,
  1435. .height = 480,
  1436. .pixelformat = V4L2_PIX_FMT_YUYV,
  1437. .field = V4L2_FIELD_NONE,
  1438. .colorspace = V4L2_COLORSPACE_JPEG,
  1439. },
  1440. };
  1441. return __fimc_capture_set_format(fimc, &fmt);
  1442. }
  1443. /* fimc->lock must be already initialized */
  1444. static int fimc_register_capture_device(struct fimc_dev *fimc,
  1445. struct v4l2_device *v4l2_dev)
  1446. {
  1447. struct video_device *vfd = &fimc->vid_cap.vfd;
  1448. struct vb2_queue *q = &fimc->vid_cap.vbq;
  1449. struct fimc_ctx *ctx;
  1450. struct fimc_vid_cap *vid_cap;
  1451. int ret = -ENOMEM;
  1452. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  1453. if (!ctx)
  1454. return -ENOMEM;
  1455. ctx->fimc_dev = fimc;
  1456. ctx->in_path = FIMC_IO_CAMERA;
  1457. ctx->out_path = FIMC_IO_DMA;
  1458. ctx->state = FIMC_CTX_CAP;
  1459. ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1460. ctx->d_frame.fmt = ctx->s_frame.fmt;
  1461. memset(vfd, 0, sizeof(*vfd));
  1462. snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
  1463. vfd->fops = &fimc_capture_fops;
  1464. vfd->ioctl_ops = &fimc_capture_ioctl_ops;
  1465. vfd->v4l2_dev = v4l2_dev;
  1466. vfd->minor = -1;
  1467. vfd->release = video_device_release_empty;
  1468. vfd->queue = q;
  1469. vfd->lock = &fimc->lock;
  1470. video_set_drvdata(vfd, fimc);
  1471. vid_cap = &fimc->vid_cap;
  1472. vid_cap->active_buf_cnt = 0;
  1473. vid_cap->reqbufs_count = 0;
  1474. vid_cap->ctx = ctx;
  1475. INIT_LIST_HEAD(&vid_cap->pending_buf_q);
  1476. INIT_LIST_HEAD(&vid_cap->active_buf_q);
  1477. memset(q, 0, sizeof(*q));
  1478. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1479. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
  1480. q->drv_priv = ctx;
  1481. q->ops = &fimc_capture_qops;
  1482. q->mem_ops = &vb2_dma_contig_memops;
  1483. q->buf_struct_size = sizeof(struct fimc_vid_buffer);
  1484. q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1485. q->lock = &fimc->lock;
  1486. ret = vb2_queue_init(q);
  1487. if (ret)
  1488. goto err_ent;
  1489. vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1490. ret = media_entity_init(&vfd->entity, 1, &vid_cap->vd_pad, 0);
  1491. if (ret)
  1492. goto err_ent;
  1493. /*
  1494. * For proper order of acquiring/releasing the video
  1495. * and the graph mutex.
  1496. */
  1497. v4l2_disable_ioctl_locking(vfd, VIDIOC_TRY_FMT);
  1498. v4l2_disable_ioctl_locking(vfd, VIDIOC_S_FMT);
  1499. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1500. if (ret)
  1501. goto err_vd;
  1502. v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
  1503. vfd->name, video_device_node_name(vfd));
  1504. vfd->ctrl_handler = &ctx->ctrls.handler;
  1505. return 0;
  1506. err_vd:
  1507. media_entity_cleanup(&vfd->entity);
  1508. err_ent:
  1509. kfree(ctx);
  1510. return ret;
  1511. }
  1512. static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
  1513. {
  1514. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1515. int ret;
  1516. if (fimc == NULL)
  1517. return -ENXIO;
  1518. ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
  1519. if (ret)
  1520. return ret;
  1521. fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd);
  1522. ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
  1523. if (ret) {
  1524. fimc_unregister_m2m_device(fimc);
  1525. fimc->pipeline_ops = NULL;
  1526. }
  1527. return ret;
  1528. }
  1529. static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
  1530. {
  1531. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1532. if (fimc == NULL)
  1533. return;
  1534. fimc_unregister_m2m_device(fimc);
  1535. if (video_is_registered(&fimc->vid_cap.vfd)) {
  1536. video_unregister_device(&fimc->vid_cap.vfd);
  1537. media_entity_cleanup(&fimc->vid_cap.vfd.entity);
  1538. fimc->pipeline_ops = NULL;
  1539. }
  1540. kfree(fimc->vid_cap.ctx);
  1541. fimc->vid_cap.ctx = NULL;
  1542. }
  1543. static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
  1544. .registered = fimc_capture_subdev_registered,
  1545. .unregistered = fimc_capture_subdev_unregistered,
  1546. };
  1547. int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
  1548. {
  1549. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1550. int ret;
  1551. v4l2_subdev_init(sd, &fimc_subdev_ops);
  1552. sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1553. snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
  1554. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK;
  1555. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK;
  1556. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1557. ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
  1558. fimc->vid_cap.sd_pads, 0);
  1559. if (ret)
  1560. return ret;
  1561. sd->entity.ops = &fimc_sd_media_ops;
  1562. sd->internal_ops = &fimc_capture_sd_internal_ops;
  1563. v4l2_set_subdevdata(sd, fimc);
  1564. return 0;
  1565. }
  1566. void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
  1567. {
  1568. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1569. v4l2_device_unregister_subdev(sd);
  1570. media_entity_cleanup(&sd->entity);
  1571. v4l2_set_subdevdata(sd, NULL);
  1572. }