pci.c 24 KB

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  1. /*
  2. * Copyright IBM Corp. 2012
  3. *
  4. * Author(s):
  5. * Jan Glauber <jang@linux.vnet.ibm.com>
  6. *
  7. * The System z PCI code is a rewrite from a prototype by
  8. * the following people (Kudoz!):
  9. * Alexander Schmidt
  10. * Christoph Raisch
  11. * Hannes Hering
  12. * Hoang-Nam Nguyen
  13. * Jan-Bernd Themann
  14. * Stefan Roscher
  15. * Thomas Klein
  16. */
  17. #define COMPONENT "zPCI"
  18. #define pr_fmt(fmt) COMPONENT ": " fmt
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/err.h>
  22. #include <linux/export.h>
  23. #include <linux/delay.h>
  24. #include <linux/irq.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/pci.h>
  28. #include <linux/msi.h>
  29. #include <asm/isc.h>
  30. #include <asm/airq.h>
  31. #include <asm/facility.h>
  32. #include <asm/pci_insn.h>
  33. #include <asm/pci_clp.h>
  34. #include <asm/pci_dma.h>
  35. #define DEBUG /* enable pr_debug */
  36. #define SIC_IRQ_MODE_ALL 0
  37. #define SIC_IRQ_MODE_SINGLE 1
  38. #define ZPCI_NR_DMA_SPACES 1
  39. #define ZPCI_MSI_VEC_BITS 6
  40. #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
  41. /* list of all detected zpci devices */
  42. LIST_HEAD(zpci_list);
  43. EXPORT_SYMBOL_GPL(zpci_list);
  44. DEFINE_MUTEX(zpci_list_lock);
  45. EXPORT_SYMBOL_GPL(zpci_list_lock);
  46. static struct pci_hp_callback_ops *hotplug_ops;
  47. static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
  48. static DEFINE_SPINLOCK(zpci_domain_lock);
  49. struct callback {
  50. irq_handler_t handler;
  51. void *data;
  52. };
  53. struct zdev_irq_map {
  54. unsigned long aibv; /* AI bit vector */
  55. int msi_vecs; /* consecutive MSI-vectors used */
  56. int __unused;
  57. struct callback cb[ZPCI_NR_MSI_VECS]; /* callback handler array */
  58. spinlock_t lock; /* protect callbacks against de-reg */
  59. };
  60. struct intr_bucket {
  61. /* amap of adapters, one bit per dev, corresponds to one irq nr */
  62. unsigned long *alloc;
  63. /* AI summary bit, global page for all devices */
  64. unsigned long *aisb;
  65. /* pointer to aibv and callback data in zdev */
  66. struct zdev_irq_map *imap[ZPCI_NR_DEVICES];
  67. /* protects the whole bucket struct */
  68. spinlock_t lock;
  69. };
  70. static struct intr_bucket *bucket;
  71. /* Adapter local summary indicator */
  72. static u8 *zpci_irq_si;
  73. static atomic_t irq_retries = ATOMIC_INIT(0);
  74. /* I/O Map */
  75. static DEFINE_SPINLOCK(zpci_iomap_lock);
  76. static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  77. struct zpci_iomap_entry *zpci_iomap_start;
  78. EXPORT_SYMBOL_GPL(zpci_iomap_start);
  79. /* highest irq summary bit */
  80. static int __read_mostly aisb_max;
  81. static struct kmem_cache *zdev_irq_cache;
  82. static struct kmem_cache *zdev_fmb_cache;
  83. static inline int irq_to_msi_nr(unsigned int irq)
  84. {
  85. return irq & ZPCI_MSI_MASK;
  86. }
  87. static inline int irq_to_dev_nr(unsigned int irq)
  88. {
  89. return irq >> ZPCI_MSI_VEC_BITS;
  90. }
  91. static inline struct zdev_irq_map *get_imap(unsigned int irq)
  92. {
  93. return bucket->imap[irq_to_dev_nr(irq)];
  94. }
  95. struct zpci_dev *get_zdev(struct pci_dev *pdev)
  96. {
  97. return (struct zpci_dev *) pdev->sysdata;
  98. }
  99. struct zpci_dev *get_zdev_by_fid(u32 fid)
  100. {
  101. struct zpci_dev *tmp, *zdev = NULL;
  102. mutex_lock(&zpci_list_lock);
  103. list_for_each_entry(tmp, &zpci_list, entry) {
  104. if (tmp->fid == fid) {
  105. zdev = tmp;
  106. break;
  107. }
  108. }
  109. mutex_unlock(&zpci_list_lock);
  110. return zdev;
  111. }
  112. bool zpci_fid_present(u32 fid)
  113. {
  114. return (get_zdev_by_fid(fid) != NULL) ? true : false;
  115. }
  116. static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
  117. {
  118. return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
  119. }
  120. int pci_domain_nr(struct pci_bus *bus)
  121. {
  122. return ((struct zpci_dev *) bus->sysdata)->domain;
  123. }
  124. EXPORT_SYMBOL_GPL(pci_domain_nr);
  125. int pci_proc_domain(struct pci_bus *bus)
  126. {
  127. return pci_domain_nr(bus);
  128. }
  129. EXPORT_SYMBOL_GPL(pci_proc_domain);
  130. /* Modify PCI: Register adapter interruptions */
  131. static int zpci_register_airq(struct zpci_dev *zdev, unsigned int aisb,
  132. u64 aibv)
  133. {
  134. u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
  135. struct zpci_fib *fib;
  136. int rc;
  137. fib = (void *) get_zeroed_page(GFP_KERNEL);
  138. if (!fib)
  139. return -ENOMEM;
  140. fib->isc = PCI_ISC;
  141. fib->noi = zdev->irq_map->msi_vecs;
  142. fib->sum = 1; /* enable summary notifications */
  143. fib->aibv = aibv;
  144. fib->aibvo = 0; /* every function has its own page */
  145. fib->aisb = (u64) bucket->aisb + aisb / 8;
  146. fib->aisbo = aisb & ZPCI_MSI_MASK;
  147. rc = s390pci_mod_fc(req, fib);
  148. pr_debug("%s mpcifc returned noi: %d\n", __func__, fib->noi);
  149. free_page((unsigned long) fib);
  150. return rc;
  151. }
  152. struct mod_pci_args {
  153. u64 base;
  154. u64 limit;
  155. u64 iota;
  156. u64 fmb_addr;
  157. };
  158. static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
  159. {
  160. u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
  161. struct zpci_fib *fib;
  162. int rc;
  163. /* The FIB must be available even if it's not used */
  164. fib = (void *) get_zeroed_page(GFP_KERNEL);
  165. if (!fib)
  166. return -ENOMEM;
  167. fib->pba = args->base;
  168. fib->pal = args->limit;
  169. fib->iota = args->iota;
  170. fib->fmb_addr = args->fmb_addr;
  171. rc = s390pci_mod_fc(req, fib);
  172. free_page((unsigned long) fib);
  173. return rc;
  174. }
  175. /* Modify PCI: Register I/O address translation parameters */
  176. int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
  177. u64 base, u64 limit, u64 iota)
  178. {
  179. struct mod_pci_args args = { base, limit, iota, 0 };
  180. WARN_ON_ONCE(iota & 0x3fff);
  181. args.iota |= ZPCI_IOTA_RTTO_FLAG;
  182. return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
  183. }
  184. /* Modify PCI: Unregister I/O address translation parameters */
  185. int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
  186. {
  187. struct mod_pci_args args = { 0, 0, 0, 0 };
  188. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
  189. }
  190. /* Modify PCI: Unregister adapter interruptions */
  191. static int zpci_unregister_airq(struct zpci_dev *zdev)
  192. {
  193. struct mod_pci_args args = { 0, 0, 0, 0 };
  194. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
  195. }
  196. /* Modify PCI: Set PCI function measurement parameters */
  197. int zpci_fmb_enable_device(struct zpci_dev *zdev)
  198. {
  199. struct mod_pci_args args = { 0, 0, 0, 0 };
  200. if (zdev->fmb)
  201. return -EINVAL;
  202. zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
  203. if (!zdev->fmb)
  204. return -ENOMEM;
  205. WARN_ON((u64) zdev->fmb & 0xf);
  206. args.fmb_addr = virt_to_phys(zdev->fmb);
  207. return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  208. }
  209. /* Modify PCI: Disable PCI function measurement */
  210. int zpci_fmb_disable_device(struct zpci_dev *zdev)
  211. {
  212. struct mod_pci_args args = { 0, 0, 0, 0 };
  213. int rc;
  214. if (!zdev->fmb)
  215. return -EINVAL;
  216. /* Function measurement is disabled if fmb address is zero */
  217. rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  218. kmem_cache_free(zdev_fmb_cache, zdev->fmb);
  219. zdev->fmb = NULL;
  220. return rc;
  221. }
  222. #define ZPCI_PCIAS_CFGSPC 15
  223. static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
  224. {
  225. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  226. u64 data;
  227. int rc;
  228. rc = s390pci_load(&data, req, offset);
  229. if (!rc) {
  230. data = data << ((8 - len) * 8);
  231. data = le64_to_cpu(data);
  232. *val = (u32) data;
  233. } else
  234. *val = 0xffffffff;
  235. return rc;
  236. }
  237. static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
  238. {
  239. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  240. u64 data = val;
  241. int rc;
  242. data = cpu_to_le64(data);
  243. data = data >> ((8 - len) * 8);
  244. rc = s390pci_store(data, req, offset);
  245. return rc;
  246. }
  247. void synchronize_irq(unsigned int irq)
  248. {
  249. /*
  250. * Not needed, the handler is protected by a lock and IRQs that occur
  251. * after the handler is deleted are just NOPs.
  252. */
  253. }
  254. EXPORT_SYMBOL_GPL(synchronize_irq);
  255. void enable_irq(unsigned int irq)
  256. {
  257. struct msi_desc *msi = irq_get_msi_desc(irq);
  258. zpci_msi_set_mask_bits(msi, 1, 0);
  259. }
  260. EXPORT_SYMBOL_GPL(enable_irq);
  261. void disable_irq(unsigned int irq)
  262. {
  263. struct msi_desc *msi = irq_get_msi_desc(irq);
  264. zpci_msi_set_mask_bits(msi, 1, 1);
  265. }
  266. EXPORT_SYMBOL_GPL(disable_irq);
  267. void disable_irq_nosync(unsigned int irq)
  268. {
  269. disable_irq(irq);
  270. }
  271. EXPORT_SYMBOL_GPL(disable_irq_nosync);
  272. unsigned long probe_irq_on(void)
  273. {
  274. return 0;
  275. }
  276. EXPORT_SYMBOL_GPL(probe_irq_on);
  277. int probe_irq_off(unsigned long val)
  278. {
  279. return 0;
  280. }
  281. EXPORT_SYMBOL_GPL(probe_irq_off);
  282. unsigned int probe_irq_mask(unsigned long val)
  283. {
  284. return val;
  285. }
  286. EXPORT_SYMBOL_GPL(probe_irq_mask);
  287. void pcibios_fixup_bus(struct pci_bus *bus)
  288. {
  289. }
  290. resource_size_t pcibios_align_resource(void *data, const struct resource *res,
  291. resource_size_t size,
  292. resource_size_t align)
  293. {
  294. return 0;
  295. }
  296. /* combine single writes by using store-block insn */
  297. void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
  298. {
  299. zpci_memcpy_toio(to, from, count);
  300. }
  301. /* Create a virtual mapping cookie for a PCI BAR */
  302. void __iomem *pci_iomap(struct pci_dev *pdev, int bar, unsigned long max)
  303. {
  304. struct zpci_dev *zdev = get_zdev(pdev);
  305. u64 addr;
  306. int idx;
  307. if ((bar & 7) != bar)
  308. return NULL;
  309. idx = zdev->bars[bar].map_idx;
  310. spin_lock(&zpci_iomap_lock);
  311. zpci_iomap_start[idx].fh = zdev->fh;
  312. zpci_iomap_start[idx].bar = bar;
  313. spin_unlock(&zpci_iomap_lock);
  314. addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
  315. return (void __iomem *) addr;
  316. }
  317. EXPORT_SYMBOL_GPL(pci_iomap);
  318. void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
  319. {
  320. unsigned int idx;
  321. idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48;
  322. spin_lock(&zpci_iomap_lock);
  323. zpci_iomap_start[idx].fh = 0;
  324. zpci_iomap_start[idx].bar = 0;
  325. spin_unlock(&zpci_iomap_lock);
  326. }
  327. EXPORT_SYMBOL_GPL(pci_iounmap);
  328. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  329. int size, u32 *val)
  330. {
  331. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  332. int ret;
  333. if (!zdev || devfn != ZPCI_DEVFN)
  334. ret = -ENODEV;
  335. else
  336. ret = zpci_cfg_load(zdev, where, val, size);
  337. return ret;
  338. }
  339. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  340. int size, u32 val)
  341. {
  342. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  343. int ret;
  344. if (!zdev || devfn != ZPCI_DEVFN)
  345. ret = -ENODEV;
  346. else
  347. ret = zpci_cfg_store(zdev, where, val, size);
  348. return ret;
  349. }
  350. static struct pci_ops pci_root_ops = {
  351. .read = pci_read,
  352. .write = pci_write,
  353. };
  354. /* store the last handled bit to implement fair scheduling of devices */
  355. static DEFINE_PER_CPU(unsigned long, next_sbit);
  356. static void zpci_irq_handler(void *dont, void *need)
  357. {
  358. unsigned long sbit, mbit, last = 0, start = __get_cpu_var(next_sbit);
  359. int rescan = 0, max = aisb_max;
  360. struct zdev_irq_map *imap;
  361. inc_irq_stat(IRQIO_PCI);
  362. sbit = start;
  363. scan:
  364. /* find summary_bit */
  365. for_each_set_bit_left_cont(sbit, bucket->aisb, max) {
  366. clear_bit(63 - (sbit & 63), bucket->aisb + (sbit >> 6));
  367. last = sbit;
  368. /* find vector bit */
  369. imap = bucket->imap[sbit];
  370. for_each_set_bit_left(mbit, &imap->aibv, imap->msi_vecs) {
  371. inc_irq_stat(IRQIO_MSI);
  372. clear_bit(63 - mbit, &imap->aibv);
  373. spin_lock(&imap->lock);
  374. if (imap->cb[mbit].handler)
  375. imap->cb[mbit].handler(mbit,
  376. imap->cb[mbit].data);
  377. spin_unlock(&imap->lock);
  378. }
  379. }
  380. if (rescan)
  381. goto out;
  382. /* scan the skipped bits */
  383. if (start > 0) {
  384. sbit = 0;
  385. max = start;
  386. start = 0;
  387. goto scan;
  388. }
  389. /* enable interrupts again */
  390. set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  391. /* check again to not lose initiative */
  392. rmb();
  393. max = aisb_max;
  394. sbit = find_first_bit_left(bucket->aisb, max);
  395. if (sbit != max) {
  396. atomic_inc(&irq_retries);
  397. rescan++;
  398. goto scan;
  399. }
  400. out:
  401. /* store next device bit to scan */
  402. __get_cpu_var(next_sbit) = (++last >= aisb_max) ? 0 : last;
  403. }
  404. /* msi_vecs - number of requested interrupts, 0 place function to error state */
  405. static int zpci_setup_msi(struct pci_dev *pdev, int msi_vecs)
  406. {
  407. struct zpci_dev *zdev = get_zdev(pdev);
  408. unsigned int aisb, msi_nr;
  409. struct msi_desc *msi;
  410. int rc;
  411. /* store the number of used MSI vectors */
  412. zdev->irq_map->msi_vecs = min(msi_vecs, ZPCI_NR_MSI_VECS);
  413. spin_lock(&bucket->lock);
  414. aisb = find_first_zero_bit(bucket->alloc, PAGE_SIZE);
  415. /* alloc map exhausted? */
  416. if (aisb == PAGE_SIZE) {
  417. spin_unlock(&bucket->lock);
  418. return -EIO;
  419. }
  420. set_bit(aisb, bucket->alloc);
  421. spin_unlock(&bucket->lock);
  422. zdev->aisb = aisb;
  423. if (aisb + 1 > aisb_max)
  424. aisb_max = aisb + 1;
  425. /* wire up IRQ shortcut pointer */
  426. bucket->imap[zdev->aisb] = zdev->irq_map;
  427. pr_debug("%s: imap[%u] linked to %p\n", __func__, zdev->aisb, zdev->irq_map);
  428. /* TODO: irq number 0 wont be found if we return less than requested MSIs.
  429. * ignore it for now and fix in common code.
  430. */
  431. msi_nr = aisb << ZPCI_MSI_VEC_BITS;
  432. list_for_each_entry(msi, &pdev->msi_list, list) {
  433. rc = zpci_setup_msi_irq(zdev, msi, msi_nr,
  434. aisb << ZPCI_MSI_VEC_BITS);
  435. if (rc)
  436. return rc;
  437. msi_nr++;
  438. }
  439. rc = zpci_register_airq(zdev, aisb, (u64) &zdev->irq_map->aibv);
  440. if (rc) {
  441. clear_bit(aisb, bucket->alloc);
  442. dev_err(&pdev->dev, "register MSI failed with: %d\n", rc);
  443. return rc;
  444. }
  445. return (zdev->irq_map->msi_vecs == msi_vecs) ?
  446. 0 : zdev->irq_map->msi_vecs;
  447. }
  448. static void zpci_teardown_msi(struct pci_dev *pdev)
  449. {
  450. struct zpci_dev *zdev = get_zdev(pdev);
  451. struct msi_desc *msi;
  452. int aisb, rc;
  453. rc = zpci_unregister_airq(zdev);
  454. if (rc) {
  455. dev_err(&pdev->dev, "deregister MSI failed with: %d\n", rc);
  456. return;
  457. }
  458. msi = list_first_entry(&pdev->msi_list, struct msi_desc, list);
  459. aisb = irq_to_dev_nr(msi->irq);
  460. list_for_each_entry(msi, &pdev->msi_list, list)
  461. zpci_teardown_msi_irq(zdev, msi);
  462. clear_bit(aisb, bucket->alloc);
  463. if (aisb + 1 == aisb_max)
  464. aisb_max--;
  465. }
  466. int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
  467. {
  468. pr_debug("%s: requesting %d MSI-X interrupts...", __func__, nvec);
  469. if (type != PCI_CAP_ID_MSIX && type != PCI_CAP_ID_MSI)
  470. return -EINVAL;
  471. return zpci_setup_msi(pdev, nvec);
  472. }
  473. void arch_teardown_msi_irqs(struct pci_dev *pdev)
  474. {
  475. pr_info("%s: on pdev: %p\n", __func__, pdev);
  476. zpci_teardown_msi(pdev);
  477. }
  478. static void zpci_map_resources(struct zpci_dev *zdev)
  479. {
  480. struct pci_dev *pdev = zdev->pdev;
  481. resource_size_t len;
  482. int i;
  483. for (i = 0; i < PCI_BAR_COUNT; i++) {
  484. len = pci_resource_len(pdev, i);
  485. if (!len)
  486. continue;
  487. pdev->resource[i].start = (resource_size_t) pci_iomap(pdev, i, 0);
  488. pdev->resource[i].end = pdev->resource[i].start + len - 1;
  489. pr_debug("BAR%i: -> start: %Lx end: %Lx\n",
  490. i, pdev->resource[i].start, pdev->resource[i].end);
  491. }
  492. };
  493. struct zpci_dev *zpci_alloc_device(void)
  494. {
  495. struct zpci_dev *zdev;
  496. /* Alloc memory for our private pci device data */
  497. zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
  498. if (!zdev)
  499. return ERR_PTR(-ENOMEM);
  500. /* Alloc aibv & callback space */
  501. zdev->irq_map = kmem_cache_zalloc(zdev_irq_cache, GFP_KERNEL);
  502. if (!zdev->irq_map)
  503. goto error;
  504. WARN_ON((u64) zdev->irq_map & 0xff);
  505. return zdev;
  506. error:
  507. kfree(zdev);
  508. return ERR_PTR(-ENOMEM);
  509. }
  510. void zpci_free_device(struct zpci_dev *zdev)
  511. {
  512. kmem_cache_free(zdev_irq_cache, zdev->irq_map);
  513. kfree(zdev);
  514. }
  515. /*
  516. * Too late for any s390 specific setup, since interrupts must be set up
  517. * already which requires DMA setup too and the pci scan will access the
  518. * config space, which only works if the function handle is enabled.
  519. */
  520. int pcibios_enable_device(struct pci_dev *pdev, int mask)
  521. {
  522. struct resource *res;
  523. u16 cmd;
  524. int i;
  525. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  526. for (i = 0; i < PCI_BAR_COUNT; i++) {
  527. res = &pdev->resource[i];
  528. if (res->flags & IORESOURCE_IO)
  529. return -EINVAL;
  530. if (res->flags & IORESOURCE_MEM)
  531. cmd |= PCI_COMMAND_MEMORY;
  532. }
  533. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  534. return 0;
  535. }
  536. int pcibios_add_platform_entries(struct pci_dev *pdev)
  537. {
  538. return zpci_sysfs_add_device(&pdev->dev);
  539. }
  540. int zpci_request_irq(unsigned int irq, irq_handler_t handler, void *data)
  541. {
  542. int msi_nr = irq_to_msi_nr(irq);
  543. struct zdev_irq_map *imap;
  544. struct msi_desc *msi;
  545. msi = irq_get_msi_desc(irq);
  546. if (!msi)
  547. return -EIO;
  548. imap = get_imap(irq);
  549. spin_lock_init(&imap->lock);
  550. pr_debug("%s: register handler for IRQ:MSI %d:%d\n", __func__, irq >> 6, msi_nr);
  551. imap->cb[msi_nr].handler = handler;
  552. imap->cb[msi_nr].data = data;
  553. /*
  554. * The generic MSI code returns with the interrupt disabled on the
  555. * card, using the MSI mask bits. Firmware doesn't appear to unmask
  556. * at that level, so we do it here by hand.
  557. */
  558. zpci_msi_set_mask_bits(msi, 1, 0);
  559. return 0;
  560. }
  561. void zpci_free_irq(unsigned int irq)
  562. {
  563. struct zdev_irq_map *imap = get_imap(irq);
  564. int msi_nr = irq_to_msi_nr(irq);
  565. unsigned long flags;
  566. pr_debug("%s: for irq: %d\n", __func__, irq);
  567. spin_lock_irqsave(&imap->lock, flags);
  568. imap->cb[msi_nr].handler = NULL;
  569. imap->cb[msi_nr].data = NULL;
  570. spin_unlock_irqrestore(&imap->lock, flags);
  571. }
  572. int request_irq(unsigned int irq, irq_handler_t handler,
  573. unsigned long irqflags, const char *devname, void *dev_id)
  574. {
  575. pr_debug("%s: irq: %d handler: %p flags: %lx dev: %s\n",
  576. __func__, irq, handler, irqflags, devname);
  577. return zpci_request_irq(irq, handler, dev_id);
  578. }
  579. EXPORT_SYMBOL_GPL(request_irq);
  580. void free_irq(unsigned int irq, void *dev_id)
  581. {
  582. zpci_free_irq(irq);
  583. }
  584. EXPORT_SYMBOL_GPL(free_irq);
  585. static int __init zpci_irq_init(void)
  586. {
  587. int cpu, rc;
  588. bucket = kzalloc(sizeof(*bucket), GFP_KERNEL);
  589. if (!bucket)
  590. return -ENOMEM;
  591. bucket->aisb = (unsigned long *) get_zeroed_page(GFP_KERNEL);
  592. if (!bucket->aisb) {
  593. rc = -ENOMEM;
  594. goto out_aisb;
  595. }
  596. bucket->alloc = (unsigned long *) get_zeroed_page(GFP_KERNEL);
  597. if (!bucket->alloc) {
  598. rc = -ENOMEM;
  599. goto out_alloc;
  600. }
  601. isc_register(PCI_ISC);
  602. zpci_irq_si = s390_register_adapter_interrupt(&zpci_irq_handler, NULL, PCI_ISC);
  603. if (IS_ERR(zpci_irq_si)) {
  604. rc = PTR_ERR(zpci_irq_si);
  605. zpci_irq_si = NULL;
  606. goto out_ai;
  607. }
  608. for_each_online_cpu(cpu)
  609. per_cpu(next_sbit, cpu) = 0;
  610. spin_lock_init(&bucket->lock);
  611. /* set summary to 1 to be called every time for the ISC */
  612. *zpci_irq_si = 1;
  613. set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  614. return 0;
  615. out_ai:
  616. isc_unregister(PCI_ISC);
  617. free_page((unsigned long) bucket->alloc);
  618. out_alloc:
  619. free_page((unsigned long) bucket->aisb);
  620. out_aisb:
  621. kfree(bucket);
  622. return rc;
  623. }
  624. static void zpci_irq_exit(void)
  625. {
  626. free_page((unsigned long) bucket->alloc);
  627. free_page((unsigned long) bucket->aisb);
  628. s390_unregister_adapter_interrupt(zpci_irq_si, PCI_ISC);
  629. isc_unregister(PCI_ISC);
  630. kfree(bucket);
  631. }
  632. void zpci_debug_info(struct zpci_dev *zdev, struct seq_file *m)
  633. {
  634. if (!zdev)
  635. return;
  636. seq_printf(m, "global irq retries: %u\n", atomic_read(&irq_retries));
  637. seq_printf(m, "aibv[0]:%016lx aibv[1]:%016lx aisb:%016lx\n",
  638. get_imap(0)->aibv, get_imap(1)->aibv, *bucket->aisb);
  639. }
  640. static struct resource *zpci_alloc_bus_resource(unsigned long start, unsigned long size,
  641. unsigned long flags, int domain)
  642. {
  643. struct resource *r;
  644. char *name;
  645. int rc;
  646. r = kzalloc(sizeof(*r), GFP_KERNEL);
  647. if (!r)
  648. return ERR_PTR(-ENOMEM);
  649. r->start = start;
  650. r->end = r->start + size - 1;
  651. r->flags = flags;
  652. r->parent = &iomem_resource;
  653. name = kmalloc(18, GFP_KERNEL);
  654. if (!name) {
  655. kfree(r);
  656. return ERR_PTR(-ENOMEM);
  657. }
  658. sprintf(name, "PCI Bus: %04x:%02x", domain, ZPCI_BUS_NR);
  659. r->name = name;
  660. rc = request_resource(&iomem_resource, r);
  661. if (rc)
  662. pr_debug("request resource %pR failed\n", r);
  663. return r;
  664. }
  665. static int zpci_alloc_iomap(struct zpci_dev *zdev)
  666. {
  667. int entry;
  668. spin_lock(&zpci_iomap_lock);
  669. entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  670. if (entry == ZPCI_IOMAP_MAX_ENTRIES) {
  671. spin_unlock(&zpci_iomap_lock);
  672. return -ENOSPC;
  673. }
  674. set_bit(entry, zpci_iomap);
  675. spin_unlock(&zpci_iomap_lock);
  676. return entry;
  677. }
  678. static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
  679. {
  680. spin_lock(&zpci_iomap_lock);
  681. memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
  682. clear_bit(entry, zpci_iomap);
  683. spin_unlock(&zpci_iomap_lock);
  684. }
  685. int pcibios_add_device(struct pci_dev *pdev)
  686. {
  687. struct zpci_dev *zdev = get_zdev(pdev);
  688. zdev->pdev = pdev;
  689. zpci_debug_init_device(zdev);
  690. zpci_fmb_enable_device(zdev);
  691. zpci_map_resources(zdev);
  692. return 0;
  693. }
  694. static int zpci_scan_bus(struct zpci_dev *zdev)
  695. {
  696. struct resource *res;
  697. LIST_HEAD(resources);
  698. int i;
  699. /* allocate mapping entry for each used bar */
  700. for (i = 0; i < PCI_BAR_COUNT; i++) {
  701. unsigned long addr, size, flags;
  702. int entry;
  703. if (!zdev->bars[i].size)
  704. continue;
  705. entry = zpci_alloc_iomap(zdev);
  706. if (entry < 0)
  707. return entry;
  708. zdev->bars[i].map_idx = entry;
  709. /* only MMIO is supported */
  710. flags = IORESOURCE_MEM;
  711. if (zdev->bars[i].val & 8)
  712. flags |= IORESOURCE_PREFETCH;
  713. if (zdev->bars[i].val & 4)
  714. flags |= IORESOURCE_MEM_64;
  715. addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48);
  716. size = 1UL << zdev->bars[i].size;
  717. res = zpci_alloc_bus_resource(addr, size, flags, zdev->domain);
  718. if (IS_ERR(res)) {
  719. zpci_free_iomap(zdev, entry);
  720. return PTR_ERR(res);
  721. }
  722. pci_add_resource(&resources, res);
  723. }
  724. zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
  725. zdev, &resources);
  726. if (!zdev->bus)
  727. return -EIO;
  728. zdev->bus->max_bus_speed = zdev->max_bus_speed;
  729. return 0;
  730. }
  731. static int zpci_alloc_domain(struct zpci_dev *zdev)
  732. {
  733. spin_lock(&zpci_domain_lock);
  734. zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
  735. if (zdev->domain == ZPCI_NR_DEVICES) {
  736. spin_unlock(&zpci_domain_lock);
  737. return -ENOSPC;
  738. }
  739. set_bit(zdev->domain, zpci_domain);
  740. spin_unlock(&zpci_domain_lock);
  741. return 0;
  742. }
  743. static void zpci_free_domain(struct zpci_dev *zdev)
  744. {
  745. spin_lock(&zpci_domain_lock);
  746. clear_bit(zdev->domain, zpci_domain);
  747. spin_unlock(&zpci_domain_lock);
  748. }
  749. int zpci_enable_device(struct zpci_dev *zdev)
  750. {
  751. int rc;
  752. rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  753. if (rc)
  754. goto out;
  755. pr_info("Enabled fh: 0x%x fid: 0x%x\n", zdev->fh, zdev->fid);
  756. rc = zpci_dma_init_device(zdev);
  757. if (rc)
  758. goto out_dma;
  759. return 0;
  760. out_dma:
  761. clp_disable_fh(zdev);
  762. out:
  763. return rc;
  764. }
  765. EXPORT_SYMBOL_GPL(zpci_enable_device);
  766. int zpci_disable_device(struct zpci_dev *zdev)
  767. {
  768. zpci_dma_exit_device(zdev);
  769. return clp_disable_fh(zdev);
  770. }
  771. EXPORT_SYMBOL_GPL(zpci_disable_device);
  772. int zpci_create_device(struct zpci_dev *zdev)
  773. {
  774. int rc;
  775. rc = zpci_alloc_domain(zdev);
  776. if (rc)
  777. goto out;
  778. if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
  779. rc = zpci_enable_device(zdev);
  780. if (rc)
  781. goto out_free;
  782. zdev->state = ZPCI_FN_STATE_ONLINE;
  783. }
  784. rc = zpci_scan_bus(zdev);
  785. if (rc)
  786. goto out_disable;
  787. mutex_lock(&zpci_list_lock);
  788. list_add_tail(&zdev->entry, &zpci_list);
  789. if (hotplug_ops)
  790. hotplug_ops->create_slot(zdev);
  791. mutex_unlock(&zpci_list_lock);
  792. return 0;
  793. out_disable:
  794. if (zdev->state == ZPCI_FN_STATE_ONLINE)
  795. zpci_disable_device(zdev);
  796. out_free:
  797. zpci_free_domain(zdev);
  798. out:
  799. return rc;
  800. }
  801. void zpci_stop_device(struct zpci_dev *zdev)
  802. {
  803. zpci_dma_exit_device(zdev);
  804. /*
  805. * Note: SCLP disables fh via set-pci-fn so don't
  806. * do that here.
  807. */
  808. }
  809. EXPORT_SYMBOL_GPL(zpci_stop_device);
  810. int zpci_scan_device(struct zpci_dev *zdev)
  811. {
  812. zdev->pdev = pci_scan_single_device(zdev->bus, ZPCI_DEVFN);
  813. if (!zdev->pdev) {
  814. pr_err("pci_scan_single_device failed for fid: 0x%x\n",
  815. zdev->fid);
  816. goto out;
  817. }
  818. pci_bus_add_devices(zdev->bus);
  819. return 0;
  820. out:
  821. zpci_dma_exit_device(zdev);
  822. clp_disable_fh(zdev);
  823. return -EIO;
  824. }
  825. EXPORT_SYMBOL_GPL(zpci_scan_device);
  826. static inline int barsize(u8 size)
  827. {
  828. return (size) ? (1 << size) >> 10 : 0;
  829. }
  830. static int zpci_mem_init(void)
  831. {
  832. zdev_irq_cache = kmem_cache_create("PCI_IRQ_cache", sizeof(struct zdev_irq_map),
  833. L1_CACHE_BYTES, SLAB_HWCACHE_ALIGN, NULL);
  834. if (!zdev_irq_cache)
  835. goto error_zdev;
  836. zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
  837. 16, 0, NULL);
  838. if (!zdev_fmb_cache)
  839. goto error_fmb;
  840. /* TODO: use realloc */
  841. zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start),
  842. GFP_KERNEL);
  843. if (!zpci_iomap_start)
  844. goto error_iomap;
  845. return 0;
  846. error_iomap:
  847. kmem_cache_destroy(zdev_fmb_cache);
  848. error_fmb:
  849. kmem_cache_destroy(zdev_irq_cache);
  850. error_zdev:
  851. return -ENOMEM;
  852. }
  853. static void zpci_mem_exit(void)
  854. {
  855. kfree(zpci_iomap_start);
  856. kmem_cache_destroy(zdev_irq_cache);
  857. kmem_cache_destroy(zdev_fmb_cache);
  858. }
  859. void zpci_register_hp_ops(struct pci_hp_callback_ops *ops)
  860. {
  861. mutex_lock(&zpci_list_lock);
  862. hotplug_ops = ops;
  863. mutex_unlock(&zpci_list_lock);
  864. }
  865. EXPORT_SYMBOL_GPL(zpci_register_hp_ops);
  866. void zpci_deregister_hp_ops(void)
  867. {
  868. mutex_lock(&zpci_list_lock);
  869. hotplug_ops = NULL;
  870. mutex_unlock(&zpci_list_lock);
  871. }
  872. EXPORT_SYMBOL_GPL(zpci_deregister_hp_ops);
  873. unsigned int s390_pci_probe;
  874. EXPORT_SYMBOL_GPL(s390_pci_probe);
  875. char * __init pcibios_setup(char *str)
  876. {
  877. if (!strcmp(str, "on")) {
  878. s390_pci_probe = 1;
  879. return NULL;
  880. }
  881. return str;
  882. }
  883. static int __init pci_base_init(void)
  884. {
  885. int rc;
  886. if (!s390_pci_probe)
  887. return 0;
  888. if (!test_facility(2) || !test_facility(69)
  889. || !test_facility(71) || !test_facility(72))
  890. return 0;
  891. pr_info("Probing PCI hardware: PCI:%d SID:%d AEN:%d\n",
  892. test_facility(69), test_facility(70),
  893. test_facility(71));
  894. rc = zpci_debug_init();
  895. if (rc)
  896. return rc;
  897. rc = zpci_mem_init();
  898. if (rc)
  899. goto out_mem;
  900. rc = zpci_msihash_init();
  901. if (rc)
  902. goto out_hash;
  903. rc = zpci_irq_init();
  904. if (rc)
  905. goto out_irq;
  906. rc = zpci_dma_init();
  907. if (rc)
  908. goto out_dma;
  909. rc = clp_find_pci_devices();
  910. if (rc)
  911. goto out_find;
  912. return 0;
  913. out_find:
  914. zpci_dma_exit();
  915. out_dma:
  916. zpci_irq_exit();
  917. out_irq:
  918. zpci_msihash_exit();
  919. out_hash:
  920. zpci_mem_exit();
  921. out_mem:
  922. zpci_debug_exit();
  923. return rc;
  924. }
  925. subsys_initcall(pci_base_init);