dma-mapping.h 6.0 KB

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  1. /*
  2. * Copyright (C) 2004 IBM
  3. *
  4. * Implements the generic device dma API for powerpc.
  5. * the pci and vio busses
  6. */
  7. #ifndef _ASM_DMA_MAPPING_H
  8. #define _ASM_DMA_MAPPING_H
  9. #ifdef __KERNEL__
  10. #include <linux/types.h>
  11. #include <linux/cache.h>
  12. /* need struct page definitions */
  13. #include <linux/mm.h>
  14. #include <linux/scatterlist.h>
  15. #include <linux/dma-attrs.h>
  16. #include <linux/dma-debug.h>
  17. #include <asm/io.h>
  18. #include <asm/swiotlb.h>
  19. #define DMA_ERROR_CODE (~(dma_addr_t)0x0)
  20. /* Some dma direct funcs must be visible for use in other dma_ops */
  21. extern void *dma_direct_alloc_coherent(struct device *dev, size_t size,
  22. dma_addr_t *dma_handle, gfp_t flag,
  23. struct dma_attrs *attrs);
  24. extern void dma_direct_free_coherent(struct device *dev, size_t size,
  25. void *vaddr, dma_addr_t dma_handle,
  26. struct dma_attrs *attrs);
  27. extern int dma_direct_mmap_coherent(struct device *dev,
  28. struct vm_area_struct *vma,
  29. void *cpu_addr, dma_addr_t handle,
  30. size_t size, struct dma_attrs *attrs);
  31. #ifdef CONFIG_NOT_COHERENT_CACHE
  32. /*
  33. * DMA-consistent mapping functions for PowerPCs that don't support
  34. * cache snooping. These allocate/free a region of uncached mapped
  35. * memory space for use with DMA devices. Alternatively, you could
  36. * allocate the space "normally" and use the cache management functions
  37. * to ensure it is consistent.
  38. */
  39. struct device;
  40. extern void *__dma_alloc_coherent(struct device *dev, size_t size,
  41. dma_addr_t *handle, gfp_t gfp);
  42. extern void __dma_free_coherent(size_t size, void *vaddr);
  43. extern void __dma_sync(void *vaddr, size_t size, int direction);
  44. extern void __dma_sync_page(struct page *page, unsigned long offset,
  45. size_t size, int direction);
  46. extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
  47. #else /* ! CONFIG_NOT_COHERENT_CACHE */
  48. /*
  49. * Cache coherent cores.
  50. */
  51. #define __dma_alloc_coherent(dev, gfp, size, handle) NULL
  52. #define __dma_free_coherent(size, addr) ((void)0)
  53. #define __dma_sync(addr, size, rw) ((void)0)
  54. #define __dma_sync_page(pg, off, sz, rw) ((void)0)
  55. #endif /* ! CONFIG_NOT_COHERENT_CACHE */
  56. static inline unsigned long device_to_mask(struct device *dev)
  57. {
  58. if (dev->dma_mask && *dev->dma_mask)
  59. return *dev->dma_mask;
  60. /* Assume devices without mask can take 32 bit addresses */
  61. return 0xfffffffful;
  62. }
  63. /*
  64. * Available generic sets of operations
  65. */
  66. #ifdef CONFIG_PPC64
  67. extern struct dma_map_ops dma_iommu_ops;
  68. #endif
  69. extern struct dma_map_ops dma_direct_ops;
  70. static inline struct dma_map_ops *get_dma_ops(struct device *dev)
  71. {
  72. /* We don't handle the NULL dev case for ISA for now. We could
  73. * do it via an out of line call but it is not needed for now. The
  74. * only ISA DMA device we support is the floppy and we have a hack
  75. * in the floppy driver directly to get a device for us.
  76. */
  77. if (unlikely(dev == NULL))
  78. return NULL;
  79. return dev->archdata.dma_ops;
  80. }
  81. static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
  82. {
  83. dev->archdata.dma_ops = ops;
  84. }
  85. /*
  86. * get_dma_offset()
  87. *
  88. * Get the dma offset on configurations where the dma address can be determined
  89. * from the physical address by looking at a simple offset. Direct dma and
  90. * swiotlb use this function, but it is typically not used by implementations
  91. * with an iommu.
  92. */
  93. static inline dma_addr_t get_dma_offset(struct device *dev)
  94. {
  95. if (dev)
  96. return dev->archdata.dma_data.dma_offset;
  97. return PCI_DRAM_OFFSET;
  98. }
  99. static inline void set_dma_offset(struct device *dev, dma_addr_t off)
  100. {
  101. if (dev)
  102. dev->archdata.dma_data.dma_offset = off;
  103. }
  104. /* this will be removed soon */
  105. #define flush_write_buffers()
  106. #include <asm-generic/dma-mapping-common.h>
  107. static inline int dma_supported(struct device *dev, u64 mask)
  108. {
  109. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  110. if (unlikely(dma_ops == NULL))
  111. return 0;
  112. if (dma_ops->dma_supported == NULL)
  113. return 1;
  114. return dma_ops->dma_supported(dev, mask);
  115. }
  116. extern int dma_set_mask(struct device *dev, u64 dma_mask);
  117. #define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
  118. static inline void *dma_alloc_attrs(struct device *dev, size_t size,
  119. dma_addr_t *dma_handle, gfp_t flag,
  120. struct dma_attrs *attrs)
  121. {
  122. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  123. void *cpu_addr;
  124. BUG_ON(!dma_ops);
  125. cpu_addr = dma_ops->alloc(dev, size, dma_handle, flag, attrs);
  126. debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
  127. return cpu_addr;
  128. }
  129. #define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
  130. static inline void dma_free_attrs(struct device *dev, size_t size,
  131. void *cpu_addr, dma_addr_t dma_handle,
  132. struct dma_attrs *attrs)
  133. {
  134. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  135. BUG_ON(!dma_ops);
  136. debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
  137. dma_ops->free(dev, size, cpu_addr, dma_handle, attrs);
  138. }
  139. static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  140. {
  141. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  142. debug_dma_mapping_error(dev, dma_addr);
  143. if (dma_ops->mapping_error)
  144. return dma_ops->mapping_error(dev, dma_addr);
  145. #ifdef CONFIG_PPC64
  146. return (dma_addr == DMA_ERROR_CODE);
  147. #else
  148. return 0;
  149. #endif
  150. }
  151. static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
  152. {
  153. #ifdef CONFIG_SWIOTLB
  154. struct dev_archdata *sd = &dev->archdata;
  155. if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr)
  156. return 0;
  157. #endif
  158. if (!dev->dma_mask)
  159. return 0;
  160. return addr + size - 1 <= *dev->dma_mask;
  161. }
  162. static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
  163. {
  164. return paddr + get_dma_offset(dev);
  165. }
  166. static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
  167. {
  168. return daddr - get_dma_offset(dev);
  169. }
  170. #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
  171. #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
  172. #define ARCH_HAS_DMA_MMAP_COHERENT
  173. static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  174. enum dma_data_direction direction)
  175. {
  176. BUG_ON(direction == DMA_NONE);
  177. __dma_sync(vaddr, size, (int)direction);
  178. }
  179. #endif /* __KERNEL__ */
  180. #endif /* _ASM_DMA_MAPPING_H */