board-3430sdp.c 15 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-3430sdp.c
  3. *
  4. * Copyright (C) 2007 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-generic.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/input.h>
  19. #include <linux/input/matrix_keypad.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/i2c/twl.h>
  22. #include <linux/regulator/machine.h>
  23. #include <linux/io.h>
  24. #include <linux/gpio.h>
  25. #include <linux/mmc/host.h>
  26. #include <linux/platform_data/spi-omap2-mcspi.h>
  27. #include <linux/platform_data/omap-twl4030.h>
  28. #include <linux/usb/phy.h>
  29. #include <asm/mach-types.h>
  30. #include <asm/mach/arch.h>
  31. #include <asm/mach/map.h>
  32. #include "common.h"
  33. #include <linux/omap-dma.h>
  34. #include <video/omapdss.h>
  35. #include <video/omap-panel-tfp410.h>
  36. #include "gpmc.h"
  37. #include "gpmc-smc91x.h"
  38. #include "soc.h"
  39. #include "board-flash.h"
  40. #include "mux.h"
  41. #include "sdram-qimonda-hyb18m512160af-6.h"
  42. #include "hsmmc.h"
  43. #include "pm.h"
  44. #include "control.h"
  45. #include "common-board-devices.h"
  46. #define CONFIG_DISABLE_HFCLK 1
  47. #define SDP3430_TS_GPIO_IRQ_SDPV1 3
  48. #define SDP3430_TS_GPIO_IRQ_SDPV2 2
  49. #define ENABLE_VAUX3_DEDICATED 0x03
  50. #define ENABLE_VAUX3_DEV_GRP 0x20
  51. #define TWL4030_MSECURE_GPIO 22
  52. static uint32_t board_keymap[] = {
  53. KEY(0, 0, KEY_LEFT),
  54. KEY(0, 1, KEY_RIGHT),
  55. KEY(0, 2, KEY_A),
  56. KEY(0, 3, KEY_B),
  57. KEY(0, 4, KEY_C),
  58. KEY(1, 0, KEY_DOWN),
  59. KEY(1, 1, KEY_UP),
  60. KEY(1, 2, KEY_E),
  61. KEY(1, 3, KEY_F),
  62. KEY(1, 4, KEY_G),
  63. KEY(2, 0, KEY_ENTER),
  64. KEY(2, 1, KEY_I),
  65. KEY(2, 2, KEY_J),
  66. KEY(2, 3, KEY_K),
  67. KEY(2, 4, KEY_3),
  68. KEY(3, 0, KEY_M),
  69. KEY(3, 1, KEY_N),
  70. KEY(3, 2, KEY_O),
  71. KEY(3, 3, KEY_P),
  72. KEY(3, 4, KEY_Q),
  73. KEY(4, 0, KEY_R),
  74. KEY(4, 1, KEY_4),
  75. KEY(4, 2, KEY_T),
  76. KEY(4, 3, KEY_U),
  77. KEY(4, 4, KEY_D),
  78. KEY(5, 0, KEY_V),
  79. KEY(5, 1, KEY_W),
  80. KEY(5, 2, KEY_L),
  81. KEY(5, 3, KEY_S),
  82. KEY(5, 4, KEY_H),
  83. 0
  84. };
  85. static struct matrix_keymap_data board_map_data = {
  86. .keymap = board_keymap,
  87. .keymap_size = ARRAY_SIZE(board_keymap),
  88. };
  89. static struct twl4030_keypad_data sdp3430_kp_data = {
  90. .keymap_data = &board_map_data,
  91. .rows = 5,
  92. .cols = 6,
  93. .rep = 1,
  94. };
  95. #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
  96. #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
  97. static struct gpio sdp3430_dss_gpios[] __initdata = {
  98. {SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" },
  99. {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
  100. };
  101. static void __init sdp3430_display_init(void)
  102. {
  103. int r;
  104. r = gpio_request_array(sdp3430_dss_gpios,
  105. ARRAY_SIZE(sdp3430_dss_gpios));
  106. if (r)
  107. printk(KERN_ERR "failed to get LCD control GPIOs\n");
  108. }
  109. static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
  110. {
  111. gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
  112. gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
  113. return 0;
  114. }
  115. static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
  116. {
  117. gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
  118. gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
  119. }
  120. static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
  121. {
  122. return 0;
  123. }
  124. static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
  125. {
  126. }
  127. static struct omap_dss_device sdp3430_lcd_device = {
  128. .name = "lcd",
  129. .driver_name = "sharp_ls_panel",
  130. .type = OMAP_DISPLAY_TYPE_DPI,
  131. .phy.dpi.data_lines = 16,
  132. .platform_enable = sdp3430_panel_enable_lcd,
  133. .platform_disable = sdp3430_panel_disable_lcd,
  134. };
  135. static struct tfp410_platform_data dvi_panel = {
  136. .power_down_gpio = -1,
  137. .i2c_bus_num = -1,
  138. };
  139. static struct omap_dss_device sdp3430_dvi_device = {
  140. .name = "dvi",
  141. .type = OMAP_DISPLAY_TYPE_DPI,
  142. .driver_name = "tfp410",
  143. .data = &dvi_panel,
  144. .phy.dpi.data_lines = 24,
  145. };
  146. static struct omap_dss_device sdp3430_tv_device = {
  147. .name = "tv",
  148. .driver_name = "venc",
  149. .type = OMAP_DISPLAY_TYPE_VENC,
  150. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  151. .platform_enable = sdp3430_panel_enable_tv,
  152. .platform_disable = sdp3430_panel_disable_tv,
  153. };
  154. static struct omap_dss_device *sdp3430_dss_devices[] = {
  155. &sdp3430_lcd_device,
  156. &sdp3430_dvi_device,
  157. &sdp3430_tv_device,
  158. };
  159. static struct omap_dss_board_info sdp3430_dss_data = {
  160. .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
  161. .devices = sdp3430_dss_devices,
  162. .default_device = &sdp3430_lcd_device,
  163. };
  164. static struct omap2_hsmmc_info mmc[] = {
  165. {
  166. .mmc = 1,
  167. /* 8 bits (default) requires S6.3 == ON,
  168. * so the SIM card isn't used; else 4 bits.
  169. */
  170. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  171. .gpio_wp = 4,
  172. .deferred = true,
  173. },
  174. {
  175. .mmc = 2,
  176. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  177. .gpio_wp = 7,
  178. .deferred = true,
  179. },
  180. {} /* Terminator */
  181. };
  182. static struct omap_tw4030_pdata omap_twl4030_audio_data = {
  183. .voice_connected = true,
  184. .custom_routing = true,
  185. .has_hs = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
  186. .has_hf = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
  187. .has_mainmic = true,
  188. .has_submic = true,
  189. .has_hsmic = true,
  190. .has_linein = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
  191. };
  192. static int sdp3430_twl_gpio_setup(struct device *dev,
  193. unsigned gpio, unsigned ngpio)
  194. {
  195. /* gpio + 0 is "mmc0_cd" (input/IRQ),
  196. * gpio + 1 is "mmc1_cd" (input/IRQ)
  197. */
  198. mmc[0].gpio_cd = gpio + 0;
  199. mmc[1].gpio_cd = gpio + 1;
  200. omap_hsmmc_late_init(mmc);
  201. /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
  202. gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
  203. /* gpio + 15 is "sub_lcd_nRST" (output) */
  204. gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
  205. omap_twl4030_audio_data.jack_detect = gpio + 2;
  206. omap_twl4030_audio_init("SDP3430", &omap_twl4030_audio_data);
  207. return 0;
  208. }
  209. static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
  210. .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
  211. | BIT(16) | BIT(17),
  212. .setup = sdp3430_twl_gpio_setup,
  213. };
  214. /* regulator consumer mappings */
  215. /* ads7846 on SPI */
  216. static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
  217. REGULATOR_SUPPLY("vcc", "spi1.0"),
  218. };
  219. static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
  220. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  221. };
  222. static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
  223. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  224. };
  225. static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
  226. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
  227. };
  228. /*
  229. * Apply all the fixed voltages since most versions of U-Boot
  230. * don't bother with that initialization.
  231. */
  232. /* VAUX1 for mainboard (irda and sub-lcd) */
  233. static struct regulator_init_data sdp3430_vaux1 = {
  234. .constraints = {
  235. .min_uV = 2800000,
  236. .max_uV = 2800000,
  237. .apply_uV = true,
  238. .valid_modes_mask = REGULATOR_MODE_NORMAL
  239. | REGULATOR_MODE_STANDBY,
  240. .valid_ops_mask = REGULATOR_CHANGE_MODE
  241. | REGULATOR_CHANGE_STATUS,
  242. },
  243. };
  244. /* VAUX2 for camera module */
  245. static struct regulator_init_data sdp3430_vaux2 = {
  246. .constraints = {
  247. .min_uV = 2800000,
  248. .max_uV = 2800000,
  249. .apply_uV = true,
  250. .valid_modes_mask = REGULATOR_MODE_NORMAL
  251. | REGULATOR_MODE_STANDBY,
  252. .valid_ops_mask = REGULATOR_CHANGE_MODE
  253. | REGULATOR_CHANGE_STATUS,
  254. },
  255. };
  256. /* VAUX3 for LCD board */
  257. static struct regulator_init_data sdp3430_vaux3 = {
  258. .constraints = {
  259. .min_uV = 2800000,
  260. .max_uV = 2800000,
  261. .apply_uV = true,
  262. .valid_modes_mask = REGULATOR_MODE_NORMAL
  263. | REGULATOR_MODE_STANDBY,
  264. .valid_ops_mask = REGULATOR_CHANGE_MODE
  265. | REGULATOR_CHANGE_STATUS,
  266. },
  267. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
  268. .consumer_supplies = sdp3430_vaux3_supplies,
  269. };
  270. /* VAUX4 for OMAP VDD_CSI2 (camera) */
  271. static struct regulator_init_data sdp3430_vaux4 = {
  272. .constraints = {
  273. .min_uV = 1800000,
  274. .max_uV = 1800000,
  275. .apply_uV = true,
  276. .valid_modes_mask = REGULATOR_MODE_NORMAL
  277. | REGULATOR_MODE_STANDBY,
  278. .valid_ops_mask = REGULATOR_CHANGE_MODE
  279. | REGULATOR_CHANGE_STATUS,
  280. },
  281. };
  282. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  283. static struct regulator_init_data sdp3430_vmmc1 = {
  284. .constraints = {
  285. .min_uV = 1850000,
  286. .max_uV = 3150000,
  287. .valid_modes_mask = REGULATOR_MODE_NORMAL
  288. | REGULATOR_MODE_STANDBY,
  289. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  290. | REGULATOR_CHANGE_MODE
  291. | REGULATOR_CHANGE_STATUS,
  292. },
  293. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
  294. .consumer_supplies = sdp3430_vmmc1_supplies,
  295. };
  296. /* VMMC2 for MMC2 card */
  297. static struct regulator_init_data sdp3430_vmmc2 = {
  298. .constraints = {
  299. .min_uV = 1850000,
  300. .max_uV = 1850000,
  301. .apply_uV = true,
  302. .valid_modes_mask = REGULATOR_MODE_NORMAL
  303. | REGULATOR_MODE_STANDBY,
  304. .valid_ops_mask = REGULATOR_CHANGE_MODE
  305. | REGULATOR_CHANGE_STATUS,
  306. },
  307. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
  308. .consumer_supplies = sdp3430_vmmc2_supplies,
  309. };
  310. /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
  311. static struct regulator_init_data sdp3430_vsim = {
  312. .constraints = {
  313. .min_uV = 1800000,
  314. .max_uV = 3000000,
  315. .valid_modes_mask = REGULATOR_MODE_NORMAL
  316. | REGULATOR_MODE_STANDBY,
  317. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  318. | REGULATOR_CHANGE_MODE
  319. | REGULATOR_CHANGE_STATUS,
  320. },
  321. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
  322. .consumer_supplies = sdp3430_vsim_supplies,
  323. };
  324. static struct twl4030_platform_data sdp3430_twldata = {
  325. /* platform_data for children goes here */
  326. .gpio = &sdp3430_gpio_data,
  327. .keypad = &sdp3430_kp_data,
  328. .vaux1 = &sdp3430_vaux1,
  329. .vaux2 = &sdp3430_vaux2,
  330. .vaux3 = &sdp3430_vaux3,
  331. .vaux4 = &sdp3430_vaux4,
  332. .vmmc1 = &sdp3430_vmmc1,
  333. .vmmc2 = &sdp3430_vmmc2,
  334. .vsim = &sdp3430_vsim,
  335. };
  336. static int __init omap3430_i2c_init(void)
  337. {
  338. /* i2c1 for PMIC only */
  339. omap3_pmic_get_config(&sdp3430_twldata,
  340. TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
  341. TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
  342. TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
  343. sdp3430_twldata.vdac->constraints.apply_uV = true;
  344. sdp3430_twldata.vpll2->constraints.apply_uV = true;
  345. sdp3430_twldata.vpll2->constraints.name = "VDVI";
  346. sdp3430_twldata.audio->codec->hs_extmute = 1;
  347. sdp3430_twldata.audio->codec->hs_extmute_gpio = -EINVAL;
  348. omap3_pmic_init("twl4030", &sdp3430_twldata);
  349. /* i2c2 on camera connector (for sensor control) and optional isp1301 */
  350. omap_register_i2c_bus(2, 400, NULL, 0);
  351. /* i2c3 on display connector (for DVI, tfp410) */
  352. omap_register_i2c_bus(3, 400, NULL, 0);
  353. return 0;
  354. }
  355. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  356. static struct omap_smc91x_platform_data board_smc91x_data = {
  357. .cs = 3,
  358. .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
  359. IORESOURCE_IRQ_LOWLEVEL,
  360. };
  361. static void __init board_smc91x_init(void)
  362. {
  363. if (omap_rev() > OMAP3430_REV_ES1_0)
  364. board_smc91x_data.gpio_irq = 6;
  365. else
  366. board_smc91x_data.gpio_irq = 29;
  367. gpmc_smc91x_init(&board_smc91x_data);
  368. }
  369. #else
  370. static inline void board_smc91x_init(void)
  371. {
  372. }
  373. #endif
  374. static void enable_board_wakeup_source(void)
  375. {
  376. /* T2 interrupt line (keypad) */
  377. omap_mux_init_signal("sys_nirq",
  378. OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  379. }
  380. static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
  381. .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
  382. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  383. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
  384. .phy_reset = true,
  385. .reset_gpio_port[0] = 57,
  386. .reset_gpio_port[1] = 61,
  387. .reset_gpio_port[2] = -EINVAL
  388. };
  389. #ifdef CONFIG_OMAP_MUX
  390. static struct omap_board_mux board_mux[] __initdata = {
  391. { .reg_offset = OMAP_MUX_TERMINATOR },
  392. };
  393. #else
  394. #define board_mux NULL
  395. #endif
  396. /*
  397. * SDP3430 V2 Board CS organization
  398. * Different from SDP3430 V1. Now 4 switches used to specify CS
  399. *
  400. * See also the Switch S8 settings in the comments.
  401. */
  402. static char chip_sel_3430[][GPMC_CS_NUM] = {
  403. {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
  404. {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
  405. {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
  406. };
  407. static struct mtd_partition sdp_nor_partitions[] = {
  408. /* bootloader (U-Boot, etc) in first sector */
  409. {
  410. .name = "Bootloader-NOR",
  411. .offset = 0,
  412. .size = SZ_256K,
  413. .mask_flags = MTD_WRITEABLE, /* force read-only */
  414. },
  415. /* bootloader params in the next sector */
  416. {
  417. .name = "Params-NOR",
  418. .offset = MTDPART_OFS_APPEND,
  419. .size = SZ_256K,
  420. .mask_flags = 0,
  421. },
  422. /* kernel */
  423. {
  424. .name = "Kernel-NOR",
  425. .offset = MTDPART_OFS_APPEND,
  426. .size = SZ_2M,
  427. .mask_flags = 0
  428. },
  429. /* file system */
  430. {
  431. .name = "Filesystem-NOR",
  432. .offset = MTDPART_OFS_APPEND,
  433. .size = MTDPART_SIZ_FULL,
  434. .mask_flags = 0
  435. }
  436. };
  437. static struct mtd_partition sdp_onenand_partitions[] = {
  438. {
  439. .name = "X-Loader-OneNAND",
  440. .offset = 0,
  441. .size = 4 * (64 * 2048),
  442. .mask_flags = MTD_WRITEABLE /* force read-only */
  443. },
  444. {
  445. .name = "U-Boot-OneNAND",
  446. .offset = MTDPART_OFS_APPEND,
  447. .size = 2 * (64 * 2048),
  448. .mask_flags = MTD_WRITEABLE /* force read-only */
  449. },
  450. {
  451. .name = "U-Boot Environment-OneNAND",
  452. .offset = MTDPART_OFS_APPEND,
  453. .size = 1 * (64 * 2048),
  454. },
  455. {
  456. .name = "Kernel-OneNAND",
  457. .offset = MTDPART_OFS_APPEND,
  458. .size = 16 * (64 * 2048),
  459. },
  460. {
  461. .name = "File System-OneNAND",
  462. .offset = MTDPART_OFS_APPEND,
  463. .size = MTDPART_SIZ_FULL,
  464. },
  465. };
  466. static struct mtd_partition sdp_nand_partitions[] = {
  467. /* All the partition sizes are listed in terms of NAND block size */
  468. {
  469. .name = "X-Loader-NAND",
  470. .offset = 0,
  471. .size = 4 * (64 * 2048),
  472. .mask_flags = MTD_WRITEABLE, /* force read-only */
  473. },
  474. {
  475. .name = "U-Boot-NAND",
  476. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  477. .size = 10 * (64 * 2048),
  478. .mask_flags = MTD_WRITEABLE, /* force read-only */
  479. },
  480. {
  481. .name = "Boot Env-NAND",
  482. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  483. .size = 6 * (64 * 2048),
  484. },
  485. {
  486. .name = "Kernel-NAND",
  487. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  488. .size = 40 * (64 * 2048),
  489. },
  490. {
  491. .name = "File System - NAND",
  492. .size = MTDPART_SIZ_FULL,
  493. .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
  494. },
  495. };
  496. static struct flash_partitions sdp_flash_partitions[] = {
  497. {
  498. .parts = sdp_nor_partitions,
  499. .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
  500. },
  501. {
  502. .parts = sdp_onenand_partitions,
  503. .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
  504. },
  505. {
  506. .parts = sdp_nand_partitions,
  507. .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
  508. },
  509. };
  510. static void __init omap_3430sdp_init(void)
  511. {
  512. int gpio_pendown;
  513. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  514. omap_hsmmc_init(mmc);
  515. omap3430_i2c_init();
  516. omap_display_init(&sdp3430_dss_data);
  517. if (omap_rev() > OMAP3430_REV_ES1_0)
  518. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
  519. else
  520. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
  521. omap_ads7846_init(1, gpio_pendown, 310, NULL);
  522. omap_serial_init();
  523. omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
  524. usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
  525. usb_musb_init(NULL);
  526. board_smc91x_init();
  527. board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
  528. sdp3430_display_init();
  529. enable_board_wakeup_source();
  530. usbhs_init(&usbhs_bdata);
  531. }
  532. MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
  533. /* Maintainer: Syed Khasim - Texas Instruments Inc */
  534. .atag_offset = 0x100,
  535. .reserve = omap_reserve,
  536. .map_io = omap3_map_io,
  537. .init_early = omap3430_init_early,
  538. .init_irq = omap3_init_irq,
  539. .handle_irq = omap3_intc_handle_irq,
  540. .init_machine = omap_3430sdp_init,
  541. .init_late = omap3430_init_late,
  542. .init_time = omap3_sync32k_timer_init,
  543. .restart = omap3xxx_restart,
  544. MACHINE_END