platsmp.c 2.3 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. #include <linux/init.h>
  13. #include <linux/smp.h>
  14. #include <linux/irqchip/arm-gic.h>
  15. #include <asm/page.h>
  16. #include <asm/smp_scu.h>
  17. #include <asm/mach/map.h>
  18. #include "common.h"
  19. #include "hardware.h"
  20. #define SCU_STANDBY_ENABLE (1 << 5)
  21. static void __iomem *scu_base;
  22. static struct map_desc scu_io_desc __initdata = {
  23. /* .virtual and .pfn are run-time assigned */
  24. .length = SZ_4K,
  25. .type = MT_DEVICE,
  26. };
  27. void __init imx_scu_map_io(void)
  28. {
  29. unsigned long base;
  30. /* Get SCU base */
  31. asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
  32. scu_io_desc.virtual = IMX_IO_P2V(base);
  33. scu_io_desc.pfn = __phys_to_pfn(base);
  34. iotable_init(&scu_io_desc, 1);
  35. scu_base = IMX_IO_ADDRESS(base);
  36. }
  37. void imx_scu_standby_enable(void)
  38. {
  39. u32 val = readl_relaxed(scu_base);
  40. val |= SCU_STANDBY_ENABLE;
  41. writel_relaxed(val, scu_base);
  42. }
  43. static void __cpuinit imx_secondary_init(unsigned int cpu)
  44. {
  45. /*
  46. * if any interrupts are already enabled for the primary
  47. * core (e.g. timer irq), then they will not have been enabled
  48. * for us: do so
  49. */
  50. gic_secondary_init(0);
  51. }
  52. static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
  53. {
  54. imx_set_cpu_jump(cpu, v7_secondary_startup);
  55. imx_enable_cpu(cpu, true);
  56. return 0;
  57. }
  58. /*
  59. * Initialise the CPU possible map early - this describes the CPUs
  60. * which may be present or become present in the system.
  61. */
  62. static void __init imx_smp_init_cpus(void)
  63. {
  64. int i, ncores;
  65. ncores = scu_get_core_count(scu_base);
  66. for (i = 0; i < ncores; i++)
  67. set_cpu_possible(i, true);
  68. }
  69. void imx_smp_prepare(void)
  70. {
  71. scu_enable(scu_base);
  72. }
  73. static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
  74. {
  75. imx_smp_prepare();
  76. }
  77. struct smp_operations imx_smp_ops __initdata = {
  78. .smp_init_cpus = imx_smp_init_cpus,
  79. .smp_prepare_cpus = imx_smp_prepare_cpus,
  80. .smp_secondary_init = imx_secondary_init,
  81. .smp_boot_secondary = imx_boot_secondary,
  82. #ifdef CONFIG_HOTPLUG_CPU
  83. .cpu_die = imx_cpu_die,
  84. .cpu_kill = imx_cpu_kill,
  85. #endif
  86. };