smp_tlb.c 4.6 KB

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  1. /*
  2. * linux/arch/arm/kernel/smp_tlb.c
  3. *
  4. * Copyright (C) 2002 ARM Limited, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/preempt.h>
  11. #include <linux/smp.h>
  12. #include <asm/smp_plat.h>
  13. #include <asm/tlbflush.h>
  14. #include <asm/mmu_context.h>
  15. /**********************************************************************/
  16. /*
  17. * TLB operations
  18. */
  19. struct tlb_args {
  20. struct vm_area_struct *ta_vma;
  21. unsigned long ta_start;
  22. unsigned long ta_end;
  23. };
  24. static inline void ipi_flush_tlb_all(void *ignored)
  25. {
  26. local_flush_tlb_all();
  27. }
  28. static inline void ipi_flush_tlb_mm(void *arg)
  29. {
  30. struct mm_struct *mm = (struct mm_struct *)arg;
  31. local_flush_tlb_mm(mm);
  32. }
  33. static inline void ipi_flush_tlb_page(void *arg)
  34. {
  35. struct tlb_args *ta = (struct tlb_args *)arg;
  36. local_flush_tlb_page(ta->ta_vma, ta->ta_start);
  37. }
  38. static inline void ipi_flush_tlb_kernel_page(void *arg)
  39. {
  40. struct tlb_args *ta = (struct tlb_args *)arg;
  41. local_flush_tlb_kernel_page(ta->ta_start);
  42. }
  43. static inline void ipi_flush_tlb_range(void *arg)
  44. {
  45. struct tlb_args *ta = (struct tlb_args *)arg;
  46. local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end);
  47. }
  48. static inline void ipi_flush_tlb_kernel_range(void *arg)
  49. {
  50. struct tlb_args *ta = (struct tlb_args *)arg;
  51. local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
  52. }
  53. static inline void ipi_flush_bp_all(void *ignored)
  54. {
  55. local_flush_bp_all();
  56. }
  57. #ifdef CONFIG_ARM_ERRATA_798181
  58. static int erratum_a15_798181(void)
  59. {
  60. unsigned int midr = read_cpuid_id();
  61. /* Cortex-A15 r0p0..r3p2 affected */
  62. if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
  63. return 0;
  64. return 1;
  65. }
  66. #else
  67. static int erratum_a15_798181(void)
  68. {
  69. return 0;
  70. }
  71. #endif
  72. static void ipi_flush_tlb_a15_erratum(void *arg)
  73. {
  74. dmb();
  75. }
  76. static void broadcast_tlb_a15_erratum(void)
  77. {
  78. if (!erratum_a15_798181())
  79. return;
  80. dummy_flush_tlb_a15_erratum();
  81. smp_call_function_many(cpu_online_mask, ipi_flush_tlb_a15_erratum,
  82. NULL, 1);
  83. }
  84. static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm)
  85. {
  86. int cpu;
  87. cpumask_t mask = { CPU_BITS_NONE };
  88. if (!erratum_a15_798181())
  89. return;
  90. dummy_flush_tlb_a15_erratum();
  91. for_each_online_cpu(cpu) {
  92. if (cpu == smp_processor_id())
  93. continue;
  94. /*
  95. * We only need to send an IPI if the other CPUs are running
  96. * the same ASID as the one being invalidated. There is no
  97. * need for locking around the active_asids check since the
  98. * switch_mm() function has at least one dmb() (as required by
  99. * this workaround) in case a context switch happens on
  100. * another CPU after the condition below.
  101. */
  102. if (atomic64_read(&mm->context.id) ==
  103. atomic64_read(&per_cpu(active_asids, cpu)))
  104. cpumask_set_cpu(cpu, &mask);
  105. }
  106. smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1);
  107. }
  108. void flush_tlb_all(void)
  109. {
  110. if (tlb_ops_need_broadcast())
  111. on_each_cpu(ipi_flush_tlb_all, NULL, 1);
  112. else
  113. local_flush_tlb_all();
  114. broadcast_tlb_a15_erratum();
  115. }
  116. void flush_tlb_mm(struct mm_struct *mm)
  117. {
  118. if (tlb_ops_need_broadcast())
  119. on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
  120. else
  121. local_flush_tlb_mm(mm);
  122. broadcast_tlb_mm_a15_erratum(mm);
  123. }
  124. void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
  125. {
  126. if (tlb_ops_need_broadcast()) {
  127. struct tlb_args ta;
  128. ta.ta_vma = vma;
  129. ta.ta_start = uaddr;
  130. on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_page,
  131. &ta, 1);
  132. } else
  133. local_flush_tlb_page(vma, uaddr);
  134. broadcast_tlb_mm_a15_erratum(vma->vm_mm);
  135. }
  136. void flush_tlb_kernel_page(unsigned long kaddr)
  137. {
  138. if (tlb_ops_need_broadcast()) {
  139. struct tlb_args ta;
  140. ta.ta_start = kaddr;
  141. on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
  142. } else
  143. local_flush_tlb_kernel_page(kaddr);
  144. broadcast_tlb_a15_erratum();
  145. }
  146. void flush_tlb_range(struct vm_area_struct *vma,
  147. unsigned long start, unsigned long end)
  148. {
  149. if (tlb_ops_need_broadcast()) {
  150. struct tlb_args ta;
  151. ta.ta_vma = vma;
  152. ta.ta_start = start;
  153. ta.ta_end = end;
  154. on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_range,
  155. &ta, 1);
  156. } else
  157. local_flush_tlb_range(vma, start, end);
  158. broadcast_tlb_mm_a15_erratum(vma->vm_mm);
  159. }
  160. void flush_tlb_kernel_range(unsigned long start, unsigned long end)
  161. {
  162. if (tlb_ops_need_broadcast()) {
  163. struct tlb_args ta;
  164. ta.ta_start = start;
  165. ta.ta_end = end;
  166. on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1);
  167. } else
  168. local_flush_tlb_kernel_range(start, end);
  169. broadcast_tlb_a15_erratum();
  170. }
  171. void flush_bp_all(void)
  172. {
  173. if (tlb_ops_need_broadcast())
  174. on_each_cpu(ipi_flush_bp_all, NULL, 1);
  175. else
  176. local_flush_bp_all();
  177. }