tegra20-paz00.dts 11 KB

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  1. /dts-v1/;
  2. /include/ "tegra20.dtsi"
  3. / {
  4. model = "Toshiba AC100 / Dynabook AZ";
  5. compatible = "compal,paz00", "nvidia,tegra20";
  6. memory {
  7. reg = <0x00000000 0x20000000>;
  8. };
  9. host1x {
  10. hdmi {
  11. status = "okay";
  12. vdd-supply = <&hdmi_vdd_reg>;
  13. pll-supply = <&hdmi_pll_reg>;
  14. nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  15. nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
  16. };
  17. };
  18. pinmux {
  19. pinctrl-names = "default";
  20. pinctrl-0 = <&state_default>;
  21. state_default: pinmux {
  22. ata {
  23. nvidia,pins = "ata", "atc", "atd", "ate",
  24. "dap2", "gmb", "gmc", "gmd", "spia",
  25. "spib", "spic", "spid", "spie";
  26. nvidia,function = "gmi";
  27. };
  28. atb {
  29. nvidia,pins = "atb", "gma", "gme";
  30. nvidia,function = "sdio4";
  31. };
  32. cdev1 {
  33. nvidia,pins = "cdev1";
  34. nvidia,function = "plla_out";
  35. };
  36. cdev2 {
  37. nvidia,pins = "cdev2";
  38. nvidia,function = "pllp_out4";
  39. };
  40. crtp {
  41. nvidia,pins = "crtp";
  42. nvidia,function = "crt";
  43. };
  44. csus {
  45. nvidia,pins = "csus";
  46. nvidia,function = "pllc_out1";
  47. };
  48. dap1 {
  49. nvidia,pins = "dap1";
  50. nvidia,function = "dap1";
  51. };
  52. dap3 {
  53. nvidia,pins = "dap3";
  54. nvidia,function = "dap3";
  55. };
  56. dap4 {
  57. nvidia,pins = "dap4";
  58. nvidia,function = "dap4";
  59. };
  60. ddc {
  61. nvidia,pins = "ddc";
  62. nvidia,function = "i2c2";
  63. };
  64. dta {
  65. nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
  66. nvidia,function = "rsvd1";
  67. };
  68. dtf {
  69. nvidia,pins = "dtf";
  70. nvidia,function = "i2c3";
  71. };
  72. gpu {
  73. nvidia,pins = "gpu", "sdb", "sdd";
  74. nvidia,function = "pwm";
  75. };
  76. gpu7 {
  77. nvidia,pins = "gpu7";
  78. nvidia,function = "rtck";
  79. };
  80. gpv {
  81. nvidia,pins = "gpv", "slxa", "slxk";
  82. nvidia,function = "pcie";
  83. };
  84. hdint {
  85. nvidia,pins = "hdint", "pta";
  86. nvidia,function = "hdmi";
  87. };
  88. i2cp {
  89. nvidia,pins = "i2cp";
  90. nvidia,function = "i2cp";
  91. };
  92. irrx {
  93. nvidia,pins = "irrx", "irtx";
  94. nvidia,function = "uarta";
  95. };
  96. kbca {
  97. nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
  98. nvidia,function = "kbc";
  99. };
  100. kbcb {
  101. nvidia,pins = "kbcb", "kbcd";
  102. nvidia,function = "sdio2";
  103. };
  104. lcsn {
  105. nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
  106. "ld3", "ld4", "ld5", "ld6", "ld7",
  107. "ld8", "ld9", "ld10", "ld11", "ld12",
  108. "ld13", "ld14", "ld15", "ld16", "ld17",
  109. "ldc", "ldi", "lhp0", "lhp1", "lhp2",
  110. "lhs", "lm0", "lm1", "lpp", "lpw0",
  111. "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
  112. "lsda", "lsdi", "lspi", "lvp0", "lvp1",
  113. "lvs";
  114. nvidia,function = "displaya";
  115. };
  116. owc {
  117. nvidia,pins = "owc";
  118. nvidia,function = "owr";
  119. };
  120. pmc {
  121. nvidia,pins = "pmc";
  122. nvidia,function = "pwr_on";
  123. };
  124. rm {
  125. nvidia,pins = "rm";
  126. nvidia,function = "i2c1";
  127. };
  128. sdc {
  129. nvidia,pins = "sdc";
  130. nvidia,function = "twc";
  131. };
  132. sdio1 {
  133. nvidia,pins = "sdio1";
  134. nvidia,function = "sdio1";
  135. };
  136. slxc {
  137. nvidia,pins = "slxc", "slxd";
  138. nvidia,function = "spi4";
  139. };
  140. spdi {
  141. nvidia,pins = "spdi", "spdo";
  142. nvidia,function = "rsvd2";
  143. };
  144. spif {
  145. nvidia,pins = "spif", "uac";
  146. nvidia,function = "rsvd4";
  147. };
  148. spig {
  149. nvidia,pins = "spig", "spih";
  150. nvidia,function = "spi2_alt";
  151. };
  152. uaa {
  153. nvidia,pins = "uaa", "uab", "uda";
  154. nvidia,function = "ulpi";
  155. };
  156. uad {
  157. nvidia,pins = "uad";
  158. nvidia,function = "spdif";
  159. };
  160. uca {
  161. nvidia,pins = "uca", "ucb";
  162. nvidia,function = "uartc";
  163. };
  164. conf_ata {
  165. nvidia,pins = "ata", "atb", "atc", "atd", "ate",
  166. "cdev1", "cdev2", "dap1", "dap2", "dtf",
  167. "gma", "gmb", "gmc", "gmd", "gme",
  168. "gpu", "gpu7", "gpv", "i2cp", "pta",
  169. "rm", "sdio1", "slxk", "spdo", "uac",
  170. "uda";
  171. nvidia,pull = <0>;
  172. nvidia,tristate = <0>;
  173. };
  174. conf_ck32 {
  175. nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
  176. "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
  177. nvidia,pull = <0>;
  178. };
  179. conf_crtp {
  180. nvidia,pins = "crtp", "dap3", "dap4", "dtb",
  181. "dtc", "dte", "slxa", "slxc", "slxd",
  182. "spdi";
  183. nvidia,pull = <0>;
  184. nvidia,tristate = <1>;
  185. };
  186. conf_csus {
  187. nvidia,pins = "csus", "spia", "spib", "spid",
  188. "spif";
  189. nvidia,pull = <1>;
  190. nvidia,tristate = <1>;
  191. };
  192. conf_ddc {
  193. nvidia,pins = "ddc", "irrx", "irtx", "kbca",
  194. "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
  195. "spic", "spig", "uaa", "uab";
  196. nvidia,pull = <2>;
  197. nvidia,tristate = <0>;
  198. };
  199. conf_dta {
  200. nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
  201. "spie", "spih", "uad", "uca", "ucb";
  202. nvidia,pull = <2>;
  203. nvidia,tristate = <1>;
  204. };
  205. conf_hdint {
  206. nvidia,pins = "hdint", "ld0", "ld1", "ld2",
  207. "ld3", "ld4", "ld5", "ld6", "ld7",
  208. "ld8", "ld9", "ld10", "ld11", "ld12",
  209. "ld13", "ld14", "ld15", "ld16", "ld17",
  210. "ldc", "ldi", "lhs", "lsc0", "lspi",
  211. "lvs", "pmc";
  212. nvidia,tristate = <0>;
  213. };
  214. conf_lc {
  215. nvidia,pins = "lc", "ls";
  216. nvidia,pull = <2>;
  217. };
  218. conf_lcsn {
  219. nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
  220. "lm0", "lm1", "lpp", "lpw0", "lpw1",
  221. "lpw2", "lsc1", "lsck", "lsda", "lsdi",
  222. "lvp0", "lvp1", "sdb";
  223. nvidia,tristate = <1>;
  224. };
  225. conf_ld17_0 {
  226. nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
  227. "ld23_22";
  228. nvidia,pull = <1>;
  229. };
  230. };
  231. };
  232. i2s@70002800 {
  233. status = "okay";
  234. };
  235. serial@70006000 {
  236. status = "okay";
  237. };
  238. serial@70006200 {
  239. status = "okay";
  240. };
  241. i2c@7000c000 {
  242. status = "okay";
  243. clock-frequency = <400000>;
  244. alc5632: alc5632@1e {
  245. compatible = "realtek,alc5632";
  246. reg = <0x1e>;
  247. gpio-controller;
  248. #gpio-cells = <2>;
  249. };
  250. };
  251. hdmi_ddc: i2c@7000c400 {
  252. status = "okay";
  253. clock-frequency = <100000>;
  254. };
  255. nvec {
  256. compatible = "nvidia,nvec";
  257. reg = <0x7000c500 0x100>;
  258. interrupts = <0 92 0x04>;
  259. #address-cells = <1>;
  260. #size-cells = <0>;
  261. clock-frequency = <80000>;
  262. request-gpios = <&gpio 170 0>; /* gpio PV2 */
  263. slave-addr = <138>;
  264. clocks = <&tegra_car 67>, <&tegra_car 124>;
  265. clock-names = "div-clk", "fast-clk";
  266. };
  267. i2c@7000d000 {
  268. status = "okay";
  269. clock-frequency = <400000>;
  270. pmic: tps6586x@34 {
  271. compatible = "ti,tps6586x";
  272. reg = <0x34>;
  273. interrupts = <0 86 0x4>;
  274. #gpio-cells = <2>;
  275. gpio-controller;
  276. sys-supply = <&p5valw_reg>;
  277. vin-sm0-supply = <&sys_reg>;
  278. vin-sm1-supply = <&sys_reg>;
  279. vin-sm2-supply = <&sys_reg>;
  280. vinldo01-supply = <&sm2_reg>;
  281. vinldo23-supply = <&sm2_reg>;
  282. vinldo4-supply = <&sm2_reg>;
  283. vinldo678-supply = <&sm2_reg>;
  284. vinldo9-supply = <&sm2_reg>;
  285. regulators {
  286. sys_reg: sys {
  287. regulator-name = "vdd_sys";
  288. regulator-always-on;
  289. };
  290. sm0 {
  291. regulator-name = "+1.2vs_sm0,vdd_core";
  292. regulator-min-microvolt = <1200000>;
  293. regulator-max-microvolt = <1200000>;
  294. regulator-always-on;
  295. };
  296. sm1 {
  297. regulator-name = "+1.0vs_sm1,vdd_cpu";
  298. regulator-min-microvolt = <1000000>;
  299. regulator-max-microvolt = <1000000>;
  300. regulator-always-on;
  301. };
  302. sm2_reg: sm2 {
  303. regulator-name = "+3.7vs_sm2,vin_ldo*";
  304. regulator-min-microvolt = <3700000>;
  305. regulator-max-microvolt = <3700000>;
  306. regulator-always-on;
  307. };
  308. /* LDO0 is not connected to anything */
  309. ldo1 {
  310. regulator-name = "+1.1vs_ldo1,avdd_pll*";
  311. regulator-min-microvolt = <1100000>;
  312. regulator-max-microvolt = <1100000>;
  313. regulator-always-on;
  314. };
  315. ldo2 {
  316. regulator-name = "+1.2vs_ldo2,vdd_rtc";
  317. regulator-min-microvolt = <1200000>;
  318. regulator-max-microvolt = <1200000>;
  319. };
  320. ldo3 {
  321. regulator-name = "+3.3vs_ldo3,avdd_usb*";
  322. regulator-min-microvolt = <3300000>;
  323. regulator-max-microvolt = <3300000>;
  324. regulator-always-on;
  325. };
  326. ldo4 {
  327. regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
  328. regulator-min-microvolt = <1800000>;
  329. regulator-max-microvolt = <1800000>;
  330. regulator-always-on;
  331. };
  332. ldo5 {
  333. regulator-name = "+2.85vs_ldo5,vcore_mmc";
  334. regulator-min-microvolt = <2850000>;
  335. regulator-max-microvolt = <2850000>;
  336. regulator-always-on;
  337. };
  338. ldo6 {
  339. /*
  340. * Research indicates this should be
  341. * 1.8v; other boards that use this
  342. * rail for the same purpose need it
  343. * set to 1.8v. The schematic signal
  344. * name is incorrect; perhaps copied
  345. * from an incorrect NVIDIA reference.
  346. */
  347. regulator-name = "+2.85vs_ldo6,avdd_vdac";
  348. regulator-min-microvolt = <1800000>;
  349. regulator-max-microvolt = <1800000>;
  350. };
  351. hdmi_vdd_reg: ldo7 {
  352. regulator-name = "+3.3vs_ldo7,avdd_hdmi";
  353. regulator-min-microvolt = <3300000>;
  354. regulator-max-microvolt = <3300000>;
  355. };
  356. hdmi_pll_reg: ldo8 {
  357. regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
  358. regulator-min-microvolt = <1800000>;
  359. regulator-max-microvolt = <1800000>;
  360. };
  361. ldo9 {
  362. regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
  363. regulator-min-microvolt = <2850000>;
  364. regulator-max-microvolt = <2850000>;
  365. regulator-always-on;
  366. };
  367. ldo_rtc {
  368. regulator-name = "+3.3vs_rtc";
  369. regulator-min-microvolt = <3300000>;
  370. regulator-max-microvolt = <3300000>;
  371. regulator-always-on;
  372. };
  373. };
  374. };
  375. adt7461@4c {
  376. compatible = "adi,adt7461";
  377. reg = <0x4c>;
  378. };
  379. };
  380. pmc {
  381. nvidia,invert-interrupt;
  382. };
  383. usb@c5000000 {
  384. status = "okay";
  385. };
  386. usb@c5004000 {
  387. status = "okay";
  388. nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
  389. };
  390. usb@c5008000 {
  391. status = "okay";
  392. };
  393. usb-phy@c5004400 {
  394. nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
  395. };
  396. sdhci@c8000000 {
  397. status = "okay";
  398. cd-gpios = <&gpio 173 0>; /* gpio PV5 */
  399. wp-gpios = <&gpio 57 0>; /* gpio PH1 */
  400. power-gpios = <&gpio 169 0>; /* gpio PV1 */
  401. bus-width = <4>;
  402. };
  403. sdhci@c8000600 {
  404. status = "okay";
  405. bus-width = <8>;
  406. };
  407. gpio-keys {
  408. compatible = "gpio-keys";
  409. power {
  410. label = "Power";
  411. gpios = <&gpio 79 1>; /* gpio PJ7, active low */
  412. linux,code = <116>; /* KEY_POWER */
  413. gpio-key,wakeup;
  414. };
  415. };
  416. gpio-leds {
  417. compatible = "gpio-leds";
  418. wifi {
  419. label = "wifi-led";
  420. gpios = <&gpio 24 0>; /* gpio PD0 */
  421. linux,default-trigger = "rfkill0";
  422. };
  423. };
  424. regulators {
  425. compatible = "simple-bus";
  426. #address-cells = <1>;
  427. #size-cells = <0>;
  428. p5valw_reg: regulator@0 {
  429. compatible = "regulator-fixed";
  430. reg = <0>;
  431. regulator-name = "+5valw";
  432. regulator-min-microvolt = <5000000>;
  433. regulator-max-microvolt = <5000000>;
  434. regulator-always-on;
  435. };
  436. };
  437. sound {
  438. compatible = "nvidia,tegra-audio-alc5632-paz00",
  439. "nvidia,tegra-audio-alc5632";
  440. nvidia,model = "Compal PAZ00";
  441. nvidia,audio-routing =
  442. "Int Spk", "SPKOUT",
  443. "Int Spk", "SPKOUTN",
  444. "Headset Mic", "MICBIAS1",
  445. "MIC1", "Headset Mic",
  446. "Headset Stereophone", "HPR",
  447. "Headset Stereophone", "HPL",
  448. "DMICDAT", "Digital Mic";
  449. nvidia,audio-codec = <&alc5632>;
  450. nvidia,i2s-controller = <&tegra_i2s1>;
  451. nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
  452. };
  453. };