tegra20-harmony.dts 15 KB

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  1. /dts-v1/;
  2. /include/ "tegra20.dtsi"
  3. / {
  4. model = "NVIDIA Tegra20 Harmony evaluation board";
  5. compatible = "nvidia,harmony", "nvidia,tegra20";
  6. memory {
  7. reg = <0x00000000 0x40000000>;
  8. };
  9. host1x {
  10. hdmi {
  11. status = "okay";
  12. vdd-supply = <&hdmi_vdd_reg>;
  13. pll-supply = <&hdmi_pll_reg>;
  14. nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  15. nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
  16. };
  17. };
  18. pinmux {
  19. pinctrl-names = "default";
  20. pinctrl-0 = <&state_default>;
  21. state_default: pinmux {
  22. ata {
  23. nvidia,pins = "ata";
  24. nvidia,function = "ide";
  25. };
  26. atb {
  27. nvidia,pins = "atb", "gma", "gme";
  28. nvidia,function = "sdio4";
  29. };
  30. atc {
  31. nvidia,pins = "atc";
  32. nvidia,function = "nand";
  33. };
  34. atd {
  35. nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
  36. "spia", "spib", "spic";
  37. nvidia,function = "gmi";
  38. };
  39. cdev1 {
  40. nvidia,pins = "cdev1";
  41. nvidia,function = "plla_out";
  42. };
  43. cdev2 {
  44. nvidia,pins = "cdev2";
  45. nvidia,function = "pllp_out4";
  46. };
  47. crtp {
  48. nvidia,pins = "crtp";
  49. nvidia,function = "crt";
  50. };
  51. csus {
  52. nvidia,pins = "csus";
  53. nvidia,function = "vi_sensor_clk";
  54. };
  55. dap1 {
  56. nvidia,pins = "dap1";
  57. nvidia,function = "dap1";
  58. };
  59. dap2 {
  60. nvidia,pins = "dap2";
  61. nvidia,function = "dap2";
  62. };
  63. dap3 {
  64. nvidia,pins = "dap3";
  65. nvidia,function = "dap3";
  66. };
  67. dap4 {
  68. nvidia,pins = "dap4";
  69. nvidia,function = "dap4";
  70. };
  71. ddc {
  72. nvidia,pins = "ddc";
  73. nvidia,function = "i2c2";
  74. };
  75. dta {
  76. nvidia,pins = "dta", "dtd";
  77. nvidia,function = "sdio2";
  78. };
  79. dtb {
  80. nvidia,pins = "dtb", "dtc", "dte";
  81. nvidia,function = "rsvd1";
  82. };
  83. dtf {
  84. nvidia,pins = "dtf";
  85. nvidia,function = "i2c3";
  86. };
  87. gmc {
  88. nvidia,pins = "gmc";
  89. nvidia,function = "uartd";
  90. };
  91. gpu7 {
  92. nvidia,pins = "gpu7";
  93. nvidia,function = "rtck";
  94. };
  95. gpv {
  96. nvidia,pins = "gpv", "slxa", "slxk";
  97. nvidia,function = "pcie";
  98. };
  99. hdint {
  100. nvidia,pins = "hdint", "pta";
  101. nvidia,function = "hdmi";
  102. };
  103. i2cp {
  104. nvidia,pins = "i2cp";
  105. nvidia,function = "i2cp";
  106. };
  107. irrx {
  108. nvidia,pins = "irrx", "irtx";
  109. nvidia,function = "uarta";
  110. };
  111. kbca {
  112. nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
  113. "kbce", "kbcf";
  114. nvidia,function = "kbc";
  115. };
  116. lcsn {
  117. nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
  118. "ld3", "ld4", "ld5", "ld6", "ld7",
  119. "ld8", "ld9", "ld10", "ld11", "ld12",
  120. "ld13", "ld14", "ld15", "ld16", "ld17",
  121. "ldc", "ldi", "lhp0", "lhp1", "lhp2",
  122. "lhs", "lm0", "lm1", "lpp", "lpw0",
  123. "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
  124. "lsda", "lsdi", "lspi", "lvp0", "lvp1",
  125. "lvs";
  126. nvidia,function = "displaya";
  127. };
  128. owc {
  129. nvidia,pins = "owc", "spdi", "spdo", "uac";
  130. nvidia,function = "rsvd2";
  131. };
  132. pmc {
  133. nvidia,pins = "pmc";
  134. nvidia,function = "pwr_on";
  135. };
  136. rm {
  137. nvidia,pins = "rm";
  138. nvidia,function = "i2c1";
  139. };
  140. sdb {
  141. nvidia,pins = "sdb", "sdc", "sdd";
  142. nvidia,function = "pwm";
  143. };
  144. sdio1 {
  145. nvidia,pins = "sdio1";
  146. nvidia,function = "sdio1";
  147. };
  148. slxc {
  149. nvidia,pins = "slxc", "slxd";
  150. nvidia,function = "spdif";
  151. };
  152. spid {
  153. nvidia,pins = "spid", "spie", "spif";
  154. nvidia,function = "spi1";
  155. };
  156. spig {
  157. nvidia,pins = "spig", "spih";
  158. nvidia,function = "spi2_alt";
  159. };
  160. uaa {
  161. nvidia,pins = "uaa", "uab", "uda";
  162. nvidia,function = "ulpi";
  163. };
  164. uad {
  165. nvidia,pins = "uad";
  166. nvidia,function = "irda";
  167. };
  168. uca {
  169. nvidia,pins = "uca", "ucb";
  170. nvidia,function = "uartc";
  171. };
  172. conf_ata {
  173. nvidia,pins = "ata", "atb", "atc", "atd", "ate",
  174. "cdev1", "cdev2", "dap1", "dtb", "gma",
  175. "gmb", "gmc", "gmd", "gme", "gpu7",
  176. "gpv", "i2cp", "pta", "rm", "slxa",
  177. "slxk", "spia", "spib", "uac";
  178. nvidia,pull = <0>;
  179. nvidia,tristate = <0>;
  180. };
  181. conf_ck32 {
  182. nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
  183. "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
  184. nvidia,pull = <0>;
  185. };
  186. conf_csus {
  187. nvidia,pins = "csus", "spid", "spif";
  188. nvidia,pull = <1>;
  189. nvidia,tristate = <1>;
  190. };
  191. conf_crtp {
  192. nvidia,pins = "crtp", "dap2", "dap3", "dap4",
  193. "dtc", "dte", "dtf", "gpu", "sdio1",
  194. "slxc", "slxd", "spdi", "spdo", "spig",
  195. "uda";
  196. nvidia,pull = <0>;
  197. nvidia,tristate = <1>;
  198. };
  199. conf_ddc {
  200. nvidia,pins = "ddc", "dta", "dtd", "kbca",
  201. "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
  202. "sdc";
  203. nvidia,pull = <2>;
  204. nvidia,tristate = <0>;
  205. };
  206. conf_hdint {
  207. nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
  208. "lpw1", "lsc1", "lsck", "lsda", "lsdi",
  209. "lvp0", "owc", "sdb";
  210. nvidia,tristate = <1>;
  211. };
  212. conf_irrx {
  213. nvidia,pins = "irrx", "irtx", "sdd", "spic",
  214. "spie", "spih", "uaa", "uab", "uad",
  215. "uca", "ucb";
  216. nvidia,pull = <2>;
  217. nvidia,tristate = <1>;
  218. };
  219. conf_lc {
  220. nvidia,pins = "lc", "ls";
  221. nvidia,pull = <2>;
  222. };
  223. conf_ld0 {
  224. nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
  225. "ld5", "ld6", "ld7", "ld8", "ld9",
  226. "ld10", "ld11", "ld12", "ld13", "ld14",
  227. "ld15", "ld16", "ld17", "ldi", "lhp0",
  228. "lhp1", "lhp2", "lhs", "lm0", "lpp",
  229. "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
  230. "lvs", "pmc";
  231. nvidia,tristate = <0>;
  232. };
  233. conf_ld17_0 {
  234. nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
  235. "ld23_22";
  236. nvidia,pull = <1>;
  237. };
  238. };
  239. };
  240. i2s@70002800 {
  241. status = "okay";
  242. };
  243. serial@70006300 {
  244. status = "okay";
  245. };
  246. i2c@7000c000 {
  247. status = "okay";
  248. clock-frequency = <400000>;
  249. wm8903: wm8903@1a {
  250. compatible = "wlf,wm8903";
  251. reg = <0x1a>;
  252. interrupt-parent = <&gpio>;
  253. interrupts = <187 0x04>;
  254. gpio-controller;
  255. #gpio-cells = <2>;
  256. micdet-cfg = <0>;
  257. micdet-delay = <100>;
  258. gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
  259. };
  260. };
  261. hdmi_ddc: i2c@7000c400 {
  262. status = "okay";
  263. clock-frequency = <100000>;
  264. };
  265. i2c@7000c500 {
  266. status = "okay";
  267. clock-frequency = <400000>;
  268. };
  269. i2c@7000d000 {
  270. status = "okay";
  271. clock-frequency = <400000>;
  272. pmic: tps6586x@34 {
  273. compatible = "ti,tps6586x";
  274. reg = <0x34>;
  275. interrupts = <0 86 0x4>;
  276. ti,system-power-controller;
  277. #gpio-cells = <2>;
  278. gpio-controller;
  279. sys-supply = <&vdd_5v0_reg>;
  280. vin-sm0-supply = <&sys_reg>;
  281. vin-sm1-supply = <&sys_reg>;
  282. vin-sm2-supply = <&sys_reg>;
  283. vinldo01-supply = <&sm2_reg>;
  284. vinldo23-supply = <&sm2_reg>;
  285. vinldo4-supply = <&sm2_reg>;
  286. vinldo678-supply = <&sm2_reg>;
  287. vinldo9-supply = <&sm2_reg>;
  288. regulators {
  289. sys_reg: sys {
  290. regulator-name = "vdd_sys";
  291. regulator-always-on;
  292. };
  293. sm0 {
  294. regulator-name = "vdd_sm0,vdd_core";
  295. regulator-min-microvolt = <1200000>;
  296. regulator-max-microvolt = <1200000>;
  297. regulator-always-on;
  298. };
  299. sm1 {
  300. regulator-name = "vdd_sm1,vdd_cpu";
  301. regulator-min-microvolt = <1000000>;
  302. regulator-max-microvolt = <1000000>;
  303. regulator-always-on;
  304. };
  305. sm2_reg: sm2 {
  306. regulator-name = "vdd_sm2,vin_ldo*";
  307. regulator-min-microvolt = <3700000>;
  308. regulator-max-microvolt = <3700000>;
  309. regulator-always-on;
  310. };
  311. ldo0 {
  312. regulator-name = "vdd_ldo0,vddio_pex_clk";
  313. regulator-min-microvolt = <3300000>;
  314. regulator-max-microvolt = <3300000>;
  315. };
  316. ldo1 {
  317. regulator-name = "vdd_ldo1,avdd_pll*";
  318. regulator-min-microvolt = <1100000>;
  319. regulator-max-microvolt = <1100000>;
  320. regulator-always-on;
  321. };
  322. ldo2 {
  323. regulator-name = "vdd_ldo2,vdd_rtc";
  324. regulator-min-microvolt = <1200000>;
  325. regulator-max-microvolt = <1200000>;
  326. };
  327. ldo3 {
  328. regulator-name = "vdd_ldo3,avdd_usb*";
  329. regulator-min-microvolt = <3300000>;
  330. regulator-max-microvolt = <3300000>;
  331. regulator-always-on;
  332. };
  333. ldo4 {
  334. regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
  335. regulator-min-microvolt = <1800000>;
  336. regulator-max-microvolt = <1800000>;
  337. regulator-always-on;
  338. };
  339. ldo5 {
  340. regulator-name = "vdd_ldo5,vcore_mmc";
  341. regulator-min-microvolt = <2850000>;
  342. regulator-max-microvolt = <2850000>;
  343. regulator-always-on;
  344. };
  345. ldo6 {
  346. regulator-name = "vdd_ldo6,avdd_vdac";
  347. regulator-min-microvolt = <1800000>;
  348. regulator-max-microvolt = <1800000>;
  349. };
  350. hdmi_vdd_reg: ldo7 {
  351. regulator-name = "vdd_ldo7,avdd_hdmi";
  352. regulator-min-microvolt = <3300000>;
  353. regulator-max-microvolt = <3300000>;
  354. };
  355. hdmi_pll_reg: ldo8 {
  356. regulator-name = "vdd_ldo8,avdd_hdmi_pll";
  357. regulator-min-microvolt = <1800000>;
  358. regulator-max-microvolt = <1800000>;
  359. };
  360. ldo9 {
  361. regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
  362. regulator-min-microvolt = <2850000>;
  363. regulator-max-microvolt = <2850000>;
  364. regulator-always-on;
  365. };
  366. ldo_rtc {
  367. regulator-name = "vdd_rtc_out,vdd_cell";
  368. regulator-min-microvolt = <3300000>;
  369. regulator-max-microvolt = <3300000>;
  370. regulator-always-on;
  371. };
  372. };
  373. };
  374. temperature-sensor@4c {
  375. compatible = "adi,adt7461";
  376. reg = <0x4c>;
  377. };
  378. };
  379. pmc {
  380. nvidia,invert-interrupt;
  381. };
  382. usb@c5000000 {
  383. status = "okay";
  384. };
  385. usb@c5004000 {
  386. status = "okay";
  387. nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
  388. };
  389. usb@c5008000 {
  390. status = "okay";
  391. };
  392. usb-phy@c5004400 {
  393. nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
  394. };
  395. sdhci@c8000200 {
  396. status = "okay";
  397. cd-gpios = <&gpio 69 0>; /* gpio PI5 */
  398. wp-gpios = <&gpio 57 0>; /* gpio PH1 */
  399. power-gpios = <&gpio 155 0>; /* gpio PT3 */
  400. bus-width = <4>;
  401. };
  402. sdhci@c8000600 {
  403. status = "okay";
  404. cd-gpios = <&gpio 58 0>; /* gpio PH2 */
  405. wp-gpios = <&gpio 59 0>; /* gpio PH3 */
  406. power-gpios = <&gpio 70 0>; /* gpio PI6 */
  407. bus-width = <8>;
  408. };
  409. kbc {
  410. status = "okay";
  411. nvidia,debounce-delay-ms = <2>;
  412. nvidia,repeat-delay-ms = <160>;
  413. nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
  414. nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
  415. linux,keymap = <0x00020011 /* KEY_W */
  416. 0x0003001F /* KEY_S */
  417. 0x0004001E /* KEY_A */
  418. 0x0005002C /* KEY_Z */
  419. 0x000701D0 /* KEY_FN */
  420. 0x0107008B /* KEY_MENU */
  421. 0x02060038 /* KEY_LEFTALT */
  422. 0x02070064 /* KEY_RIGHTALT */
  423. 0x03000006 /* KEY_5 */
  424. 0x03010005 /* KEY_4 */
  425. 0x03020013 /* KEY_R */
  426. 0x03030012 /* KEY_E */
  427. 0x03040021 /* KEY_F */
  428. 0x03050020 /* KEY_D */
  429. 0x0306002D /* KEY_X */
  430. 0x04000008 /* KEY_7 */
  431. 0x04010007 /* KEY_6 */
  432. 0x04020014 /* KEY_T */
  433. 0x04030023 /* KEY_H */
  434. 0x04040022 /* KEY_G */
  435. 0x0405002F /* KEY_V */
  436. 0x0406002E /* KEY_C */
  437. 0x04070039 /* KEY_SPACE */
  438. 0x0500000A /* KEY_9 */
  439. 0x05010009 /* KEY_8 */
  440. 0x05020016 /* KEY_U */
  441. 0x05030015 /* KEY_Y */
  442. 0x05040024 /* KEY_J */
  443. 0x05050031 /* KEY_N */
  444. 0x05060030 /* KEY_B */
  445. 0x0507002B /* KEY_BACKSLASH */
  446. 0x0600000C /* KEY_MINUS */
  447. 0x0601000B /* KEY_0 */
  448. 0x06020018 /* KEY_O */
  449. 0x06030017 /* KEY_I */
  450. 0x06040026 /* KEY_L */
  451. 0x06050025 /* KEY_K */
  452. 0x06060033 /* KEY_COMMA */
  453. 0x06070032 /* KEY_M */
  454. 0x0701000D /* KEY_EQUAL */
  455. 0x0702001B /* KEY_RIGHTBRACE */
  456. 0x0703001C /* KEY_ENTER */
  457. 0x0707008B /* KEY_MENU */
  458. 0x0804002A /* KEY_LEFTSHIFT */
  459. 0x08050036 /* KEY_RIGHTSHIFT */
  460. 0x0905001D /* KEY_LEFTCTRL */
  461. 0x09070061 /* KEY_RIGHTCTRL */
  462. 0x0B00001A /* KEY_LEFTBRACE */
  463. 0x0B010019 /* KEY_P */
  464. 0x0B020028 /* KEY_APOSTROPHE */
  465. 0x0B030027 /* KEY_SEMICOLON */
  466. 0x0B040035 /* KEY_SLASH */
  467. 0x0B050034 /* KEY_DOT */
  468. 0x0C000044 /* KEY_F10 */
  469. 0x0C010043 /* KEY_F9 */
  470. 0x0C02000E /* KEY_BACKSPACE */
  471. 0x0C030004 /* KEY_3 */
  472. 0x0C040003 /* KEY_2 */
  473. 0x0C050067 /* KEY_UP */
  474. 0x0C0600D2 /* KEY_PRINT */
  475. 0x0C070077 /* KEY_PAUSE */
  476. 0x0D00006E /* KEY_INSERT */
  477. 0x0D01006F /* KEY_DELETE */
  478. 0x0D030068 /* KEY_PAGEUP */
  479. 0x0D04006D /* KEY_PAGEDOWN */
  480. 0x0D05006A /* KEY_RIGHT */
  481. 0x0D06006C /* KEY_DOWN */
  482. 0x0D070069 /* KEY_LEFT */
  483. 0x0E000057 /* KEY_F11 */
  484. 0x0E010058 /* KEY_F12 */
  485. 0x0E020042 /* KEY_F8 */
  486. 0x0E030010 /* KEY_Q */
  487. 0x0E04003E /* KEY_F4 */
  488. 0x0E05003D /* KEY_F3 */
  489. 0x0E060002 /* KEY_1 */
  490. 0x0E070041 /* KEY_F7 */
  491. 0x0F000001 /* KEY_ESC */
  492. 0x0F010029 /* KEY_GRAVE */
  493. 0x0F02003F /* KEY_F5 */
  494. 0x0F03000F /* KEY_TAB */
  495. 0x0F04003B /* KEY_F1 */
  496. 0x0F05003C /* KEY_F2 */
  497. 0x0F06003A /* KEY_CAPSLOCK */
  498. 0x0F070040 /* KEY_F6 */
  499. 0x14000047 /* KEY_KP7 */
  500. 0x15000049 /* KEY_KP9 */
  501. 0x15010048 /* KEY_KP8 */
  502. 0x1502004B /* KEY_KP4 */
  503. 0x1504004F /* KEY_KP1 */
  504. 0x1601004E /* KEY_KPSLASH */
  505. 0x1602004D /* KEY_KP6 */
  506. 0x1603004C /* KEY_KP5 */
  507. 0x16040051 /* KEY_KP3 */
  508. 0x16050050 /* KEY_KP2 */
  509. 0x16070052 /* KEY_KP0 */
  510. 0x1B010037 /* KEY_KPASTERISK */
  511. 0x1B03004A /* KEY_KPMINUS */
  512. 0x1B04004E /* KEY_KPPLUS */
  513. 0x1B050053 /* KEY_KPDOT */
  514. 0x1C050073 /* KEY_VOLUMEUP */
  515. 0x1D030066 /* KEY_HOME */
  516. 0x1D04006B /* KEY_END */
  517. 0x1D0500E1 /* KEY_BRIGHTNESSUP */
  518. 0x1D060072 /* KEY_VOLUMEDOWN */
  519. 0x1D0700E0 /* KEY_BRIGHTNESSDOWN */
  520. 0x1E000045 /* KEY_NUMLOCK */
  521. 0x1E010046 /* KEY_SCROLLLOCK */
  522. 0x1E020071 /* KEY_MUTE */
  523. 0x1F0400D6>; /* KEY_QUESTION */
  524. };
  525. regulators {
  526. compatible = "simple-bus";
  527. #address-cells = <1>;
  528. #size-cells = <0>;
  529. vdd_5v0_reg: regulator@0 {
  530. compatible = "regulator-fixed";
  531. reg = <0>;
  532. regulator-name = "vdd_5v0";
  533. regulator-min-microvolt = <5000000>;
  534. regulator-max-microvolt = <5000000>;
  535. regulator-always-on;
  536. };
  537. regulator@1 {
  538. compatible = "regulator-fixed";
  539. reg = <1>;
  540. regulator-name = "vdd_1v5";
  541. regulator-min-microvolt = <1500000>;
  542. regulator-max-microvolt = <1500000>;
  543. gpio = <&pmic 0 0>;
  544. };
  545. regulator@2 {
  546. compatible = "regulator-fixed";
  547. reg = <2>;
  548. regulator-name = "vdd_1v2";
  549. regulator-min-microvolt = <1200000>;
  550. regulator-max-microvolt = <1200000>;
  551. gpio = <&pmic 1 0>;
  552. enable-active-high;
  553. };
  554. regulator@3 {
  555. compatible = "regulator-fixed";
  556. reg = <3>;
  557. regulator-name = "vdd_1v05";
  558. regulator-min-microvolt = <1050000>;
  559. regulator-max-microvolt = <1050000>;
  560. gpio = <&pmic 2 0>;
  561. enable-active-high;
  562. /* Hack until board-harmony-pcie.c is removed */
  563. status = "disabled";
  564. };
  565. regulator@4 {
  566. compatible = "regulator-fixed";
  567. reg = <4>;
  568. regulator-name = "vdd_pnl";
  569. regulator-min-microvolt = <2800000>;
  570. regulator-max-microvolt = <2800000>;
  571. gpio = <&gpio 22 0>; /* gpio PC6 */
  572. enable-active-high;
  573. };
  574. regulator@5 {
  575. compatible = "regulator-fixed";
  576. reg = <5>;
  577. regulator-name = "vdd_bl";
  578. regulator-min-microvolt = <2800000>;
  579. regulator-max-microvolt = <2800000>;
  580. gpio = <&gpio 176 0>; /* gpio PW0 */
  581. enable-active-high;
  582. };
  583. };
  584. sound {
  585. compatible = "nvidia,tegra-audio-wm8903-harmony",
  586. "nvidia,tegra-audio-wm8903";
  587. nvidia,model = "NVIDIA Tegra Harmony";
  588. nvidia,audio-routing =
  589. "Headphone Jack", "HPOUTR",
  590. "Headphone Jack", "HPOUTL",
  591. "Int Spk", "ROP",
  592. "Int Spk", "RON",
  593. "Int Spk", "LOP",
  594. "Int Spk", "LON",
  595. "Mic Jack", "MICBIAS",
  596. "IN1L", "Mic Jack";
  597. nvidia,i2s-controller = <&tegra_i2s1>;
  598. nvidia,audio-codec = <&wm8903>;
  599. nvidia,spkr-en-gpios = <&wm8903 2 0>;
  600. nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
  601. nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
  602. nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
  603. };
  604. };