integratorcp.dts 2.2 KB

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  1. /*
  2. * Device Tree for the ARM Integrator/CP platform
  3. */
  4. /dts-v1/;
  5. /include/ "integrator.dtsi"
  6. / {
  7. model = "ARM Integrator/CP";
  8. compatible = "arm,integrator-cp";
  9. aliases {
  10. arm,timer-primary = &timer2;
  11. arm,timer-secondary = &timer1;
  12. };
  13. chosen {
  14. bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";
  15. };
  16. cpcon {
  17. /* CP controller registers */
  18. reg = <0xcb000000 0x100>;
  19. };
  20. timer0: timer@13000000 {
  21. compatible = "arm,sp804", "arm,primecell";
  22. };
  23. timer1: timer@13000100 {
  24. compatible = "arm,sp804", "arm,primecell";
  25. };
  26. timer2: timer@13000200 {
  27. compatible = "arm,sp804", "arm,primecell";
  28. };
  29. pic: pic@14000000 {
  30. valid-mask = <0x1fc003ff>;
  31. };
  32. cic: cic@10000040 {
  33. compatible = "arm,versatile-fpga-irq";
  34. #interrupt-cells = <1>;
  35. interrupt-controller;
  36. reg = <0x10000040 0x100>;
  37. clear-mask = <0xffffffff>;
  38. valid-mask = <0x00000007>;
  39. };
  40. sic: sic@ca000000 {
  41. compatible = "arm,versatile-fpga-irq";
  42. #interrupt-cells = <1>;
  43. interrupt-controller;
  44. reg = <0xca000000 0x100>;
  45. clear-mask = <0x00000fff>;
  46. valid-mask = <0x00000fff>;
  47. };
  48. ethernet@c8000000 {
  49. compatible = "smsc,lan91c111";
  50. reg = <0xc8000000 0x10>;
  51. interrupt-parent = <&pic>;
  52. interrupts = <27>;
  53. };
  54. fpga {
  55. /*
  56. * These PrimeCells are at the same location and using
  57. * the same interrupts in all Integrators, but in the CP
  58. * slightly newer versions are deployed.
  59. */
  60. rtc@15000000 {
  61. compatible = "arm,pl031", "arm,primecell";
  62. };
  63. uart@16000000 {
  64. compatible = "arm,pl011", "arm,primecell";
  65. };
  66. uart@17000000 {
  67. compatible = "arm,pl011", "arm,primecell";
  68. };
  69. kmi@18000000 {
  70. compatible = "arm,pl050", "arm,primecell";
  71. };
  72. kmi@19000000 {
  73. compatible = "arm,pl050", "arm,primecell";
  74. };
  75. /*
  76. * These PrimeCells are only available on the Integrator/CP
  77. */
  78. mmc@1c000000 {
  79. compatible = "arm,pl180", "arm,primecell";
  80. reg = <0x1c000000 0x1000>;
  81. interrupts = <23 24>;
  82. max-frequency = <515633>;
  83. };
  84. aaci@1d000000 {
  85. compatible = "arm,pl041", "arm,primecell";
  86. reg = <0x1d000000 0x1000>;
  87. interrupts = <25>;
  88. };
  89. clcd@c0000000 {
  90. compatible = "arm,pl110", "arm,primecell";
  91. reg = <0xC0000000 0x1000>;
  92. interrupts = <22>;
  93. };
  94. };
  95. };