irq_alpha.c 6.6 KB

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  1. /*
  2. * Alpha specific irq code.
  3. */
  4. #include <linux/init.h>
  5. #include <linux/sched.h>
  6. #include <linux/irq.h>
  7. #include <linux/kernel_stat.h>
  8. #include <linux/module.h>
  9. #include <asm/machvec.h>
  10. #include <asm/dma.h>
  11. #include <asm/perf_event.h>
  12. #include <asm/mce.h>
  13. #include "proto.h"
  14. #include "irq_impl.h"
  15. /* Hack minimum IPL during interrupt processing for broken hardware. */
  16. #ifdef CONFIG_ALPHA_BROKEN_IRQ_MASK
  17. int __min_ipl;
  18. EXPORT_SYMBOL(__min_ipl);
  19. #endif
  20. /*
  21. * Performance counter hook. A module can override this to
  22. * do something useful.
  23. */
  24. static void
  25. dummy_perf(unsigned long vector, struct pt_regs *regs)
  26. {
  27. irq_err_count++;
  28. printk(KERN_CRIT "Performance counter interrupt!\n");
  29. }
  30. void (*perf_irq)(unsigned long, struct pt_regs *) = dummy_perf;
  31. EXPORT_SYMBOL(perf_irq);
  32. /*
  33. * The main interrupt entry point.
  34. */
  35. asmlinkage void
  36. do_entInt(unsigned long type, unsigned long vector,
  37. unsigned long la_ptr, struct pt_regs *regs)
  38. {
  39. struct pt_regs *old_regs;
  40. /*
  41. * Disable interrupts during IRQ handling.
  42. * Note that there is no matching local_irq_enable() due to
  43. * severe problems with RTI at IPL0 and some MILO PALcode
  44. * (namely LX164).
  45. */
  46. local_irq_disable();
  47. switch (type) {
  48. case 0:
  49. #ifdef CONFIG_SMP
  50. handle_ipi(regs);
  51. return;
  52. #else
  53. irq_err_count++;
  54. printk(KERN_CRIT "Interprocessor interrupt? "
  55. "You must be kidding!\n");
  56. #endif
  57. break;
  58. case 1:
  59. old_regs = set_irq_regs(regs);
  60. #ifdef CONFIG_SMP
  61. {
  62. long cpu;
  63. smp_percpu_timer_interrupt(regs);
  64. cpu = smp_processor_id();
  65. if (cpu != boot_cpuid) {
  66. kstat_incr_irqs_this_cpu(RTC_IRQ, irq_to_desc(RTC_IRQ));
  67. } else {
  68. handle_irq(RTC_IRQ);
  69. }
  70. }
  71. #else
  72. handle_irq(RTC_IRQ);
  73. #endif
  74. set_irq_regs(old_regs);
  75. return;
  76. case 2:
  77. old_regs = set_irq_regs(regs);
  78. alpha_mv.machine_check(vector, la_ptr);
  79. set_irq_regs(old_regs);
  80. return;
  81. case 3:
  82. old_regs = set_irq_regs(regs);
  83. alpha_mv.device_interrupt(vector);
  84. set_irq_regs(old_regs);
  85. return;
  86. case 4:
  87. perf_irq(la_ptr, regs);
  88. return;
  89. default:
  90. printk(KERN_CRIT "Hardware intr %ld %lx? Huh?\n",
  91. type, vector);
  92. }
  93. printk(KERN_CRIT "PC = %016lx PS=%04lx\n", regs->pc, regs->ps);
  94. }
  95. void __init
  96. common_init_isa_dma(void)
  97. {
  98. outb(0, DMA1_RESET_REG);
  99. outb(0, DMA2_RESET_REG);
  100. outb(0, DMA1_CLR_MASK_REG);
  101. outb(0, DMA2_CLR_MASK_REG);
  102. }
  103. void __init
  104. init_IRQ(void)
  105. {
  106. /* Just in case the platform init_irq() causes interrupts/mchecks
  107. (as is the case with RAWHIDE, at least). */
  108. wrent(entInt, 0);
  109. alpha_mv.init_irq();
  110. }
  111. /*
  112. * machine error checks
  113. */
  114. #define MCHK_K_TPERR 0x0080
  115. #define MCHK_K_TCPERR 0x0082
  116. #define MCHK_K_HERR 0x0084
  117. #define MCHK_K_ECC_C 0x0086
  118. #define MCHK_K_ECC_NC 0x0088
  119. #define MCHK_K_OS_BUGCHECK 0x008A
  120. #define MCHK_K_PAL_BUGCHECK 0x0090
  121. #ifndef CONFIG_SMP
  122. struct mcheck_info __mcheck_info;
  123. #endif
  124. void
  125. process_mcheck_info(unsigned long vector, unsigned long la_ptr,
  126. const char *machine, int expected)
  127. {
  128. struct el_common *mchk_header;
  129. const char *reason;
  130. /*
  131. * See if the machine check is due to a badaddr() and if so,
  132. * ignore it.
  133. */
  134. #ifdef CONFIG_VERBOSE_MCHECK
  135. if (alpha_verbose_mcheck > 1) {
  136. printk(KERN_CRIT "%s machine check %s\n", machine,
  137. expected ? "expected." : "NOT expected!!!");
  138. }
  139. #endif
  140. if (expected) {
  141. int cpu = smp_processor_id();
  142. mcheck_expected(cpu) = 0;
  143. mcheck_taken(cpu) = 1;
  144. return;
  145. }
  146. mchk_header = (struct el_common *)la_ptr;
  147. printk(KERN_CRIT "%s machine check: vector=0x%lx pc=0x%lx code=0x%x\n",
  148. machine, vector, get_irq_regs()->pc, mchk_header->code);
  149. switch (mchk_header->code) {
  150. /* Machine check reasons. Defined according to PALcode sources. */
  151. case 0x80: reason = "tag parity error"; break;
  152. case 0x82: reason = "tag control parity error"; break;
  153. case 0x84: reason = "generic hard error"; break;
  154. case 0x86: reason = "correctable ECC error"; break;
  155. case 0x88: reason = "uncorrectable ECC error"; break;
  156. case 0x8A: reason = "OS-specific PAL bugcheck"; break;
  157. case 0x90: reason = "callsys in kernel mode"; break;
  158. case 0x96: reason = "i-cache read retryable error"; break;
  159. case 0x98: reason = "processor detected hard error"; break;
  160. /* System specific (these are for Alcor, at least): */
  161. case 0x202: reason = "system detected hard error"; break;
  162. case 0x203: reason = "system detected uncorrectable ECC error"; break;
  163. case 0x204: reason = "SIO SERR occurred on PCI bus"; break;
  164. case 0x205: reason = "parity error detected by core logic"; break;
  165. case 0x206: reason = "SIO IOCHK occurred on ISA bus"; break;
  166. case 0x207: reason = "non-existent memory error"; break;
  167. case 0x208: reason = "MCHK_K_DCSR"; break;
  168. case 0x209: reason = "PCI SERR detected"; break;
  169. case 0x20b: reason = "PCI data parity error detected"; break;
  170. case 0x20d: reason = "PCI address parity error detected"; break;
  171. case 0x20f: reason = "PCI master abort error"; break;
  172. case 0x211: reason = "PCI target abort error"; break;
  173. case 0x213: reason = "scatter/gather PTE invalid error"; break;
  174. case 0x215: reason = "flash ROM write error"; break;
  175. case 0x217: reason = "IOA timeout detected"; break;
  176. case 0x219: reason = "IOCHK#, EISA add-in board parity or other catastrophic error"; break;
  177. case 0x21b: reason = "EISA fail-safe timer timeout"; break;
  178. case 0x21d: reason = "EISA bus time-out"; break;
  179. case 0x21f: reason = "EISA software generated NMI"; break;
  180. case 0x221: reason = "unexpected ev5 IRQ[3] interrupt"; break;
  181. default: reason = "unknown"; break;
  182. }
  183. printk(KERN_CRIT "machine check type: %s%s\n",
  184. reason, mchk_header->retry ? " (retryable)" : "");
  185. dik_show_regs(get_irq_regs(), NULL);
  186. #ifdef CONFIG_VERBOSE_MCHECK
  187. if (alpha_verbose_mcheck > 1) {
  188. /* Dump the logout area to give all info. */
  189. unsigned long *ptr = (unsigned long *)la_ptr;
  190. long i;
  191. for (i = 0; i < mchk_header->size / sizeof(long); i += 2) {
  192. printk(KERN_CRIT " +%8lx %016lx %016lx\n",
  193. i*sizeof(long), ptr[i], ptr[i+1]);
  194. }
  195. }
  196. #endif /* CONFIG_VERBOSE_MCHECK */
  197. }
  198. /*
  199. * The special RTC interrupt type. The interrupt itself was
  200. * processed by PALcode, and comes in via entInt vector 1.
  201. */
  202. struct irqaction timer_irqaction = {
  203. .handler = timer_interrupt,
  204. .name = "timer",
  205. };
  206. void __init
  207. init_rtc_irq(void)
  208. {
  209. irq_set_chip_and_handler_name(RTC_IRQ, &dummy_irq_chip,
  210. handle_simple_irq, "RTC");
  211. setup_irq(RTC_IRQ, &timer_irqaction);
  212. }
  213. /* Dummy irqactions. */
  214. struct irqaction isa_cascade_irqaction = {
  215. .handler = no_action,
  216. .name = "isa-cascade"
  217. };
  218. struct irqaction timer_cascade_irqaction = {
  219. .handler = no_action,
  220. .name = "timer-cascade"
  221. };
  222. struct irqaction halt_switch_irqaction = {
  223. .handler = no_action,
  224. .name = "halt-switch"
  225. };