core.c 4.7 KB

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  1. /*
  2. * linux/arch/arm/mach-integrator/core.c
  3. *
  4. * Copyright (C) 2000-2003 Deep Blue Solutions Ltd
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2, as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/types.h>
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/spinlock.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/irq.h>
  17. #include <linux/memblock.h>
  18. #include <linux/sched.h>
  19. #include <linux/smp.h>
  20. #include <linux/termios.h>
  21. #include <linux/amba/bus.h>
  22. #include <linux/amba/serial.h>
  23. #include <linux/io.h>
  24. #include <asm/clkdev.h>
  25. #include <mach/clkdev.h>
  26. #include <mach/hardware.h>
  27. #include <mach/platform.h>
  28. #include <asm/irq.h>
  29. #include <mach/cm.h>
  30. #include <asm/system.h>
  31. #include <asm/leds.h>
  32. #include <asm/mach/time.h>
  33. #include <asm/pgtable.h>
  34. static struct amba_pl010_data integrator_uart_data;
  35. static struct amba_device rtc_device = {
  36. .dev = {
  37. .init_name = "mb:15",
  38. },
  39. .res = {
  40. .start = INTEGRATOR_RTC_BASE,
  41. .end = INTEGRATOR_RTC_BASE + SZ_4K - 1,
  42. .flags = IORESOURCE_MEM,
  43. },
  44. .irq = { IRQ_RTCINT, NO_IRQ },
  45. .periphid = 0x00041030,
  46. };
  47. static struct amba_device uart0_device = {
  48. .dev = {
  49. .init_name = "mb:16",
  50. .platform_data = &integrator_uart_data,
  51. },
  52. .res = {
  53. .start = INTEGRATOR_UART0_BASE,
  54. .end = INTEGRATOR_UART0_BASE + SZ_4K - 1,
  55. .flags = IORESOURCE_MEM,
  56. },
  57. .irq = { IRQ_UARTINT0, NO_IRQ },
  58. .periphid = 0x0041010,
  59. };
  60. static struct amba_device uart1_device = {
  61. .dev = {
  62. .init_name = "mb:17",
  63. .platform_data = &integrator_uart_data,
  64. },
  65. .res = {
  66. .start = INTEGRATOR_UART1_BASE,
  67. .end = INTEGRATOR_UART1_BASE + SZ_4K - 1,
  68. .flags = IORESOURCE_MEM,
  69. },
  70. .irq = { IRQ_UARTINT1, NO_IRQ },
  71. .periphid = 0x0041010,
  72. };
  73. static struct amba_device kmi0_device = {
  74. .dev = {
  75. .init_name = "mb:18",
  76. },
  77. .res = {
  78. .start = KMI0_BASE,
  79. .end = KMI0_BASE + SZ_4K - 1,
  80. .flags = IORESOURCE_MEM,
  81. },
  82. .irq = { IRQ_KMIINT0, NO_IRQ },
  83. .periphid = 0x00041050,
  84. };
  85. static struct amba_device kmi1_device = {
  86. .dev = {
  87. .init_name = "mb:19",
  88. },
  89. .res = {
  90. .start = KMI1_BASE,
  91. .end = KMI1_BASE + SZ_4K - 1,
  92. .flags = IORESOURCE_MEM,
  93. },
  94. .irq = { IRQ_KMIINT1, NO_IRQ },
  95. .periphid = 0x00041050,
  96. };
  97. static struct amba_device *amba_devs[] __initdata = {
  98. &rtc_device,
  99. &uart0_device,
  100. &uart1_device,
  101. &kmi0_device,
  102. &kmi1_device,
  103. };
  104. /*
  105. * These are fixed clocks.
  106. */
  107. static struct clk clk24mhz = {
  108. .rate = 24000000,
  109. };
  110. static struct clk uartclk = {
  111. .rate = 14745600,
  112. };
  113. static struct clk_lookup lookups[] = {
  114. { /* UART0 */
  115. .dev_id = "mb:16",
  116. .clk = &uartclk,
  117. }, { /* UART1 */
  118. .dev_id = "mb:17",
  119. .clk = &uartclk,
  120. }, { /* KMI0 */
  121. .dev_id = "mb:18",
  122. .clk = &clk24mhz,
  123. }, { /* KMI1 */
  124. .dev_id = "mb:19",
  125. .clk = &clk24mhz,
  126. }, { /* MMCI - IntegratorCP */
  127. .dev_id = "mb:1c",
  128. .clk = &uartclk,
  129. }
  130. };
  131. static int __init integrator_init(void)
  132. {
  133. int i;
  134. clkdev_add_table(lookups, ARRAY_SIZE(lookups));
  135. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  136. struct amba_device *d = amba_devs[i];
  137. amba_device_register(d, &iomem_resource);
  138. }
  139. return 0;
  140. }
  141. arch_initcall(integrator_init);
  142. /*
  143. * On the Integrator platform, the port RTS and DTR are provided by
  144. * bits in the following SC_CTRLS register bits:
  145. * RTS DTR
  146. * UART0 7 6
  147. * UART1 5 4
  148. */
  149. #define SC_CTRLC IO_ADDRESS(INTEGRATOR_SC_CTRLC)
  150. #define SC_CTRLS IO_ADDRESS(INTEGRATOR_SC_CTRLS)
  151. static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
  152. {
  153. unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
  154. if (dev == &uart0_device) {
  155. rts_mask = 1 << 4;
  156. dtr_mask = 1 << 5;
  157. } else {
  158. rts_mask = 1 << 6;
  159. dtr_mask = 1 << 7;
  160. }
  161. if (mctrl & TIOCM_RTS)
  162. ctrlc |= rts_mask;
  163. else
  164. ctrls |= rts_mask;
  165. if (mctrl & TIOCM_DTR)
  166. ctrlc |= dtr_mask;
  167. else
  168. ctrls |= dtr_mask;
  169. __raw_writel(ctrls, SC_CTRLS);
  170. __raw_writel(ctrlc, SC_CTRLC);
  171. }
  172. static struct amba_pl010_data integrator_uart_data = {
  173. .set_mctrl = integrator_uart_set_mctrl,
  174. };
  175. #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL)
  176. static DEFINE_SPINLOCK(cm_lock);
  177. /**
  178. * cm_control - update the CM_CTRL register.
  179. * @mask: bits to change
  180. * @set: bits to set
  181. */
  182. void cm_control(u32 mask, u32 set)
  183. {
  184. unsigned long flags;
  185. u32 val;
  186. spin_lock_irqsave(&cm_lock, flags);
  187. val = readl(CM_CTRL) & ~mask;
  188. writel(val | set, CM_CTRL);
  189. spin_unlock_irqrestore(&cm_lock, flags);
  190. }
  191. EXPORT_SYMBOL(cm_control);
  192. /*
  193. * We need to stop things allocating the low memory; ideally we need a
  194. * better implementation of GFP_DMA which does not assume that DMA-able
  195. * memory starts at zero.
  196. */
  197. void __init integrator_reserve(void)
  198. {
  199. memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
  200. }