tda18271-fe.c 26 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126
  1. /*
  2. tda18271-fe.c - driver for the Philips / NXP TDA18271 silicon tuner
  3. Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include <linux/delay.h>
  17. #include <linux/videodev2.h>
  18. #include "tda18271-priv.h"
  19. int tda18271_debug;
  20. module_param_named(debug, tda18271_debug, int, 0644);
  21. MODULE_PARM_DESC(debug, "set debug level "
  22. "(info=1, map=2, reg=4, adv=8 (or-able))");
  23. /*---------------------------------------------------------------------*/
  24. static int tda18271_ir_cal_init(struct dvb_frontend *fe)
  25. {
  26. struct tda18271_priv *priv = fe->tuner_priv;
  27. unsigned char *regs = priv->tda18271_regs;
  28. tda18271_read_regs(fe);
  29. /* test IR_CAL_OK to see if we need init */
  30. if ((regs[R_EP1] & 0x08) == 0)
  31. tda18271_init_regs(fe);
  32. return 0;
  33. }
  34. /* ------------------------------------------------------------------ */
  35. static int tda18271_channel_configuration(struct dvb_frontend *fe,
  36. u32 ifc, u32 freq, u32 bw, u8 std)
  37. {
  38. struct tda18271_priv *priv = fe->tuner_priv;
  39. unsigned char *regs = priv->tda18271_regs;
  40. u32 N;
  41. /* update TV broadcast parameters */
  42. /* set standard */
  43. regs[R_EP3] &= ~0x1f; /* clear std bits */
  44. regs[R_EP3] |= std;
  45. /* set cal mode to normal */
  46. regs[R_EP4] &= ~0x03;
  47. /* update IF output level & IF notch frequency */
  48. regs[R_EP4] &= ~0x1c; /* clear if level bits */
  49. switch (priv->mode) {
  50. case TDA18271_ANALOG:
  51. regs[R_MPD] &= ~0x80; /* IF notch = 0 */
  52. break;
  53. case TDA18271_DIGITAL:
  54. regs[R_EP4] |= 0x04; /* IF level = 1 */
  55. regs[R_MPD] |= 0x80; /* IF notch = 1 */
  56. break;
  57. }
  58. regs[R_EP4] &= ~0x80; /* FM_RFn: turn this bit on only for fm radio */
  59. /* update RF_TOP / IF_TOP */
  60. switch (priv->mode) {
  61. case TDA18271_ANALOG:
  62. regs[R_EB22] = 0x2c;
  63. break;
  64. case TDA18271_DIGITAL:
  65. regs[R_EB22] = 0x37;
  66. break;
  67. }
  68. tda18271_write_regs(fe, R_EB22, 1);
  69. /* --------------------------------------------------------------- */
  70. /* disable Power Level Indicator */
  71. regs[R_EP1] |= 0x40;
  72. /* frequency dependent parameters */
  73. tda18271_calc_ir_measure(fe, &freq);
  74. tda18271_calc_bp_filter(fe, &freq);
  75. tda18271_calc_rf_band(fe, &freq);
  76. tda18271_calc_gain_taper(fe, &freq);
  77. /* --------------------------------------------------------------- */
  78. /* dual tuner and agc1 extra configuration */
  79. /* main vco when Master, cal vco when slave */
  80. regs[R_EB1] |= 0x04; /* FIXME: assumes master */
  81. /* agc1 always active */
  82. regs[R_EB1] &= ~0x02;
  83. /* agc1 has priority on agc2 */
  84. regs[R_EB1] &= ~0x01;
  85. tda18271_write_regs(fe, R_EB1, 1);
  86. /* --------------------------------------------------------------- */
  87. N = freq + ifc;
  88. /* FIXME: assumes master */
  89. tda18271_calc_main_pll(fe, N);
  90. tda18271_write_regs(fe, R_MPD, 4);
  91. tda18271_write_regs(fe, R_TM, 7);
  92. /* main pll charge pump source */
  93. regs[R_EB4] |= 0x20;
  94. tda18271_write_regs(fe, R_EB4, 1);
  95. msleep(1);
  96. /* normal operation for the main pll */
  97. regs[R_EB4] &= ~0x20;
  98. tda18271_write_regs(fe, R_EB4, 1);
  99. msleep(5);
  100. return 0;
  101. }
  102. static int tda18271_read_thermometer(struct dvb_frontend *fe)
  103. {
  104. struct tda18271_priv *priv = fe->tuner_priv;
  105. unsigned char *regs = priv->tda18271_regs;
  106. int tm;
  107. /* switch thermometer on */
  108. regs[R_TM] |= 0x10;
  109. tda18271_write_regs(fe, R_TM, 1);
  110. /* read thermometer info */
  111. tda18271_read_regs(fe);
  112. if ((((regs[R_TM] & 0x0f) == 0x00) && ((regs[R_TM] & 0x20) == 0x20)) ||
  113. (((regs[R_TM] & 0x0f) == 0x08) && ((regs[R_TM] & 0x20) == 0x00))) {
  114. if ((regs[R_TM] & 0x20) == 0x20)
  115. regs[R_TM] &= ~0x20;
  116. else
  117. regs[R_TM] |= 0x20;
  118. tda18271_write_regs(fe, R_TM, 1);
  119. msleep(10); /* temperature sensing */
  120. /* read thermometer info */
  121. tda18271_read_regs(fe);
  122. }
  123. tm = tda18271_lookup_thermometer(fe);
  124. /* switch thermometer off */
  125. regs[R_TM] &= ~0x10;
  126. tda18271_write_regs(fe, R_TM, 1);
  127. /* set CAL mode to normal */
  128. regs[R_EP4] &= ~0x03;
  129. tda18271_write_regs(fe, R_EP4, 1);
  130. return tm;
  131. }
  132. static int tda18271_rf_tracking_filters_correction(struct dvb_frontend *fe,
  133. u32 freq)
  134. {
  135. struct tda18271_priv *priv = fe->tuner_priv;
  136. struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
  137. unsigned char *regs = priv->tda18271_regs;
  138. int tm_current, rfcal_comp, approx, i;
  139. u8 dc_over_dt, rf_tab;
  140. /* power up */
  141. regs[R_EP3] &= ~0xe0; /* sm = 0, sm_lt = 0, sm_xt = 0 */
  142. tda18271_write_regs(fe, R_EP3, 1);
  143. /* read die current temperature */
  144. tm_current = tda18271_read_thermometer(fe);
  145. /* frequency dependent parameters */
  146. tda18271_calc_rf_cal(fe, &freq);
  147. rf_tab = regs[R_EB14];
  148. i = tda18271_lookup_rf_band(fe, &freq, NULL);
  149. if (i < 0)
  150. return -EINVAL;
  151. if ((0 == map[i].rf3) || (freq / 1000 < map[i].rf2)) {
  152. approx = map[i].rf_a1 *
  153. (freq / 1000 - map[i].rf1) + map[i].rf_b1 + rf_tab;
  154. } else {
  155. approx = map[i].rf_a2 *
  156. (freq / 1000 - map[i].rf2) + map[i].rf_b2 + rf_tab;
  157. }
  158. if (approx < 0)
  159. approx = 0;
  160. if (approx > 255)
  161. approx = 255;
  162. tda18271_lookup_map(fe, RF_CAL_DC_OVER_DT, &freq, &dc_over_dt);
  163. /* calculate temperature compensation */
  164. rfcal_comp = dc_over_dt * (tm_current - priv->tm_rfcal);
  165. regs[R_EB14] = approx + rfcal_comp;
  166. tda18271_write_regs(fe, R_EB14, 1);
  167. return 0;
  168. }
  169. static int tda18271_por(struct dvb_frontend *fe)
  170. {
  171. struct tda18271_priv *priv = fe->tuner_priv;
  172. unsigned char *regs = priv->tda18271_regs;
  173. /* power up detector 1 */
  174. regs[R_EB12] &= ~0x20;
  175. tda18271_write_regs(fe, R_EB12, 1);
  176. regs[R_EB18] &= ~0x80; /* turn agc1 loop on */
  177. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  178. tda18271_write_regs(fe, R_EB18, 1);
  179. regs[R_EB21] |= 0x03; /* set agc2_gain to -6 dB */
  180. /* POR mode */
  181. regs[R_EP3] &= ~0xe0; /* clear sm, sm_lt, sm_xt */
  182. regs[R_EP3] |= 0x80; /* sm = 1, sm_lt = 0, sm_xt = 0 */
  183. tda18271_write_regs(fe, R_EP3, 1);
  184. /* disable 1.5 MHz low pass filter */
  185. regs[R_EB23] &= ~0x04; /* forcelp_fc2_en = 0 */
  186. regs[R_EB23] &= ~0x02; /* XXX: lp_fc[2] = 0 */
  187. tda18271_write_regs(fe, R_EB21, 3);
  188. return 0;
  189. }
  190. static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
  191. {
  192. struct tda18271_priv *priv = fe->tuner_priv;
  193. unsigned char *regs = priv->tda18271_regs;
  194. u32 N;
  195. /* set CAL mode to normal */
  196. regs[R_EP4] &= ~0x03;
  197. tda18271_write_regs(fe, R_EP4, 1);
  198. /* switch off agc1 */
  199. regs[R_EP3] |= 0x40; /* sm_lt = 1 */
  200. regs[R_EB18] |= 0x03; /* set agc1_gain to 15 dB */
  201. tda18271_write_regs(fe, R_EB18, 1);
  202. /* frequency dependent parameters */
  203. tda18271_calc_bp_filter(fe, &freq);
  204. tda18271_calc_gain_taper(fe, &freq);
  205. tda18271_calc_rf_band(fe, &freq);
  206. tda18271_calc_km(fe, &freq);
  207. tda18271_write_regs(fe, R_EP1, 3);
  208. tda18271_write_regs(fe, R_EB13, 1);
  209. /* main pll charge pump source */
  210. regs[R_EB4] |= 0x20;
  211. tda18271_write_regs(fe, R_EB4, 1);
  212. /* cal pll charge pump source */
  213. regs[R_EB7] |= 0x20;
  214. tda18271_write_regs(fe, R_EB7, 1);
  215. /* force dcdc converter to 0 V */
  216. regs[R_EB14] = 0x00;
  217. tda18271_write_regs(fe, R_EB14, 1);
  218. /* disable plls lock */
  219. regs[R_EB20] &= ~0x20;
  220. tda18271_write_regs(fe, R_EB20, 1);
  221. /* set CAL mode to RF tracking filter calibration */
  222. regs[R_EP4] |= 0x03;
  223. tda18271_write_regs(fe, R_EP4, 2);
  224. /* --------------------------------------------------------------- */
  225. /* set the internal calibration signal */
  226. N = freq;
  227. tda18271_calc_main_pll(fe, N);
  228. tda18271_write_regs(fe, R_MPD, 4);
  229. /* downconvert internal calibration */
  230. N += 1000000;
  231. tda18271_calc_main_pll(fe, N);
  232. tda18271_write_regs(fe, R_MPD, 4);
  233. msleep(5);
  234. tda18271_write_regs(fe, R_EP2, 1);
  235. tda18271_write_regs(fe, R_EP1, 1);
  236. tda18271_write_regs(fe, R_EP2, 1);
  237. tda18271_write_regs(fe, R_EP1, 1);
  238. /* --------------------------------------------------------------- */
  239. /* normal operation for the main pll */
  240. regs[R_EB4] &= ~0x20;
  241. tda18271_write_regs(fe, R_EB4, 1);
  242. /* normal operation for the cal pll */
  243. regs[R_EB7] &= ~0x20;
  244. tda18271_write_regs(fe, R_EB7, 1);
  245. msleep(5); /* plls locking */
  246. /* launch the rf tracking filters calibration */
  247. regs[R_EB20] |= 0x20;
  248. tda18271_write_regs(fe, R_EB20, 1);
  249. msleep(60); /* calibration */
  250. /* --------------------------------------------------------------- */
  251. /* set CAL mode to normal */
  252. regs[R_EP4] &= ~0x03;
  253. /* switch on agc1 */
  254. regs[R_EP3] &= ~0x40; /* sm_lt = 0 */
  255. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  256. tda18271_write_regs(fe, R_EB18, 1);
  257. tda18271_write_regs(fe, R_EP3, 2);
  258. /* synchronization */
  259. tda18271_write_regs(fe, R_EP1, 1);
  260. /* get calibration result */
  261. tda18271_read_extended(fe);
  262. return regs[R_EB14];
  263. }
  264. static int tda18271_powerscan(struct dvb_frontend *fe,
  265. u32 *freq_in, u32 *freq_out)
  266. {
  267. struct tda18271_priv *priv = fe->tuner_priv;
  268. unsigned char *regs = priv->tda18271_regs;
  269. int sgn, bcal, count, wait;
  270. u8 cid_target;
  271. u16 count_limit;
  272. u32 freq;
  273. freq = *freq_in;
  274. tda18271_calc_rf_band(fe, &freq);
  275. tda18271_calc_rf_cal(fe, &freq);
  276. tda18271_calc_gain_taper(fe, &freq);
  277. tda18271_lookup_cid_target(fe, &freq, &cid_target, &count_limit);
  278. tda18271_write_regs(fe, R_EP2, 1);
  279. tda18271_write_regs(fe, R_EB14, 1);
  280. /* downconvert frequency */
  281. freq += 1000000;
  282. tda18271_calc_main_pll(fe, freq);
  283. tda18271_write_regs(fe, R_MPD, 4);
  284. msleep(5); /* pll locking */
  285. /* detection mode */
  286. regs[R_EP4] &= ~0x03;
  287. regs[R_EP4] |= 0x01;
  288. tda18271_write_regs(fe, R_EP4, 1);
  289. /* launch power detection measurement */
  290. tda18271_write_regs(fe, R_EP2, 1);
  291. /* read power detection info, stored in EB10 */
  292. tda18271_read_extended(fe);
  293. /* algorithm initialization */
  294. sgn = 1;
  295. *freq_out = *freq_in;
  296. bcal = 0;
  297. count = 0;
  298. wait = false;
  299. while ((regs[R_EB10] & 0x3f) < cid_target) {
  300. /* downconvert updated freq to 1 MHz */
  301. freq = *freq_in + (sgn * count) + 1000000;
  302. tda18271_calc_main_pll(fe, freq);
  303. tda18271_write_regs(fe, R_MPD, 4);
  304. if (wait) {
  305. msleep(5); /* pll locking */
  306. wait = false;
  307. } else
  308. udelay(100); /* pll locking */
  309. /* launch power detection measurement */
  310. tda18271_write_regs(fe, R_EP2, 1);
  311. /* read power detection info, stored in EB10 */
  312. tda18271_read_extended(fe);
  313. count += 200;
  314. if (count < count_limit)
  315. continue;
  316. if (sgn <= 0)
  317. break;
  318. sgn = -1 * sgn;
  319. count = 200;
  320. wait = true;
  321. }
  322. if ((regs[R_EB10] & 0x3f) >= cid_target) {
  323. bcal = 1;
  324. *freq_out = freq - 1000000;
  325. } else
  326. bcal = 0;
  327. tda_dbg("bcal = %d, freq_in = %d, freq_out = %d (freq = %d)\n",
  328. bcal, *freq_in, *freq_out, freq);
  329. return bcal;
  330. }
  331. static int tda18271_powerscan_init(struct dvb_frontend *fe)
  332. {
  333. struct tda18271_priv *priv = fe->tuner_priv;
  334. unsigned char *regs = priv->tda18271_regs;
  335. /* set standard to digital */
  336. regs[R_EP3] &= ~0x1f; /* clear std bits */
  337. regs[R_EP3] |= 0x12;
  338. /* set cal mode to normal */
  339. regs[R_EP4] &= ~0x03;
  340. /* update IF output level & IF notch frequency */
  341. regs[R_EP4] &= ~0x1c; /* clear if level bits */
  342. tda18271_write_regs(fe, R_EP3, 2);
  343. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  344. tda18271_write_regs(fe, R_EB18, 1);
  345. regs[R_EB21] &= ~0x03; /* set agc2_gain to -15 dB */
  346. /* 1.5 MHz low pass filter */
  347. regs[R_EB23] |= 0x04; /* forcelp_fc2_en = 1 */
  348. regs[R_EB23] |= 0x02; /* lp_fc[2] = 1 */
  349. tda18271_write_regs(fe, R_EB21, 3);
  350. return 0;
  351. }
  352. static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
  353. {
  354. struct tda18271_priv *priv = fe->tuner_priv;
  355. struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
  356. unsigned char *regs = priv->tda18271_regs;
  357. int bcal, rf, i;
  358. #define RF1 0
  359. #define RF2 1
  360. #define RF3 2
  361. u32 rf_default[3];
  362. u32 rf_freq[3];
  363. u8 prog_cal[3];
  364. u8 prog_tab[3];
  365. i = tda18271_lookup_rf_band(fe, &freq, NULL);
  366. if (i < 0)
  367. return i;
  368. rf_default[RF1] = 1000 * map[i].rf1_def;
  369. rf_default[RF2] = 1000 * map[i].rf2_def;
  370. rf_default[RF3] = 1000 * map[i].rf3_def;
  371. for (rf = RF1; rf <= RF3; rf++) {
  372. if (0 == rf_default[rf])
  373. return 0;
  374. tda_dbg("freq = %d, rf = %d\n", freq, rf);
  375. /* look for optimized calibration frequency */
  376. bcal = tda18271_powerscan(fe, &rf_default[rf], &rf_freq[rf]);
  377. tda18271_calc_rf_cal(fe, &rf_freq[rf]);
  378. prog_tab[rf] = regs[R_EB14];
  379. if (1 == bcal)
  380. prog_cal[rf] = tda18271_calibrate_rf(fe, rf_freq[rf]);
  381. else
  382. prog_cal[rf] = prog_tab[rf];
  383. switch (rf) {
  384. case RF1:
  385. map[i].rf_a1 = 0;
  386. map[i].rf_b1 = prog_cal[RF1] - prog_tab[RF1];
  387. map[i].rf1 = rf_freq[RF1] / 1000;
  388. break;
  389. case RF2:
  390. map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] -
  391. prog_cal[RF1] + prog_tab[RF1]) /
  392. ((rf_freq[RF2] - rf_freq[RF1]) / 1000);
  393. map[i].rf2 = rf_freq[RF2] / 1000;
  394. break;
  395. case RF3:
  396. map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] -
  397. prog_cal[RF2] + prog_tab[RF2]) /
  398. ((rf_freq[RF3] - rf_freq[RF2]) / 1000);
  399. map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2];
  400. map[i].rf3 = rf_freq[RF3] / 1000;
  401. break;
  402. default:
  403. BUG();
  404. }
  405. }
  406. return 0;
  407. }
  408. static int tda18271_calc_rf_filter_curve(struct dvb_frontend *fe)
  409. {
  410. struct tda18271_priv *priv = fe->tuner_priv;
  411. unsigned int i;
  412. tda_info("tda18271: performing RF tracking filter calibration\n");
  413. /* wait for die temperature stabilization */
  414. msleep(200);
  415. tda18271_powerscan_init(fe);
  416. /* rf band calibration */
  417. for (i = 0; priv->rf_cal_state[i].rfmax != 0; i++)
  418. tda18271_rf_tracking_filters_init(fe, 1000 *
  419. priv->rf_cal_state[i].rfmax);
  420. priv->tm_rfcal = tda18271_read_thermometer(fe);
  421. return 0;
  422. }
  423. /* ------------------------------------------------------------------ */
  424. static int tda18271_rf_cal_init(struct dvb_frontend *fe)
  425. {
  426. struct tda18271_priv *priv = fe->tuner_priv;
  427. if (priv->cal_initialized)
  428. return 0;
  429. tda18271_calc_rf_filter_curve(fe);
  430. tda18271_por(fe);
  431. priv->cal_initialized = true;
  432. return 0;
  433. }
  434. static int tda18271_init(struct dvb_frontend *fe)
  435. {
  436. struct tda18271_priv *priv = fe->tuner_priv;
  437. mutex_lock(&priv->lock);
  438. /* initialization */
  439. tda18271_ir_cal_init(fe);
  440. if (priv->id == TDA18271HDC2)
  441. tda18271_rf_cal_init(fe);
  442. mutex_unlock(&priv->lock);
  443. return 0;
  444. }
  445. static int tda18271c2_tune(struct dvb_frontend *fe,
  446. u32 ifc, u32 freq, u32 bw, u8 std)
  447. {
  448. struct tda18271_priv *priv = fe->tuner_priv;
  449. tda_dbg("freq = %d, ifc = %d\n", freq, ifc);
  450. tda18271_init(fe);
  451. mutex_lock(&priv->lock);
  452. tda18271_rf_tracking_filters_correction(fe, freq);
  453. tda18271_channel_configuration(fe, ifc, freq, bw, std);
  454. mutex_unlock(&priv->lock);
  455. return 0;
  456. }
  457. /* ------------------------------------------------------------------ */
  458. static int tda18271c1_tune(struct dvb_frontend *fe,
  459. u32 ifc, u32 freq, u32 bw, u8 std)
  460. {
  461. struct tda18271_priv *priv = fe->tuner_priv;
  462. unsigned char *regs = priv->tda18271_regs;
  463. u32 N = 0;
  464. tda18271_init(fe);
  465. mutex_lock(&priv->lock);
  466. tda_dbg("freq = %d, ifc = %d\n", freq, ifc);
  467. /* RF tracking filter calibration */
  468. /* calculate bp filter */
  469. tda18271_calc_bp_filter(fe, &freq);
  470. tda18271_write_regs(fe, R_EP1, 1);
  471. regs[R_EB4] &= 0x07;
  472. regs[R_EB4] |= 0x60;
  473. tda18271_write_regs(fe, R_EB4, 1);
  474. regs[R_EB7] = 0x60;
  475. tda18271_write_regs(fe, R_EB7, 1);
  476. regs[R_EB14] = 0x00;
  477. tda18271_write_regs(fe, R_EB14, 1);
  478. regs[R_EB20] = 0xcc;
  479. tda18271_write_regs(fe, R_EB20, 1);
  480. /* set cal mode to RF tracking filter calibration */
  481. regs[R_EP4] |= 0x03;
  482. /* calculate cal pll */
  483. switch (priv->mode) {
  484. case TDA18271_ANALOG:
  485. N = freq - 1250000;
  486. break;
  487. case TDA18271_DIGITAL:
  488. N = freq + bw / 2;
  489. break;
  490. }
  491. tda18271_calc_cal_pll(fe, N);
  492. /* calculate main pll */
  493. switch (priv->mode) {
  494. case TDA18271_ANALOG:
  495. N = freq - 250000;
  496. break;
  497. case TDA18271_DIGITAL:
  498. N = freq + bw / 2 + 1000000;
  499. break;
  500. }
  501. tda18271_calc_main_pll(fe, N);
  502. tda18271_write_regs(fe, R_EP3, 11);
  503. msleep(5); /* RF tracking filter calibration initialization */
  504. /* search for K,M,CO for RF calibration */
  505. tda18271_calc_km(fe, &freq);
  506. tda18271_write_regs(fe, R_EB13, 1);
  507. /* search for rf band */
  508. tda18271_calc_rf_band(fe, &freq);
  509. /* search for gain taper */
  510. tda18271_calc_gain_taper(fe, &freq);
  511. tda18271_write_regs(fe, R_EP2, 1);
  512. tda18271_write_regs(fe, R_EP1, 1);
  513. tda18271_write_regs(fe, R_EP2, 1);
  514. tda18271_write_regs(fe, R_EP1, 1);
  515. regs[R_EB4] &= 0x07;
  516. regs[R_EB4] |= 0x40;
  517. tda18271_write_regs(fe, R_EB4, 1);
  518. regs[R_EB7] = 0x40;
  519. tda18271_write_regs(fe, R_EB7, 1);
  520. msleep(10);
  521. regs[R_EB20] = 0xec;
  522. tda18271_write_regs(fe, R_EB20, 1);
  523. msleep(60); /* RF tracking filter calibration completion */
  524. regs[R_EP4] &= ~0x03; /* set cal mode to normal */
  525. tda18271_write_regs(fe, R_EP4, 1);
  526. tda18271_write_regs(fe, R_EP1, 1);
  527. /* RF tracking filter correction for VHF_Low band */
  528. if (0 == tda18271_calc_rf_cal(fe, &freq))
  529. tda18271_write_regs(fe, R_EB14, 1);
  530. /* Channel Configuration */
  531. switch (priv->mode) {
  532. case TDA18271_ANALOG:
  533. regs[R_EB22] = 0x2c;
  534. break;
  535. case TDA18271_DIGITAL:
  536. regs[R_EB22] = 0x37;
  537. break;
  538. }
  539. tda18271_write_regs(fe, R_EB22, 1);
  540. regs[R_EP1] |= 0x40; /* set dis power level on */
  541. /* set standard */
  542. regs[R_EP3] &= ~0x1f; /* clear std bits */
  543. /* see table 22 */
  544. regs[R_EP3] |= std;
  545. regs[R_EP4] &= ~0x03; /* set cal mode to normal */
  546. regs[R_EP4] &= ~0x1c; /* clear if level bits */
  547. switch (priv->mode) {
  548. case TDA18271_ANALOG:
  549. regs[R_MPD] &= ~0x80; /* IF notch = 0 */
  550. break;
  551. case TDA18271_DIGITAL:
  552. regs[R_EP4] |= 0x04;
  553. regs[R_MPD] |= 0x80;
  554. break;
  555. }
  556. regs[R_EP4] &= ~0x80; /* turn this bit on only for fm */
  557. /* image rejection validity */
  558. tda18271_calc_ir_measure(fe, &freq);
  559. /* calculate MAIN PLL */
  560. N = freq + ifc;
  561. tda18271_calc_main_pll(fe, N);
  562. tda18271_write_regs(fe, R_TM, 15);
  563. msleep(5);
  564. mutex_unlock(&priv->lock);
  565. return 0;
  566. }
  567. static inline int tda18271_tune(struct dvb_frontend *fe,
  568. u32 ifc, u32 freq, u32 bw, u8 std)
  569. {
  570. struct tda18271_priv *priv = fe->tuner_priv;
  571. int ret = -EINVAL;
  572. switch (priv->id) {
  573. case TDA18271HDC1:
  574. ret = tda18271c1_tune(fe, ifc, freq, bw, std);
  575. break;
  576. case TDA18271HDC2:
  577. ret = tda18271c2_tune(fe, ifc, freq, bw, std);
  578. break;
  579. }
  580. return ret;
  581. }
  582. /* ------------------------------------------------------------------ */
  583. static int tda18271_set_params(struct dvb_frontend *fe,
  584. struct dvb_frontend_parameters *params)
  585. {
  586. struct tda18271_priv *priv = fe->tuner_priv;
  587. struct tda18271_std_map *std_map = &priv->std;
  588. int ret;
  589. u8 std;
  590. u16 sgIF;
  591. u32 bw, freq = params->frequency;
  592. priv->mode = TDA18271_DIGITAL;
  593. /* see table 22 */
  594. if (fe->ops.info.type == FE_ATSC) {
  595. switch (params->u.vsb.modulation) {
  596. case VSB_8:
  597. case VSB_16:
  598. std = std_map->atsc_6.std_bits;
  599. sgIF = std_map->atsc_6.if_freq;
  600. break;
  601. case QAM_64:
  602. case QAM_256:
  603. std = std_map->qam_6.std_bits;
  604. sgIF = std_map->qam_6.if_freq;
  605. break;
  606. default:
  607. tda_warn("modulation not set!\n");
  608. return -EINVAL;
  609. }
  610. #if 0
  611. /* userspace request is already center adjusted */
  612. freq += 1750000; /* Adjust to center (+1.75MHZ) */
  613. #endif
  614. bw = 6000000;
  615. } else if (fe->ops.info.type == FE_OFDM) {
  616. switch (params->u.ofdm.bandwidth) {
  617. case BANDWIDTH_6_MHZ:
  618. bw = 6000000;
  619. std = std_map->dvbt_6.std_bits;
  620. sgIF = std_map->dvbt_6.if_freq;
  621. break;
  622. case BANDWIDTH_7_MHZ:
  623. bw = 7000000;
  624. std = std_map->dvbt_7.std_bits;
  625. sgIF = std_map->dvbt_7.if_freq;
  626. break;
  627. case BANDWIDTH_8_MHZ:
  628. bw = 8000000;
  629. std = std_map->dvbt_8.std_bits;
  630. sgIF = std_map->dvbt_8.if_freq;
  631. break;
  632. default:
  633. tda_warn("bandwidth not set!\n");
  634. return -EINVAL;
  635. }
  636. } else {
  637. tda_warn("modulation type not supported!\n");
  638. return -EINVAL;
  639. }
  640. ret = tda18271_tune(fe, sgIF * 1000, freq, bw, std);
  641. if (ret < 0)
  642. goto fail;
  643. priv->frequency = freq;
  644. priv->bandwidth = (fe->ops.info.type == FE_OFDM) ?
  645. params->u.ofdm.bandwidth : 0;
  646. fail:
  647. return ret;
  648. }
  649. static int tda18271_set_analog_params(struct dvb_frontend *fe,
  650. struct analog_parameters *params)
  651. {
  652. struct tda18271_priv *priv = fe->tuner_priv;
  653. struct tda18271_std_map *std_map = &priv->std;
  654. char *mode;
  655. int ret;
  656. u8 std;
  657. u16 sgIF;
  658. u32 freq = params->frequency * 62500;
  659. priv->mode = TDA18271_ANALOG;
  660. if (params->std & V4L2_STD_MN) {
  661. std = std_map->atv_mn.std_bits;
  662. sgIF = std_map->atv_mn.if_freq;
  663. mode = "MN";
  664. } else if (params->std & V4L2_STD_B) {
  665. std = std_map->atv_b.std_bits;
  666. sgIF = std_map->atv_b.if_freq;
  667. mode = "B";
  668. } else if (params->std & V4L2_STD_GH) {
  669. std = std_map->atv_gh.std_bits;
  670. sgIF = std_map->atv_gh.if_freq;
  671. mode = "GH";
  672. } else if (params->std & V4L2_STD_PAL_I) {
  673. std = std_map->atv_i.std_bits;
  674. sgIF = std_map->atv_i.if_freq;
  675. mode = "I";
  676. } else if (params->std & V4L2_STD_DK) {
  677. std = std_map->atv_dk.std_bits;
  678. sgIF = std_map->atv_dk.if_freq;
  679. mode = "DK";
  680. } else if (params->std & V4L2_STD_SECAM_L) {
  681. std = std_map->atv_l.std_bits;
  682. sgIF = std_map->atv_l.if_freq;
  683. mode = "L";
  684. } else if (params->std & V4L2_STD_SECAM_LC) {
  685. std = std_map->atv_lc.std_bits;
  686. sgIF = std_map->atv_lc.if_freq;
  687. mode = "L'";
  688. } else {
  689. std = std_map->atv_i.std_bits;
  690. sgIF = std_map->atv_i.if_freq;
  691. mode = "xx";
  692. }
  693. tda_dbg("setting tda18271 to system %s\n", mode);
  694. ret = tda18271_tune(fe, sgIF * 1000, freq, 0, std);
  695. if (ret < 0)
  696. goto fail;
  697. priv->frequency = freq;
  698. priv->bandwidth = 0;
  699. fail:
  700. return ret;
  701. }
  702. static int tda18271_release(struct dvb_frontend *fe)
  703. {
  704. kfree(fe->tuner_priv);
  705. fe->tuner_priv = NULL;
  706. return 0;
  707. }
  708. static int tda18271_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  709. {
  710. struct tda18271_priv *priv = fe->tuner_priv;
  711. *frequency = priv->frequency;
  712. return 0;
  713. }
  714. static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
  715. {
  716. struct tda18271_priv *priv = fe->tuner_priv;
  717. *bandwidth = priv->bandwidth;
  718. return 0;
  719. }
  720. /* ------------------------------------------------------------------ */
  721. #define tda18271_update_std(std_cfg, name) do { \
  722. if (map->std_cfg.if_freq + map->std_cfg.std_bits > 0) { \
  723. tda_dbg("Using custom std config for %s\n", name); \
  724. memcpy(&std->std_cfg, &map->std_cfg, \
  725. sizeof(struct tda18271_std_map_item)); \
  726. } } while (0)
  727. #define tda18271_dump_std_item(std_cfg, name) do { \
  728. tda_dbg("(%s) if freq = %d, std bits = 0x%02x\n", \
  729. name, std->std_cfg.if_freq, std->std_cfg.std_bits); \
  730. } while (0)
  731. static int tda18271_dump_std_map(struct dvb_frontend *fe)
  732. {
  733. struct tda18271_priv *priv = fe->tuner_priv;
  734. struct tda18271_std_map *std = &priv->std;
  735. tda_dbg("========== STANDARD MAP SETTINGS ==========\n");
  736. tda18271_dump_std_item(atv_b, "pal b");
  737. tda18271_dump_std_item(atv_dk, "pal dk");
  738. tda18271_dump_std_item(atv_gh, "pal gh");
  739. tda18271_dump_std_item(atv_i, "pal i");
  740. tda18271_dump_std_item(atv_l, "pal l");
  741. tda18271_dump_std_item(atv_lc, "pal l'");
  742. tda18271_dump_std_item(atv_mn, "atv mn");
  743. tda18271_dump_std_item(atsc_6, "atsc 6");
  744. tda18271_dump_std_item(dvbt_6, "dvbt 6");
  745. tda18271_dump_std_item(dvbt_7, "dvbt 7");
  746. tda18271_dump_std_item(dvbt_8, "dvbt 8");
  747. tda18271_dump_std_item(qam_6, "qam 6");
  748. tda18271_dump_std_item(qam_8, "qam 8");
  749. return 0;
  750. }
  751. static int tda18271_update_std_map(struct dvb_frontend *fe,
  752. struct tda18271_std_map *map)
  753. {
  754. struct tda18271_priv *priv = fe->tuner_priv;
  755. struct tda18271_std_map *std = &priv->std;
  756. if (!map)
  757. return -EINVAL;
  758. tda18271_update_std(atv_b, "atv b");
  759. tda18271_update_std(atv_dk, "atv dk");
  760. tda18271_update_std(atv_gh, "atv gh");
  761. tda18271_update_std(atv_i, "atv i");
  762. tda18271_update_std(atv_l, "atv l");
  763. tda18271_update_std(atv_lc, "atv l'");
  764. tda18271_update_std(atv_mn, "atv mn");
  765. tda18271_update_std(atsc_6, "atsc 6");
  766. tda18271_update_std(dvbt_6, "dvbt 6");
  767. tda18271_update_std(dvbt_7, "dvbt 7");
  768. tda18271_update_std(dvbt_8, "dvbt 8");
  769. tda18271_update_std(qam_6, "qam 6");
  770. tda18271_update_std(qam_8, "qam 8");
  771. return 0;
  772. }
  773. static int tda18271_get_id(struct dvb_frontend *fe)
  774. {
  775. struct tda18271_priv *priv = fe->tuner_priv;
  776. unsigned char *regs = priv->tda18271_regs;
  777. char *name;
  778. int ret = 0;
  779. mutex_lock(&priv->lock);
  780. tda18271_read_regs(fe);
  781. mutex_unlock(&priv->lock);
  782. switch (regs[R_ID] & 0x7f) {
  783. case 3:
  784. name = "TDA18271HD/C1";
  785. priv->id = TDA18271HDC1;
  786. break;
  787. case 4:
  788. name = "TDA18271HD/C2";
  789. priv->id = TDA18271HDC2;
  790. break;
  791. default:
  792. name = "Unknown device";
  793. ret = -EINVAL;
  794. break;
  795. }
  796. tda_info("%s detected @ %d-%04x%s\n", name,
  797. i2c_adapter_id(priv->i2c_adap), priv->i2c_addr,
  798. (0 == ret) ? "" : ", device not supported.");
  799. return ret;
  800. }
  801. static struct dvb_tuner_ops tda18271_tuner_ops = {
  802. .info = {
  803. .name = "NXP TDA18271HD",
  804. .frequency_min = 45000000,
  805. .frequency_max = 864000000,
  806. .frequency_step = 62500
  807. },
  808. .init = tda18271_init,
  809. .set_params = tda18271_set_params,
  810. .set_analog_params = tda18271_set_analog_params,
  811. .release = tda18271_release,
  812. .get_frequency = tda18271_get_frequency,
  813. .get_bandwidth = tda18271_get_bandwidth,
  814. };
  815. struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
  816. struct i2c_adapter *i2c,
  817. struct tda18271_config *cfg)
  818. {
  819. struct tda18271_priv *priv = NULL;
  820. priv = kzalloc(sizeof(struct tda18271_priv), GFP_KERNEL);
  821. if (priv == NULL)
  822. return NULL;
  823. priv->i2c_addr = addr;
  824. priv->i2c_adap = i2c;
  825. priv->gate = (cfg) ? cfg->gate : TDA18271_GATE_AUTO;
  826. priv->cal_initialized = false;
  827. mutex_init(&priv->lock);
  828. fe->tuner_priv = priv;
  829. if (tda18271_get_id(fe) < 0)
  830. goto fail;
  831. if (tda18271_assign_map_layout(fe) < 0)
  832. goto fail;
  833. memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
  834. sizeof(struct dvb_tuner_ops));
  835. /* override default std map with values in config struct */
  836. if ((cfg) && (cfg->std_map))
  837. tda18271_update_std_map(fe, cfg->std_map);
  838. if (tda18271_debug & DBG_MAP)
  839. tda18271_dump_std_map(fe);
  840. mutex_lock(&priv->lock);
  841. tda18271_init_regs(fe);
  842. mutex_unlock(&priv->lock);
  843. return fe;
  844. fail:
  845. tda18271_release(fe);
  846. return NULL;
  847. }
  848. EXPORT_SYMBOL_GPL(tda18271_attach);
  849. MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
  850. MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
  851. MODULE_LICENSE("GPL");
  852. MODULE_VERSION("0.2");
  853. /*
  854. * Overrides for Emacs so that we follow Linus's tabbing style.
  855. * ---------------------------------------------------------------------------
  856. * Local variables:
  857. * c-basic-offset: 8
  858. * End:
  859. */