intel_opregion.c 27 KB

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  1. /*
  2. * Copyright 2008 Intel Corporation <hong.liu@intel.com>
  3. * Copyright 2008 Red Hat <mjg@redhat.com>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  20. * NON-INFRINGEMENT. IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  22. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  23. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  24. * SOFTWARE.
  25. *
  26. */
  27. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  28. #include <linux/acpi.h>
  29. #include <linux/acpi_io.h>
  30. #include <acpi/video.h>
  31. #include <drm/drmP.h>
  32. #include <drm/i915_drm.h>
  33. #include "i915_drv.h"
  34. #include "intel_drv.h"
  35. #define PCI_ASLE 0xe4
  36. #define PCI_ASLS 0xfc
  37. #define PCI_SWSCI 0xe8
  38. #define PCI_SWSCI_SCISEL (1 << 15)
  39. #define PCI_SWSCI_GSSCIE (1 << 0)
  40. #define OPREGION_HEADER_OFFSET 0
  41. #define OPREGION_ACPI_OFFSET 0x100
  42. #define ACPI_CLID 0x01ac /* current lid state indicator */
  43. #define ACPI_CDCK 0x01b0 /* current docking state indicator */
  44. #define OPREGION_SWSCI_OFFSET 0x200
  45. #define OPREGION_ASLE_OFFSET 0x300
  46. #define OPREGION_VBT_OFFSET 0x400
  47. #define OPREGION_SIGNATURE "IntelGraphicsMem"
  48. #define MBOX_ACPI (1<<0)
  49. #define MBOX_SWSCI (1<<1)
  50. #define MBOX_ASLE (1<<2)
  51. struct opregion_header {
  52. u8 signature[16];
  53. u32 size;
  54. u32 opregion_ver;
  55. u8 bios_ver[32];
  56. u8 vbios_ver[16];
  57. u8 driver_ver[16];
  58. u32 mboxes;
  59. u8 reserved[164];
  60. } __attribute__((packed));
  61. /* OpRegion mailbox #1: public ACPI methods */
  62. struct opregion_acpi {
  63. u32 drdy; /* driver readiness */
  64. u32 csts; /* notification status */
  65. u32 cevt; /* current event */
  66. u8 rsvd1[20];
  67. u32 didl[8]; /* supported display devices ID list */
  68. u32 cpdl[8]; /* currently presented display list */
  69. u32 cadl[8]; /* currently active display list */
  70. u32 nadl[8]; /* next active devices list */
  71. u32 aslp; /* ASL sleep time-out */
  72. u32 tidx; /* toggle table index */
  73. u32 chpd; /* current hotplug enable indicator */
  74. u32 clid; /* current lid state*/
  75. u32 cdck; /* current docking state */
  76. u32 sxsw; /* Sx state resume */
  77. u32 evts; /* ASL supported events */
  78. u32 cnot; /* current OS notification */
  79. u32 nrdy; /* driver status */
  80. u8 rsvd2[60];
  81. } __attribute__((packed));
  82. /* OpRegion mailbox #2: SWSCI */
  83. struct opregion_swsci {
  84. u32 scic; /* SWSCI command|status|data */
  85. u32 parm; /* command parameters */
  86. u32 dslp; /* driver sleep time-out */
  87. u8 rsvd[244];
  88. } __attribute__((packed));
  89. /* OpRegion mailbox #3: ASLE */
  90. struct opregion_asle {
  91. u32 ardy; /* driver readiness */
  92. u32 aslc; /* ASLE interrupt command */
  93. u32 tche; /* technology enabled indicator */
  94. u32 alsi; /* current ALS illuminance reading */
  95. u32 bclp; /* backlight brightness to set */
  96. u32 pfit; /* panel fitting state */
  97. u32 cblv; /* current brightness level */
  98. u16 bclm[20]; /* backlight level duty cycle mapping table */
  99. u32 cpfm; /* current panel fitting mode */
  100. u32 epfm; /* enabled panel fitting modes */
  101. u8 plut[74]; /* panel LUT and identifier */
  102. u32 pfmb; /* PWM freq and min brightness */
  103. u32 cddv; /* color correction default values */
  104. u32 pcft; /* power conservation features */
  105. u32 srot; /* supported rotation angles */
  106. u32 iuer; /* IUER events */
  107. u8 rsvd[86];
  108. } __attribute__((packed));
  109. /* Driver readiness indicator */
  110. #define ASLE_ARDY_READY (1 << 0)
  111. #define ASLE_ARDY_NOT_READY (0 << 0)
  112. /* ASLE Interrupt Command (ASLC) bits */
  113. #define ASLC_SET_ALS_ILLUM (1 << 0)
  114. #define ASLC_SET_BACKLIGHT (1 << 1)
  115. #define ASLC_SET_PFIT (1 << 2)
  116. #define ASLC_SET_PWM_FREQ (1 << 3)
  117. #define ASLC_SUPPORTED_ROTATION_ANGLES (1 << 4)
  118. #define ASLC_BUTTON_ARRAY (1 << 5)
  119. #define ASLC_CONVERTIBLE_INDICATOR (1 << 6)
  120. #define ASLC_DOCKING_INDICATOR (1 << 7)
  121. #define ASLC_ISCT_STATE_CHANGE (1 << 8)
  122. #define ASLC_REQ_MSK 0x1ff
  123. /* response bits */
  124. #define ASLC_ALS_ILLUM_FAILED (1 << 10)
  125. #define ASLC_BACKLIGHT_FAILED (1 << 12)
  126. #define ASLC_PFIT_FAILED (1 << 14)
  127. #define ASLC_PWM_FREQ_FAILED (1 << 16)
  128. #define ASLC_ROTATION_ANGLES_FAILED (1 << 18)
  129. #define ASLC_BUTTON_ARRAY_FAILED (1 << 20)
  130. #define ASLC_CONVERTIBLE_FAILED (1 << 22)
  131. #define ASLC_DOCKING_FAILED (1 << 24)
  132. #define ASLC_ISCT_STATE_FAILED (1 << 26)
  133. /* Technology enabled indicator */
  134. #define ASLE_TCHE_ALS_EN (1 << 0)
  135. #define ASLE_TCHE_BLC_EN (1 << 1)
  136. #define ASLE_TCHE_PFIT_EN (1 << 2)
  137. #define ASLE_TCHE_PFMB_EN (1 << 3)
  138. /* ASLE backlight brightness to set */
  139. #define ASLE_BCLP_VALID (1<<31)
  140. #define ASLE_BCLP_MSK (~(1<<31))
  141. /* ASLE panel fitting request */
  142. #define ASLE_PFIT_VALID (1<<31)
  143. #define ASLE_PFIT_CENTER (1<<0)
  144. #define ASLE_PFIT_STRETCH_TEXT (1<<1)
  145. #define ASLE_PFIT_STRETCH_GFX (1<<2)
  146. /* PWM frequency and minimum brightness */
  147. #define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
  148. #define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
  149. #define ASLE_PFMB_PWM_MASK (0x7ffffe00)
  150. #define ASLE_PFMB_PWM_VALID (1<<31)
  151. #define ASLE_CBLV_VALID (1<<31)
  152. /* IUER */
  153. #define ASLE_IUER_DOCKING (1 << 7)
  154. #define ASLE_IUER_CONVERTIBLE (1 << 6)
  155. #define ASLE_IUER_ROTATION_LOCK_BTN (1 << 4)
  156. #define ASLE_IUER_VOLUME_DOWN_BTN (1 << 3)
  157. #define ASLE_IUER_VOLUME_UP_BTN (1 << 2)
  158. #define ASLE_IUER_WINDOWS_BTN (1 << 1)
  159. #define ASLE_IUER_POWER_BTN (1 << 0)
  160. /* Software System Control Interrupt (SWSCI) */
  161. #define SWSCI_SCIC_INDICATOR (1 << 0)
  162. #define SWSCI_SCIC_MAIN_FUNCTION_SHIFT 1
  163. #define SWSCI_SCIC_MAIN_FUNCTION_MASK (0xf << 1)
  164. #define SWSCI_SCIC_SUB_FUNCTION_SHIFT 8
  165. #define SWSCI_SCIC_SUB_FUNCTION_MASK (0xff << 8)
  166. #define SWSCI_SCIC_EXIT_PARAMETER_SHIFT 8
  167. #define SWSCI_SCIC_EXIT_PARAMETER_MASK (0xff << 8)
  168. #define SWSCI_SCIC_EXIT_STATUS_SHIFT 5
  169. #define SWSCI_SCIC_EXIT_STATUS_MASK (7 << 5)
  170. #define SWSCI_SCIC_EXIT_STATUS_SUCCESS 1
  171. #define SWSCI_FUNCTION_CODE(main, sub) \
  172. ((main) << SWSCI_SCIC_MAIN_FUNCTION_SHIFT | \
  173. (sub) << SWSCI_SCIC_SUB_FUNCTION_SHIFT)
  174. /* SWSCI: Get BIOS Data (GBDA) */
  175. #define SWSCI_GBDA 4
  176. #define SWSCI_GBDA_SUPPORTED_CALLS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 0)
  177. #define SWSCI_GBDA_REQUESTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 1)
  178. #define SWSCI_GBDA_BOOT_DISPLAY_PREF SWSCI_FUNCTION_CODE(SWSCI_GBDA, 4)
  179. #define SWSCI_GBDA_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 5)
  180. #define SWSCI_GBDA_TV_STANDARD SWSCI_FUNCTION_CODE(SWSCI_GBDA, 6)
  181. #define SWSCI_GBDA_INTERNAL_GRAPHICS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 7)
  182. #define SWSCI_GBDA_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_GBDA, 10)
  183. /* SWSCI: System BIOS Callbacks (SBCB) */
  184. #define SWSCI_SBCB 6
  185. #define SWSCI_SBCB_SUPPORTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 0)
  186. #define SWSCI_SBCB_INIT_COMPLETION SWSCI_FUNCTION_CODE(SWSCI_SBCB, 1)
  187. #define SWSCI_SBCB_PRE_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 3)
  188. #define SWSCI_SBCB_POST_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 4)
  189. #define SWSCI_SBCB_DISPLAY_SWITCH SWSCI_FUNCTION_CODE(SWSCI_SBCB, 5)
  190. #define SWSCI_SBCB_SET_TV_FORMAT SWSCI_FUNCTION_CODE(SWSCI_SBCB, 6)
  191. #define SWSCI_SBCB_ADAPTER_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 7)
  192. #define SWSCI_SBCB_DISPLAY_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 8)
  193. #define SWSCI_SBCB_SET_BOOT_DISPLAY SWSCI_FUNCTION_CODE(SWSCI_SBCB, 9)
  194. #define SWSCI_SBCB_SET_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 10)
  195. #define SWSCI_SBCB_SET_INTERNAL_GFX SWSCI_FUNCTION_CODE(SWSCI_SBCB, 11)
  196. #define SWSCI_SBCB_POST_HIRES_TO_DOS_FS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 16)
  197. #define SWSCI_SBCB_SUSPEND_RESUME SWSCI_FUNCTION_CODE(SWSCI_SBCB, 17)
  198. #define SWSCI_SBCB_SET_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 18)
  199. #define SWSCI_SBCB_POST_VBE_PM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 19)
  200. #define SWSCI_SBCB_ENABLE_DISABLE_AUDIO SWSCI_FUNCTION_CODE(SWSCI_SBCB, 21)
  201. #define ACPI_OTHER_OUTPUT (0<<8)
  202. #define ACPI_VGA_OUTPUT (1<<8)
  203. #define ACPI_TV_OUTPUT (2<<8)
  204. #define ACPI_DIGITAL_OUTPUT (3<<8)
  205. #define ACPI_LVDS_OUTPUT (4<<8)
  206. #ifdef CONFIG_ACPI
  207. static int swsci(struct drm_device *dev, u32 function, u32 parm, u32 *parm_out)
  208. {
  209. struct drm_i915_private *dev_priv = dev->dev_private;
  210. struct opregion_swsci __iomem *swsci = dev_priv->opregion.swsci;
  211. u32 main_function, sub_function, scic;
  212. u16 pci_swsci;
  213. u32 dslp;
  214. if (!swsci)
  215. return -ENODEV;
  216. main_function = (function & SWSCI_SCIC_MAIN_FUNCTION_MASK) >>
  217. SWSCI_SCIC_MAIN_FUNCTION_SHIFT;
  218. sub_function = (function & SWSCI_SCIC_SUB_FUNCTION_MASK) >>
  219. SWSCI_SCIC_SUB_FUNCTION_SHIFT;
  220. /* Check if we can call the function. See swsci_setup for details. */
  221. if (main_function == SWSCI_SBCB) {
  222. if ((dev_priv->opregion.swsci_sbcb_sub_functions &
  223. (1 << sub_function)) == 0)
  224. return -EINVAL;
  225. } else if (main_function == SWSCI_GBDA) {
  226. if ((dev_priv->opregion.swsci_gbda_sub_functions &
  227. (1 << sub_function)) == 0)
  228. return -EINVAL;
  229. }
  230. /* Driver sleep timeout in ms. */
  231. dslp = ioread32(&swsci->dslp);
  232. if (!dslp) {
  233. /* The spec says 2ms should be the default, but it's too small
  234. * for some machines. */
  235. dslp = 50;
  236. } else if (dslp > 500) {
  237. /* Hey bios, trust must be earned. */
  238. WARN_ONCE(1, "excessive driver sleep timeout (DSPL) %u\n", dslp);
  239. dslp = 500;
  240. }
  241. /* The spec tells us to do this, but we are the only user... */
  242. scic = ioread32(&swsci->scic);
  243. if (scic & SWSCI_SCIC_INDICATOR) {
  244. DRM_DEBUG_DRIVER("SWSCI request already in progress\n");
  245. return -EBUSY;
  246. }
  247. scic = function | SWSCI_SCIC_INDICATOR;
  248. iowrite32(parm, &swsci->parm);
  249. iowrite32(scic, &swsci->scic);
  250. /* Ensure SCI event is selected and event trigger is cleared. */
  251. pci_read_config_word(dev->pdev, PCI_SWSCI, &pci_swsci);
  252. if (!(pci_swsci & PCI_SWSCI_SCISEL) || (pci_swsci & PCI_SWSCI_GSSCIE)) {
  253. pci_swsci |= PCI_SWSCI_SCISEL;
  254. pci_swsci &= ~PCI_SWSCI_GSSCIE;
  255. pci_write_config_word(dev->pdev, PCI_SWSCI, pci_swsci);
  256. }
  257. /* Use event trigger to tell bios to check the mail. */
  258. pci_swsci |= PCI_SWSCI_GSSCIE;
  259. pci_write_config_word(dev->pdev, PCI_SWSCI, pci_swsci);
  260. /* Poll for the result. */
  261. #define C (((scic = ioread32(&swsci->scic)) & SWSCI_SCIC_INDICATOR) == 0)
  262. if (wait_for(C, dslp)) {
  263. DRM_DEBUG_DRIVER("SWSCI request timed out\n");
  264. return -ETIMEDOUT;
  265. }
  266. scic = (scic & SWSCI_SCIC_EXIT_STATUS_MASK) >>
  267. SWSCI_SCIC_EXIT_STATUS_SHIFT;
  268. /* Note: scic == 0 is an error! */
  269. if (scic != SWSCI_SCIC_EXIT_STATUS_SUCCESS) {
  270. DRM_DEBUG_DRIVER("SWSCI request error %u\n", scic);
  271. return -EIO;
  272. }
  273. if (parm_out)
  274. *parm_out = ioread32(&swsci->parm);
  275. return 0;
  276. #undef C
  277. }
  278. #define DISPLAY_TYPE_CRT 0
  279. #define DISPLAY_TYPE_TV 1
  280. #define DISPLAY_TYPE_EXTERNAL_FLAT_PANEL 2
  281. #define DISPLAY_TYPE_INTERNAL_FLAT_PANEL 3
  282. int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder,
  283. bool enable)
  284. {
  285. struct drm_device *dev = intel_encoder->base.dev;
  286. u32 parm = 0;
  287. u32 type = 0;
  288. u32 port;
  289. /* don't care about old stuff for now */
  290. if (!HAS_DDI(dev))
  291. return 0;
  292. port = intel_ddi_get_encoder_port(intel_encoder);
  293. if (port == PORT_E) {
  294. port = 0;
  295. } else {
  296. parm |= 1 << port;
  297. port++;
  298. }
  299. if (!enable)
  300. parm |= 4 << 8;
  301. switch (intel_encoder->type) {
  302. case INTEL_OUTPUT_ANALOG:
  303. type = DISPLAY_TYPE_CRT;
  304. break;
  305. case INTEL_OUTPUT_UNKNOWN:
  306. case INTEL_OUTPUT_DISPLAYPORT:
  307. case INTEL_OUTPUT_HDMI:
  308. type = DISPLAY_TYPE_EXTERNAL_FLAT_PANEL;
  309. break;
  310. case INTEL_OUTPUT_EDP:
  311. type = DISPLAY_TYPE_INTERNAL_FLAT_PANEL;
  312. break;
  313. default:
  314. WARN_ONCE(1, "unsupported intel_encoder type %d\n",
  315. intel_encoder->type);
  316. return -EINVAL;
  317. }
  318. parm |= type << (16 + port * 3);
  319. return swsci(dev, SWSCI_SBCB_DISPLAY_POWER_STATE, parm, NULL);
  320. }
  321. static const struct {
  322. pci_power_t pci_power_state;
  323. u32 parm;
  324. } power_state_map[] = {
  325. { PCI_D0, 0x00 },
  326. { PCI_D1, 0x01 },
  327. { PCI_D2, 0x02 },
  328. { PCI_D3hot, 0x04 },
  329. { PCI_D3cold, 0x04 },
  330. };
  331. int intel_opregion_notify_adapter(struct drm_device *dev, pci_power_t state)
  332. {
  333. int i;
  334. if (!HAS_DDI(dev))
  335. return 0;
  336. for (i = 0; i < ARRAY_SIZE(power_state_map); i++) {
  337. if (state == power_state_map[i].pci_power_state)
  338. return swsci(dev, SWSCI_SBCB_ADAPTER_POWER_STATE,
  339. power_state_map[i].parm, NULL);
  340. }
  341. return -EINVAL;
  342. }
  343. static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
  344. {
  345. struct drm_i915_private *dev_priv = dev->dev_private;
  346. struct drm_encoder *encoder;
  347. struct drm_connector *connector;
  348. struct intel_connector *intel_connector = NULL;
  349. struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[0];
  350. struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
  351. u32 ret = 0;
  352. bool found = false;
  353. DRM_DEBUG_DRIVER("bclp = 0x%08x\n", bclp);
  354. if (!(bclp & ASLE_BCLP_VALID))
  355. return ASLC_BACKLIGHT_FAILED;
  356. bclp &= ASLE_BCLP_MSK;
  357. if (bclp > 255)
  358. return ASLC_BACKLIGHT_FAILED;
  359. mutex_lock(&dev->mode_config.mutex);
  360. /*
  361. * Could match the OpRegion connector here instead, but we'd also need
  362. * to verify the connector could handle a backlight call.
  363. */
  364. list_for_each_entry(encoder, &dev->mode_config.encoder_list, head)
  365. if (encoder->crtc == crtc) {
  366. found = true;
  367. break;
  368. }
  369. if (!found) {
  370. ret = ASLC_BACKLIGHT_FAILED;
  371. goto out;
  372. }
  373. list_for_each_entry(connector, &dev->mode_config.connector_list, head)
  374. if (connector->encoder == encoder)
  375. intel_connector = to_intel_connector(connector);
  376. if (!intel_connector) {
  377. ret = ASLC_BACKLIGHT_FAILED;
  378. goto out;
  379. }
  380. DRM_DEBUG_KMS("updating opregion backlight %d/255\n", bclp);
  381. intel_panel_set_backlight(intel_connector, bclp, 255);
  382. iowrite32(DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID, &asle->cblv);
  383. out:
  384. mutex_unlock(&dev->mode_config.mutex);
  385. return ret;
  386. }
  387. static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi)
  388. {
  389. /* alsi is the current ALS reading in lux. 0 indicates below sensor
  390. range, 0xffff indicates above sensor range. 1-0xfffe are valid */
  391. DRM_DEBUG_DRIVER("Illum is not supported\n");
  392. return ASLC_ALS_ILLUM_FAILED;
  393. }
  394. static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb)
  395. {
  396. DRM_DEBUG_DRIVER("PWM freq is not supported\n");
  397. return ASLC_PWM_FREQ_FAILED;
  398. }
  399. static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
  400. {
  401. /* Panel fitting is currently controlled by the X code, so this is a
  402. noop until modesetting support works fully */
  403. DRM_DEBUG_DRIVER("Pfit is not supported\n");
  404. return ASLC_PFIT_FAILED;
  405. }
  406. static u32 asle_set_supported_rotation_angles(struct drm_device *dev, u32 srot)
  407. {
  408. DRM_DEBUG_DRIVER("SROT is not supported\n");
  409. return ASLC_ROTATION_ANGLES_FAILED;
  410. }
  411. static u32 asle_set_button_array(struct drm_device *dev, u32 iuer)
  412. {
  413. if (!iuer)
  414. DRM_DEBUG_DRIVER("Button array event is not supported (nothing)\n");
  415. if (iuer & ASLE_IUER_ROTATION_LOCK_BTN)
  416. DRM_DEBUG_DRIVER("Button array event is not supported (rotation lock)\n");
  417. if (iuer & ASLE_IUER_VOLUME_DOWN_BTN)
  418. DRM_DEBUG_DRIVER("Button array event is not supported (volume down)\n");
  419. if (iuer & ASLE_IUER_VOLUME_UP_BTN)
  420. DRM_DEBUG_DRIVER("Button array event is not supported (volume up)\n");
  421. if (iuer & ASLE_IUER_WINDOWS_BTN)
  422. DRM_DEBUG_DRIVER("Button array event is not supported (windows)\n");
  423. if (iuer & ASLE_IUER_POWER_BTN)
  424. DRM_DEBUG_DRIVER("Button array event is not supported (power)\n");
  425. return ASLC_BUTTON_ARRAY_FAILED;
  426. }
  427. static u32 asle_set_convertible(struct drm_device *dev, u32 iuer)
  428. {
  429. if (iuer & ASLE_IUER_CONVERTIBLE)
  430. DRM_DEBUG_DRIVER("Convertible is not supported (clamshell)\n");
  431. else
  432. DRM_DEBUG_DRIVER("Convertible is not supported (slate)\n");
  433. return ASLC_CONVERTIBLE_FAILED;
  434. }
  435. static u32 asle_set_docking(struct drm_device *dev, u32 iuer)
  436. {
  437. if (iuer & ASLE_IUER_DOCKING)
  438. DRM_DEBUG_DRIVER("Docking is not supported (docked)\n");
  439. else
  440. DRM_DEBUG_DRIVER("Docking is not supported (undocked)\n");
  441. return ASLC_DOCKING_FAILED;
  442. }
  443. static u32 asle_isct_state(struct drm_device *dev)
  444. {
  445. DRM_DEBUG_DRIVER("ISCT is not supported\n");
  446. return ASLC_ISCT_STATE_FAILED;
  447. }
  448. static void asle_work(struct work_struct *work)
  449. {
  450. struct intel_opregion *opregion =
  451. container_of(work, struct intel_opregion, asle_work);
  452. struct drm_i915_private *dev_priv =
  453. container_of(opregion, struct drm_i915_private, opregion);
  454. struct drm_device *dev = dev_priv->dev;
  455. struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
  456. u32 aslc_stat = 0;
  457. u32 aslc_req;
  458. if (!asle)
  459. return;
  460. aslc_req = ioread32(&asle->aslc);
  461. if (!(aslc_req & ASLC_REQ_MSK)) {
  462. DRM_DEBUG_DRIVER("No request on ASLC interrupt 0x%08x\n",
  463. aslc_req);
  464. return;
  465. }
  466. if (aslc_req & ASLC_SET_ALS_ILLUM)
  467. aslc_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi));
  468. if (aslc_req & ASLC_SET_BACKLIGHT)
  469. aslc_stat |= asle_set_backlight(dev, ioread32(&asle->bclp));
  470. if (aslc_req & ASLC_SET_PFIT)
  471. aslc_stat |= asle_set_pfit(dev, ioread32(&asle->pfit));
  472. if (aslc_req & ASLC_SET_PWM_FREQ)
  473. aslc_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb));
  474. if (aslc_req & ASLC_SUPPORTED_ROTATION_ANGLES)
  475. aslc_stat |= asle_set_supported_rotation_angles(dev,
  476. ioread32(&asle->srot));
  477. if (aslc_req & ASLC_BUTTON_ARRAY)
  478. aslc_stat |= asle_set_button_array(dev, ioread32(&asle->iuer));
  479. if (aslc_req & ASLC_CONVERTIBLE_INDICATOR)
  480. aslc_stat |= asle_set_convertible(dev, ioread32(&asle->iuer));
  481. if (aslc_req & ASLC_DOCKING_INDICATOR)
  482. aslc_stat |= asle_set_docking(dev, ioread32(&asle->iuer));
  483. if (aslc_req & ASLC_ISCT_STATE_CHANGE)
  484. aslc_stat |= asle_isct_state(dev);
  485. iowrite32(aslc_stat, &asle->aslc);
  486. }
  487. void intel_opregion_asle_intr(struct drm_device *dev)
  488. {
  489. struct drm_i915_private *dev_priv = dev->dev_private;
  490. if (dev_priv->opregion.asle)
  491. schedule_work(&dev_priv->opregion.asle_work);
  492. }
  493. #define ACPI_EV_DISPLAY_SWITCH (1<<0)
  494. #define ACPI_EV_LID (1<<1)
  495. #define ACPI_EV_DOCK (1<<2)
  496. static struct intel_opregion *system_opregion;
  497. static int intel_opregion_video_event(struct notifier_block *nb,
  498. unsigned long val, void *data)
  499. {
  500. /* The only video events relevant to opregion are 0x80. These indicate
  501. either a docking event, lid switch or display switch request. In
  502. Linux, these are handled by the dock, button and video drivers.
  503. */
  504. struct opregion_acpi __iomem *acpi;
  505. struct acpi_bus_event *event = data;
  506. int ret = NOTIFY_OK;
  507. if (strcmp(event->device_class, ACPI_VIDEO_CLASS) != 0)
  508. return NOTIFY_DONE;
  509. if (!system_opregion)
  510. return NOTIFY_DONE;
  511. acpi = system_opregion->acpi;
  512. if (event->type == 0x80 &&
  513. (ioread32(&acpi->cevt) & 1) == 0)
  514. ret = NOTIFY_BAD;
  515. iowrite32(0, &acpi->csts);
  516. return ret;
  517. }
  518. static struct notifier_block intel_opregion_notifier = {
  519. .notifier_call = intel_opregion_video_event,
  520. };
  521. /*
  522. * Initialise the DIDL field in opregion. This passes a list of devices to
  523. * the firmware. Values are defined by section B.4.2 of the ACPI specification
  524. * (version 3)
  525. */
  526. static void intel_didl_outputs(struct drm_device *dev)
  527. {
  528. struct drm_i915_private *dev_priv = dev->dev_private;
  529. struct intel_opregion *opregion = &dev_priv->opregion;
  530. struct drm_connector *connector;
  531. acpi_handle handle;
  532. struct acpi_device *acpi_dev, *acpi_cdev, *acpi_video_bus = NULL;
  533. unsigned long long device_id;
  534. acpi_status status;
  535. u32 temp;
  536. int i = 0;
  537. handle = DEVICE_ACPI_HANDLE(&dev->pdev->dev);
  538. if (!handle || acpi_bus_get_device(handle, &acpi_dev))
  539. return;
  540. if (acpi_is_video_device(handle))
  541. acpi_video_bus = acpi_dev;
  542. else {
  543. list_for_each_entry(acpi_cdev, &acpi_dev->children, node) {
  544. if (acpi_is_video_device(acpi_cdev->handle)) {
  545. acpi_video_bus = acpi_cdev;
  546. break;
  547. }
  548. }
  549. }
  550. if (!acpi_video_bus) {
  551. pr_warn("No ACPI video bus found\n");
  552. return;
  553. }
  554. list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) {
  555. if (i >= 8) {
  556. dev_dbg(&dev->pdev->dev,
  557. "More than 8 outputs detected via ACPI\n");
  558. return;
  559. }
  560. status =
  561. acpi_evaluate_integer(acpi_cdev->handle, "_ADR",
  562. NULL, &device_id);
  563. if (ACPI_SUCCESS(status)) {
  564. if (!device_id)
  565. goto blind_set;
  566. iowrite32((u32)(device_id & 0x0f0f),
  567. &opregion->acpi->didl[i]);
  568. i++;
  569. }
  570. }
  571. end:
  572. /* If fewer than 8 outputs, the list must be null terminated */
  573. if (i < 8)
  574. iowrite32(0, &opregion->acpi->didl[i]);
  575. return;
  576. blind_set:
  577. i = 0;
  578. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  579. int output_type = ACPI_OTHER_OUTPUT;
  580. if (i >= 8) {
  581. dev_dbg(&dev->pdev->dev,
  582. "More than 8 outputs in connector list\n");
  583. return;
  584. }
  585. switch (connector->connector_type) {
  586. case DRM_MODE_CONNECTOR_VGA:
  587. case DRM_MODE_CONNECTOR_DVIA:
  588. output_type = ACPI_VGA_OUTPUT;
  589. break;
  590. case DRM_MODE_CONNECTOR_Composite:
  591. case DRM_MODE_CONNECTOR_SVIDEO:
  592. case DRM_MODE_CONNECTOR_Component:
  593. case DRM_MODE_CONNECTOR_9PinDIN:
  594. output_type = ACPI_TV_OUTPUT;
  595. break;
  596. case DRM_MODE_CONNECTOR_DVII:
  597. case DRM_MODE_CONNECTOR_DVID:
  598. case DRM_MODE_CONNECTOR_DisplayPort:
  599. case DRM_MODE_CONNECTOR_HDMIA:
  600. case DRM_MODE_CONNECTOR_HDMIB:
  601. output_type = ACPI_DIGITAL_OUTPUT;
  602. break;
  603. case DRM_MODE_CONNECTOR_LVDS:
  604. output_type = ACPI_LVDS_OUTPUT;
  605. break;
  606. }
  607. temp = ioread32(&opregion->acpi->didl[i]);
  608. iowrite32(temp | (1<<31) | output_type | i,
  609. &opregion->acpi->didl[i]);
  610. i++;
  611. }
  612. goto end;
  613. }
  614. static void intel_setup_cadls(struct drm_device *dev)
  615. {
  616. struct drm_i915_private *dev_priv = dev->dev_private;
  617. struct intel_opregion *opregion = &dev_priv->opregion;
  618. int i = 0;
  619. u32 disp_id;
  620. /* Initialize the CADL field by duplicating the DIDL values.
  621. * Technically, this is not always correct as display outputs may exist,
  622. * but not active. This initialization is necessary for some Clevo
  623. * laptops that check this field before processing the brightness and
  624. * display switching hotkeys. Just like DIDL, CADL is NULL-terminated if
  625. * there are less than eight devices. */
  626. do {
  627. disp_id = ioread32(&opregion->acpi->didl[i]);
  628. iowrite32(disp_id, &opregion->acpi->cadl[i]);
  629. } while (++i < 8 && disp_id != 0);
  630. }
  631. void intel_opregion_init(struct drm_device *dev)
  632. {
  633. struct drm_i915_private *dev_priv = dev->dev_private;
  634. struct intel_opregion *opregion = &dev_priv->opregion;
  635. if (!opregion->header)
  636. return;
  637. if (opregion->acpi) {
  638. if (drm_core_check_feature(dev, DRIVER_MODESET)) {
  639. intel_didl_outputs(dev);
  640. intel_setup_cadls(dev);
  641. }
  642. /* Notify BIOS we are ready to handle ACPI video ext notifs.
  643. * Right now, all the events are handled by the ACPI video module.
  644. * We don't actually need to do anything with them. */
  645. iowrite32(0, &opregion->acpi->csts);
  646. iowrite32(1, &opregion->acpi->drdy);
  647. system_opregion = opregion;
  648. register_acpi_notifier(&intel_opregion_notifier);
  649. }
  650. if (opregion->asle) {
  651. iowrite32(ASLE_TCHE_BLC_EN, &opregion->asle->tche);
  652. iowrite32(ASLE_ARDY_READY, &opregion->asle->ardy);
  653. }
  654. }
  655. void intel_opregion_fini(struct drm_device *dev)
  656. {
  657. struct drm_i915_private *dev_priv = dev->dev_private;
  658. struct intel_opregion *opregion = &dev_priv->opregion;
  659. if (!opregion->header)
  660. return;
  661. if (opregion->asle)
  662. iowrite32(ASLE_ARDY_NOT_READY, &opregion->asle->ardy);
  663. cancel_work_sync(&dev_priv->opregion.asle_work);
  664. if (opregion->acpi) {
  665. iowrite32(0, &opregion->acpi->drdy);
  666. system_opregion = NULL;
  667. unregister_acpi_notifier(&intel_opregion_notifier);
  668. }
  669. /* just clear all opregion memory pointers now */
  670. iounmap(opregion->header);
  671. opregion->header = NULL;
  672. opregion->acpi = NULL;
  673. opregion->swsci = NULL;
  674. opregion->asle = NULL;
  675. opregion->vbt = NULL;
  676. opregion->lid_state = NULL;
  677. }
  678. static void swsci_setup(struct drm_device *dev)
  679. {
  680. struct drm_i915_private *dev_priv = dev->dev_private;
  681. struct intel_opregion *opregion = &dev_priv->opregion;
  682. bool requested_callbacks = false;
  683. u32 tmp;
  684. /* Sub-function code 0 is okay, let's allow them. */
  685. opregion->swsci_gbda_sub_functions = 1;
  686. opregion->swsci_sbcb_sub_functions = 1;
  687. /* We use GBDA to ask for supported GBDA calls. */
  688. if (swsci(dev, SWSCI_GBDA_SUPPORTED_CALLS, 0, &tmp) == 0) {
  689. /* make the bits match the sub-function codes */
  690. tmp <<= 1;
  691. opregion->swsci_gbda_sub_functions |= tmp;
  692. }
  693. /*
  694. * We also use GBDA to ask for _requested_ SBCB callbacks. The driver
  695. * must not call interfaces that are not specifically requested by the
  696. * bios.
  697. */
  698. if (swsci(dev, SWSCI_GBDA_REQUESTED_CALLBACKS, 0, &tmp) == 0) {
  699. /* here, the bits already match sub-function codes */
  700. opregion->swsci_sbcb_sub_functions |= tmp;
  701. requested_callbacks = true;
  702. }
  703. /*
  704. * But we use SBCB to ask for _supported_ SBCB calls. This does not mean
  705. * the callback is _requested_. But we still can't call interfaces that
  706. * are not requested.
  707. */
  708. if (swsci(dev, SWSCI_SBCB_SUPPORTED_CALLBACKS, 0, &tmp) == 0) {
  709. /* make the bits match the sub-function codes */
  710. u32 low = tmp & 0x7ff;
  711. u32 high = tmp & ~0xfff; /* bit 11 is reserved */
  712. tmp = (high << 4) | (low << 1) | 1;
  713. /* best guess what to do with supported wrt requested */
  714. if (requested_callbacks) {
  715. u32 req = opregion->swsci_sbcb_sub_functions;
  716. if ((req & tmp) != req)
  717. DRM_DEBUG_DRIVER("SWSCI BIOS requested (%08x) SBCB callbacks that are not supported (%08x)\n", req, tmp);
  718. /* XXX: for now, trust the requested callbacks */
  719. /* opregion->swsci_sbcb_sub_functions &= tmp; */
  720. } else {
  721. opregion->swsci_sbcb_sub_functions |= tmp;
  722. }
  723. }
  724. DRM_DEBUG_DRIVER("SWSCI GBDA callbacks %08x, SBCB callbacks %08x\n",
  725. opregion->swsci_gbda_sub_functions,
  726. opregion->swsci_sbcb_sub_functions);
  727. }
  728. #else /* CONFIG_ACPI */
  729. static inline void swsci_setup(struct drm_device *dev) {}
  730. #endif /* CONFIG_ACPI */
  731. int intel_opregion_setup(struct drm_device *dev)
  732. {
  733. struct drm_i915_private *dev_priv = dev->dev_private;
  734. struct intel_opregion *opregion = &dev_priv->opregion;
  735. void __iomem *base;
  736. u32 asls, mboxes;
  737. char buf[sizeof(OPREGION_SIGNATURE)];
  738. int err = 0;
  739. pci_read_config_dword(dev->pdev, PCI_ASLS, &asls);
  740. DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls);
  741. if (asls == 0) {
  742. DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n");
  743. return -ENOTSUPP;
  744. }
  745. #ifdef CONFIG_ACPI
  746. INIT_WORK(&opregion->asle_work, asle_work);
  747. #endif
  748. base = acpi_os_ioremap(asls, OPREGION_SIZE);
  749. if (!base)
  750. return -ENOMEM;
  751. memcpy_fromio(buf, base, sizeof(buf));
  752. if (memcmp(buf, OPREGION_SIGNATURE, 16)) {
  753. DRM_DEBUG_DRIVER("opregion signature mismatch\n");
  754. err = -EINVAL;
  755. goto err_out;
  756. }
  757. opregion->header = base;
  758. opregion->vbt = base + OPREGION_VBT_OFFSET;
  759. opregion->lid_state = base + ACPI_CLID;
  760. mboxes = ioread32(&opregion->header->mboxes);
  761. if (mboxes & MBOX_ACPI) {
  762. DRM_DEBUG_DRIVER("Public ACPI methods supported\n");
  763. opregion->acpi = base + OPREGION_ACPI_OFFSET;
  764. }
  765. if (mboxes & MBOX_SWSCI) {
  766. DRM_DEBUG_DRIVER("SWSCI supported\n");
  767. opregion->swsci = base + OPREGION_SWSCI_OFFSET;
  768. swsci_setup(dev);
  769. }
  770. if (mboxes & MBOX_ASLE) {
  771. DRM_DEBUG_DRIVER("ASLE supported\n");
  772. opregion->asle = base + OPREGION_ASLE_OFFSET;
  773. iowrite32(ASLE_ARDY_NOT_READY, &opregion->asle->ardy);
  774. }
  775. return 0;
  776. err_out:
  777. iounmap(base);
  778. return err;
  779. }