qlcnic_init.c 41 KB

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  1. /*
  2. * Copyright (C) 2009 - QLogic Corporation.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called "COPYING".
  22. *
  23. */
  24. #include <linux/netdevice.h>
  25. #include <linux/delay.h>
  26. #include <linux/slab.h>
  27. #include <linux/if_vlan.h>
  28. #include "qlcnic.h"
  29. struct crb_addr_pair {
  30. u32 addr;
  31. u32 data;
  32. };
  33. #define QLCNIC_MAX_CRB_XFORM 60
  34. static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
  35. #define crb_addr_transform(name) \
  36. (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
  37. QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
  38. #define QLCNIC_ADDR_ERROR (0xffffffff)
  39. static void
  40. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  41. struct qlcnic_host_rds_ring *rds_ring);
  42. static void crb_addr_transform_setup(void)
  43. {
  44. crb_addr_transform(XDMA);
  45. crb_addr_transform(TIMR);
  46. crb_addr_transform(SRE);
  47. crb_addr_transform(SQN3);
  48. crb_addr_transform(SQN2);
  49. crb_addr_transform(SQN1);
  50. crb_addr_transform(SQN0);
  51. crb_addr_transform(SQS3);
  52. crb_addr_transform(SQS2);
  53. crb_addr_transform(SQS1);
  54. crb_addr_transform(SQS0);
  55. crb_addr_transform(RPMX7);
  56. crb_addr_transform(RPMX6);
  57. crb_addr_transform(RPMX5);
  58. crb_addr_transform(RPMX4);
  59. crb_addr_transform(RPMX3);
  60. crb_addr_transform(RPMX2);
  61. crb_addr_transform(RPMX1);
  62. crb_addr_transform(RPMX0);
  63. crb_addr_transform(ROMUSB);
  64. crb_addr_transform(SN);
  65. crb_addr_transform(QMN);
  66. crb_addr_transform(QMS);
  67. crb_addr_transform(PGNI);
  68. crb_addr_transform(PGND);
  69. crb_addr_transform(PGN3);
  70. crb_addr_transform(PGN2);
  71. crb_addr_transform(PGN1);
  72. crb_addr_transform(PGN0);
  73. crb_addr_transform(PGSI);
  74. crb_addr_transform(PGSD);
  75. crb_addr_transform(PGS3);
  76. crb_addr_transform(PGS2);
  77. crb_addr_transform(PGS1);
  78. crb_addr_transform(PGS0);
  79. crb_addr_transform(PS);
  80. crb_addr_transform(PH);
  81. crb_addr_transform(NIU);
  82. crb_addr_transform(I2Q);
  83. crb_addr_transform(EG);
  84. crb_addr_transform(MN);
  85. crb_addr_transform(MS);
  86. crb_addr_transform(CAS2);
  87. crb_addr_transform(CAS1);
  88. crb_addr_transform(CAS0);
  89. crb_addr_transform(CAM);
  90. crb_addr_transform(C2C1);
  91. crb_addr_transform(C2C0);
  92. crb_addr_transform(SMB);
  93. crb_addr_transform(OCM0);
  94. crb_addr_transform(I2C0);
  95. }
  96. void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
  97. {
  98. struct qlcnic_recv_context *recv_ctx;
  99. struct qlcnic_host_rds_ring *rds_ring;
  100. struct qlcnic_rx_buffer *rx_buf;
  101. int i, ring;
  102. recv_ctx = &adapter->recv_ctx;
  103. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  104. rds_ring = &recv_ctx->rds_rings[ring];
  105. for (i = 0; i < rds_ring->num_desc; ++i) {
  106. rx_buf = &(rds_ring->rx_buf_arr[i]);
  107. if (rx_buf->skb == NULL)
  108. continue;
  109. pci_unmap_single(adapter->pdev,
  110. rx_buf->dma,
  111. rds_ring->dma_size,
  112. PCI_DMA_FROMDEVICE);
  113. dev_kfree_skb_any(rx_buf->skb);
  114. }
  115. }
  116. }
  117. void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
  118. {
  119. struct qlcnic_recv_context *recv_ctx;
  120. struct qlcnic_host_rds_ring *rds_ring;
  121. struct qlcnic_rx_buffer *rx_buf;
  122. int i, ring;
  123. recv_ctx = &adapter->recv_ctx;
  124. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  125. rds_ring = &recv_ctx->rds_rings[ring];
  126. INIT_LIST_HEAD(&rds_ring->free_list);
  127. rx_buf = rds_ring->rx_buf_arr;
  128. for (i = 0; i < rds_ring->num_desc; i++) {
  129. list_add_tail(&rx_buf->list,
  130. &rds_ring->free_list);
  131. rx_buf++;
  132. }
  133. }
  134. }
  135. void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter)
  136. {
  137. struct qlcnic_cmd_buffer *cmd_buf;
  138. struct qlcnic_skb_frag *buffrag;
  139. int i, j;
  140. struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
  141. cmd_buf = tx_ring->cmd_buf_arr;
  142. for (i = 0; i < tx_ring->num_desc; i++) {
  143. buffrag = cmd_buf->frag_array;
  144. if (buffrag->dma) {
  145. pci_unmap_single(adapter->pdev, buffrag->dma,
  146. buffrag->length, PCI_DMA_TODEVICE);
  147. buffrag->dma = 0ULL;
  148. }
  149. for (j = 0; j < cmd_buf->frag_count; j++) {
  150. buffrag++;
  151. if (buffrag->dma) {
  152. pci_unmap_page(adapter->pdev, buffrag->dma,
  153. buffrag->length,
  154. PCI_DMA_TODEVICE);
  155. buffrag->dma = 0ULL;
  156. }
  157. }
  158. if (cmd_buf->skb) {
  159. dev_kfree_skb_any(cmd_buf->skb);
  160. cmd_buf->skb = NULL;
  161. }
  162. cmd_buf++;
  163. }
  164. }
  165. void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
  166. {
  167. struct qlcnic_recv_context *recv_ctx;
  168. struct qlcnic_host_rds_ring *rds_ring;
  169. struct qlcnic_host_tx_ring *tx_ring;
  170. int ring;
  171. recv_ctx = &adapter->recv_ctx;
  172. if (recv_ctx->rds_rings == NULL)
  173. goto skip_rds;
  174. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  175. rds_ring = &recv_ctx->rds_rings[ring];
  176. vfree(rds_ring->rx_buf_arr);
  177. rds_ring->rx_buf_arr = NULL;
  178. }
  179. kfree(recv_ctx->rds_rings);
  180. skip_rds:
  181. if (adapter->tx_ring == NULL)
  182. return;
  183. tx_ring = adapter->tx_ring;
  184. vfree(tx_ring->cmd_buf_arr);
  185. tx_ring->cmd_buf_arr = NULL;
  186. kfree(adapter->tx_ring);
  187. adapter->tx_ring = NULL;
  188. }
  189. int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
  190. {
  191. struct qlcnic_recv_context *recv_ctx;
  192. struct qlcnic_host_rds_ring *rds_ring;
  193. struct qlcnic_host_sds_ring *sds_ring;
  194. struct qlcnic_host_tx_ring *tx_ring;
  195. struct qlcnic_rx_buffer *rx_buf;
  196. int ring, i, size;
  197. struct qlcnic_cmd_buffer *cmd_buf_arr;
  198. struct net_device *netdev = adapter->netdev;
  199. size = sizeof(struct qlcnic_host_tx_ring);
  200. tx_ring = kzalloc(size, GFP_KERNEL);
  201. if (tx_ring == NULL) {
  202. dev_err(&netdev->dev, "failed to allocate tx ring struct\n");
  203. return -ENOMEM;
  204. }
  205. adapter->tx_ring = tx_ring;
  206. tx_ring->num_desc = adapter->num_txd;
  207. tx_ring->txq = netdev_get_tx_queue(netdev, 0);
  208. cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
  209. if (cmd_buf_arr == NULL) {
  210. dev_err(&netdev->dev, "failed to allocate cmd buffer ring\n");
  211. goto err_out;
  212. }
  213. memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
  214. tx_ring->cmd_buf_arr = cmd_buf_arr;
  215. recv_ctx = &adapter->recv_ctx;
  216. size = adapter->max_rds_rings * sizeof(struct qlcnic_host_rds_ring);
  217. rds_ring = kzalloc(size, GFP_KERNEL);
  218. if (rds_ring == NULL) {
  219. dev_err(&netdev->dev, "failed to allocate rds ring struct\n");
  220. goto err_out;
  221. }
  222. recv_ctx->rds_rings = rds_ring;
  223. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  224. rds_ring = &recv_ctx->rds_rings[ring];
  225. switch (ring) {
  226. case RCV_RING_NORMAL:
  227. rds_ring->num_desc = adapter->num_rxd;
  228. rds_ring->dma_size = QLCNIC_P3_RX_BUF_MAX_LEN;
  229. rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
  230. break;
  231. case RCV_RING_JUMBO:
  232. rds_ring->num_desc = adapter->num_jumbo_rxd;
  233. rds_ring->dma_size =
  234. QLCNIC_P3_RX_JUMBO_BUF_MAX_LEN;
  235. if (adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO)
  236. rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
  237. rds_ring->skb_size =
  238. rds_ring->dma_size + NET_IP_ALIGN;
  239. break;
  240. }
  241. rds_ring->rx_buf_arr = (struct qlcnic_rx_buffer *)
  242. vmalloc(RCV_BUFF_RINGSIZE(rds_ring));
  243. if (rds_ring->rx_buf_arr == NULL) {
  244. dev_err(&netdev->dev, "Failed to allocate "
  245. "rx buffer ring %d\n", ring);
  246. goto err_out;
  247. }
  248. memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring));
  249. INIT_LIST_HEAD(&rds_ring->free_list);
  250. /*
  251. * Now go through all of them, set reference handles
  252. * and put them in the queues.
  253. */
  254. rx_buf = rds_ring->rx_buf_arr;
  255. for (i = 0; i < rds_ring->num_desc; i++) {
  256. list_add_tail(&rx_buf->list,
  257. &rds_ring->free_list);
  258. rx_buf->ref_handle = i;
  259. rx_buf++;
  260. }
  261. spin_lock_init(&rds_ring->lock);
  262. }
  263. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  264. sds_ring = &recv_ctx->sds_rings[ring];
  265. sds_ring->irq = adapter->msix_entries[ring].vector;
  266. sds_ring->adapter = adapter;
  267. sds_ring->num_desc = adapter->num_rxd;
  268. for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
  269. INIT_LIST_HEAD(&sds_ring->free_list[i]);
  270. }
  271. return 0;
  272. err_out:
  273. qlcnic_free_sw_resources(adapter);
  274. return -ENOMEM;
  275. }
  276. /*
  277. * Utility to translate from internal Phantom CRB address
  278. * to external PCI CRB address.
  279. */
  280. static u32 qlcnic_decode_crb_addr(u32 addr)
  281. {
  282. int i;
  283. u32 base_addr, offset, pci_base;
  284. crb_addr_transform_setup();
  285. pci_base = QLCNIC_ADDR_ERROR;
  286. base_addr = addr & 0xfff00000;
  287. offset = addr & 0x000fffff;
  288. for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
  289. if (crb_addr_xform[i] == base_addr) {
  290. pci_base = i << 20;
  291. break;
  292. }
  293. }
  294. if (pci_base == QLCNIC_ADDR_ERROR)
  295. return pci_base;
  296. else
  297. return pci_base + offset;
  298. }
  299. #define QLCNIC_MAX_ROM_WAIT_USEC 100
  300. static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
  301. {
  302. long timeout = 0;
  303. long done = 0;
  304. cond_resched();
  305. while (done == 0) {
  306. done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS);
  307. done &= 2;
  308. if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
  309. dev_err(&adapter->pdev->dev,
  310. "Timeout reached waiting for rom done");
  311. return -EIO;
  312. }
  313. udelay(1);
  314. }
  315. return 0;
  316. }
  317. static int do_rom_fast_read(struct qlcnic_adapter *adapter,
  318. int addr, int *valp)
  319. {
  320. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
  321. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  322. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
  323. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  324. if (qlcnic_wait_rom_done(adapter)) {
  325. dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
  326. return -EIO;
  327. }
  328. /* reset abyte_cnt and dummy_byte_cnt */
  329. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
  330. udelay(10);
  331. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  332. *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA);
  333. return 0;
  334. }
  335. static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  336. u8 *bytes, size_t size)
  337. {
  338. int addridx;
  339. int ret = 0;
  340. for (addridx = addr; addridx < (addr + size); addridx += 4) {
  341. int v;
  342. ret = do_rom_fast_read(adapter, addridx, &v);
  343. if (ret != 0)
  344. break;
  345. *(__le32 *)bytes = cpu_to_le32(v);
  346. bytes += 4;
  347. }
  348. return ret;
  349. }
  350. int
  351. qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  352. u8 *bytes, size_t size)
  353. {
  354. int ret;
  355. ret = qlcnic_rom_lock(adapter);
  356. if (ret < 0)
  357. return ret;
  358. ret = do_rom_fast_read_words(adapter, addr, bytes, size);
  359. qlcnic_rom_unlock(adapter);
  360. return ret;
  361. }
  362. int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, int addr, int *valp)
  363. {
  364. int ret;
  365. if (qlcnic_rom_lock(adapter) != 0)
  366. return -EIO;
  367. ret = do_rom_fast_read(adapter, addr, valp);
  368. qlcnic_rom_unlock(adapter);
  369. return ret;
  370. }
  371. int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
  372. {
  373. int addr, val;
  374. int i, n, init_delay;
  375. struct crb_addr_pair *buf;
  376. unsigned offset;
  377. u32 off;
  378. struct pci_dev *pdev = adapter->pdev;
  379. QLCWR32(adapter, CRB_CMDPEG_STATE, 0);
  380. QLCWR32(adapter, CRB_RCVPEG_STATE, 0);
  381. qlcnic_rom_lock(adapter);
  382. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
  383. qlcnic_rom_unlock(adapter);
  384. /* Init HW CRB block */
  385. if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
  386. qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
  387. dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
  388. return -EIO;
  389. }
  390. offset = n & 0xffffU;
  391. n = (n >> 16) & 0xffffU;
  392. if (n >= 1024) {
  393. dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
  394. return -EIO;
  395. }
  396. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  397. if (buf == NULL) {
  398. dev_err(&pdev->dev, "Unable to calloc memory for rom read.\n");
  399. return -ENOMEM;
  400. }
  401. for (i = 0; i < n; i++) {
  402. if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
  403. qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
  404. kfree(buf);
  405. return -EIO;
  406. }
  407. buf[i].addr = addr;
  408. buf[i].data = val;
  409. }
  410. for (i = 0; i < n; i++) {
  411. off = qlcnic_decode_crb_addr(buf[i].addr);
  412. if (off == QLCNIC_ADDR_ERROR) {
  413. dev_err(&pdev->dev, "CRB init value out of range %x\n",
  414. buf[i].addr);
  415. continue;
  416. }
  417. off += QLCNIC_PCI_CRBSPACE;
  418. if (off & 1)
  419. continue;
  420. /* skipping cold reboot MAGIC */
  421. if (off == QLCNIC_CAM_RAM(0x1fc))
  422. continue;
  423. if (off == (QLCNIC_CRB_I2C0 + 0x1c))
  424. continue;
  425. if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
  426. continue;
  427. if (off == (ROMUSB_GLB + 0xa8))
  428. continue;
  429. if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
  430. continue;
  431. if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
  432. continue;
  433. if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
  434. continue;
  435. if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
  436. continue;
  437. /* skip the function enable register */
  438. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
  439. continue;
  440. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
  441. continue;
  442. if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
  443. continue;
  444. init_delay = 1;
  445. /* After writing this register, HW needs time for CRB */
  446. /* to quiet down (else crb_window returns 0xffffffff) */
  447. if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
  448. init_delay = 1000;
  449. QLCWR32(adapter, off, buf[i].data);
  450. msleep(init_delay);
  451. }
  452. kfree(buf);
  453. /* Initialize protocol process engine */
  454. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
  455. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
  456. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
  457. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
  458. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
  459. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
  460. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
  461. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
  462. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
  463. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
  464. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
  465. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
  466. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
  467. msleep(1);
  468. QLCWR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
  469. QLCWR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
  470. return 0;
  471. }
  472. int
  473. qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
  474. {
  475. u32 heartbit, ret = -EIO;
  476. int retries = QLCNIC_HEARTBEAT_RETRY_COUNT;
  477. adapter->heartbit = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  478. do {
  479. msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
  480. heartbit = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  481. if (heartbit != adapter->heartbit) {
  482. /* Complete firmware handshake */
  483. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
  484. ret = QLCNIC_RCODE_SUCCESS;
  485. break;
  486. }
  487. } while (--retries);
  488. return ret;
  489. }
  490. int
  491. qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
  492. int timeo;
  493. u32 val;
  494. val = QLCRD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
  495. val = QLC_DEV_GET_DRV(val, adapter->portnum);
  496. if ((val & 0x3) != QLCNIC_TYPE_NIC) {
  497. dev_err(&adapter->pdev->dev,
  498. "Not an Ethernet NIC func=%u\n", val);
  499. return -EIO;
  500. }
  501. adapter->physical_port = (val >> 2);
  502. if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
  503. timeo = QLCNIC_INIT_TIMEOUT_SECS;
  504. adapter->dev_init_timeo = timeo;
  505. if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
  506. timeo = QLCNIC_RESET_TIMEOUT_SECS;
  507. adapter->reset_ack_timeo = timeo;
  508. return 0;
  509. }
  510. int
  511. qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
  512. {
  513. u32 ver = -1, min_ver;
  514. qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET, (int *)&ver);
  515. ver = QLCNIC_DECODE_VERSION(ver);
  516. min_ver = QLCNIC_MIN_FW_VERSION;
  517. if (ver < min_ver) {
  518. dev_err(&adapter->pdev->dev,
  519. "firmware version %d.%d.%d unsupported."
  520. "Min supported version %d.%d.%d\n",
  521. _major(ver), _minor(ver), _build(ver),
  522. _major(min_ver), _minor(min_ver), _build(min_ver));
  523. return -EINVAL;
  524. }
  525. return 0;
  526. }
  527. static int
  528. qlcnic_has_mn(struct qlcnic_adapter *adapter)
  529. {
  530. u32 capability;
  531. capability = 0;
  532. capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY);
  533. if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
  534. return 1;
  535. return 0;
  536. }
  537. static
  538. struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
  539. {
  540. u32 i;
  541. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  542. __le32 entries = cpu_to_le32(directory->num_entries);
  543. for (i = 0; i < entries; i++) {
  544. __le32 offs = cpu_to_le32(directory->findex) +
  545. (i * cpu_to_le32(directory->entry_size));
  546. __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8));
  547. if (tab_type == section)
  548. return (struct uni_table_desc *) &unirom[offs];
  549. }
  550. return NULL;
  551. }
  552. #define FILEHEADER_SIZE (14 * 4)
  553. static int
  554. qlcnic_validate_header(struct qlcnic_adapter *adapter)
  555. {
  556. const u8 *unirom = adapter->fw->data;
  557. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  558. __le32 fw_file_size = adapter->fw->size;
  559. __le32 entries;
  560. __le32 entry_size;
  561. __le32 tab_size;
  562. if (fw_file_size < FILEHEADER_SIZE)
  563. return -EINVAL;
  564. entries = cpu_to_le32(directory->num_entries);
  565. entry_size = cpu_to_le32(directory->entry_size);
  566. tab_size = cpu_to_le32(directory->findex) + (entries * entry_size);
  567. if (fw_file_size < tab_size)
  568. return -EINVAL;
  569. return 0;
  570. }
  571. static int
  572. qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
  573. {
  574. struct uni_table_desc *tab_desc;
  575. struct uni_data_desc *descr;
  576. const u8 *unirom = adapter->fw->data;
  577. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  578. QLCNIC_UNI_BOOTLD_IDX_OFF));
  579. __le32 offs;
  580. __le32 tab_size;
  581. __le32 data_size;
  582. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
  583. if (!tab_desc)
  584. return -EINVAL;
  585. tab_size = cpu_to_le32(tab_desc->findex) +
  586. (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
  587. if (adapter->fw->size < tab_size)
  588. return -EINVAL;
  589. offs = cpu_to_le32(tab_desc->findex) +
  590. (cpu_to_le32(tab_desc->entry_size) * (idx));
  591. descr = (struct uni_data_desc *)&unirom[offs];
  592. data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
  593. if (adapter->fw->size < data_size)
  594. return -EINVAL;
  595. return 0;
  596. }
  597. static int
  598. qlcnic_validate_fw(struct qlcnic_adapter *adapter)
  599. {
  600. struct uni_table_desc *tab_desc;
  601. struct uni_data_desc *descr;
  602. const u8 *unirom = adapter->fw->data;
  603. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  604. QLCNIC_UNI_FIRMWARE_IDX_OFF));
  605. __le32 offs;
  606. __le32 tab_size;
  607. __le32 data_size;
  608. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
  609. if (!tab_desc)
  610. return -EINVAL;
  611. tab_size = cpu_to_le32(tab_desc->findex) +
  612. (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
  613. if (adapter->fw->size < tab_size)
  614. return -EINVAL;
  615. offs = cpu_to_le32(tab_desc->findex) +
  616. (cpu_to_le32(tab_desc->entry_size) * (idx));
  617. descr = (struct uni_data_desc *)&unirom[offs];
  618. data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
  619. if (adapter->fw->size < data_size)
  620. return -EINVAL;
  621. return 0;
  622. }
  623. static int
  624. qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
  625. {
  626. struct uni_table_desc *ptab_descr;
  627. const u8 *unirom = adapter->fw->data;
  628. int mn_present = qlcnic_has_mn(adapter);
  629. __le32 entries;
  630. __le32 entry_size;
  631. __le32 tab_size;
  632. u32 i;
  633. ptab_descr = qlcnic_get_table_desc(unirom,
  634. QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
  635. if (!ptab_descr)
  636. return -EINVAL;
  637. entries = cpu_to_le32(ptab_descr->num_entries);
  638. entry_size = cpu_to_le32(ptab_descr->entry_size);
  639. tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size);
  640. if (adapter->fw->size < tab_size)
  641. return -EINVAL;
  642. nomn:
  643. for (i = 0; i < entries; i++) {
  644. __le32 flags, file_chiprev, offs;
  645. u8 chiprev = adapter->ahw.revision_id;
  646. u32 flagbit;
  647. offs = cpu_to_le32(ptab_descr->findex) +
  648. (i * cpu_to_le32(ptab_descr->entry_size));
  649. flags = cpu_to_le32(*((int *)&unirom[offs] +
  650. QLCNIC_UNI_FLAGS_OFF));
  651. file_chiprev = cpu_to_le32(*((int *)&unirom[offs] +
  652. QLCNIC_UNI_CHIP_REV_OFF));
  653. flagbit = mn_present ? 1 : 2;
  654. if ((chiprev == file_chiprev) &&
  655. ((1ULL << flagbit) & flags)) {
  656. adapter->file_prd_off = offs;
  657. return 0;
  658. }
  659. }
  660. if (mn_present) {
  661. mn_present = 0;
  662. goto nomn;
  663. }
  664. return -EINVAL;
  665. }
  666. static int
  667. qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
  668. {
  669. if (qlcnic_validate_header(adapter)) {
  670. dev_err(&adapter->pdev->dev,
  671. "unified image: header validation failed\n");
  672. return -EINVAL;
  673. }
  674. if (qlcnic_validate_product_offs(adapter)) {
  675. dev_err(&adapter->pdev->dev,
  676. "unified image: product validation failed\n");
  677. return -EINVAL;
  678. }
  679. if (qlcnic_validate_bootld(adapter)) {
  680. dev_err(&adapter->pdev->dev,
  681. "unified image: bootld validation failed\n");
  682. return -EINVAL;
  683. }
  684. if (qlcnic_validate_fw(adapter)) {
  685. dev_err(&adapter->pdev->dev,
  686. "unified image: firmware validation failed\n");
  687. return -EINVAL;
  688. }
  689. return 0;
  690. }
  691. static
  692. struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
  693. u32 section, u32 idx_offset)
  694. {
  695. const u8 *unirom = adapter->fw->data;
  696. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  697. idx_offset));
  698. struct uni_table_desc *tab_desc;
  699. __le32 offs;
  700. tab_desc = qlcnic_get_table_desc(unirom, section);
  701. if (tab_desc == NULL)
  702. return NULL;
  703. offs = cpu_to_le32(tab_desc->findex) +
  704. (cpu_to_le32(tab_desc->entry_size) * idx);
  705. return (struct uni_data_desc *)&unirom[offs];
  706. }
  707. static u8 *
  708. qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
  709. {
  710. u32 offs = QLCNIC_BOOTLD_START;
  711. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  712. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  713. QLCNIC_UNI_DIR_SECT_BOOTLD,
  714. QLCNIC_UNI_BOOTLD_IDX_OFF))->findex);
  715. return (u8 *)&adapter->fw->data[offs];
  716. }
  717. static u8 *
  718. qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
  719. {
  720. u32 offs = QLCNIC_IMAGE_START;
  721. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  722. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  723. QLCNIC_UNI_DIR_SECT_FW,
  724. QLCNIC_UNI_FIRMWARE_IDX_OFF))->findex);
  725. return (u8 *)&adapter->fw->data[offs];
  726. }
  727. static __le32
  728. qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
  729. {
  730. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  731. return cpu_to_le32((qlcnic_get_data_desc(adapter,
  732. QLCNIC_UNI_DIR_SECT_FW,
  733. QLCNIC_UNI_FIRMWARE_IDX_OFF))->size);
  734. else
  735. return cpu_to_le32(
  736. *(u32 *)&adapter->fw->data[QLCNIC_FW_SIZE_OFFSET]);
  737. }
  738. static __le32
  739. qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
  740. {
  741. struct uni_data_desc *fw_data_desc;
  742. const struct firmware *fw = adapter->fw;
  743. __le32 major, minor, sub;
  744. const u8 *ver_str;
  745. int i, ret;
  746. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  747. return cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET]);
  748. fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
  749. QLCNIC_UNI_FIRMWARE_IDX_OFF);
  750. ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) +
  751. cpu_to_le32(fw_data_desc->size) - 17;
  752. for (i = 0; i < 12; i++) {
  753. if (!strncmp(&ver_str[i], "REV=", 4)) {
  754. ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
  755. &major, &minor, &sub);
  756. if (ret != 3)
  757. return 0;
  758. else
  759. return major + (minor << 8) + (sub << 16);
  760. }
  761. }
  762. return 0;
  763. }
  764. static __le32
  765. qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
  766. {
  767. const struct firmware *fw = adapter->fw;
  768. __le32 bios_ver, prd_off = adapter->file_prd_off;
  769. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  770. return cpu_to_le32(
  771. *(u32 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET]);
  772. bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
  773. + QLCNIC_UNI_BIOS_VERSION_OFF));
  774. return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
  775. }
  776. static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
  777. {
  778. if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
  779. dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
  780. qlcnic_pcie_sem_unlock(adapter, 2);
  781. }
  782. int
  783. qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
  784. {
  785. u32 val, version, major, minor, build;
  786. if (qlcnic_check_fw_status(adapter)) {
  787. qlcnic_rom_lock_recovery(adapter);
  788. return 1;
  789. }
  790. if (adapter->need_fw_reset)
  791. return 1;
  792. /* check if we have got newer or different file firmware */
  793. if (adapter->fw) {
  794. val = qlcnic_get_fw_version(adapter);
  795. version = QLCNIC_DECODE_VERSION(val);
  796. major = QLCRD32(adapter, QLCNIC_FW_VERSION_MAJOR);
  797. minor = QLCRD32(adapter, QLCNIC_FW_VERSION_MINOR);
  798. build = QLCRD32(adapter, QLCNIC_FW_VERSION_SUB);
  799. if (version > QLCNIC_VERSION_CODE(major, minor, build))
  800. return 1;
  801. }
  802. return 0;
  803. }
  804. static const char *fw_name[] = {
  805. QLCNIC_UNIFIED_ROMIMAGE_NAME,
  806. QLCNIC_FLASH_ROMIMAGE_NAME,
  807. };
  808. int
  809. qlcnic_load_firmware(struct qlcnic_adapter *adapter)
  810. {
  811. u64 *ptr64;
  812. u32 i, flashaddr, size;
  813. const struct firmware *fw = adapter->fw;
  814. struct pci_dev *pdev = adapter->pdev;
  815. dev_info(&pdev->dev, "loading firmware from %s\n",
  816. fw_name[adapter->fw_type]);
  817. if (fw) {
  818. __le64 data;
  819. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  820. ptr64 = (u64 *)qlcnic_get_bootld_offs(adapter);
  821. flashaddr = QLCNIC_BOOTLD_START;
  822. for (i = 0; i < size; i++) {
  823. data = cpu_to_le64(ptr64[i]);
  824. if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
  825. return -EIO;
  826. flashaddr += 8;
  827. }
  828. size = (__force u32)qlcnic_get_fw_size(adapter) / 8;
  829. ptr64 = (u64 *)qlcnic_get_fw_offs(adapter);
  830. flashaddr = QLCNIC_IMAGE_START;
  831. for (i = 0; i < size; i++) {
  832. data = cpu_to_le64(ptr64[i]);
  833. if (qlcnic_pci_mem_write_2M(adapter,
  834. flashaddr, data))
  835. return -EIO;
  836. flashaddr += 8;
  837. }
  838. size = (__force u32)qlcnic_get_fw_size(adapter) % 8;
  839. if (size) {
  840. data = cpu_to_le64(ptr64[i]);
  841. if (qlcnic_pci_mem_write_2M(adapter,
  842. flashaddr, data))
  843. return -EIO;
  844. }
  845. } else {
  846. u64 data;
  847. u32 hi, lo;
  848. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  849. flashaddr = QLCNIC_BOOTLD_START;
  850. for (i = 0; i < size; i++) {
  851. if (qlcnic_rom_fast_read(adapter,
  852. flashaddr, (int *)&lo) != 0)
  853. return -EIO;
  854. if (qlcnic_rom_fast_read(adapter,
  855. flashaddr + 4, (int *)&hi) != 0)
  856. return -EIO;
  857. data = (((u64)hi << 32) | lo);
  858. if (qlcnic_pci_mem_write_2M(adapter,
  859. flashaddr, data))
  860. return -EIO;
  861. flashaddr += 8;
  862. }
  863. }
  864. msleep(1);
  865. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
  866. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
  867. return 0;
  868. }
  869. static int
  870. qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
  871. {
  872. __le32 val;
  873. u32 ver, bios, min_size;
  874. struct pci_dev *pdev = adapter->pdev;
  875. const struct firmware *fw = adapter->fw;
  876. u8 fw_type = adapter->fw_type;
  877. if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
  878. if (qlcnic_validate_unified_romimage(adapter))
  879. return -EINVAL;
  880. min_size = QLCNIC_UNI_FW_MIN_SIZE;
  881. } else {
  882. val = cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
  883. if ((__force u32)val != QLCNIC_BDINFO_MAGIC)
  884. return -EINVAL;
  885. min_size = QLCNIC_FW_MIN_SIZE;
  886. }
  887. if (fw->size < min_size)
  888. return -EINVAL;
  889. val = qlcnic_get_fw_version(adapter);
  890. ver = QLCNIC_DECODE_VERSION(val);
  891. if (ver < QLCNIC_MIN_FW_VERSION) {
  892. dev_err(&pdev->dev,
  893. "%s: firmware version %d.%d.%d unsupported\n",
  894. fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
  895. return -EINVAL;
  896. }
  897. val = qlcnic_get_bios_version(adapter);
  898. qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
  899. if ((__force u32)val != bios) {
  900. dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
  901. fw_name[fw_type]);
  902. return -EINVAL;
  903. }
  904. /* check if flashed firmware is newer */
  905. if (qlcnic_rom_fast_read(adapter,
  906. QLCNIC_FW_VERSION_OFFSET, (int *)&val))
  907. return -EIO;
  908. val = QLCNIC_DECODE_VERSION(val);
  909. if (val > ver) {
  910. dev_info(&pdev->dev, "%s: firmware is older than flash\n",
  911. fw_name[fw_type]);
  912. return -EINVAL;
  913. }
  914. QLCWR32(adapter, QLCNIC_CAM_RAM(0x1fc), QLCNIC_BDINFO_MAGIC);
  915. return 0;
  916. }
  917. static void
  918. qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
  919. {
  920. u8 fw_type;
  921. switch (adapter->fw_type) {
  922. case QLCNIC_UNKNOWN_ROMIMAGE:
  923. fw_type = QLCNIC_UNIFIED_ROMIMAGE;
  924. break;
  925. case QLCNIC_UNIFIED_ROMIMAGE:
  926. default:
  927. fw_type = QLCNIC_FLASH_ROMIMAGE;
  928. break;
  929. }
  930. adapter->fw_type = fw_type;
  931. }
  932. void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
  933. {
  934. struct pci_dev *pdev = adapter->pdev;
  935. int rc;
  936. adapter->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
  937. next:
  938. qlcnic_get_next_fwtype(adapter);
  939. if (adapter->fw_type == QLCNIC_FLASH_ROMIMAGE) {
  940. adapter->fw = NULL;
  941. } else {
  942. rc = request_firmware(&adapter->fw,
  943. fw_name[adapter->fw_type], &pdev->dev);
  944. if (rc != 0)
  945. goto next;
  946. rc = qlcnic_validate_firmware(adapter);
  947. if (rc != 0) {
  948. release_firmware(adapter->fw);
  949. msleep(1);
  950. goto next;
  951. }
  952. }
  953. }
  954. void
  955. qlcnic_release_firmware(struct qlcnic_adapter *adapter)
  956. {
  957. if (adapter->fw)
  958. release_firmware(adapter->fw);
  959. adapter->fw = NULL;
  960. }
  961. static void
  962. qlcnic_handle_linkevent(struct qlcnic_adapter *adapter,
  963. struct qlcnic_fw_msg *msg)
  964. {
  965. u32 cable_OUI;
  966. u16 cable_len;
  967. u16 link_speed;
  968. u8 link_status, module, duplex, autoneg;
  969. struct net_device *netdev = adapter->netdev;
  970. adapter->has_link_events = 1;
  971. cable_OUI = msg->body[1] & 0xffffffff;
  972. cable_len = (msg->body[1] >> 32) & 0xffff;
  973. link_speed = (msg->body[1] >> 48) & 0xffff;
  974. link_status = msg->body[2] & 0xff;
  975. duplex = (msg->body[2] >> 16) & 0xff;
  976. autoneg = (msg->body[2] >> 24) & 0xff;
  977. module = (msg->body[2] >> 8) & 0xff;
  978. if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE)
  979. dev_info(&netdev->dev, "unsupported cable: OUI 0x%x, "
  980. "length %d\n", cable_OUI, cable_len);
  981. else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN)
  982. dev_info(&netdev->dev, "unsupported cable length %d\n",
  983. cable_len);
  984. qlcnic_advert_link_change(adapter, link_status);
  985. if (duplex == LINKEVENT_FULL_DUPLEX)
  986. adapter->link_duplex = DUPLEX_FULL;
  987. else
  988. adapter->link_duplex = DUPLEX_HALF;
  989. adapter->module_type = module;
  990. adapter->link_autoneg = autoneg;
  991. adapter->link_speed = link_speed;
  992. }
  993. static void
  994. qlcnic_handle_fw_message(int desc_cnt, int index,
  995. struct qlcnic_host_sds_ring *sds_ring)
  996. {
  997. struct qlcnic_fw_msg msg;
  998. struct status_desc *desc;
  999. int i = 0, opcode;
  1000. while (desc_cnt > 0 && i < 8) {
  1001. desc = &sds_ring->desc_head[index];
  1002. msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
  1003. msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
  1004. index = get_next_index(index, sds_ring->num_desc);
  1005. desc_cnt--;
  1006. }
  1007. opcode = qlcnic_get_nic_msg_opcode(msg.body[0]);
  1008. switch (opcode) {
  1009. case QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
  1010. qlcnic_handle_linkevent(sds_ring->adapter, &msg);
  1011. break;
  1012. default:
  1013. break;
  1014. }
  1015. }
  1016. static int
  1017. qlcnic_alloc_rx_skb(struct qlcnic_adapter *adapter,
  1018. struct qlcnic_host_rds_ring *rds_ring,
  1019. struct qlcnic_rx_buffer *buffer)
  1020. {
  1021. struct sk_buff *skb;
  1022. dma_addr_t dma;
  1023. struct pci_dev *pdev = adapter->pdev;
  1024. skb = dev_alloc_skb(rds_ring->skb_size);
  1025. if (!skb) {
  1026. adapter->stats.skb_alloc_failure++;
  1027. return -ENOMEM;
  1028. }
  1029. skb_reserve(skb, 2);
  1030. dma = pci_map_single(pdev, skb->data,
  1031. rds_ring->dma_size, PCI_DMA_FROMDEVICE);
  1032. if (pci_dma_mapping_error(pdev, dma)) {
  1033. adapter->stats.rx_dma_map_error++;
  1034. dev_kfree_skb_any(skb);
  1035. return -ENOMEM;
  1036. }
  1037. buffer->skb = skb;
  1038. buffer->dma = dma;
  1039. return 0;
  1040. }
  1041. static struct sk_buff *qlcnic_process_rxbuf(struct qlcnic_adapter *adapter,
  1042. struct qlcnic_host_rds_ring *rds_ring, u16 index, u16 cksum)
  1043. {
  1044. struct qlcnic_rx_buffer *buffer;
  1045. struct sk_buff *skb;
  1046. buffer = &rds_ring->rx_buf_arr[index];
  1047. if (unlikely(buffer->skb == NULL)) {
  1048. WARN_ON(1);
  1049. return NULL;
  1050. }
  1051. pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
  1052. PCI_DMA_FROMDEVICE);
  1053. skb = buffer->skb;
  1054. if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
  1055. adapter->stats.csummed++;
  1056. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1057. } else {
  1058. skb->ip_summed = CHECKSUM_NONE;
  1059. }
  1060. skb->dev = adapter->netdev;
  1061. buffer->skb = NULL;
  1062. return skb;
  1063. }
  1064. static int
  1065. qlcnic_check_rx_tagging(struct qlcnic_adapter *adapter, struct sk_buff *skb)
  1066. {
  1067. u16 vlan_tag;
  1068. struct ethhdr *eth_hdr;
  1069. if (!__vlan_get_tag(skb, &vlan_tag)) {
  1070. if (vlan_tag == adapter->pvid) {
  1071. /* strip the tag from the packet and send it up */
  1072. eth_hdr = (struct ethhdr *) skb->data;
  1073. memmove(skb->data + VLAN_HLEN, eth_hdr, ETH_ALEN * 2);
  1074. skb_pull(skb, VLAN_HLEN);
  1075. return 0;
  1076. }
  1077. }
  1078. if (adapter->flags & QLCNIC_TAGGING_ENABLED)
  1079. return 0;
  1080. return -EIO;
  1081. }
  1082. static struct qlcnic_rx_buffer *
  1083. qlcnic_process_rcv(struct qlcnic_adapter *adapter,
  1084. struct qlcnic_host_sds_ring *sds_ring,
  1085. int ring, u64 sts_data0)
  1086. {
  1087. struct net_device *netdev = adapter->netdev;
  1088. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1089. struct qlcnic_rx_buffer *buffer;
  1090. struct sk_buff *skb;
  1091. struct qlcnic_host_rds_ring *rds_ring;
  1092. int index, length, cksum, pkt_offset;
  1093. if (unlikely(ring >= adapter->max_rds_rings))
  1094. return NULL;
  1095. rds_ring = &recv_ctx->rds_rings[ring];
  1096. index = qlcnic_get_sts_refhandle(sts_data0);
  1097. if (unlikely(index >= rds_ring->num_desc))
  1098. return NULL;
  1099. buffer = &rds_ring->rx_buf_arr[index];
  1100. length = qlcnic_get_sts_totallength(sts_data0);
  1101. cksum = qlcnic_get_sts_status(sts_data0);
  1102. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1103. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1104. if (!skb)
  1105. return buffer;
  1106. if (length > rds_ring->skb_size)
  1107. skb_put(skb, rds_ring->skb_size);
  1108. else
  1109. skb_put(skb, length);
  1110. if (pkt_offset)
  1111. skb_pull(skb, pkt_offset);
  1112. skb->truesize = skb->len + sizeof(struct sk_buff);
  1113. if (unlikely(adapter->pvid)) {
  1114. if (qlcnic_check_rx_tagging(adapter, skb)) {
  1115. adapter->stats.rxdropped++;
  1116. dev_kfree_skb_any(skb);
  1117. return buffer;
  1118. }
  1119. }
  1120. skb->protocol = eth_type_trans(skb, netdev);
  1121. napi_gro_receive(&sds_ring->napi, skb);
  1122. adapter->stats.rx_pkts++;
  1123. adapter->stats.rxbytes += length;
  1124. return buffer;
  1125. }
  1126. #define QLC_TCP_HDR_SIZE 20
  1127. #define QLC_TCP_TS_OPTION_SIZE 12
  1128. #define QLC_TCP_TS_HDR_SIZE (QLC_TCP_HDR_SIZE + QLC_TCP_TS_OPTION_SIZE)
  1129. static struct qlcnic_rx_buffer *
  1130. qlcnic_process_lro(struct qlcnic_adapter *adapter,
  1131. struct qlcnic_host_sds_ring *sds_ring,
  1132. int ring, u64 sts_data0, u64 sts_data1)
  1133. {
  1134. struct net_device *netdev = adapter->netdev;
  1135. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1136. struct qlcnic_rx_buffer *buffer;
  1137. struct sk_buff *skb;
  1138. struct qlcnic_host_rds_ring *rds_ring;
  1139. struct iphdr *iph;
  1140. struct tcphdr *th;
  1141. bool push, timestamp;
  1142. int l2_hdr_offset, l4_hdr_offset;
  1143. int index;
  1144. u16 lro_length, length, data_offset;
  1145. u32 seq_number;
  1146. if (unlikely(ring > adapter->max_rds_rings))
  1147. return NULL;
  1148. rds_ring = &recv_ctx->rds_rings[ring];
  1149. index = qlcnic_get_lro_sts_refhandle(sts_data0);
  1150. if (unlikely(index > rds_ring->num_desc))
  1151. return NULL;
  1152. buffer = &rds_ring->rx_buf_arr[index];
  1153. timestamp = qlcnic_get_lro_sts_timestamp(sts_data0);
  1154. lro_length = qlcnic_get_lro_sts_length(sts_data0);
  1155. l2_hdr_offset = qlcnic_get_lro_sts_l2_hdr_offset(sts_data0);
  1156. l4_hdr_offset = qlcnic_get_lro_sts_l4_hdr_offset(sts_data0);
  1157. push = qlcnic_get_lro_sts_push_flag(sts_data0);
  1158. seq_number = qlcnic_get_lro_sts_seq_number(sts_data1);
  1159. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
  1160. if (!skb)
  1161. return buffer;
  1162. if (timestamp)
  1163. data_offset = l4_hdr_offset + QLC_TCP_TS_HDR_SIZE;
  1164. else
  1165. data_offset = l4_hdr_offset + QLC_TCP_HDR_SIZE;
  1166. skb_put(skb, lro_length + data_offset);
  1167. skb->truesize = skb->len + sizeof(struct sk_buff) + skb_headroom(skb);
  1168. skb_pull(skb, l2_hdr_offset);
  1169. if (unlikely(adapter->pvid)) {
  1170. if (qlcnic_check_rx_tagging(adapter, skb)) {
  1171. adapter->stats.rxdropped++;
  1172. dev_kfree_skb_any(skb);
  1173. return buffer;
  1174. }
  1175. }
  1176. skb->protocol = eth_type_trans(skb, netdev);
  1177. iph = (struct iphdr *)skb->data;
  1178. th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
  1179. length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
  1180. iph->tot_len = htons(length);
  1181. iph->check = 0;
  1182. iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
  1183. th->psh = push;
  1184. th->seq = htonl(seq_number);
  1185. length = skb->len;
  1186. netif_receive_skb(skb);
  1187. adapter->stats.lro_pkts++;
  1188. adapter->stats.lrobytes += length;
  1189. return buffer;
  1190. }
  1191. int
  1192. qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max)
  1193. {
  1194. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1195. struct list_head *cur;
  1196. struct status_desc *desc;
  1197. struct qlcnic_rx_buffer *rxbuf;
  1198. u64 sts_data0, sts_data1;
  1199. int count = 0;
  1200. int opcode, ring, desc_cnt;
  1201. u32 consumer = sds_ring->consumer;
  1202. while (count < max) {
  1203. desc = &sds_ring->desc_head[consumer];
  1204. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1205. if (!(sts_data0 & STATUS_OWNER_HOST))
  1206. break;
  1207. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1208. opcode = qlcnic_get_sts_opcode(sts_data0);
  1209. switch (opcode) {
  1210. case QLCNIC_RXPKT_DESC:
  1211. case QLCNIC_OLD_RXPKT_DESC:
  1212. case QLCNIC_SYN_OFFLOAD:
  1213. ring = qlcnic_get_sts_type(sts_data0);
  1214. rxbuf = qlcnic_process_rcv(adapter, sds_ring,
  1215. ring, sts_data0);
  1216. break;
  1217. case QLCNIC_LRO_DESC:
  1218. ring = qlcnic_get_lro_sts_type(sts_data0);
  1219. sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
  1220. rxbuf = qlcnic_process_lro(adapter, sds_ring,
  1221. ring, sts_data0, sts_data1);
  1222. break;
  1223. case QLCNIC_RESPONSE_DESC:
  1224. qlcnic_handle_fw_message(desc_cnt, consumer, sds_ring);
  1225. default:
  1226. goto skip;
  1227. }
  1228. WARN_ON(desc_cnt > 1);
  1229. if (likely(rxbuf))
  1230. list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
  1231. else
  1232. adapter->stats.null_rxbuf++;
  1233. skip:
  1234. for (; desc_cnt > 0; desc_cnt--) {
  1235. desc = &sds_ring->desc_head[consumer];
  1236. desc->status_desc_data[0] =
  1237. cpu_to_le64(STATUS_OWNER_PHANTOM);
  1238. consumer = get_next_index(consumer, sds_ring->num_desc);
  1239. }
  1240. count++;
  1241. }
  1242. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  1243. struct qlcnic_host_rds_ring *rds_ring =
  1244. &adapter->recv_ctx.rds_rings[ring];
  1245. if (!list_empty(&sds_ring->free_list[ring])) {
  1246. list_for_each(cur, &sds_ring->free_list[ring]) {
  1247. rxbuf = list_entry(cur,
  1248. struct qlcnic_rx_buffer, list);
  1249. qlcnic_alloc_rx_skb(adapter, rds_ring, rxbuf);
  1250. }
  1251. spin_lock(&rds_ring->lock);
  1252. list_splice_tail_init(&sds_ring->free_list[ring],
  1253. &rds_ring->free_list);
  1254. spin_unlock(&rds_ring->lock);
  1255. }
  1256. qlcnic_post_rx_buffers_nodb(adapter, rds_ring);
  1257. }
  1258. if (count) {
  1259. sds_ring->consumer = consumer;
  1260. writel(consumer, sds_ring->crb_sts_consumer);
  1261. }
  1262. return count;
  1263. }
  1264. void
  1265. qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter, u32 ringid,
  1266. struct qlcnic_host_rds_ring *rds_ring)
  1267. {
  1268. struct rcv_desc *pdesc;
  1269. struct qlcnic_rx_buffer *buffer;
  1270. int producer, count = 0;
  1271. struct list_head *head;
  1272. producer = rds_ring->producer;
  1273. head = &rds_ring->free_list;
  1274. while (!list_empty(head)) {
  1275. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1276. if (!buffer->skb) {
  1277. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1278. break;
  1279. }
  1280. count++;
  1281. list_del(&buffer->list);
  1282. /* make a rcv descriptor */
  1283. pdesc = &rds_ring->desc_head[producer];
  1284. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1285. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1286. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1287. producer = get_next_index(producer, rds_ring->num_desc);
  1288. }
  1289. if (count) {
  1290. rds_ring->producer = producer;
  1291. writel((producer-1) & (rds_ring->num_desc-1),
  1292. rds_ring->crb_rcv_producer);
  1293. }
  1294. }
  1295. static void
  1296. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  1297. struct qlcnic_host_rds_ring *rds_ring)
  1298. {
  1299. struct rcv_desc *pdesc;
  1300. struct qlcnic_rx_buffer *buffer;
  1301. int producer, count = 0;
  1302. struct list_head *head;
  1303. if (!spin_trylock(&rds_ring->lock))
  1304. return;
  1305. producer = rds_ring->producer;
  1306. head = &rds_ring->free_list;
  1307. while (!list_empty(head)) {
  1308. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1309. if (!buffer->skb) {
  1310. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1311. break;
  1312. }
  1313. count++;
  1314. list_del(&buffer->list);
  1315. /* make a rcv descriptor */
  1316. pdesc = &rds_ring->desc_head[producer];
  1317. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1318. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1319. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1320. producer = get_next_index(producer, rds_ring->num_desc);
  1321. }
  1322. if (count) {
  1323. rds_ring->producer = producer;
  1324. writel((producer - 1) & (rds_ring->num_desc - 1),
  1325. rds_ring->crb_rcv_producer);
  1326. }
  1327. spin_unlock(&rds_ring->lock);
  1328. }
  1329. static struct qlcnic_rx_buffer *
  1330. qlcnic_process_rcv_diag(struct qlcnic_adapter *adapter,
  1331. struct qlcnic_host_sds_ring *sds_ring,
  1332. int ring, u64 sts_data0)
  1333. {
  1334. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1335. struct qlcnic_rx_buffer *buffer;
  1336. struct sk_buff *skb;
  1337. struct qlcnic_host_rds_ring *rds_ring;
  1338. int index, length, cksum, pkt_offset;
  1339. if (unlikely(ring >= adapter->max_rds_rings))
  1340. return NULL;
  1341. rds_ring = &recv_ctx->rds_rings[ring];
  1342. index = qlcnic_get_sts_refhandle(sts_data0);
  1343. if (unlikely(index >= rds_ring->num_desc))
  1344. return NULL;
  1345. buffer = &rds_ring->rx_buf_arr[index];
  1346. length = qlcnic_get_sts_totallength(sts_data0);
  1347. cksum = qlcnic_get_sts_status(sts_data0);
  1348. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1349. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1350. if (!skb)
  1351. return buffer;
  1352. skb_put(skb, rds_ring->skb_size);
  1353. if (pkt_offset)
  1354. skb_pull(skb, pkt_offset);
  1355. skb->truesize = skb->len + sizeof(struct sk_buff);
  1356. if (!qlcnic_check_loopback_buff(skb->data))
  1357. adapter->diag_cnt++;
  1358. dev_kfree_skb_any(skb);
  1359. adapter->stats.rx_pkts++;
  1360. adapter->stats.rxbytes += length;
  1361. return buffer;
  1362. }
  1363. void
  1364. qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
  1365. {
  1366. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1367. struct status_desc *desc;
  1368. struct qlcnic_rx_buffer *rxbuf;
  1369. u64 sts_data0;
  1370. int opcode, ring, desc_cnt;
  1371. u32 consumer = sds_ring->consumer;
  1372. desc = &sds_ring->desc_head[consumer];
  1373. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1374. if (!(sts_data0 & STATUS_OWNER_HOST))
  1375. return;
  1376. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1377. opcode = qlcnic_get_sts_opcode(sts_data0);
  1378. ring = qlcnic_get_sts_type(sts_data0);
  1379. rxbuf = qlcnic_process_rcv_diag(adapter, sds_ring,
  1380. ring, sts_data0);
  1381. desc->status_desc_data[0] = cpu_to_le64(STATUS_OWNER_PHANTOM);
  1382. consumer = get_next_index(consumer, sds_ring->num_desc);
  1383. sds_ring->consumer = consumer;
  1384. writel(consumer, sds_ring->crb_sts_consumer);
  1385. }
  1386. void
  1387. qlcnic_fetch_mac(struct qlcnic_adapter *adapter, u32 off1, u32 off2,
  1388. u8 alt_mac, u8 *mac)
  1389. {
  1390. u32 mac_low, mac_high;
  1391. int i;
  1392. mac_low = QLCRD32(adapter, off1);
  1393. mac_high = QLCRD32(adapter, off2);
  1394. if (alt_mac) {
  1395. mac_low |= (mac_low >> 16) | (mac_high << 16);
  1396. mac_high >>= 16;
  1397. }
  1398. for (i = 0; i < 2; i++)
  1399. mac[i] = (u8)(mac_high >> ((1 - i) * 8));
  1400. for (i = 2; i < 6; i++)
  1401. mac[i] = (u8)(mac_low >> ((5 - i) * 8));
  1402. }