mthca_provider.c 18 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. * $Id: mthca_provider.c 1397 2004-12-28 05:09:00Z roland $
  33. */
  34. #include <ib_smi.h>
  35. #include "mthca_dev.h"
  36. #include "mthca_cmd.h"
  37. static int mthca_query_device(struct ib_device *ibdev,
  38. struct ib_device_attr *props)
  39. {
  40. struct ib_smp *in_mad = NULL;
  41. struct ib_smp *out_mad = NULL;
  42. int err = -ENOMEM;
  43. struct mthca_dev* mdev = to_mdev(ibdev);
  44. u8 status;
  45. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  46. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  47. if (!in_mad || !out_mad)
  48. goto out;
  49. memset(props, 0, sizeof props);
  50. props->fw_ver = mdev->fw_ver;
  51. memset(in_mad, 0, sizeof *in_mad);
  52. in_mad->base_version = 1;
  53. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  54. in_mad->class_version = 1;
  55. in_mad->method = IB_MGMT_METHOD_GET;
  56. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  57. err = mthca_MAD_IFC(mdev, 1, 1,
  58. 1, NULL, NULL, in_mad, out_mad,
  59. &status);
  60. if (err)
  61. goto out;
  62. if (status) {
  63. err = -EINVAL;
  64. goto out;
  65. }
  66. props->device_cap_flags = mdev->device_cap_flags;
  67. props->vendor_id = be32_to_cpup((u32 *) (out_mad->data + 36)) &
  68. 0xffffff;
  69. props->vendor_part_id = be16_to_cpup((u16 *) (out_mad->data + 30));
  70. props->hw_ver = be16_to_cpup((u16 *) (out_mad->data + 32));
  71. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  72. memcpy(&props->node_guid, out_mad->data + 12, 8);
  73. props->max_mr_size = ~0ull;
  74. props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
  75. props->max_qp_wr = 0xffff;
  76. props->max_sge = mdev->limits.max_sg;
  77. props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
  78. props->max_cqe = 0xffff;
  79. props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
  80. props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
  81. props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
  82. props->max_qp_init_rd_atom = 1 << mdev->qp_table.rdb_shift;
  83. props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
  84. err = 0;
  85. out:
  86. kfree(in_mad);
  87. kfree(out_mad);
  88. return err;
  89. }
  90. static int mthca_query_port(struct ib_device *ibdev,
  91. u8 port, struct ib_port_attr *props)
  92. {
  93. struct ib_smp *in_mad = NULL;
  94. struct ib_smp *out_mad = NULL;
  95. int err = -ENOMEM;
  96. u8 status;
  97. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  98. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  99. if (!in_mad || !out_mad)
  100. goto out;
  101. memset(in_mad, 0, sizeof *in_mad);
  102. in_mad->base_version = 1;
  103. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  104. in_mad->class_version = 1;
  105. in_mad->method = IB_MGMT_METHOD_GET;
  106. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  107. in_mad->attr_mod = cpu_to_be32(port);
  108. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  109. port, NULL, NULL, in_mad, out_mad,
  110. &status);
  111. if (err)
  112. goto out;
  113. if (status) {
  114. err = -EINVAL;
  115. goto out;
  116. }
  117. props->lid = be16_to_cpup((u16 *) (out_mad->data + 16));
  118. props->lmc = out_mad->data[34] & 0x7;
  119. props->sm_lid = be16_to_cpup((u16 *) (out_mad->data + 18));
  120. props->sm_sl = out_mad->data[36] & 0xf;
  121. props->state = out_mad->data[32] & 0xf;
  122. props->phys_state = out_mad->data[33] >> 4;
  123. props->port_cap_flags = be32_to_cpup((u32 *) (out_mad->data + 20));
  124. props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
  125. props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
  126. props->qkey_viol_cntr = be16_to_cpup((u16 *) (out_mad->data + 48));
  127. props->active_width = out_mad->data[31] & 0xf;
  128. props->active_speed = out_mad->data[35] >> 4;
  129. out:
  130. kfree(in_mad);
  131. kfree(out_mad);
  132. return err;
  133. }
  134. static int mthca_modify_port(struct ib_device *ibdev,
  135. u8 port, int port_modify_mask,
  136. struct ib_port_modify *props)
  137. {
  138. struct mthca_set_ib_param set_ib;
  139. struct ib_port_attr attr;
  140. int err;
  141. u8 status;
  142. if (down_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  143. return -ERESTARTSYS;
  144. err = mthca_query_port(ibdev, port, &attr);
  145. if (err)
  146. goto out;
  147. set_ib.set_si_guid = 0;
  148. set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
  149. set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  150. ~props->clr_port_cap_mask;
  151. err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
  152. if (err)
  153. goto out;
  154. if (status) {
  155. err = -EINVAL;
  156. goto out;
  157. }
  158. out:
  159. up(&to_mdev(ibdev)->cap_mask_mutex);
  160. return err;
  161. }
  162. static int mthca_query_pkey(struct ib_device *ibdev,
  163. u8 port, u16 index, u16 *pkey)
  164. {
  165. struct ib_smp *in_mad = NULL;
  166. struct ib_smp *out_mad = NULL;
  167. int err = -ENOMEM;
  168. u8 status;
  169. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  170. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  171. if (!in_mad || !out_mad)
  172. goto out;
  173. memset(in_mad, 0, sizeof *in_mad);
  174. in_mad->base_version = 1;
  175. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  176. in_mad->class_version = 1;
  177. in_mad->method = IB_MGMT_METHOD_GET;
  178. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  179. in_mad->attr_mod = cpu_to_be32(index / 32);
  180. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  181. port, NULL, NULL, in_mad, out_mad,
  182. &status);
  183. if (err)
  184. goto out;
  185. if (status) {
  186. err = -EINVAL;
  187. goto out;
  188. }
  189. *pkey = be16_to_cpu(((u16 *) out_mad->data)[index % 32]);
  190. out:
  191. kfree(in_mad);
  192. kfree(out_mad);
  193. return err;
  194. }
  195. static int mthca_query_gid(struct ib_device *ibdev, u8 port,
  196. int index, union ib_gid *gid)
  197. {
  198. struct ib_smp *in_mad = NULL;
  199. struct ib_smp *out_mad = NULL;
  200. int err = -ENOMEM;
  201. u8 status;
  202. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  203. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  204. if (!in_mad || !out_mad)
  205. goto out;
  206. memset(in_mad, 0, sizeof *in_mad);
  207. in_mad->base_version = 1;
  208. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  209. in_mad->class_version = 1;
  210. in_mad->method = IB_MGMT_METHOD_GET;
  211. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  212. in_mad->attr_mod = cpu_to_be32(port);
  213. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  214. port, NULL, NULL, in_mad, out_mad,
  215. &status);
  216. if (err)
  217. goto out;
  218. if (status) {
  219. err = -EINVAL;
  220. goto out;
  221. }
  222. memcpy(gid->raw, out_mad->data + 8, 8);
  223. memset(in_mad, 0, sizeof *in_mad);
  224. in_mad->base_version = 1;
  225. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  226. in_mad->class_version = 1;
  227. in_mad->method = IB_MGMT_METHOD_GET;
  228. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  229. in_mad->attr_mod = cpu_to_be32(index / 8);
  230. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  231. port, NULL, NULL, in_mad, out_mad,
  232. &status);
  233. if (err)
  234. goto out;
  235. if (status) {
  236. err = -EINVAL;
  237. goto out;
  238. }
  239. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8);
  240. out:
  241. kfree(in_mad);
  242. kfree(out_mad);
  243. return err;
  244. }
  245. static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev)
  246. {
  247. struct mthca_pd *pd;
  248. int err;
  249. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  250. if (!pd)
  251. return ERR_PTR(-ENOMEM);
  252. err = mthca_pd_alloc(to_mdev(ibdev), pd);
  253. if (err) {
  254. kfree(pd);
  255. return ERR_PTR(err);
  256. }
  257. return &pd->ibpd;
  258. }
  259. static int mthca_dealloc_pd(struct ib_pd *pd)
  260. {
  261. mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
  262. kfree(pd);
  263. return 0;
  264. }
  265. static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
  266. struct ib_ah_attr *ah_attr)
  267. {
  268. int err;
  269. struct mthca_ah *ah;
  270. ah = kmalloc(sizeof *ah, GFP_KERNEL);
  271. if (!ah)
  272. return ERR_PTR(-ENOMEM);
  273. err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
  274. if (err) {
  275. kfree(ah);
  276. return ERR_PTR(err);
  277. }
  278. return &ah->ibah;
  279. }
  280. static int mthca_ah_destroy(struct ib_ah *ah)
  281. {
  282. mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
  283. kfree(ah);
  284. return 0;
  285. }
  286. static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
  287. struct ib_qp_init_attr *init_attr)
  288. {
  289. struct mthca_qp *qp;
  290. int err;
  291. switch (init_attr->qp_type) {
  292. case IB_QPT_RC:
  293. case IB_QPT_UC:
  294. case IB_QPT_UD:
  295. {
  296. qp = kmalloc(sizeof *qp, GFP_KERNEL);
  297. if (!qp)
  298. return ERR_PTR(-ENOMEM);
  299. qp->sq.max = init_attr->cap.max_send_wr;
  300. qp->rq.max = init_attr->cap.max_recv_wr;
  301. qp->sq.max_gs = init_attr->cap.max_send_sge;
  302. qp->rq.max_gs = init_attr->cap.max_recv_sge;
  303. err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
  304. to_mcq(init_attr->send_cq),
  305. to_mcq(init_attr->recv_cq),
  306. init_attr->qp_type, init_attr->sq_sig_type,
  307. qp);
  308. qp->ibqp.qp_num = qp->qpn;
  309. break;
  310. }
  311. case IB_QPT_SMI:
  312. case IB_QPT_GSI:
  313. {
  314. qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
  315. if (!qp)
  316. return ERR_PTR(-ENOMEM);
  317. qp->sq.max = init_attr->cap.max_send_wr;
  318. qp->rq.max = init_attr->cap.max_recv_wr;
  319. qp->sq.max_gs = init_attr->cap.max_send_sge;
  320. qp->rq.max_gs = init_attr->cap.max_recv_sge;
  321. qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
  322. err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
  323. to_mcq(init_attr->send_cq),
  324. to_mcq(init_attr->recv_cq),
  325. init_attr->sq_sig_type,
  326. qp->ibqp.qp_num, init_attr->port_num,
  327. to_msqp(qp));
  328. break;
  329. }
  330. default:
  331. /* Don't support raw QPs */
  332. return ERR_PTR(-ENOSYS);
  333. }
  334. if (err) {
  335. kfree(qp);
  336. return ERR_PTR(err);
  337. }
  338. init_attr->cap.max_inline_data = 0;
  339. return &qp->ibqp;
  340. }
  341. static int mthca_destroy_qp(struct ib_qp *qp)
  342. {
  343. mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
  344. kfree(qp);
  345. return 0;
  346. }
  347. static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries)
  348. {
  349. struct mthca_cq *cq;
  350. int nent;
  351. int err;
  352. cq = kmalloc(sizeof *cq, GFP_KERNEL);
  353. if (!cq)
  354. return ERR_PTR(-ENOMEM);
  355. for (nent = 1; nent <= entries; nent <<= 1)
  356. ; /* nothing */
  357. err = mthca_init_cq(to_mdev(ibdev), nent, cq);
  358. if (err) {
  359. kfree(cq);
  360. cq = ERR_PTR(err);
  361. }
  362. return &cq->ibcq;
  363. }
  364. static int mthca_destroy_cq(struct ib_cq *cq)
  365. {
  366. mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
  367. kfree(cq);
  368. return 0;
  369. }
  370. static inline u32 convert_access(int acc)
  371. {
  372. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
  373. (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
  374. (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
  375. (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
  376. MTHCA_MPT_FLAG_LOCAL_READ;
  377. }
  378. static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
  379. {
  380. struct mthca_mr *mr;
  381. int err;
  382. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  383. if (!mr)
  384. return ERR_PTR(-ENOMEM);
  385. err = mthca_mr_alloc_notrans(to_mdev(pd->device),
  386. to_mpd(pd)->pd_num,
  387. convert_access(acc), mr);
  388. if (err) {
  389. kfree(mr);
  390. return ERR_PTR(err);
  391. }
  392. return &mr->ibmr;
  393. }
  394. static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
  395. struct ib_phys_buf *buffer_list,
  396. int num_phys_buf,
  397. int acc,
  398. u64 *iova_start)
  399. {
  400. struct mthca_mr *mr;
  401. u64 *page_list;
  402. u64 total_size;
  403. u64 mask;
  404. int shift;
  405. int npages;
  406. int err;
  407. int i, j, n;
  408. /* First check that we have enough alignment */
  409. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
  410. return ERR_PTR(-EINVAL);
  411. if (num_phys_buf > 1 &&
  412. ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK))
  413. return ERR_PTR(-EINVAL);
  414. mask = 0;
  415. total_size = 0;
  416. for (i = 0; i < num_phys_buf; ++i) {
  417. if (buffer_list[i].addr & ~PAGE_MASK)
  418. return ERR_PTR(-EINVAL);
  419. if (i != 0 && i != num_phys_buf - 1 &&
  420. (buffer_list[i].size & ~PAGE_MASK))
  421. return ERR_PTR(-EINVAL);
  422. total_size += buffer_list[i].size;
  423. if (i > 0)
  424. mask |= buffer_list[i].addr;
  425. }
  426. /* Find largest page shift we can use to cover buffers */
  427. for (shift = PAGE_SHIFT; shift < 31; ++shift)
  428. if (num_phys_buf > 1) {
  429. if ((1ULL << shift) & mask)
  430. break;
  431. } else {
  432. if (1ULL << shift >=
  433. buffer_list[0].size +
  434. (buffer_list[0].addr & ((1ULL << shift) - 1)))
  435. break;
  436. }
  437. buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
  438. buffer_list[0].addr &= ~0ull << shift;
  439. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  440. if (!mr)
  441. return ERR_PTR(-ENOMEM);
  442. npages = 0;
  443. for (i = 0; i < num_phys_buf; ++i)
  444. npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  445. if (!npages)
  446. return &mr->ibmr;
  447. page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
  448. if (!page_list) {
  449. kfree(mr);
  450. return ERR_PTR(-ENOMEM);
  451. }
  452. n = 0;
  453. for (i = 0; i < num_phys_buf; ++i)
  454. for (j = 0;
  455. j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  456. ++j)
  457. page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
  458. mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
  459. "in PD %x; shift %d, npages %d.\n",
  460. (unsigned long long) buffer_list[0].addr,
  461. (unsigned long long) *iova_start,
  462. to_mpd(pd)->pd_num,
  463. shift, npages);
  464. err = mthca_mr_alloc_phys(to_mdev(pd->device),
  465. to_mpd(pd)->pd_num,
  466. page_list, shift, npages,
  467. *iova_start, total_size,
  468. convert_access(acc), mr);
  469. if (err) {
  470. kfree(mr);
  471. return ERR_PTR(err);
  472. }
  473. kfree(page_list);
  474. return &mr->ibmr;
  475. }
  476. static int mthca_dereg_mr(struct ib_mr *mr)
  477. {
  478. mthca_free_mr(to_mdev(mr->device), to_mmr(mr));
  479. kfree(mr);
  480. return 0;
  481. }
  482. static ssize_t show_rev(struct class_device *cdev, char *buf)
  483. {
  484. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  485. return sprintf(buf, "%x\n", dev->rev_id);
  486. }
  487. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  488. {
  489. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  490. return sprintf(buf, "%x.%x.%x\n", (int) (dev->fw_ver >> 32),
  491. (int) (dev->fw_ver >> 16) & 0xffff,
  492. (int) dev->fw_ver & 0xffff);
  493. }
  494. static ssize_t show_hca(struct class_device *cdev, char *buf)
  495. {
  496. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  497. switch (dev->hca_type) {
  498. case TAVOR: return sprintf(buf, "MT23108\n");
  499. case ARBEL_COMPAT: return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
  500. case ARBEL_NATIVE: return sprintf(buf, "MT25208\n");
  501. default: return sprintf(buf, "unknown\n");
  502. }
  503. }
  504. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  505. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  506. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  507. static struct class_device_attribute *mthca_class_attributes[] = {
  508. &class_device_attr_hw_rev,
  509. &class_device_attr_fw_ver,
  510. &class_device_attr_hca_type
  511. };
  512. int mthca_register_device(struct mthca_dev *dev)
  513. {
  514. int ret;
  515. int i;
  516. strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
  517. dev->ib_dev.node_type = IB_NODE_CA;
  518. dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
  519. dev->ib_dev.dma_device = &dev->pdev->dev;
  520. dev->ib_dev.class_dev.dev = &dev->pdev->dev;
  521. dev->ib_dev.query_device = mthca_query_device;
  522. dev->ib_dev.query_port = mthca_query_port;
  523. dev->ib_dev.modify_port = mthca_modify_port;
  524. dev->ib_dev.query_pkey = mthca_query_pkey;
  525. dev->ib_dev.query_gid = mthca_query_gid;
  526. dev->ib_dev.alloc_pd = mthca_alloc_pd;
  527. dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
  528. dev->ib_dev.create_ah = mthca_ah_create;
  529. dev->ib_dev.destroy_ah = mthca_ah_destroy;
  530. dev->ib_dev.create_qp = mthca_create_qp;
  531. dev->ib_dev.modify_qp = mthca_modify_qp;
  532. dev->ib_dev.destroy_qp = mthca_destroy_qp;
  533. dev->ib_dev.create_cq = mthca_create_cq;
  534. dev->ib_dev.destroy_cq = mthca_destroy_cq;
  535. dev->ib_dev.poll_cq = mthca_poll_cq;
  536. dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
  537. dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
  538. dev->ib_dev.dereg_mr = mthca_dereg_mr;
  539. dev->ib_dev.attach_mcast = mthca_multicast_attach;
  540. dev->ib_dev.detach_mcast = mthca_multicast_detach;
  541. dev->ib_dev.process_mad = mthca_process_mad;
  542. if (dev->hca_type == ARBEL_NATIVE) {
  543. dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
  544. dev->ib_dev.post_send = mthca_arbel_post_send;
  545. dev->ib_dev.post_recv = mthca_arbel_post_receive;
  546. } else {
  547. dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
  548. dev->ib_dev.post_send = mthca_tavor_post_send;
  549. dev->ib_dev.post_recv = mthca_tavor_post_receive;
  550. }
  551. init_MUTEX(&dev->cap_mask_mutex);
  552. ret = ib_register_device(&dev->ib_dev);
  553. if (ret)
  554. return ret;
  555. for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
  556. ret = class_device_create_file(&dev->ib_dev.class_dev,
  557. mthca_class_attributes[i]);
  558. if (ret) {
  559. ib_unregister_device(&dev->ib_dev);
  560. return ret;
  561. }
  562. }
  563. return 0;
  564. }
  565. void mthca_unregister_device(struct mthca_dev *dev)
  566. {
  567. ib_unregister_device(&dev->ib_dev);
  568. }