imx-pcm-fiq.c 9.1 KB

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  1. /*
  2. * imx-pcm-fiq.c -- ALSA Soc Audio Layer
  3. *
  4. * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
  5. *
  6. * This code is based on code copyrighted by Freescale,
  7. * Liam Girdwood, Javier Martin and probably others.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/delay.h>
  16. #include <linux/device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/init.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/module.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/slab.h>
  23. #include <sound/core.h>
  24. #include <sound/dmaengine_pcm.h>
  25. #include <sound/initval.h>
  26. #include <sound/pcm.h>
  27. #include <sound/pcm_params.h>
  28. #include <sound/soc.h>
  29. #include <asm/fiq.h>
  30. #include <linux/platform_data/asoc-imx-ssi.h>
  31. #include "imx-ssi.h"
  32. #include "imx-pcm.h"
  33. struct imx_pcm_runtime_data {
  34. unsigned int period;
  35. int periods;
  36. unsigned long offset;
  37. struct hrtimer hrt;
  38. int poll_time_ns;
  39. struct snd_pcm_substream *substream;
  40. atomic_t running;
  41. };
  42. static enum hrtimer_restart snd_hrtimer_callback(struct hrtimer *hrt)
  43. {
  44. struct imx_pcm_runtime_data *iprtd =
  45. container_of(hrt, struct imx_pcm_runtime_data, hrt);
  46. struct snd_pcm_substream *substream = iprtd->substream;
  47. struct pt_regs regs;
  48. if (!atomic_read(&iprtd->running))
  49. return HRTIMER_NORESTART;
  50. get_fiq_regs(&regs);
  51. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  52. iprtd->offset = regs.ARM_r8 & 0xffff;
  53. else
  54. iprtd->offset = regs.ARM_r9 & 0xffff;
  55. snd_pcm_period_elapsed(substream);
  56. hrtimer_forward_now(hrt, ns_to_ktime(iprtd->poll_time_ns));
  57. return HRTIMER_RESTART;
  58. }
  59. static struct fiq_handler fh = {
  60. .name = DRV_NAME,
  61. };
  62. static int snd_imx_pcm_hw_params(struct snd_pcm_substream *substream,
  63. struct snd_pcm_hw_params *params)
  64. {
  65. struct snd_pcm_runtime *runtime = substream->runtime;
  66. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  67. iprtd->periods = params_periods(params);
  68. iprtd->period = params_period_bytes(params);
  69. iprtd->offset = 0;
  70. iprtd->poll_time_ns = 1000000000 / params_rate(params) *
  71. params_period_size(params);
  72. snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
  73. return 0;
  74. }
  75. static int snd_imx_pcm_prepare(struct snd_pcm_substream *substream)
  76. {
  77. struct snd_pcm_runtime *runtime = substream->runtime;
  78. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  79. struct pt_regs regs;
  80. get_fiq_regs(&regs);
  81. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  82. regs.ARM_r8 = (iprtd->period * iprtd->periods - 1) << 16;
  83. else
  84. regs.ARM_r9 = (iprtd->period * iprtd->periods - 1) << 16;
  85. set_fiq_regs(&regs);
  86. return 0;
  87. }
  88. static int fiq_enable;
  89. static int imx_pcm_fiq;
  90. static int snd_imx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  91. {
  92. struct snd_pcm_runtime *runtime = substream->runtime;
  93. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  94. switch (cmd) {
  95. case SNDRV_PCM_TRIGGER_START:
  96. case SNDRV_PCM_TRIGGER_RESUME:
  97. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  98. atomic_set(&iprtd->running, 1);
  99. hrtimer_start(&iprtd->hrt, ns_to_ktime(iprtd->poll_time_ns),
  100. HRTIMER_MODE_REL);
  101. if (++fiq_enable == 1)
  102. enable_fiq(imx_pcm_fiq);
  103. break;
  104. case SNDRV_PCM_TRIGGER_STOP:
  105. case SNDRV_PCM_TRIGGER_SUSPEND:
  106. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  107. atomic_set(&iprtd->running, 0);
  108. if (--fiq_enable == 0)
  109. disable_fiq(imx_pcm_fiq);
  110. break;
  111. default:
  112. return -EINVAL;
  113. }
  114. return 0;
  115. }
  116. static snd_pcm_uframes_t snd_imx_pcm_pointer(struct snd_pcm_substream *substream)
  117. {
  118. struct snd_pcm_runtime *runtime = substream->runtime;
  119. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  120. return bytes_to_frames(substream->runtime, iprtd->offset);
  121. }
  122. static struct snd_pcm_hardware snd_imx_hardware = {
  123. .info = SNDRV_PCM_INFO_INTERLEAVED |
  124. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  125. SNDRV_PCM_INFO_MMAP |
  126. SNDRV_PCM_INFO_MMAP_VALID |
  127. SNDRV_PCM_INFO_PAUSE |
  128. SNDRV_PCM_INFO_RESUME,
  129. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  130. .rate_min = 8000,
  131. .channels_min = 2,
  132. .channels_max = 2,
  133. .buffer_bytes_max = IMX_SSI_DMABUF_SIZE,
  134. .period_bytes_min = 128,
  135. .period_bytes_max = 16 * 1024,
  136. .periods_min = 4,
  137. .periods_max = 255,
  138. .fifo_size = 0,
  139. };
  140. static int snd_imx_open(struct snd_pcm_substream *substream)
  141. {
  142. struct snd_pcm_runtime *runtime = substream->runtime;
  143. struct imx_pcm_runtime_data *iprtd;
  144. int ret;
  145. iprtd = kzalloc(sizeof(*iprtd), GFP_KERNEL);
  146. if (iprtd == NULL)
  147. return -ENOMEM;
  148. runtime->private_data = iprtd;
  149. iprtd->substream = substream;
  150. atomic_set(&iprtd->running, 0);
  151. hrtimer_init(&iprtd->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  152. iprtd->hrt.function = snd_hrtimer_callback;
  153. ret = snd_pcm_hw_constraint_integer(substream->runtime,
  154. SNDRV_PCM_HW_PARAM_PERIODS);
  155. if (ret < 0) {
  156. kfree(iprtd);
  157. return ret;
  158. }
  159. snd_soc_set_runtime_hwparams(substream, &snd_imx_hardware);
  160. return 0;
  161. }
  162. static int snd_imx_close(struct snd_pcm_substream *substream)
  163. {
  164. struct snd_pcm_runtime *runtime = substream->runtime;
  165. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  166. hrtimer_cancel(&iprtd->hrt);
  167. kfree(iprtd);
  168. return 0;
  169. }
  170. static int snd_imx_pcm_mmap(struct snd_pcm_substream *substream,
  171. struct vm_area_struct *vma)
  172. {
  173. struct snd_pcm_runtime *runtime = substream->runtime;
  174. int ret;
  175. ret = dma_mmap_writecombine(substream->pcm->card->dev, vma,
  176. runtime->dma_area, runtime->dma_addr, runtime->dma_bytes);
  177. pr_debug("%s: ret: %d %p 0x%08x 0x%08x\n", __func__, ret,
  178. runtime->dma_area,
  179. runtime->dma_addr,
  180. runtime->dma_bytes);
  181. return ret;
  182. }
  183. static struct snd_pcm_ops imx_pcm_ops = {
  184. .open = snd_imx_open,
  185. .close = snd_imx_close,
  186. .ioctl = snd_pcm_lib_ioctl,
  187. .hw_params = snd_imx_pcm_hw_params,
  188. .prepare = snd_imx_pcm_prepare,
  189. .trigger = snd_imx_pcm_trigger,
  190. .pointer = snd_imx_pcm_pointer,
  191. .mmap = snd_imx_pcm_mmap,
  192. };
  193. static int imx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
  194. {
  195. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  196. struct snd_dma_buffer *buf = &substream->dma_buffer;
  197. size_t size = IMX_SSI_DMABUF_SIZE;
  198. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  199. buf->dev.dev = pcm->card->dev;
  200. buf->private_data = NULL;
  201. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  202. &buf->addr, GFP_KERNEL);
  203. if (!buf->area)
  204. return -ENOMEM;
  205. buf->bytes = size;
  206. return 0;
  207. }
  208. static int imx_pcm_new(struct snd_soc_pcm_runtime *rtd)
  209. {
  210. struct snd_card *card = rtd->card->snd_card;
  211. struct snd_pcm *pcm = rtd->pcm;
  212. int ret;
  213. ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
  214. if (ret)
  215. return ret;
  216. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  217. ret = imx_pcm_preallocate_dma_buffer(pcm,
  218. SNDRV_PCM_STREAM_PLAYBACK);
  219. if (ret)
  220. goto out;
  221. }
  222. if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
  223. ret = imx_pcm_preallocate_dma_buffer(pcm,
  224. SNDRV_PCM_STREAM_CAPTURE);
  225. if (ret)
  226. goto out;
  227. }
  228. out:
  229. return ret;
  230. }
  231. static int ssi_irq = 0;
  232. static int imx_pcm_fiq_new(struct snd_soc_pcm_runtime *rtd)
  233. {
  234. struct snd_pcm *pcm = rtd->pcm;
  235. struct snd_pcm_substream *substream;
  236. int ret;
  237. ret = imx_pcm_new(rtd);
  238. if (ret)
  239. return ret;
  240. substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  241. if (substream) {
  242. struct snd_dma_buffer *buf = &substream->dma_buffer;
  243. imx_ssi_fiq_tx_buffer = (unsigned long)buf->area;
  244. }
  245. substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
  246. if (substream) {
  247. struct snd_dma_buffer *buf = &substream->dma_buffer;
  248. imx_ssi_fiq_rx_buffer = (unsigned long)buf->area;
  249. }
  250. set_fiq_handler(&imx_ssi_fiq_start,
  251. &imx_ssi_fiq_end - &imx_ssi_fiq_start);
  252. return 0;
  253. }
  254. static void imx_pcm_free(struct snd_pcm *pcm)
  255. {
  256. struct snd_pcm_substream *substream;
  257. struct snd_dma_buffer *buf;
  258. int stream;
  259. for (stream = 0; stream < 2; stream++) {
  260. substream = pcm->streams[stream].substream;
  261. if (!substream)
  262. continue;
  263. buf = &substream->dma_buffer;
  264. if (!buf->area)
  265. continue;
  266. dma_free_writecombine(pcm->card->dev, buf->bytes,
  267. buf->area, buf->addr);
  268. buf->area = NULL;
  269. }
  270. }
  271. static void imx_pcm_fiq_free(struct snd_pcm *pcm)
  272. {
  273. mxc_set_irq_fiq(ssi_irq, 0);
  274. release_fiq(&fh);
  275. imx_pcm_free(pcm);
  276. }
  277. static struct snd_soc_platform_driver imx_soc_platform_fiq = {
  278. .ops = &imx_pcm_ops,
  279. .pcm_new = imx_pcm_fiq_new,
  280. .pcm_free = imx_pcm_fiq_free,
  281. };
  282. int imx_pcm_fiq_init(struct platform_device *pdev,
  283. struct imx_pcm_fiq_params *params)
  284. {
  285. int ret;
  286. ret = claim_fiq(&fh);
  287. if (ret) {
  288. dev_err(&pdev->dev, "failed to claim fiq: %d", ret);
  289. return ret;
  290. }
  291. mxc_set_irq_fiq(params->irq, 1);
  292. ssi_irq = params->irq;
  293. imx_pcm_fiq = params->irq;
  294. imx_ssi_fiq_base = (unsigned long)params->base;
  295. params->dma_params_tx->maxburst = 4;
  296. params->dma_params_rx->maxburst = 6;
  297. ret = snd_soc_register_platform(&pdev->dev, &imx_soc_platform_fiq);
  298. if (ret)
  299. goto failed_register;
  300. return 0;
  301. failed_register:
  302. mxc_set_irq_fiq(ssi_irq, 0);
  303. release_fiq(&fh);
  304. return ret;
  305. }
  306. EXPORT_SYMBOL_GPL(imx_pcm_fiq_init);
  307. void imx_pcm_fiq_exit(struct platform_device *pdev)
  308. {
  309. snd_soc_unregister_platform(&pdev->dev);
  310. }
  311. EXPORT_SYMBOL_GPL(imx_pcm_fiq_exit);
  312. MODULE_LICENSE("GPL");