sa1111.c 32 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/sa1111.c
  3. *
  4. * SA1111 support
  5. *
  6. * Original code by John Dorsey
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This file contains all generic SA1111 support.
  13. *
  14. * All initialization functions provided here are intended to be called
  15. * from machine specific code with proper arguments when required.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/init.h>
  19. #include <linux/kernel.h>
  20. #include <linux/delay.h>
  21. #include <linux/ptrace.h>
  22. #include <linux/errno.h>
  23. #include <linux/ioport.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/slab.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/dma-mapping.h>
  28. #include <linux/clk.h>
  29. #include <asm/hardware.h>
  30. #include <asm/mach-types.h>
  31. #include <asm/io.h>
  32. #include <asm/irq.h>
  33. #include <asm/mach/irq.h>
  34. #include <asm/sizes.h>
  35. #include <asm/hardware/sa1111.h>
  36. extern void __init sa1110_mb_enable(void);
  37. /*
  38. * We keep the following data for the overall SA1111. Note that the
  39. * struct device and struct resource are "fake"; they should be supplied
  40. * by the bus above us. However, in the interests of getting all SA1111
  41. * drivers converted over to the device model, we provide this as an
  42. * anchor point for all the other drivers.
  43. */
  44. struct sa1111 {
  45. struct device *dev;
  46. struct clk *clk;
  47. unsigned long phys;
  48. int irq;
  49. spinlock_t lock;
  50. void __iomem *base;
  51. };
  52. /*
  53. * We _really_ need to eliminate this. Its only users
  54. * are the PWM and DMA checking code.
  55. */
  56. static struct sa1111 *g_sa1111;
  57. struct sa1111_dev_info {
  58. unsigned long offset;
  59. unsigned long skpcr_mask;
  60. unsigned int devid;
  61. unsigned int irq[6];
  62. };
  63. static struct sa1111_dev_info sa1111_devices[] = {
  64. {
  65. .offset = SA1111_USB,
  66. .skpcr_mask = SKPCR_UCLKEN,
  67. .devid = SA1111_DEVID_USB,
  68. .irq = {
  69. IRQ_USBPWR,
  70. IRQ_HCIM,
  71. IRQ_HCIBUFFACC,
  72. IRQ_HCIRMTWKP,
  73. IRQ_NHCIMFCIR,
  74. IRQ_USB_PORT_RESUME
  75. },
  76. },
  77. {
  78. .offset = 0x0600,
  79. .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
  80. .devid = SA1111_DEVID_SAC,
  81. .irq = {
  82. AUDXMTDMADONEA,
  83. AUDXMTDMADONEB,
  84. AUDRCVDMADONEA,
  85. AUDRCVDMADONEB
  86. },
  87. },
  88. {
  89. .offset = 0x0800,
  90. .skpcr_mask = SKPCR_SCLKEN,
  91. .devid = SA1111_DEVID_SSP,
  92. },
  93. {
  94. .offset = SA1111_KBD,
  95. .skpcr_mask = SKPCR_PTCLKEN,
  96. .devid = SA1111_DEVID_PS2,
  97. .irq = {
  98. IRQ_TPRXINT,
  99. IRQ_TPTXINT
  100. },
  101. },
  102. {
  103. .offset = SA1111_MSE,
  104. .skpcr_mask = SKPCR_PMCLKEN,
  105. .devid = SA1111_DEVID_PS2,
  106. .irq = {
  107. IRQ_MSRXINT,
  108. IRQ_MSTXINT
  109. },
  110. },
  111. {
  112. .offset = 0x1800,
  113. .skpcr_mask = 0,
  114. .devid = SA1111_DEVID_PCMCIA,
  115. .irq = {
  116. IRQ_S0_READY_NINT,
  117. IRQ_S0_CD_VALID,
  118. IRQ_S0_BVD1_STSCHG,
  119. IRQ_S1_READY_NINT,
  120. IRQ_S1_CD_VALID,
  121. IRQ_S1_BVD1_STSCHG,
  122. },
  123. },
  124. };
  125. void __init sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes)
  126. {
  127. unsigned int sz = SZ_1M >> PAGE_SHIFT;
  128. if (node != 0)
  129. sz = 0;
  130. size[1] = size[0] - sz;
  131. size[0] = sz;
  132. }
  133. /*
  134. * SA1111 interrupt support. Since clearing an IRQ while there are
  135. * active IRQs causes the interrupt output to pulse, the upper levels
  136. * will call us again if there are more interrupts to process.
  137. */
  138. static void
  139. sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
  140. {
  141. unsigned int stat0, stat1, i;
  142. void __iomem *base = get_irq_data(irq);
  143. stat0 = sa1111_readl(base + SA1111_INTSTATCLR0);
  144. stat1 = sa1111_readl(base + SA1111_INTSTATCLR1);
  145. sa1111_writel(stat0, base + SA1111_INTSTATCLR0);
  146. desc->chip->ack(irq);
  147. sa1111_writel(stat1, base + SA1111_INTSTATCLR1);
  148. if (stat0 == 0 && stat1 == 0) {
  149. do_bad_IRQ(irq, desc, regs);
  150. return;
  151. }
  152. for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)
  153. if (stat0 & 1)
  154. handle_edge_irq(i, irq_desc + i, regs);
  155. for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)
  156. if (stat1 & 1)
  157. handle_edge_irq(i, irq_desc + i, regs);
  158. /* For level-based interrupts */
  159. desc->chip->unmask(irq);
  160. }
  161. #define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START))
  162. #define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32))
  163. static void sa1111_ack_irq(unsigned int irq)
  164. {
  165. }
  166. static void sa1111_mask_lowirq(unsigned int irq)
  167. {
  168. void __iomem *mapbase = get_irq_chipdata(irq);
  169. unsigned long ie0;
  170. ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
  171. ie0 &= ~SA1111_IRQMASK_LO(irq);
  172. writel(ie0, mapbase + SA1111_INTEN0);
  173. }
  174. static void sa1111_unmask_lowirq(unsigned int irq)
  175. {
  176. void __iomem *mapbase = get_irq_chipdata(irq);
  177. unsigned long ie0;
  178. ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
  179. ie0 |= SA1111_IRQMASK_LO(irq);
  180. sa1111_writel(ie0, mapbase + SA1111_INTEN0);
  181. }
  182. /*
  183. * Attempt to re-trigger the interrupt. The SA1111 contains a register
  184. * (INTSET) which claims to do this. However, in practice no amount of
  185. * manipulation of INTEN and INTSET guarantees that the interrupt will
  186. * be triggered. In fact, its very difficult, if not impossible to get
  187. * INTSET to re-trigger the interrupt.
  188. */
  189. static int sa1111_retrigger_lowirq(unsigned int irq)
  190. {
  191. unsigned int mask = SA1111_IRQMASK_LO(irq);
  192. void __iomem *mapbase = get_irq_chipdata(irq);
  193. unsigned long ip0;
  194. int i;
  195. ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
  196. for (i = 0; i < 8; i++) {
  197. sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);
  198. sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
  199. if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
  200. break;
  201. }
  202. if (i == 8)
  203. printk(KERN_ERR "Danger Will Robinson: failed to "
  204. "re-trigger IRQ%d\n", irq);
  205. return i == 8 ? -1 : 0;
  206. }
  207. static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
  208. {
  209. unsigned int mask = SA1111_IRQMASK_LO(irq);
  210. void __iomem *mapbase = get_irq_chipdata(irq);
  211. unsigned long ip0;
  212. if (flags == IRQT_PROBE)
  213. return 0;
  214. if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
  215. return -EINVAL;
  216. ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
  217. if (flags & __IRQT_RISEDGE)
  218. ip0 &= ~mask;
  219. else
  220. ip0 |= mask;
  221. sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
  222. sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0);
  223. return 0;
  224. }
  225. static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
  226. {
  227. unsigned int mask = SA1111_IRQMASK_LO(irq);
  228. void __iomem *mapbase = get_irq_chipdata(irq);
  229. unsigned long we0;
  230. we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
  231. if (on)
  232. we0 |= mask;
  233. else
  234. we0 &= ~mask;
  235. sa1111_writel(we0, mapbase + SA1111_WAKEEN0);
  236. return 0;
  237. }
  238. static struct irq_chip sa1111_low_chip = {
  239. .name = "SA1111-l",
  240. .ack = sa1111_ack_irq,
  241. .mask = sa1111_mask_lowirq,
  242. .unmask = sa1111_unmask_lowirq,
  243. .retrigger = sa1111_retrigger_lowirq,
  244. .set_type = sa1111_type_lowirq,
  245. .set_wake = sa1111_wake_lowirq,
  246. };
  247. static void sa1111_mask_highirq(unsigned int irq)
  248. {
  249. void __iomem *mapbase = get_irq_chipdata(irq);
  250. unsigned long ie1;
  251. ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
  252. ie1 &= ~SA1111_IRQMASK_HI(irq);
  253. sa1111_writel(ie1, mapbase + SA1111_INTEN1);
  254. }
  255. static void sa1111_unmask_highirq(unsigned int irq)
  256. {
  257. void __iomem *mapbase = get_irq_chipdata(irq);
  258. unsigned long ie1;
  259. ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
  260. ie1 |= SA1111_IRQMASK_HI(irq);
  261. sa1111_writel(ie1, mapbase + SA1111_INTEN1);
  262. }
  263. /*
  264. * Attempt to re-trigger the interrupt. The SA1111 contains a register
  265. * (INTSET) which claims to do this. However, in practice no amount of
  266. * manipulation of INTEN and INTSET guarantees that the interrupt will
  267. * be triggered. In fact, its very difficult, if not impossible to get
  268. * INTSET to re-trigger the interrupt.
  269. */
  270. static int sa1111_retrigger_highirq(unsigned int irq)
  271. {
  272. unsigned int mask = SA1111_IRQMASK_HI(irq);
  273. void __iomem *mapbase = get_irq_chipdata(irq);
  274. unsigned long ip1;
  275. int i;
  276. ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
  277. for (i = 0; i < 8; i++) {
  278. sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1);
  279. sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
  280. if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
  281. break;
  282. }
  283. if (i == 8)
  284. printk(KERN_ERR "Danger Will Robinson: failed to "
  285. "re-trigger IRQ%d\n", irq);
  286. return i == 8 ? -1 : 0;
  287. }
  288. static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
  289. {
  290. unsigned int mask = SA1111_IRQMASK_HI(irq);
  291. void __iomem *mapbase = get_irq_chipdata(irq);
  292. unsigned long ip1;
  293. if (flags == IRQT_PROBE)
  294. return 0;
  295. if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
  296. return -EINVAL;
  297. ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
  298. if (flags & __IRQT_RISEDGE)
  299. ip1 &= ~mask;
  300. else
  301. ip1 |= mask;
  302. sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
  303. sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1);
  304. return 0;
  305. }
  306. static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
  307. {
  308. unsigned int mask = SA1111_IRQMASK_HI(irq);
  309. void __iomem *mapbase = get_irq_chipdata(irq);
  310. unsigned long we1;
  311. we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
  312. if (on)
  313. we1 |= mask;
  314. else
  315. we1 &= ~mask;
  316. sa1111_writel(we1, mapbase + SA1111_WAKEEN1);
  317. return 0;
  318. }
  319. static struct irq_chip sa1111_high_chip = {
  320. .name = "SA1111-h",
  321. .ack = sa1111_ack_irq,
  322. .mask = sa1111_mask_highirq,
  323. .unmask = sa1111_unmask_highirq,
  324. .retrigger = sa1111_retrigger_highirq,
  325. .set_type = sa1111_type_highirq,
  326. .set_wake = sa1111_wake_highirq,
  327. };
  328. static void sa1111_setup_irq(struct sa1111 *sachip)
  329. {
  330. void __iomem *irqbase = sachip->base + SA1111_INTC;
  331. unsigned int irq;
  332. /*
  333. * We're guaranteed that this region hasn't been taken.
  334. */
  335. request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
  336. /* disable all IRQs */
  337. sa1111_writel(0, irqbase + SA1111_INTEN0);
  338. sa1111_writel(0, irqbase + SA1111_INTEN1);
  339. sa1111_writel(0, irqbase + SA1111_WAKEEN0);
  340. sa1111_writel(0, irqbase + SA1111_WAKEEN1);
  341. /*
  342. * detect on rising edge. Note: Feb 2001 Errata for SA1111
  343. * specifies that S0ReadyInt and S1ReadyInt should be '1'.
  344. */
  345. sa1111_writel(0, irqbase + SA1111_INTPOL0);
  346. sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) |
  347. SA1111_IRQMASK_HI(IRQ_S1_READY_NINT),
  348. irqbase + SA1111_INTPOL1);
  349. /* clear all IRQs */
  350. sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0);
  351. sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
  352. for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
  353. set_irq_chip(irq, &sa1111_low_chip);
  354. set_irq_chipdata(irq, irqbase);
  355. set_irq_handler(irq, do_edge_IRQ);
  356. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  357. }
  358. for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
  359. set_irq_chip(irq, &sa1111_high_chip);
  360. set_irq_chipdata(irq, irqbase);
  361. set_irq_handler(irq, do_edge_IRQ);
  362. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  363. }
  364. /*
  365. * Register SA1111 interrupt
  366. */
  367. set_irq_type(sachip->irq, IRQT_RISING);
  368. set_irq_data(sachip->irq, irqbase);
  369. set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
  370. }
  371. /*
  372. * Bring the SA1111 out of reset. This requires a set procedure:
  373. * 1. nRESET asserted (by hardware)
  374. * 2. CLK turned on from SA1110
  375. * 3. nRESET deasserted
  376. * 4. VCO turned on, PLL_BYPASS turned off
  377. * 5. Wait lock time, then assert RCLKEn
  378. * 7. PCR set to allow clocking of individual functions
  379. *
  380. * Until we've done this, the only registers we can access are:
  381. * SBI_SKCR
  382. * SBI_SMCR
  383. * SBI_SKID
  384. */
  385. static void sa1111_wake(struct sa1111 *sachip)
  386. {
  387. unsigned long flags, r;
  388. spin_lock_irqsave(&sachip->lock, flags);
  389. clk_enable(sachip->clk);
  390. /*
  391. * Turn VCO on, and disable PLL Bypass.
  392. */
  393. r = sa1111_readl(sachip->base + SA1111_SKCR);
  394. r &= ~SKCR_VCO_OFF;
  395. sa1111_writel(r, sachip->base + SA1111_SKCR);
  396. r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
  397. sa1111_writel(r, sachip->base + SA1111_SKCR);
  398. /*
  399. * Wait lock time. SA1111 manual _doesn't_
  400. * specify a figure for this! We choose 100us.
  401. */
  402. udelay(100);
  403. /*
  404. * Enable RCLK. We also ensure that RDYEN is set.
  405. */
  406. r |= SKCR_RCLKEN | SKCR_RDYEN;
  407. sa1111_writel(r, sachip->base + SA1111_SKCR);
  408. /*
  409. * Wait 14 RCLK cycles for the chip to finish coming out
  410. * of reset. (RCLK=24MHz). This is 590ns.
  411. */
  412. udelay(1);
  413. /*
  414. * Ensure all clocks are initially off.
  415. */
  416. sa1111_writel(0, sachip->base + SA1111_SKPCR);
  417. spin_unlock_irqrestore(&sachip->lock, flags);
  418. }
  419. #ifdef CONFIG_ARCH_SA1100
  420. static u32 sa1111_dma_mask[] = {
  421. ~0,
  422. ~(1 << 20),
  423. ~(1 << 23),
  424. ~(1 << 24),
  425. ~(1 << 25),
  426. ~(1 << 20),
  427. ~(1 << 20),
  428. 0,
  429. };
  430. /*
  431. * Configure the SA1111 shared memory controller.
  432. */
  433. void
  434. sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
  435. unsigned int cas_latency)
  436. {
  437. unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
  438. if (cas_latency == 3)
  439. smcr |= SMCR_CLAT;
  440. sa1111_writel(smcr, sachip->base + SA1111_SMCR);
  441. /*
  442. * Now clear the bits in the DMA mask to work around the SA1111
  443. * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion
  444. * Chip Specification Update, June 2000, Erratum #7).
  445. */
  446. if (sachip->dev->dma_mask)
  447. *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
  448. sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
  449. }
  450. #endif
  451. static void sa1111_dev_release(struct device *_dev)
  452. {
  453. struct sa1111_dev *dev = SA1111_DEV(_dev);
  454. release_resource(&dev->res);
  455. kfree(dev);
  456. }
  457. static int
  458. sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
  459. struct sa1111_dev_info *info)
  460. {
  461. struct sa1111_dev *dev;
  462. int ret;
  463. dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
  464. if (!dev) {
  465. ret = -ENOMEM;
  466. goto out;
  467. }
  468. snprintf(dev->dev.bus_id, sizeof(dev->dev.bus_id),
  469. "%4.4lx", info->offset);
  470. dev->devid = info->devid;
  471. dev->dev.parent = sachip->dev;
  472. dev->dev.bus = &sa1111_bus_type;
  473. dev->dev.release = sa1111_dev_release;
  474. dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
  475. dev->res.start = sachip->phys + info->offset;
  476. dev->res.end = dev->res.start + 511;
  477. dev->res.name = dev->dev.bus_id;
  478. dev->res.flags = IORESOURCE_MEM;
  479. dev->mapbase = sachip->base + info->offset;
  480. dev->skpcr_mask = info->skpcr_mask;
  481. memmove(dev->irq, info->irq, sizeof(dev->irq));
  482. ret = request_resource(parent, &dev->res);
  483. if (ret) {
  484. printk("SA1111: failed to allocate resource for %s\n",
  485. dev->res.name);
  486. kfree(dev);
  487. goto out;
  488. }
  489. ret = device_register(&dev->dev);
  490. if (ret) {
  491. release_resource(&dev->res);
  492. kfree(dev);
  493. goto out;
  494. }
  495. /*
  496. * If the parent device has a DMA mask associated with it,
  497. * propagate it down to the children.
  498. */
  499. if (sachip->dev->dma_mask) {
  500. dev->dma_mask = *sachip->dev->dma_mask;
  501. dev->dev.dma_mask = &dev->dma_mask;
  502. if (dev->dma_mask != 0xffffffffUL) {
  503. ret = dmabounce_register_dev(&dev->dev, 1024, 4096);
  504. if (ret) {
  505. printk("SA1111: Failed to register %s with dmabounce", dev->dev.bus_id);
  506. device_unregister(&dev->dev);
  507. }
  508. }
  509. }
  510. out:
  511. return ret;
  512. }
  513. /**
  514. * sa1111_probe - probe for a single SA1111 chip.
  515. * @phys_addr: physical address of device.
  516. *
  517. * Probe for a SA1111 chip. This must be called
  518. * before any other SA1111-specific code.
  519. *
  520. * Returns:
  521. * %-ENODEV device not found.
  522. * %-EBUSY physical address already marked in-use.
  523. * %0 successful.
  524. */
  525. static int
  526. __sa1111_probe(struct device *me, struct resource *mem, int irq)
  527. {
  528. struct sa1111 *sachip;
  529. unsigned long id;
  530. unsigned int has_devs, val;
  531. int i, ret = -ENODEV;
  532. sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL);
  533. if (!sachip)
  534. return -ENOMEM;
  535. sachip->clk = clk_get(me, "GPIO27_CLK");
  536. if (!sachip->clk) {
  537. ret = PTR_ERR(sachip->clk);
  538. goto err_free;
  539. }
  540. spin_lock_init(&sachip->lock);
  541. sachip->dev = me;
  542. dev_set_drvdata(sachip->dev, sachip);
  543. sachip->phys = mem->start;
  544. sachip->irq = irq;
  545. /*
  546. * Map the whole region. This also maps the
  547. * registers for our children.
  548. */
  549. sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
  550. if (!sachip->base) {
  551. ret = -ENOMEM;
  552. goto err_clkput;
  553. }
  554. /*
  555. * Probe for the chip. Only touch the SBI registers.
  556. */
  557. id = sa1111_readl(sachip->base + SA1111_SKID);
  558. if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
  559. printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
  560. ret = -ENODEV;
  561. goto err_unmap;
  562. }
  563. printk(KERN_INFO "SA1111 Microprocessor Companion Chip: "
  564. "silicon revision %lx, metal revision %lx\n",
  565. (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK));
  566. /*
  567. * We found it. Wake the chip up, and initialise.
  568. */
  569. sa1111_wake(sachip);
  570. #ifdef CONFIG_ARCH_SA1100
  571. /*
  572. * The SDRAM configuration of the SA1110 and the SA1111 must
  573. * match. This is very important to ensure that SA1111 accesses
  574. * don't corrupt the SDRAM. Note that this ungates the SA1111's
  575. * MBGNT signal, so we must have called sa1110_mb_disable()
  576. * beforehand.
  577. */
  578. sa1111_configure_smc(sachip, 1,
  579. FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
  580. FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
  581. /*
  582. * We only need to turn on DCLK whenever we want to use the
  583. * DMA. It can otherwise be held firmly in the off position.
  584. * (currently, we always enable it.)
  585. */
  586. val = sa1111_readl(sachip->base + SA1111_SKPCR);
  587. sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
  588. /*
  589. * Enable the SA1110 memory bus request and grant signals.
  590. */
  591. sa1110_mb_enable();
  592. #endif
  593. /*
  594. * The interrupt controller must be initialised before any
  595. * other device to ensure that the interrupts are available.
  596. */
  597. if (sachip->irq != NO_IRQ)
  598. sa1111_setup_irq(sachip);
  599. g_sa1111 = sachip;
  600. has_devs = ~0;
  601. if (machine_is_assabet() || machine_is_jornada720() ||
  602. machine_is_badge4())
  603. has_devs &= ~(1 << 4);
  604. else
  605. has_devs &= ~(1 << 1);
  606. for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
  607. if (has_devs & (1 << i))
  608. sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
  609. return 0;
  610. err_unmap:
  611. iounmap(sachip->base);
  612. err_clkput:
  613. clk_put(sachip->clk);
  614. err_free:
  615. kfree(sachip);
  616. return ret;
  617. }
  618. static int sa1111_remove_one(struct device *dev, void *data)
  619. {
  620. device_unregister(dev);
  621. return 0;
  622. }
  623. static void __sa1111_remove(struct sa1111 *sachip)
  624. {
  625. void __iomem *irqbase = sachip->base + SA1111_INTC;
  626. device_for_each_child(sachip->dev, NULL, sa1111_remove_one);
  627. /* disable all IRQs */
  628. sa1111_writel(0, irqbase + SA1111_INTEN0);
  629. sa1111_writel(0, irqbase + SA1111_INTEN1);
  630. sa1111_writel(0, irqbase + SA1111_WAKEEN0);
  631. sa1111_writel(0, irqbase + SA1111_WAKEEN1);
  632. clk_disable(sachip->clk);
  633. if (sachip->irq != NO_IRQ) {
  634. set_irq_chained_handler(sachip->irq, NULL);
  635. set_irq_data(sachip->irq, NULL);
  636. release_mem_region(sachip->phys + SA1111_INTC, 512);
  637. }
  638. iounmap(sachip->base);
  639. clk_put(sachip->clk);
  640. kfree(sachip);
  641. }
  642. /*
  643. * According to the "Intel StrongARM SA-1111 Microprocessor Companion
  644. * Chip Specification Update" (June 2000), erratum #7, there is a
  645. * significant bug in the SA1111 SDRAM shared memory controller. If
  646. * an access to a region of memory above 1MB relative to the bank base,
  647. * it is important that address bit 10 _NOT_ be asserted. Depending
  648. * on the configuration of the RAM, bit 10 may correspond to one
  649. * of several different (processor-relative) address bits.
  650. *
  651. * This routine only identifies whether or not a given DMA address
  652. * is susceptible to the bug.
  653. *
  654. * This should only get called for sa1111_device types due to the
  655. * way we configure our device dma_masks.
  656. */
  657. int dma_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
  658. {
  659. /*
  660. * Section 4.6 of the "Intel StrongARM SA-1111 Development Module
  661. * User's Guide" mentions that jumpers R51 and R52 control the
  662. * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
  663. * SDRAM bank 1 on Neponset). The default configuration selects
  664. * Assabet, so any address in bank 1 is necessarily invalid.
  665. */
  666. return ((machine_is_assabet() || machine_is_pfs168()) &&
  667. (addr >= 0xc8000000 || (addr + size) >= 0xc8000000));
  668. }
  669. struct sa1111_save_data {
  670. unsigned int skcr;
  671. unsigned int skpcr;
  672. unsigned int skcdr;
  673. unsigned char skaud;
  674. unsigned char skpwm0;
  675. unsigned char skpwm1;
  676. /*
  677. * Interrupt controller
  678. */
  679. unsigned int intpol0;
  680. unsigned int intpol1;
  681. unsigned int inten0;
  682. unsigned int inten1;
  683. unsigned int wakepol0;
  684. unsigned int wakepol1;
  685. unsigned int wakeen0;
  686. unsigned int wakeen1;
  687. };
  688. #ifdef CONFIG_PM
  689. static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
  690. {
  691. struct sa1111 *sachip = platform_get_drvdata(dev);
  692. struct sa1111_save_data *save;
  693. unsigned long flags;
  694. unsigned int val;
  695. void __iomem *base;
  696. save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
  697. if (!save)
  698. return -ENOMEM;
  699. dev->dev.power.saved_state = save;
  700. spin_lock_irqsave(&sachip->lock, flags);
  701. /*
  702. * Save state.
  703. */
  704. base = sachip->base;
  705. save->skcr = sa1111_readl(base + SA1111_SKCR);
  706. save->skpcr = sa1111_readl(base + SA1111_SKPCR);
  707. save->skcdr = sa1111_readl(base + SA1111_SKCDR);
  708. save->skaud = sa1111_readl(base + SA1111_SKAUD);
  709. save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0);
  710. save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1);
  711. base = sachip->base + SA1111_INTC;
  712. save->intpol0 = sa1111_readl(base + SA1111_INTPOL0);
  713. save->intpol1 = sa1111_readl(base + SA1111_INTPOL1);
  714. save->inten0 = sa1111_readl(base + SA1111_INTEN0);
  715. save->inten1 = sa1111_readl(base + SA1111_INTEN1);
  716. save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0);
  717. save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1);
  718. save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0);
  719. save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1);
  720. /*
  721. * Disable.
  722. */
  723. val = sa1111_readl(sachip->base + SA1111_SKCR);
  724. sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
  725. sa1111_writel(0, sachip->base + SA1111_SKPWM0);
  726. sa1111_writel(0, sachip->base + SA1111_SKPWM1);
  727. clk_disable(sachip->clk);
  728. spin_unlock_irqrestore(&sachip->lock, flags);
  729. return 0;
  730. }
  731. /*
  732. * sa1111_resume - Restore the SA1111 device state.
  733. * @dev: device to restore
  734. *
  735. * Restore the general state of the SA1111; clock control and
  736. * interrupt controller. Other parts of the SA1111 must be
  737. * restored by their respective drivers, and must be called
  738. * via LDM after this function.
  739. */
  740. static int sa1111_resume(struct platform_device *dev)
  741. {
  742. struct sa1111 *sachip = platform_get_drvdata(dev);
  743. struct sa1111_save_data *save;
  744. unsigned long flags, id;
  745. void __iomem *base;
  746. save = (struct sa1111_save_data *)dev->dev.power.saved_state;
  747. if (!save)
  748. return 0;
  749. spin_lock_irqsave(&sachip->lock, flags);
  750. /*
  751. * Ensure that the SA1111 is still here.
  752. * FIXME: shouldn't do this here.
  753. */
  754. id = sa1111_readl(sachip->base + SA1111_SKID);
  755. if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
  756. __sa1111_remove(sachip);
  757. platform_set_drvdata(dev, NULL);
  758. kfree(save);
  759. return 0;
  760. }
  761. /*
  762. * First of all, wake up the chip.
  763. */
  764. sa1111_wake(sachip);
  765. sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
  766. sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
  767. base = sachip->base;
  768. sa1111_writel(save->skcr, base + SA1111_SKCR);
  769. sa1111_writel(save->skpcr, base + SA1111_SKPCR);
  770. sa1111_writel(save->skcdr, base + SA1111_SKCDR);
  771. sa1111_writel(save->skaud, base + SA1111_SKAUD);
  772. sa1111_writel(save->skpwm0, base + SA1111_SKPWM0);
  773. sa1111_writel(save->skpwm1, base + SA1111_SKPWM1);
  774. base = sachip->base + SA1111_INTC;
  775. sa1111_writel(save->intpol0, base + SA1111_INTPOL0);
  776. sa1111_writel(save->intpol1, base + SA1111_INTPOL1);
  777. sa1111_writel(save->inten0, base + SA1111_INTEN0);
  778. sa1111_writel(save->inten1, base + SA1111_INTEN1);
  779. sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0);
  780. sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1);
  781. sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0);
  782. sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1);
  783. spin_unlock_irqrestore(&sachip->lock, flags);
  784. dev->dev.power.saved_state = NULL;
  785. kfree(save);
  786. return 0;
  787. }
  788. #else
  789. #define sa1111_suspend NULL
  790. #define sa1111_resume NULL
  791. #endif
  792. static int sa1111_probe(struct platform_device *pdev)
  793. {
  794. struct resource *mem;
  795. int irq;
  796. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  797. if (!mem)
  798. return -EINVAL;
  799. irq = platform_get_irq(pdev, 0);
  800. if (irq < 0)
  801. return -ENXIO;
  802. return __sa1111_probe(&pdev->dev, mem, irq);
  803. }
  804. static int sa1111_remove(struct platform_device *pdev)
  805. {
  806. struct sa1111 *sachip = platform_get_drvdata(pdev);
  807. if (sachip) {
  808. __sa1111_remove(sachip);
  809. platform_set_drvdata(pdev, NULL);
  810. #ifdef CONFIG_PM
  811. kfree(pdev->dev.power.saved_state);
  812. pdev->dev.power.saved_state = NULL;
  813. #endif
  814. }
  815. return 0;
  816. }
  817. /*
  818. * Not sure if this should be on the system bus or not yet.
  819. * We really want some way to register a system device at
  820. * the per-machine level, and then have this driver pick
  821. * up the registered devices.
  822. *
  823. * We also need to handle the SDRAM configuration for
  824. * PXA250/SA1110 machine classes.
  825. */
  826. static struct platform_driver sa1111_device_driver = {
  827. .probe = sa1111_probe,
  828. .remove = sa1111_remove,
  829. .suspend = sa1111_suspend,
  830. .resume = sa1111_resume,
  831. .driver = {
  832. .name = "sa1111",
  833. },
  834. };
  835. /*
  836. * Get the parent device driver (us) structure
  837. * from a child function device
  838. */
  839. static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
  840. {
  841. return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
  842. }
  843. /*
  844. * The bits in the opdiv field are non-linear.
  845. */
  846. static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
  847. static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
  848. {
  849. unsigned int skcdr, fbdiv, ipdiv, opdiv;
  850. skcdr = sa1111_readl(sachip->base + SA1111_SKCDR);
  851. fbdiv = (skcdr & 0x007f) + 2;
  852. ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
  853. opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
  854. return 3686400 * fbdiv / (ipdiv * opdiv);
  855. }
  856. /**
  857. * sa1111_pll_clock - return the current PLL clock frequency.
  858. * @sadev: SA1111 function block
  859. *
  860. * BUG: we should look at SKCR. We also blindly believe that
  861. * the chip is being fed with the 3.6864MHz clock.
  862. *
  863. * Returns the PLL clock in Hz.
  864. */
  865. unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
  866. {
  867. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  868. return __sa1111_pll_clock(sachip);
  869. }
  870. /**
  871. * sa1111_select_audio_mode - select I2S or AC link mode
  872. * @sadev: SA1111 function block
  873. * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S
  874. *
  875. * Frob the SKCR to select AC Link mode or I2S mode for
  876. * the audio block.
  877. */
  878. void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
  879. {
  880. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  881. unsigned long flags;
  882. unsigned int val;
  883. spin_lock_irqsave(&sachip->lock, flags);
  884. val = sa1111_readl(sachip->base + SA1111_SKCR);
  885. if (mode == SA1111_AUDIO_I2S) {
  886. val &= ~SKCR_SELAC;
  887. } else {
  888. val |= SKCR_SELAC;
  889. }
  890. sa1111_writel(val, sachip->base + SA1111_SKCR);
  891. spin_unlock_irqrestore(&sachip->lock, flags);
  892. }
  893. /**
  894. * sa1111_set_audio_rate - set the audio sample rate
  895. * @sadev: SA1111 SAC function block
  896. * @rate: sample rate to select
  897. */
  898. int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
  899. {
  900. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  901. unsigned int div;
  902. if (sadev->devid != SA1111_DEVID_SAC)
  903. return -EINVAL;
  904. div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
  905. if (div == 0)
  906. div = 1;
  907. if (div > 128)
  908. div = 128;
  909. sa1111_writel(div - 1, sachip->base + SA1111_SKAUD);
  910. return 0;
  911. }
  912. /**
  913. * sa1111_get_audio_rate - get the audio sample rate
  914. * @sadev: SA1111 SAC function block device
  915. */
  916. int sa1111_get_audio_rate(struct sa1111_dev *sadev)
  917. {
  918. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  919. unsigned long div;
  920. if (sadev->devid != SA1111_DEVID_SAC)
  921. return -EINVAL;
  922. div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1;
  923. return __sa1111_pll_clock(sachip) / (256 * div);
  924. }
  925. void sa1111_set_io_dir(struct sa1111_dev *sadev,
  926. unsigned int bits, unsigned int dir,
  927. unsigned int sleep_dir)
  928. {
  929. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  930. unsigned long flags;
  931. unsigned int val;
  932. void __iomem *gpio = sachip->base + SA1111_GPIO;
  933. #define MODIFY_BITS(port, mask, dir) \
  934. if (mask) { \
  935. val = sa1111_readl(port); \
  936. val &= ~(mask); \
  937. val |= (dir) & (mask); \
  938. sa1111_writel(val, port); \
  939. }
  940. spin_lock_irqsave(&sachip->lock, flags);
  941. MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir);
  942. MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8);
  943. MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16);
  944. MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir);
  945. MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8);
  946. MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16);
  947. spin_unlock_irqrestore(&sachip->lock, flags);
  948. }
  949. void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
  950. {
  951. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  952. unsigned long flags;
  953. unsigned int val;
  954. void __iomem *gpio = sachip->base + SA1111_GPIO;
  955. spin_lock_irqsave(&sachip->lock, flags);
  956. MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v);
  957. MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8);
  958. MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16);
  959. spin_unlock_irqrestore(&sachip->lock, flags);
  960. }
  961. void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
  962. {
  963. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  964. unsigned long flags;
  965. unsigned int val;
  966. void __iomem *gpio = sachip->base + SA1111_GPIO;
  967. spin_lock_irqsave(&sachip->lock, flags);
  968. MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v);
  969. MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8);
  970. MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16);
  971. spin_unlock_irqrestore(&sachip->lock, flags);
  972. }
  973. /*
  974. * Individual device operations.
  975. */
  976. /**
  977. * sa1111_enable_device - enable an on-chip SA1111 function block
  978. * @sadev: SA1111 function block device to enable
  979. */
  980. void sa1111_enable_device(struct sa1111_dev *sadev)
  981. {
  982. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  983. unsigned long flags;
  984. unsigned int val;
  985. spin_lock_irqsave(&sachip->lock, flags);
  986. val = sa1111_readl(sachip->base + SA1111_SKPCR);
  987. sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
  988. spin_unlock_irqrestore(&sachip->lock, flags);
  989. }
  990. /**
  991. * sa1111_disable_device - disable an on-chip SA1111 function block
  992. * @sadev: SA1111 function block device to disable
  993. */
  994. void sa1111_disable_device(struct sa1111_dev *sadev)
  995. {
  996. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  997. unsigned long flags;
  998. unsigned int val;
  999. spin_lock_irqsave(&sachip->lock, flags);
  1000. val = sa1111_readl(sachip->base + SA1111_SKPCR);
  1001. sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
  1002. spin_unlock_irqrestore(&sachip->lock, flags);
  1003. }
  1004. /*
  1005. * SA1111 "Register Access Bus."
  1006. *
  1007. * We model this as a regular bus type, and hang devices directly
  1008. * off this.
  1009. */
  1010. static int sa1111_match(struct device *_dev, struct device_driver *_drv)
  1011. {
  1012. struct sa1111_dev *dev = SA1111_DEV(_dev);
  1013. struct sa1111_driver *drv = SA1111_DRV(_drv);
  1014. return dev->devid == drv->devid;
  1015. }
  1016. static int sa1111_bus_suspend(struct device *dev, pm_message_t state)
  1017. {
  1018. struct sa1111_dev *sadev = SA1111_DEV(dev);
  1019. struct sa1111_driver *drv = SA1111_DRV(dev->driver);
  1020. int ret = 0;
  1021. if (drv && drv->suspend)
  1022. ret = drv->suspend(sadev, state);
  1023. return ret;
  1024. }
  1025. static int sa1111_bus_resume(struct device *dev)
  1026. {
  1027. struct sa1111_dev *sadev = SA1111_DEV(dev);
  1028. struct sa1111_driver *drv = SA1111_DRV(dev->driver);
  1029. int ret = 0;
  1030. if (drv && drv->resume)
  1031. ret = drv->resume(sadev);
  1032. return ret;
  1033. }
  1034. static int sa1111_bus_probe(struct device *dev)
  1035. {
  1036. struct sa1111_dev *sadev = SA1111_DEV(dev);
  1037. struct sa1111_driver *drv = SA1111_DRV(dev->driver);
  1038. int ret = -ENODEV;
  1039. if (drv->probe)
  1040. ret = drv->probe(sadev);
  1041. return ret;
  1042. }
  1043. static int sa1111_bus_remove(struct device *dev)
  1044. {
  1045. struct sa1111_dev *sadev = SA1111_DEV(dev);
  1046. struct sa1111_driver *drv = SA1111_DRV(dev->driver);
  1047. int ret = 0;
  1048. if (drv->remove)
  1049. ret = drv->remove(sadev);
  1050. return ret;
  1051. }
  1052. struct bus_type sa1111_bus_type = {
  1053. .name = "sa1111-rab",
  1054. .match = sa1111_match,
  1055. .probe = sa1111_bus_probe,
  1056. .remove = sa1111_bus_remove,
  1057. .suspend = sa1111_bus_suspend,
  1058. .resume = sa1111_bus_resume,
  1059. };
  1060. int sa1111_driver_register(struct sa1111_driver *driver)
  1061. {
  1062. driver->drv.bus = &sa1111_bus_type;
  1063. return driver_register(&driver->drv);
  1064. }
  1065. void sa1111_driver_unregister(struct sa1111_driver *driver)
  1066. {
  1067. driver_unregister(&driver->drv);
  1068. }
  1069. static int __init sa1111_init(void)
  1070. {
  1071. int ret = bus_register(&sa1111_bus_type);
  1072. if (ret == 0)
  1073. platform_driver_register(&sa1111_device_driver);
  1074. return ret;
  1075. }
  1076. static void __exit sa1111_exit(void)
  1077. {
  1078. platform_driver_unregister(&sa1111_device_driver);
  1079. bus_unregister(&sa1111_bus_type);
  1080. }
  1081. subsys_initcall(sa1111_init);
  1082. module_exit(sa1111_exit);
  1083. MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
  1084. MODULE_LICENSE("GPL");
  1085. EXPORT_SYMBOL(sa1111_select_audio_mode);
  1086. EXPORT_SYMBOL(sa1111_set_audio_rate);
  1087. EXPORT_SYMBOL(sa1111_get_audio_rate);
  1088. EXPORT_SYMBOL(sa1111_set_io_dir);
  1089. EXPORT_SYMBOL(sa1111_set_io);
  1090. EXPORT_SYMBOL(sa1111_set_sleep_io);
  1091. EXPORT_SYMBOL(sa1111_enable_device);
  1092. EXPORT_SYMBOL(sa1111_disable_device);
  1093. EXPORT_SYMBOL(sa1111_pll_clock);
  1094. EXPORT_SYMBOL(sa1111_bus_type);
  1095. EXPORT_SYMBOL(sa1111_driver_register);
  1096. EXPORT_SYMBOL(sa1111_driver_unregister);