core.h 7.7 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef _CORE_H_
  18. #define _CORE_H_
  19. #include <linux/completion.h>
  20. #include <linux/if_ether.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include "htt.h"
  24. #include "htc.h"
  25. #include "hw.h"
  26. #include "targaddrs.h"
  27. #include "wmi.h"
  28. #include "../ath.h"
  29. #include "../regd.h"
  30. #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
  31. #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
  32. #define WO(_f) ((_f##_OFFSET) >> 2)
  33. #define ATH10K_SCAN_ID 0
  34. #define WMI_READY_TIMEOUT (5 * HZ)
  35. #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
  36. /* Antenna noise floor */
  37. #define ATH10K_DEFAULT_NOISE_FLOOR -95
  38. struct ath10k;
  39. struct ath10k_skb_cb {
  40. dma_addr_t paddr;
  41. bool is_mapped;
  42. bool is_aborted;
  43. struct {
  44. u8 vdev_id;
  45. u16 msdu_id;
  46. u8 tid;
  47. bool is_offchan;
  48. bool is_conf;
  49. bool discard;
  50. bool no_ack;
  51. u8 refcount;
  52. struct sk_buff *txfrag;
  53. struct sk_buff *msdu;
  54. } __packed htt;
  55. /* 4 bytes left on 64bit arch */
  56. } __packed;
  57. static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
  58. {
  59. BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
  60. IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
  61. return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
  62. }
  63. static inline int ath10k_skb_map(struct device *dev, struct sk_buff *skb)
  64. {
  65. if (ATH10K_SKB_CB(skb)->is_mapped)
  66. return -EINVAL;
  67. ATH10K_SKB_CB(skb)->paddr = dma_map_single(dev, skb->data, skb->len,
  68. DMA_TO_DEVICE);
  69. if (unlikely(dma_mapping_error(dev, ATH10K_SKB_CB(skb)->paddr)))
  70. return -EIO;
  71. ATH10K_SKB_CB(skb)->is_mapped = true;
  72. return 0;
  73. }
  74. static inline int ath10k_skb_unmap(struct device *dev, struct sk_buff *skb)
  75. {
  76. if (!ATH10K_SKB_CB(skb)->is_mapped)
  77. return -EINVAL;
  78. dma_unmap_single(dev, ATH10K_SKB_CB(skb)->paddr, skb->len,
  79. DMA_TO_DEVICE);
  80. ATH10K_SKB_CB(skb)->is_mapped = false;
  81. return 0;
  82. }
  83. static inline u32 host_interest_item_address(u32 item_offset)
  84. {
  85. return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
  86. }
  87. struct ath10k_bmi {
  88. bool done_sent;
  89. };
  90. struct ath10k_wmi {
  91. enum ath10k_htc_ep_id eid;
  92. struct completion service_ready;
  93. struct completion unified_ready;
  94. atomic_t pending_tx_count;
  95. wait_queue_head_t wq;
  96. struct sk_buff_head wmi_event_list;
  97. struct work_struct wmi_event_work;
  98. };
  99. struct ath10k_peer_stat {
  100. u8 peer_macaddr[ETH_ALEN];
  101. u32 peer_rssi;
  102. u32 peer_tx_rate;
  103. };
  104. struct ath10k_target_stats {
  105. /* PDEV stats */
  106. s32 ch_noise_floor;
  107. u32 tx_frame_count;
  108. u32 rx_frame_count;
  109. u32 rx_clear_count;
  110. u32 cycle_count;
  111. u32 phy_err_count;
  112. u32 chan_tx_power;
  113. /* PDEV TX stats */
  114. s32 comp_queued;
  115. s32 comp_delivered;
  116. s32 msdu_enqued;
  117. s32 mpdu_enqued;
  118. s32 wmm_drop;
  119. s32 local_enqued;
  120. s32 local_freed;
  121. s32 hw_queued;
  122. s32 hw_reaped;
  123. s32 underrun;
  124. s32 tx_abort;
  125. s32 mpdus_requed;
  126. u32 tx_ko;
  127. u32 data_rc;
  128. u32 self_triggers;
  129. u32 sw_retry_failure;
  130. u32 illgl_rate_phy_err;
  131. u32 pdev_cont_xretry;
  132. u32 pdev_tx_timeout;
  133. u32 pdev_resets;
  134. u32 phy_underrun;
  135. u32 txop_ovf;
  136. /* PDEV RX stats */
  137. s32 mid_ppdu_route_change;
  138. s32 status_rcvd;
  139. s32 r0_frags;
  140. s32 r1_frags;
  141. s32 r2_frags;
  142. s32 r3_frags;
  143. s32 htt_msdus;
  144. s32 htt_mpdus;
  145. s32 loc_msdus;
  146. s32 loc_mpdus;
  147. s32 oversize_amsdu;
  148. s32 phy_errs;
  149. s32 phy_err_drop;
  150. s32 mpdu_errs;
  151. /* VDEV STATS */
  152. /* PEER STATS */
  153. u8 peers;
  154. struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS];
  155. /* TODO: Beacon filter stats */
  156. };
  157. #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
  158. struct ath10k_peer {
  159. struct list_head list;
  160. int vdev_id;
  161. u8 addr[ETH_ALEN];
  162. DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
  163. struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
  164. };
  165. #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
  166. struct ath10k_vif {
  167. u32 vdev_id;
  168. enum wmi_vdev_type vdev_type;
  169. enum wmi_vdev_subtype vdev_subtype;
  170. u32 beacon_interval;
  171. u32 dtim_period;
  172. struct ath10k *ar;
  173. struct ieee80211_vif *vif;
  174. struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
  175. u8 def_wep_key_index;
  176. u16 tx_seq_no;
  177. union {
  178. struct {
  179. u8 bssid[ETH_ALEN];
  180. u32 uapsd;
  181. } sta;
  182. struct {
  183. /* 127 stations; wmi limit */
  184. u8 tim_bitmap[16];
  185. u8 tim_len;
  186. u32 ssid_len;
  187. u8 ssid[IEEE80211_MAX_SSID_LEN];
  188. bool hidden_ssid;
  189. /* P2P_IE with NoA attribute for P2P_GO case */
  190. u32 noa_len;
  191. u8 *noa_data;
  192. } ap;
  193. struct {
  194. u8 bssid[ETH_ALEN];
  195. } ibss;
  196. } u;
  197. };
  198. struct ath10k_vif_iter {
  199. u32 vdev_id;
  200. struct ath10k_vif *arvif;
  201. };
  202. struct ath10k_debug {
  203. struct dentry *debugfs_phy;
  204. struct ath10k_target_stats target_stats;
  205. u32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
  206. struct completion event_stats_compl;
  207. };
  208. enum ath10k_state {
  209. ATH10K_STATE_OFF = 0,
  210. ATH10K_STATE_ON,
  211. };
  212. struct ath10k {
  213. struct ath_common ath_common;
  214. struct ieee80211_hw *hw;
  215. struct device *dev;
  216. u8 mac_addr[ETH_ALEN];
  217. u32 target_version;
  218. u8 fw_version_major;
  219. u32 fw_version_minor;
  220. u16 fw_version_release;
  221. u16 fw_version_build;
  222. u32 phy_capability;
  223. u32 hw_min_tx_power;
  224. u32 hw_max_tx_power;
  225. u32 ht_cap_info;
  226. u32 vht_cap_info;
  227. struct targetdef *targetdef;
  228. struct hostdef *hostdef;
  229. bool p2p;
  230. struct {
  231. void *priv;
  232. const struct ath10k_hif_ops *ops;
  233. } hif;
  234. wait_queue_head_t event_queue;
  235. bool is_target_paused;
  236. struct ath10k_bmi bmi;
  237. struct ath10k_wmi wmi;
  238. struct ath10k_htc htc;
  239. struct ath10k_htt htt;
  240. struct ath10k_hw_params {
  241. u32 id;
  242. const char *name;
  243. u32 patch_load_addr;
  244. struct ath10k_hw_params_fw {
  245. const char *dir;
  246. const char *fw;
  247. const char *otp;
  248. const char *board;
  249. } fw;
  250. } hw_params;
  251. struct {
  252. struct completion started;
  253. struct completion completed;
  254. struct completion on_channel;
  255. struct timer_list timeout;
  256. bool is_roc;
  257. bool in_progress;
  258. bool aborting;
  259. int vdev_id;
  260. int roc_freq;
  261. } scan;
  262. struct {
  263. struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
  264. } mac;
  265. /* should never be NULL; needed for regular htt rx */
  266. struct ieee80211_channel *rx_channel;
  267. /* valid during scan; needed for mgmt rx during scan */
  268. struct ieee80211_channel *scan_channel;
  269. int free_vdev_map;
  270. int monitor_vdev_id;
  271. bool monitor_enabled;
  272. bool monitor_present;
  273. unsigned int filter_flags;
  274. struct wmi_pdev_set_wmm_params_arg wmm_params;
  275. struct completion install_key_done;
  276. struct completion vdev_setup_done;
  277. struct workqueue_struct *workqueue;
  278. /* prevents concurrent FW reconfiguration */
  279. struct mutex conf_mutex;
  280. /* protects shared structure data */
  281. spinlock_t data_lock;
  282. struct list_head peers;
  283. wait_queue_head_t peer_mapping_wq;
  284. struct work_struct offchan_tx_work;
  285. struct sk_buff_head offchan_tx_queue;
  286. struct completion offchan_tx_completed;
  287. struct sk_buff *offchan_tx_skb;
  288. enum ath10k_state state;
  289. #ifdef CONFIG_ATH10K_DEBUGFS
  290. struct ath10k_debug debug;
  291. #endif
  292. };
  293. struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
  294. const struct ath10k_hif_ops *hif_ops);
  295. void ath10k_core_destroy(struct ath10k *ar);
  296. int ath10k_core_start(struct ath10k *ar);
  297. void ath10k_core_stop(struct ath10k *ar);
  298. int ath10k_core_register(struct ath10k *ar);
  299. void ath10k_core_unregister(struct ath10k *ar);
  300. #endif /* _CORE_H_ */