iwl-agn.c 104 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/mac80211.h>
  42. #include <asm/div64.h>
  43. #define DRV_NAME "iwlagn"
  44. #include "iwl-eeprom.h"
  45. #include "iwl-dev.h"
  46. #include "iwl-core.h"
  47. #include "iwl-io.h"
  48. #include "iwl-helpers.h"
  49. #include "iwl-sta.h"
  50. #include "iwl-calib.h"
  51. /******************************************************************************
  52. *
  53. * module boiler plate
  54. *
  55. ******************************************************************************/
  56. /*
  57. * module name, copyright, version, etc.
  58. */
  59. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  60. #ifdef CONFIG_IWLWIFI_DEBUG
  61. #define VD "d"
  62. #else
  63. #define VD
  64. #endif
  65. #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
  66. #define VS "s"
  67. #else
  68. #define VS
  69. #endif
  70. #define DRV_VERSION IWLWIFI_VERSION VD VS
  71. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  72. MODULE_VERSION(DRV_VERSION);
  73. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  74. MODULE_LICENSE("GPL");
  75. MODULE_ALIAS("iwl4965");
  76. /*************** STATION TABLE MANAGEMENT ****
  77. * mac80211 should be examined to determine if sta_info is duplicating
  78. * the functionality provided here
  79. */
  80. /**************************************************************/
  81. /**
  82. * iwl_commit_rxon - commit staging_rxon to hardware
  83. *
  84. * The RXON command in staging_rxon is committed to the hardware and
  85. * the active_rxon structure is updated with the new data. This
  86. * function correctly transitions out of the RXON_ASSOC_MSK state if
  87. * a HW tune is required based on the RXON structure changes.
  88. */
  89. static int iwl_commit_rxon(struct iwl_priv *priv)
  90. {
  91. /* cast away the const for active_rxon in this function */
  92. struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  93. int ret;
  94. bool new_assoc =
  95. !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
  96. if (!iwl_is_alive(priv))
  97. return -EBUSY;
  98. /* always get timestamp with Rx frame */
  99. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  100. /* allow CTS-to-self if possible. this is relevant only for
  101. * 5000, but will not damage 4965 */
  102. priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
  103. ret = iwl_check_rxon_cmd(priv);
  104. if (ret) {
  105. IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
  106. return -EINVAL;
  107. }
  108. /* If we don't need to send a full RXON, we can use
  109. * iwl_rxon_assoc_cmd which is used to reconfigure filter
  110. * and other flags for the current radio configuration. */
  111. if (!iwl_full_rxon_required(priv)) {
  112. ret = iwl_send_rxon_assoc(priv);
  113. if (ret) {
  114. IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
  115. return ret;
  116. }
  117. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  118. return 0;
  119. }
  120. /* station table will be cleared */
  121. priv->assoc_station_added = 0;
  122. /* If we are currently associated and the new config requires
  123. * an RXON_ASSOC and the new config wants the associated mask enabled,
  124. * we must clear the associated from the active configuration
  125. * before we apply the new config */
  126. if (iwl_is_associated(priv) && new_assoc) {
  127. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  128. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  129. ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
  130. sizeof(struct iwl_rxon_cmd),
  131. &priv->active_rxon);
  132. /* If the mask clearing failed then we set
  133. * active_rxon back to what it was previously */
  134. if (ret) {
  135. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  136. IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
  137. return ret;
  138. }
  139. }
  140. IWL_DEBUG_INFO("Sending RXON\n"
  141. "* with%s RXON_FILTER_ASSOC_MSK\n"
  142. "* channel = %d\n"
  143. "* bssid = %pM\n",
  144. (new_assoc ? "" : "out"),
  145. le16_to_cpu(priv->staging_rxon.channel),
  146. priv->staging_rxon.bssid_addr);
  147. iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
  148. /* Apply the new configuration
  149. * RXON unassoc clears the station table in uCode, send it before
  150. * we add the bcast station. If assoc bit is set, we will send RXON
  151. * after having added the bcast and bssid station.
  152. */
  153. if (!new_assoc) {
  154. ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
  155. sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
  156. if (ret) {
  157. IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
  158. return ret;
  159. }
  160. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  161. }
  162. iwl_clear_stations_table(priv);
  163. if (!priv->error_recovering)
  164. priv->start_calib = 0;
  165. /* Add the broadcast address so we can send broadcast frames */
  166. if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
  167. IWL_INVALID_STATION) {
  168. IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
  169. return -EIO;
  170. }
  171. /* If we have set the ASSOC_MSK and we are in BSS mode then
  172. * add the IWL_AP_ID to the station rate table */
  173. if (new_assoc) {
  174. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  175. ret = iwl_rxon_add_station(priv,
  176. priv->active_rxon.bssid_addr, 1);
  177. if (ret == IWL_INVALID_STATION) {
  178. IWL_ERR(priv,
  179. "Error adding AP address for TX.\n");
  180. return -EIO;
  181. }
  182. priv->assoc_station_added = 1;
  183. if (priv->default_wep_key &&
  184. iwl_send_static_wepkey_cmd(priv, 0))
  185. IWL_ERR(priv,
  186. "Could not send WEP static key.\n");
  187. }
  188. /* Apply the new configuration
  189. * RXON assoc doesn't clear the station table in uCode,
  190. */
  191. ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
  192. sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
  193. if (ret) {
  194. IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
  195. return ret;
  196. }
  197. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  198. }
  199. iwl_init_sensitivity(priv);
  200. /* If we issue a new RXON command which required a tune then we must
  201. * send a new TXPOWER command or we won't be able to Tx any frames */
  202. ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
  203. if (ret) {
  204. IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
  205. return ret;
  206. }
  207. return 0;
  208. }
  209. void iwl_update_chain_flags(struct iwl_priv *priv)
  210. {
  211. iwl_set_rxon_chain(priv);
  212. iwl_commit_rxon(priv);
  213. }
  214. static void iwl_clear_free_frames(struct iwl_priv *priv)
  215. {
  216. struct list_head *element;
  217. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  218. priv->frames_count);
  219. while (!list_empty(&priv->free_frames)) {
  220. element = priv->free_frames.next;
  221. list_del(element);
  222. kfree(list_entry(element, struct iwl_frame, list));
  223. priv->frames_count--;
  224. }
  225. if (priv->frames_count) {
  226. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  227. priv->frames_count);
  228. priv->frames_count = 0;
  229. }
  230. }
  231. static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
  232. {
  233. struct iwl_frame *frame;
  234. struct list_head *element;
  235. if (list_empty(&priv->free_frames)) {
  236. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  237. if (!frame) {
  238. IWL_ERR(priv, "Could not allocate frame!\n");
  239. return NULL;
  240. }
  241. priv->frames_count++;
  242. return frame;
  243. }
  244. element = priv->free_frames.next;
  245. list_del(element);
  246. return list_entry(element, struct iwl_frame, list);
  247. }
  248. static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
  249. {
  250. memset(frame, 0, sizeof(*frame));
  251. list_add(&frame->list, &priv->free_frames);
  252. }
  253. static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
  254. struct ieee80211_hdr *hdr,
  255. int left)
  256. {
  257. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  258. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  259. (priv->iw_mode != NL80211_IFTYPE_AP)))
  260. return 0;
  261. if (priv->ibss_beacon->len > left)
  262. return 0;
  263. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  264. return priv->ibss_beacon->len;
  265. }
  266. static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
  267. struct iwl_frame *frame, u8 rate)
  268. {
  269. struct iwl_tx_beacon_cmd *tx_beacon_cmd;
  270. unsigned int frame_size;
  271. tx_beacon_cmd = &frame->u.beacon;
  272. memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
  273. tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
  274. tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  275. frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
  276. sizeof(frame->u) - sizeof(*tx_beacon_cmd));
  277. BUG_ON(frame_size > MAX_MPDU_SIZE);
  278. tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
  279. if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
  280. tx_beacon_cmd->tx.rate_n_flags =
  281. iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
  282. else
  283. tx_beacon_cmd->tx.rate_n_flags =
  284. iwl_hw_set_rate_n_flags(rate, 0);
  285. tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
  286. TX_CMD_FLG_TSF_MSK |
  287. TX_CMD_FLG_STA_RATE_MSK;
  288. return sizeof(*tx_beacon_cmd) + frame_size;
  289. }
  290. static int iwl_send_beacon_cmd(struct iwl_priv *priv)
  291. {
  292. struct iwl_frame *frame;
  293. unsigned int frame_size;
  294. int rc;
  295. u8 rate;
  296. frame = iwl_get_free_frame(priv);
  297. if (!frame) {
  298. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  299. "command.\n");
  300. return -ENOMEM;
  301. }
  302. rate = iwl_rate_get_lowest_plcp(priv);
  303. frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
  304. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  305. &frame->u.cmd[0]);
  306. iwl_free_frame(priv, frame);
  307. return rc;
  308. }
  309. static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
  310. {
  311. struct iwl_tfd_tb *tb = &tfd->tbs[idx];
  312. dma_addr_t addr = get_unaligned_le32(&tb->lo);
  313. if (sizeof(dma_addr_t) > sizeof(u32))
  314. addr |=
  315. ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
  316. return addr;
  317. }
  318. static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
  319. {
  320. struct iwl_tfd_tb *tb = &tfd->tbs[idx];
  321. return le16_to_cpu(tb->hi_n_len) >> 4;
  322. }
  323. static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
  324. dma_addr_t addr, u16 len)
  325. {
  326. struct iwl_tfd_tb *tb = &tfd->tbs[idx];
  327. u16 hi_n_len = len << 4;
  328. put_unaligned_le32(addr, &tb->lo);
  329. if (sizeof(dma_addr_t) > sizeof(u32))
  330. hi_n_len |= ((addr >> 16) >> 16) & 0xF;
  331. tb->hi_n_len = cpu_to_le16(hi_n_len);
  332. tfd->num_tbs = idx + 1;
  333. }
  334. static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
  335. {
  336. return tfd->num_tbs & 0x1f;
  337. }
  338. /**
  339. * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
  340. * @priv - driver private data
  341. * @txq - tx queue
  342. *
  343. * Does NOT advance any TFD circular buffer read/write indexes
  344. * Does NOT free the TFD itself (which is within circular buffer)
  345. */
  346. void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
  347. {
  348. struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
  349. struct iwl_tfd *tfd;
  350. struct pci_dev *dev = priv->pci_dev;
  351. int index = txq->q.read_ptr;
  352. int i;
  353. int num_tbs;
  354. tfd = &tfd_tmp[index];
  355. /* Sanity check on number of chunks */
  356. num_tbs = iwl_tfd_get_num_tbs(tfd);
  357. if (num_tbs >= IWL_NUM_OF_TBS) {
  358. IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
  359. /* @todo issue fatal error, it is quite serious situation */
  360. return;
  361. }
  362. /* Unmap tx_cmd */
  363. if (num_tbs)
  364. pci_unmap_single(dev,
  365. pci_unmap_addr(&txq->cmd[index]->meta, mapping),
  366. pci_unmap_len(&txq->cmd[index]->meta, len),
  367. PCI_DMA_TODEVICE);
  368. /* Unmap chunks, if any. */
  369. for (i = 1; i < num_tbs; i++) {
  370. pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
  371. iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
  372. if (txq->txb) {
  373. dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
  374. txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
  375. }
  376. }
  377. }
  378. int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
  379. struct iwl_tx_queue *txq,
  380. dma_addr_t addr, u16 len,
  381. u8 reset, u8 pad)
  382. {
  383. struct iwl_queue *q;
  384. struct iwl_tfd *tfd, *tfd_tmp;
  385. u32 num_tbs;
  386. q = &txq->q;
  387. tfd_tmp = (struct iwl_tfd *)txq->tfds;
  388. tfd = &tfd_tmp[q->write_ptr];
  389. if (reset)
  390. memset(tfd, 0, sizeof(*tfd));
  391. num_tbs = iwl_tfd_get_num_tbs(tfd);
  392. /* Each TFD can point to a maximum 20 Tx buffers */
  393. if (num_tbs >= IWL_NUM_OF_TBS) {
  394. IWL_ERR(priv, "Error can not send more than %d chunks\n",
  395. IWL_NUM_OF_TBS);
  396. return -EINVAL;
  397. }
  398. BUG_ON(addr & ~DMA_BIT_MASK(36));
  399. if (unlikely(addr & ~IWL_TX_DMA_MASK))
  400. IWL_ERR(priv, "Unaligned address = %llx\n",
  401. (unsigned long long)addr);
  402. iwl_tfd_set_tb(tfd, num_tbs, addr, len);
  403. return 0;
  404. }
  405. /*
  406. * Tell nic where to find circular buffer of Tx Frame Descriptors for
  407. * given Tx queue, and enable the DMA channel used for that queue.
  408. *
  409. * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
  410. * channels supported in hardware.
  411. */
  412. int iwl_hw_tx_queue_init(struct iwl_priv *priv,
  413. struct iwl_tx_queue *txq)
  414. {
  415. int ret;
  416. unsigned long flags;
  417. int txq_id = txq->q.id;
  418. spin_lock_irqsave(&priv->lock, flags);
  419. ret = iwl_grab_nic_access(priv);
  420. if (ret) {
  421. spin_unlock_irqrestore(&priv->lock, flags);
  422. return ret;
  423. }
  424. /* Circular buffer (TFD queue in DRAM) physical base address */
  425. iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
  426. txq->q.dma_addr >> 8);
  427. iwl_release_nic_access(priv);
  428. spin_unlock_irqrestore(&priv->lock, flags);
  429. return 0;
  430. }
  431. /******************************************************************************
  432. *
  433. * Misc. internal state and helper functions
  434. *
  435. ******************************************************************************/
  436. static void iwl_ht_conf(struct iwl_priv *priv,
  437. struct ieee80211_bss_conf *bss_conf)
  438. {
  439. struct ieee80211_sta_ht_cap *ht_conf;
  440. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  441. struct ieee80211_sta *sta;
  442. IWL_DEBUG_MAC80211("enter: \n");
  443. if (!iwl_conf->is_ht)
  444. return;
  445. /*
  446. * It is totally wrong to base global information on something
  447. * that is valid only when associated, alas, this driver works
  448. * that way and I don't know how to fix it.
  449. */
  450. rcu_read_lock();
  451. sta = ieee80211_find_sta(priv->hw, priv->bssid);
  452. if (!sta) {
  453. rcu_read_unlock();
  454. return;
  455. }
  456. ht_conf = &sta->ht_cap;
  457. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  458. iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
  459. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  460. iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
  461. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  462. iwl_conf->max_amsdu_size =
  463. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  464. iwl_conf->supported_chan_width =
  465. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
  466. /*
  467. * XXX: The HT configuration needs to be moved into iwl_mac_config()
  468. * to be done there correctly.
  469. */
  470. iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
  471. if (conf_is_ht40_minus(&priv->hw->conf))
  472. iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  473. else if (conf_is_ht40_plus(&priv->hw->conf))
  474. iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  475. /* If no above or below channel supplied disable FAT channel */
  476. if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
  477. iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  478. iwl_conf->supported_chan_width = 0;
  479. iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
  480. memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
  481. iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
  482. iwl_conf->ht_protection =
  483. bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  484. iwl_conf->non_GF_STA_present =
  485. !!(bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  486. rcu_read_unlock();
  487. IWL_DEBUG_MAC80211("leave\n");
  488. }
  489. /*
  490. * QoS support
  491. */
  492. static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  493. {
  494. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  495. return;
  496. priv->qos_data.def_qos_parm.qos_flags = 0;
  497. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  498. !priv->qos_data.qos_cap.q_AP.txop_request)
  499. priv->qos_data.def_qos_parm.qos_flags |=
  500. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  501. if (priv->qos_data.qos_active)
  502. priv->qos_data.def_qos_parm.qos_flags |=
  503. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  504. if (priv->current_ht_config.is_ht)
  505. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  506. if (force || iwl_is_associated(priv)) {
  507. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  508. priv->qos_data.qos_active,
  509. priv->qos_data.def_qos_parm.qos_flags);
  510. iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
  511. sizeof(struct iwl_qosparam_cmd),
  512. &priv->qos_data.def_qos_parm, NULL);
  513. }
  514. }
  515. #define MAX_UCODE_BEACON_INTERVAL 4096
  516. static u16 iwl_adjust_beacon_interval(u16 beacon_val)
  517. {
  518. u16 new_val = 0;
  519. u16 beacon_factor = 0;
  520. beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  521. / MAX_UCODE_BEACON_INTERVAL;
  522. new_val = beacon_val / beacon_factor;
  523. return new_val;
  524. }
  525. static void iwl_setup_rxon_timing(struct iwl_priv *priv)
  526. {
  527. u64 tsf;
  528. s32 interval_tm, rem;
  529. unsigned long flags;
  530. struct ieee80211_conf *conf = NULL;
  531. u16 beacon_int = 0;
  532. conf = ieee80211_get_hw_conf(priv->hw);
  533. spin_lock_irqsave(&priv->lock, flags);
  534. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  535. priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
  536. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  537. beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
  538. priv->rxon_timing.atim_window = 0;
  539. } else {
  540. beacon_int = iwl_adjust_beacon_interval(conf->beacon_int);
  541. /* TODO: we need to get atim_window from upper stack
  542. * for now we set to 0 */
  543. priv->rxon_timing.atim_window = 0;
  544. }
  545. priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
  546. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  547. interval_tm = beacon_int * 1024;
  548. rem = do_div(tsf, interval_tm);
  549. priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  550. spin_unlock_irqrestore(&priv->lock, flags);
  551. IWL_DEBUG_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
  552. le16_to_cpu(priv->rxon_timing.beacon_interval),
  553. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  554. le16_to_cpu(priv->rxon_timing.atim_window));
  555. }
  556. static int iwl_set_mode(struct iwl_priv *priv, int mode)
  557. {
  558. iwl_connection_init_rx_config(priv, mode);
  559. iwl_set_rxon_chain(priv);
  560. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  561. iwl_clear_stations_table(priv);
  562. /* dont commit rxon if rf-kill is on*/
  563. if (!iwl_is_ready_rf(priv))
  564. return -EAGAIN;
  565. cancel_delayed_work(&priv->scan_check);
  566. if (iwl_scan_cancel_timeout(priv, 100)) {
  567. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  568. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  569. return -EAGAIN;
  570. }
  571. iwl_commit_rxon(priv);
  572. return 0;
  573. }
  574. /******************************************************************************
  575. *
  576. * Generic RX handler implementations
  577. *
  578. ******************************************************************************/
  579. static void iwl_rx_reply_alive(struct iwl_priv *priv,
  580. struct iwl_rx_mem_buffer *rxb)
  581. {
  582. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  583. struct iwl_alive_resp *palive;
  584. struct delayed_work *pwork;
  585. palive = &pkt->u.alive_frame;
  586. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  587. "0x%01X 0x%01X\n",
  588. palive->is_valid, palive->ver_type,
  589. palive->ver_subtype);
  590. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  591. IWL_DEBUG_INFO("Initialization Alive received.\n");
  592. memcpy(&priv->card_alive_init,
  593. &pkt->u.alive_frame,
  594. sizeof(struct iwl_init_alive_resp));
  595. pwork = &priv->init_alive_start;
  596. } else {
  597. IWL_DEBUG_INFO("Runtime Alive received.\n");
  598. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  599. sizeof(struct iwl_alive_resp));
  600. pwork = &priv->alive_start;
  601. }
  602. /* We delay the ALIVE response by 5ms to
  603. * give the HW RF Kill time to activate... */
  604. if (palive->is_valid == UCODE_VALID_OK)
  605. queue_delayed_work(priv->workqueue, pwork,
  606. msecs_to_jiffies(5));
  607. else
  608. IWL_WARN(priv, "uCode did not respond OK.\n");
  609. }
  610. static void iwl_rx_reply_error(struct iwl_priv *priv,
  611. struct iwl_rx_mem_buffer *rxb)
  612. {
  613. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  614. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  615. "seq 0x%04X ser 0x%08X\n",
  616. le32_to_cpu(pkt->u.err_resp.error_type),
  617. get_cmd_string(pkt->u.err_resp.cmd_id),
  618. pkt->u.err_resp.cmd_id,
  619. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  620. le32_to_cpu(pkt->u.err_resp.error_info));
  621. }
  622. static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  623. struct iwl_rx_mem_buffer *rxb)
  624. {
  625. #ifdef CONFIG_IWLWIFI_DEBUG
  626. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  627. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  628. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  629. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  630. #endif
  631. }
  632. static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  633. struct iwl_rx_mem_buffer *rxb)
  634. {
  635. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  636. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  637. "notification for %s:\n",
  638. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  639. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  640. }
  641. static void iwl_bg_beacon_update(struct work_struct *work)
  642. {
  643. struct iwl_priv *priv =
  644. container_of(work, struct iwl_priv, beacon_update);
  645. struct sk_buff *beacon;
  646. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  647. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  648. if (!beacon) {
  649. IWL_ERR(priv, "update beacon failed\n");
  650. return;
  651. }
  652. mutex_lock(&priv->mutex);
  653. /* new beacon skb is allocated every time; dispose previous.*/
  654. if (priv->ibss_beacon)
  655. dev_kfree_skb(priv->ibss_beacon);
  656. priv->ibss_beacon = beacon;
  657. mutex_unlock(&priv->mutex);
  658. iwl_send_beacon_cmd(priv);
  659. }
  660. /**
  661. * iwl_bg_statistics_periodic - Timer callback to queue statistics
  662. *
  663. * This callback is provided in order to send a statistics request.
  664. *
  665. * This timer function is continually reset to execute within
  666. * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
  667. * was received. We need to ensure we receive the statistics in order
  668. * to update the temperature used for calibrating the TXPOWER.
  669. */
  670. static void iwl_bg_statistics_periodic(unsigned long data)
  671. {
  672. struct iwl_priv *priv = (struct iwl_priv *)data;
  673. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  674. return;
  675. /* dont send host command if rf-kill is on */
  676. if (!iwl_is_ready_rf(priv))
  677. return;
  678. iwl_send_statistics_request(priv, CMD_ASYNC);
  679. }
  680. static void iwl_rx_beacon_notif(struct iwl_priv *priv,
  681. struct iwl_rx_mem_buffer *rxb)
  682. {
  683. #ifdef CONFIG_IWLWIFI_DEBUG
  684. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  685. struct iwl4965_beacon_notif *beacon =
  686. (struct iwl4965_beacon_notif *)pkt->u.raw;
  687. u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  688. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  689. "tsf %d %d rate %d\n",
  690. le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
  691. beacon->beacon_notify_hdr.failure_frame,
  692. le32_to_cpu(beacon->ibss_mgr_status),
  693. le32_to_cpu(beacon->high_tsf),
  694. le32_to_cpu(beacon->low_tsf), rate);
  695. #endif
  696. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  697. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  698. queue_work(priv->workqueue, &priv->beacon_update);
  699. }
  700. /* Handle notification from uCode that card's power state is changing
  701. * due to software, hardware, or critical temperature RFKILL */
  702. static void iwl_rx_card_state_notif(struct iwl_priv *priv,
  703. struct iwl_rx_mem_buffer *rxb)
  704. {
  705. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  706. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  707. unsigned long status = priv->status;
  708. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  709. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  710. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  711. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  712. RF_CARD_DISABLED)) {
  713. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  714. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  715. if (!iwl_grab_nic_access(priv)) {
  716. iwl_write_direct32(
  717. priv, HBUS_TARG_MBX_C,
  718. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  719. iwl_release_nic_access(priv);
  720. }
  721. if (!(flags & RXON_CARD_DISABLED)) {
  722. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  723. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  724. if (!iwl_grab_nic_access(priv)) {
  725. iwl_write_direct32(
  726. priv, HBUS_TARG_MBX_C,
  727. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  728. iwl_release_nic_access(priv);
  729. }
  730. }
  731. if (flags & RF_CARD_DISABLED) {
  732. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  733. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  734. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  735. if (!iwl_grab_nic_access(priv))
  736. iwl_release_nic_access(priv);
  737. }
  738. }
  739. if (flags & HW_CARD_DISABLED)
  740. set_bit(STATUS_RF_KILL_HW, &priv->status);
  741. else
  742. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  743. if (flags & SW_CARD_DISABLED)
  744. set_bit(STATUS_RF_KILL_SW, &priv->status);
  745. else
  746. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  747. if (!(flags & RXON_CARD_DISABLED))
  748. iwl_scan_cancel(priv);
  749. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  750. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  751. (test_bit(STATUS_RF_KILL_SW, &status) !=
  752. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  753. queue_work(priv->workqueue, &priv->rf_kill);
  754. else
  755. wake_up_interruptible(&priv->wait_command_queue);
  756. }
  757. int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
  758. {
  759. int ret;
  760. unsigned long flags;
  761. spin_lock_irqsave(&priv->lock, flags);
  762. ret = iwl_grab_nic_access(priv);
  763. if (ret)
  764. goto err;
  765. if (src == IWL_PWR_SRC_VAUX) {
  766. u32 val;
  767. ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE,
  768. &val);
  769. if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
  770. iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  771. APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
  772. ~APMG_PS_CTRL_MSK_PWR_SRC);
  773. } else {
  774. iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  775. APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
  776. ~APMG_PS_CTRL_MSK_PWR_SRC);
  777. }
  778. iwl_release_nic_access(priv);
  779. err:
  780. spin_unlock_irqrestore(&priv->lock, flags);
  781. return ret;
  782. }
  783. /**
  784. * iwl_setup_rx_handlers - Initialize Rx handler callbacks
  785. *
  786. * Setup the RX handlers for each of the reply types sent from the uCode
  787. * to the host.
  788. *
  789. * This function chains into the hardware specific files for them to setup
  790. * any hardware specific handlers as well.
  791. */
  792. static void iwl_setup_rx_handlers(struct iwl_priv *priv)
  793. {
  794. priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
  795. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  796. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  797. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  798. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  799. iwl_rx_pm_debug_statistics_notif;
  800. priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
  801. /*
  802. * The same handler is used for both the REPLY to a discrete
  803. * statistics request from the host as well as for the periodic
  804. * statistics notifications (after received beacons) from the uCode.
  805. */
  806. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
  807. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
  808. iwl_setup_spectrum_handlers(priv);
  809. iwl_setup_rx_scan_handlers(priv);
  810. /* status change handler */
  811. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
  812. priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
  813. iwl_rx_missed_beacon_notif;
  814. /* Rx handlers */
  815. priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
  816. priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
  817. /* block ack */
  818. priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
  819. /* Set up hardware specific Rx handlers */
  820. priv->cfg->ops->lib->rx_handler_setup(priv);
  821. }
  822. /**
  823. * iwl_rx_handle - Main entry function for receiving responses from uCode
  824. *
  825. * Uses the priv->rx_handlers callback function array to invoke
  826. * the appropriate handlers, including command responses,
  827. * frame-received notifications, and other notifications.
  828. */
  829. void iwl_rx_handle(struct iwl_priv *priv)
  830. {
  831. struct iwl_rx_mem_buffer *rxb;
  832. struct iwl_rx_packet *pkt;
  833. struct iwl_rx_queue *rxq = &priv->rxq;
  834. u32 r, i;
  835. int reclaim;
  836. unsigned long flags;
  837. u8 fill_rx = 0;
  838. u32 count = 8;
  839. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  840. * buffer that the driver may process (last buffer filled by ucode). */
  841. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  842. i = rxq->read;
  843. /* Rx interrupt, but nothing sent from uCode */
  844. if (i == r)
  845. IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i);
  846. if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  847. fill_rx = 1;
  848. while (i != r) {
  849. rxb = rxq->queue[i];
  850. /* If an RXB doesn't have a Rx queue slot associated with it,
  851. * then a bug has been introduced in the queue refilling
  852. * routines -- catch it here */
  853. BUG_ON(rxb == NULL);
  854. rxq->queue[i] = NULL;
  855. dma_sync_single_range_for_cpu(
  856. &priv->pci_dev->dev, rxb->real_dma_addr,
  857. rxb->aligned_dma_addr - rxb->real_dma_addr,
  858. priv->hw_params.rx_buf_size,
  859. PCI_DMA_FROMDEVICE);
  860. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  861. /* Reclaim a command buffer only if this packet is a response
  862. * to a (driver-originated) command.
  863. * If the packet (e.g. Rx frame) originated from uCode,
  864. * there is no command buffer to reclaim.
  865. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  866. * but apparently a few don't get set; catch them here. */
  867. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  868. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  869. (pkt->hdr.cmd != REPLY_RX) &&
  870. (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
  871. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  872. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  873. (pkt->hdr.cmd != REPLY_TX);
  874. /* Based on type of command response or notification,
  875. * handle those that need handling via function in
  876. * rx_handlers table. See iwl_setup_rx_handlers() */
  877. if (priv->rx_handlers[pkt->hdr.cmd]) {
  878. IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r,
  879. i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  880. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  881. } else {
  882. /* No handling needed */
  883. IWL_DEBUG(IWL_DL_RX,
  884. "r %d i %d No handler needed for %s, 0x%02x\n",
  885. r, i, get_cmd_string(pkt->hdr.cmd),
  886. pkt->hdr.cmd);
  887. }
  888. if (reclaim) {
  889. /* Invoke any callbacks, transfer the skb to caller, and
  890. * fire off the (possibly) blocking iwl_send_cmd()
  891. * as we reclaim the driver command queue */
  892. if (rxb && rxb->skb)
  893. iwl_tx_cmd_complete(priv, rxb);
  894. else
  895. IWL_WARN(priv, "Claim null rxb?\n");
  896. }
  897. /* For now we just don't re-use anything. We can tweak this
  898. * later to try and re-use notification packets and SKBs that
  899. * fail to Rx correctly */
  900. if (rxb->skb != NULL) {
  901. priv->alloc_rxb_skb--;
  902. dev_kfree_skb_any(rxb->skb);
  903. rxb->skb = NULL;
  904. }
  905. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  906. priv->hw_params.rx_buf_size + 256,
  907. PCI_DMA_FROMDEVICE);
  908. spin_lock_irqsave(&rxq->lock, flags);
  909. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  910. spin_unlock_irqrestore(&rxq->lock, flags);
  911. i = (i + 1) & RX_QUEUE_MASK;
  912. /* If there are a lot of unused frames,
  913. * restock the Rx queue so ucode wont assert. */
  914. if (fill_rx) {
  915. count++;
  916. if (count >= 8) {
  917. priv->rxq.read = i;
  918. iwl_rx_queue_restock(priv);
  919. count = 0;
  920. }
  921. }
  922. }
  923. /* Backtrack one entry */
  924. priv->rxq.read = i;
  925. iwl_rx_queue_restock(priv);
  926. }
  927. /* call this function to flush any scheduled tasklet */
  928. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  929. {
  930. /* wait to make sure we flush pending tasklet*/
  931. synchronize_irq(priv->pci_dev->irq);
  932. tasklet_kill(&priv->irq_tasklet);
  933. }
  934. static void iwl_error_recovery(struct iwl_priv *priv)
  935. {
  936. unsigned long flags;
  937. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  938. sizeof(priv->staging_rxon));
  939. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  940. iwl_commit_rxon(priv);
  941. iwl_rxon_add_station(priv, priv->bssid, 1);
  942. spin_lock_irqsave(&priv->lock, flags);
  943. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  944. priv->error_recovering = 0;
  945. spin_unlock_irqrestore(&priv->lock, flags);
  946. }
  947. static void iwl_irq_tasklet(struct iwl_priv *priv)
  948. {
  949. u32 inta, handled = 0;
  950. u32 inta_fh;
  951. unsigned long flags;
  952. #ifdef CONFIG_IWLWIFI_DEBUG
  953. u32 inta_mask;
  954. #endif
  955. spin_lock_irqsave(&priv->lock, flags);
  956. /* Ack/clear/reset pending uCode interrupts.
  957. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  958. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  959. inta = iwl_read32(priv, CSR_INT);
  960. iwl_write32(priv, CSR_INT, inta);
  961. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  962. * Any new interrupts that happen after this, either while we're
  963. * in this tasklet, or later, will show up in next ISR/tasklet. */
  964. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  965. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  966. #ifdef CONFIG_IWLWIFI_DEBUG
  967. if (priv->debug_level & IWL_DL_ISR) {
  968. /* just for debug */
  969. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  970. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  971. inta, inta_mask, inta_fh);
  972. }
  973. #endif
  974. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  975. * atomic, make sure that inta covers all the interrupts that
  976. * we've discovered, even if FH interrupt came in just after
  977. * reading CSR_INT. */
  978. if (inta_fh & CSR49_FH_INT_RX_MASK)
  979. inta |= CSR_INT_BIT_FH_RX;
  980. if (inta_fh & CSR49_FH_INT_TX_MASK)
  981. inta |= CSR_INT_BIT_FH_TX;
  982. /* Now service all interrupt bits discovered above. */
  983. if (inta & CSR_INT_BIT_HW_ERR) {
  984. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  985. /* Tell the device to stop sending interrupts */
  986. iwl_disable_interrupts(priv);
  987. iwl_irq_handle_error(priv);
  988. handled |= CSR_INT_BIT_HW_ERR;
  989. spin_unlock_irqrestore(&priv->lock, flags);
  990. return;
  991. }
  992. #ifdef CONFIG_IWLWIFI_DEBUG
  993. if (priv->debug_level & (IWL_DL_ISR)) {
  994. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  995. if (inta & CSR_INT_BIT_SCD)
  996. IWL_DEBUG_ISR("Scheduler finished to transmit "
  997. "the frame/frames.\n");
  998. /* Alive notification via Rx interrupt will do the real work */
  999. if (inta & CSR_INT_BIT_ALIVE)
  1000. IWL_DEBUG_ISR("Alive interrupt\n");
  1001. }
  1002. #endif
  1003. /* Safely ignore these bits for debug checks below */
  1004. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1005. /* HW RF KILL switch toggled */
  1006. if (inta & CSR_INT_BIT_RF_KILL) {
  1007. int hw_rf_kill = 0;
  1008. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  1009. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  1010. hw_rf_kill = 1;
  1011. IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n",
  1012. hw_rf_kill ? "disable radio" : "enable radio");
  1013. /* driver only loads ucode once setting the interface up.
  1014. * the driver allows loading the ucode even if the radio
  1015. * is killed. Hence update the killswitch state here. The
  1016. * rfkill handler will care about restarting if needed.
  1017. */
  1018. if (!test_bit(STATUS_ALIVE, &priv->status)) {
  1019. if (hw_rf_kill)
  1020. set_bit(STATUS_RF_KILL_HW, &priv->status);
  1021. else
  1022. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  1023. queue_work(priv->workqueue, &priv->rf_kill);
  1024. }
  1025. handled |= CSR_INT_BIT_RF_KILL;
  1026. }
  1027. /* Chip got too hot and stopped itself */
  1028. if (inta & CSR_INT_BIT_CT_KILL) {
  1029. IWL_ERR(priv, "Microcode CT kill error detected.\n");
  1030. handled |= CSR_INT_BIT_CT_KILL;
  1031. }
  1032. /* Error detected by uCode */
  1033. if (inta & CSR_INT_BIT_SW_ERR) {
  1034. IWL_ERR(priv, "Microcode SW error detected. "
  1035. " Restarting 0x%X.\n", inta);
  1036. iwl_irq_handle_error(priv);
  1037. handled |= CSR_INT_BIT_SW_ERR;
  1038. }
  1039. /* uCode wakes up after power-down sleep */
  1040. if (inta & CSR_INT_BIT_WAKEUP) {
  1041. IWL_DEBUG_ISR("Wakeup interrupt\n");
  1042. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1043. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1044. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1045. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1046. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1047. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1048. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1049. handled |= CSR_INT_BIT_WAKEUP;
  1050. }
  1051. /* All uCode command responses, including Tx command responses,
  1052. * Rx "responses" (frame-received notification), and other
  1053. * notifications from uCode come through here*/
  1054. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1055. iwl_rx_handle(priv);
  1056. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1057. }
  1058. if (inta & CSR_INT_BIT_FH_TX) {
  1059. IWL_DEBUG_ISR("Tx interrupt\n");
  1060. handled |= CSR_INT_BIT_FH_TX;
  1061. /* FH finished to write, send event */
  1062. priv->ucode_write_complete = 1;
  1063. wake_up_interruptible(&priv->wait_command_queue);
  1064. }
  1065. if (inta & ~handled)
  1066. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1067. if (inta & ~CSR_INI_SET_MASK) {
  1068. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1069. inta & ~CSR_INI_SET_MASK);
  1070. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1071. }
  1072. /* Re-enable all interrupts */
  1073. /* only Re-enable if diabled by irq */
  1074. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1075. iwl_enable_interrupts(priv);
  1076. #ifdef CONFIG_IWLWIFI_DEBUG
  1077. if (priv->debug_level & (IWL_DL_ISR)) {
  1078. inta = iwl_read32(priv, CSR_INT);
  1079. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1080. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1081. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1082. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1083. }
  1084. #endif
  1085. spin_unlock_irqrestore(&priv->lock, flags);
  1086. }
  1087. static irqreturn_t iwl_isr(int irq, void *data)
  1088. {
  1089. struct iwl_priv *priv = data;
  1090. u32 inta, inta_mask;
  1091. u32 inta_fh;
  1092. if (!priv)
  1093. return IRQ_NONE;
  1094. spin_lock(&priv->lock);
  1095. /* Disable (but don't clear!) interrupts here to avoid
  1096. * back-to-back ISRs and sporadic interrupts from our NIC.
  1097. * If we have something to service, the tasklet will re-enable ints.
  1098. * If we *don't* have something, we'll re-enable before leaving here. */
  1099. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1100. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1101. /* Discover which interrupts are active/pending */
  1102. inta = iwl_read32(priv, CSR_INT);
  1103. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1104. /* Ignore interrupt if there's nothing in NIC to service.
  1105. * This may be due to IRQ shared with another device,
  1106. * or due to sporadic interrupts thrown from our NIC. */
  1107. if (!inta && !inta_fh) {
  1108. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  1109. goto none;
  1110. }
  1111. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1112. /* Hardware disappeared. It might have already raised
  1113. * an interrupt */
  1114. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1115. goto unplugged;
  1116. }
  1117. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1118. inta, inta_mask, inta_fh);
  1119. inta &= ~CSR_INT_BIT_SCD;
  1120. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1121. if (likely(inta || inta_fh))
  1122. tasklet_schedule(&priv->irq_tasklet);
  1123. unplugged:
  1124. spin_unlock(&priv->lock);
  1125. return IRQ_HANDLED;
  1126. none:
  1127. /* re-enable interrupts here since we don't have anything to service. */
  1128. /* only Re-enable if diabled by irq */
  1129. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1130. iwl_enable_interrupts(priv);
  1131. spin_unlock(&priv->lock);
  1132. return IRQ_NONE;
  1133. }
  1134. /******************************************************************************
  1135. *
  1136. * uCode download functions
  1137. *
  1138. ******************************************************************************/
  1139. static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
  1140. {
  1141. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1142. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1143. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1144. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1145. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1146. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1147. }
  1148. static void iwl_nic_start(struct iwl_priv *priv)
  1149. {
  1150. /* Remove all resets to allow NIC to operate */
  1151. iwl_write32(priv, CSR_RESET, 0);
  1152. }
  1153. /**
  1154. * iwl_read_ucode - Read uCode images from disk file.
  1155. *
  1156. * Copy into buffers for card to fetch via bus-mastering
  1157. */
  1158. static int iwl_read_ucode(struct iwl_priv *priv)
  1159. {
  1160. struct iwl_ucode *ucode;
  1161. int ret = -EINVAL, index;
  1162. const struct firmware *ucode_raw;
  1163. const char *name_pre = priv->cfg->fw_name_pre;
  1164. const unsigned int api_max = priv->cfg->ucode_api_max;
  1165. const unsigned int api_min = priv->cfg->ucode_api_min;
  1166. char buf[25];
  1167. u8 *src;
  1168. size_t len;
  1169. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1170. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1171. * request_firmware() is synchronous, file is in memory on return. */
  1172. for (index = api_max; index >= api_min; index--) {
  1173. sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
  1174. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1175. if (ret < 0) {
  1176. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1177. buf, ret);
  1178. if (ret == -ENOENT)
  1179. continue;
  1180. else
  1181. goto error;
  1182. } else {
  1183. if (index < api_max)
  1184. IWL_ERR(priv, "Loaded firmware %s, "
  1185. "which is deprecated. "
  1186. "Please use API v%u instead.\n",
  1187. buf, api_max);
  1188. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  1189. buf, ucode_raw->size);
  1190. break;
  1191. }
  1192. }
  1193. if (ret < 0)
  1194. goto error;
  1195. /* Make sure that we got at least our header! */
  1196. if (ucode_raw->size < sizeof(*ucode)) {
  1197. IWL_ERR(priv, "File size way too small!\n");
  1198. ret = -EINVAL;
  1199. goto err_release;
  1200. }
  1201. /* Data from ucode file: header followed by uCode images */
  1202. ucode = (void *)ucode_raw->data;
  1203. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1204. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1205. inst_size = le32_to_cpu(ucode->inst_size);
  1206. data_size = le32_to_cpu(ucode->data_size);
  1207. init_size = le32_to_cpu(ucode->init_size);
  1208. init_data_size = le32_to_cpu(ucode->init_data_size);
  1209. boot_size = le32_to_cpu(ucode->boot_size);
  1210. /* api_ver should match the api version forming part of the
  1211. * firmware filename ... but we don't check for that and only rely
  1212. * on the API version read from firware header from here on forward */
  1213. if (api_ver < api_min || api_ver > api_max) {
  1214. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1215. "Driver supports v%u, firmware is v%u.\n",
  1216. api_max, api_ver);
  1217. priv->ucode_ver = 0;
  1218. ret = -EINVAL;
  1219. goto err_release;
  1220. }
  1221. if (api_ver != api_max)
  1222. IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
  1223. "got v%u. New firmware can be obtained "
  1224. "from http://www.intellinuxwireless.org.\n",
  1225. api_max, api_ver);
  1226. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1227. IWL_UCODE_MAJOR(priv->ucode_ver),
  1228. IWL_UCODE_MINOR(priv->ucode_ver),
  1229. IWL_UCODE_API(priv->ucode_ver),
  1230. IWL_UCODE_SERIAL(priv->ucode_ver));
  1231. IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
  1232. priv->ucode_ver);
  1233. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  1234. inst_size);
  1235. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  1236. data_size);
  1237. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  1238. init_size);
  1239. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  1240. init_data_size);
  1241. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  1242. boot_size);
  1243. /* Verify size of file vs. image size info in file's header */
  1244. if (ucode_raw->size < sizeof(*ucode) +
  1245. inst_size + data_size + init_size +
  1246. init_data_size + boot_size) {
  1247. IWL_DEBUG_INFO("uCode file size %d too small\n",
  1248. (int)ucode_raw->size);
  1249. ret = -EINVAL;
  1250. goto err_release;
  1251. }
  1252. /* Verify that uCode images will fit in card's SRAM */
  1253. if (inst_size > priv->hw_params.max_inst_size) {
  1254. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  1255. inst_size);
  1256. ret = -EINVAL;
  1257. goto err_release;
  1258. }
  1259. if (data_size > priv->hw_params.max_data_size) {
  1260. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  1261. data_size);
  1262. ret = -EINVAL;
  1263. goto err_release;
  1264. }
  1265. if (init_size > priv->hw_params.max_inst_size) {
  1266. IWL_DEBUG_INFO
  1267. ("uCode init instr len %d too large to fit in\n",
  1268. init_size);
  1269. ret = -EINVAL;
  1270. goto err_release;
  1271. }
  1272. if (init_data_size > priv->hw_params.max_data_size) {
  1273. IWL_DEBUG_INFO
  1274. ("uCode init data len %d too large to fit in\n",
  1275. init_data_size);
  1276. ret = -EINVAL;
  1277. goto err_release;
  1278. }
  1279. if (boot_size > priv->hw_params.max_bsm_size) {
  1280. IWL_DEBUG_INFO
  1281. ("uCode boot instr len %d too large to fit in\n",
  1282. boot_size);
  1283. ret = -EINVAL;
  1284. goto err_release;
  1285. }
  1286. /* Allocate ucode buffers for card's bus-master loading ... */
  1287. /* Runtime instructions and 2 copies of data:
  1288. * 1) unmodified from disk
  1289. * 2) backup cache for save/restore during power-downs */
  1290. priv->ucode_code.len = inst_size;
  1291. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1292. priv->ucode_data.len = data_size;
  1293. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1294. priv->ucode_data_backup.len = data_size;
  1295. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1296. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1297. !priv->ucode_data_backup.v_addr)
  1298. goto err_pci_alloc;
  1299. /* Initialization instructions and data */
  1300. if (init_size && init_data_size) {
  1301. priv->ucode_init.len = init_size;
  1302. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1303. priv->ucode_init_data.len = init_data_size;
  1304. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1305. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1306. goto err_pci_alloc;
  1307. }
  1308. /* Bootstrap (instructions only, no data) */
  1309. if (boot_size) {
  1310. priv->ucode_boot.len = boot_size;
  1311. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1312. if (!priv->ucode_boot.v_addr)
  1313. goto err_pci_alloc;
  1314. }
  1315. /* Copy images into buffers for card's bus-master reads ... */
  1316. /* Runtime instructions (first block of data in file) */
  1317. src = &ucode->data[0];
  1318. len = priv->ucode_code.len;
  1319. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  1320. memcpy(priv->ucode_code.v_addr, src, len);
  1321. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1322. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1323. /* Runtime data (2nd block)
  1324. * NOTE: Copy into backup buffer will be done in iwl_up() */
  1325. src = &ucode->data[inst_size];
  1326. len = priv->ucode_data.len;
  1327. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  1328. memcpy(priv->ucode_data.v_addr, src, len);
  1329. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1330. /* Initialization instructions (3rd block) */
  1331. if (init_size) {
  1332. src = &ucode->data[inst_size + data_size];
  1333. len = priv->ucode_init.len;
  1334. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  1335. len);
  1336. memcpy(priv->ucode_init.v_addr, src, len);
  1337. }
  1338. /* Initialization data (4th block) */
  1339. if (init_data_size) {
  1340. src = &ucode->data[inst_size + data_size + init_size];
  1341. len = priv->ucode_init_data.len;
  1342. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  1343. len);
  1344. memcpy(priv->ucode_init_data.v_addr, src, len);
  1345. }
  1346. /* Bootstrap instructions (5th block) */
  1347. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  1348. len = priv->ucode_boot.len;
  1349. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  1350. memcpy(priv->ucode_boot.v_addr, src, len);
  1351. /* We have our copies now, allow OS release its copies */
  1352. release_firmware(ucode_raw);
  1353. return 0;
  1354. err_pci_alloc:
  1355. IWL_ERR(priv, "failed to allocate pci memory\n");
  1356. ret = -ENOMEM;
  1357. iwl_dealloc_ucode_pci(priv);
  1358. err_release:
  1359. release_firmware(ucode_raw);
  1360. error:
  1361. return ret;
  1362. }
  1363. /* temporary */
  1364. static int iwl_mac_beacon_update(struct ieee80211_hw *hw,
  1365. struct sk_buff *skb);
  1366. /**
  1367. * iwl_alive_start - called after REPLY_ALIVE notification received
  1368. * from protocol/runtime uCode (initialization uCode's
  1369. * Alive gets handled by iwl_init_alive_start()).
  1370. */
  1371. static void iwl_alive_start(struct iwl_priv *priv)
  1372. {
  1373. int ret = 0;
  1374. IWL_DEBUG_INFO("Runtime Alive received.\n");
  1375. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  1376. /* We had an error bringing up the hardware, so take it
  1377. * all the way back down so we can try again */
  1378. IWL_DEBUG_INFO("Alive failed.\n");
  1379. goto restart;
  1380. }
  1381. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  1382. * This is a paranoid check, because we would not have gotten the
  1383. * "runtime" alive if code weren't properly loaded. */
  1384. if (iwl_verify_ucode(priv)) {
  1385. /* Runtime instruction load was bad;
  1386. * take it all the way back down so we can try again */
  1387. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  1388. goto restart;
  1389. }
  1390. iwl_clear_stations_table(priv);
  1391. ret = priv->cfg->ops->lib->alive_notify(priv);
  1392. if (ret) {
  1393. IWL_WARN(priv,
  1394. "Could not complete ALIVE transition [ntf]: %d\n", ret);
  1395. goto restart;
  1396. }
  1397. /* After the ALIVE response, we can send host commands to the uCode */
  1398. set_bit(STATUS_ALIVE, &priv->status);
  1399. if (iwl_is_rfkill(priv))
  1400. return;
  1401. ieee80211_wake_queues(priv->hw);
  1402. priv->active_rate = priv->rates_mask;
  1403. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  1404. if (iwl_is_associated(priv)) {
  1405. struct iwl_rxon_cmd *active_rxon =
  1406. (struct iwl_rxon_cmd *)&priv->active_rxon;
  1407. memcpy(&priv->staging_rxon, &priv->active_rxon,
  1408. sizeof(priv->staging_rxon));
  1409. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1410. } else {
  1411. /* Initialize our rx_config data */
  1412. iwl_connection_init_rx_config(priv, priv->iw_mode);
  1413. iwl_set_rxon_chain(priv);
  1414. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1415. }
  1416. /* Configure Bluetooth device coexistence support */
  1417. iwl_send_bt_config(priv);
  1418. iwl_reset_run_time_calib(priv);
  1419. /* Configure the adapter for unassociated operation */
  1420. iwl_commit_rxon(priv);
  1421. /* At this point, the NIC is initialized and operational */
  1422. iwl_rf_kill_ct_config(priv);
  1423. iwl_leds_register(priv);
  1424. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  1425. set_bit(STATUS_READY, &priv->status);
  1426. wake_up_interruptible(&priv->wait_command_queue);
  1427. if (priv->error_recovering)
  1428. iwl_error_recovery(priv);
  1429. iwl_power_update_mode(priv, 1);
  1430. /* reassociate for ADHOC mode */
  1431. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  1432. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  1433. priv->vif);
  1434. if (beacon)
  1435. iwl_mac_beacon_update(priv->hw, beacon);
  1436. }
  1437. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  1438. iwl_set_mode(priv, priv->iw_mode);
  1439. return;
  1440. restart:
  1441. queue_work(priv->workqueue, &priv->restart);
  1442. }
  1443. static void iwl_cancel_deferred_work(struct iwl_priv *priv);
  1444. static void __iwl_down(struct iwl_priv *priv)
  1445. {
  1446. unsigned long flags;
  1447. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  1448. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  1449. if (!exit_pending)
  1450. set_bit(STATUS_EXIT_PENDING, &priv->status);
  1451. iwl_leds_unregister(priv);
  1452. iwl_clear_stations_table(priv);
  1453. /* Unblock any waiting calls */
  1454. wake_up_interruptible_all(&priv->wait_command_queue);
  1455. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1456. * exiting the module */
  1457. if (!exit_pending)
  1458. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  1459. /* stop and reset the on-board processor */
  1460. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  1461. /* tell the device to stop sending interrupts */
  1462. spin_lock_irqsave(&priv->lock, flags);
  1463. iwl_disable_interrupts(priv);
  1464. spin_unlock_irqrestore(&priv->lock, flags);
  1465. iwl_synchronize_irq(priv);
  1466. if (priv->mac80211_registered)
  1467. ieee80211_stop_queues(priv->hw);
  1468. /* If we have not previously called iwl_init() then
  1469. * clear all bits but the RF Kill and SUSPEND bits and return */
  1470. if (!iwl_is_init(priv)) {
  1471. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  1472. STATUS_RF_KILL_HW |
  1473. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  1474. STATUS_RF_KILL_SW |
  1475. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  1476. STATUS_GEO_CONFIGURED |
  1477. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  1478. STATUS_IN_SUSPEND |
  1479. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  1480. STATUS_EXIT_PENDING;
  1481. goto exit;
  1482. }
  1483. /* ...otherwise clear out all the status bits but the RF Kill and
  1484. * SUSPEND bits and continue taking the NIC down. */
  1485. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  1486. STATUS_RF_KILL_HW |
  1487. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  1488. STATUS_RF_KILL_SW |
  1489. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  1490. STATUS_GEO_CONFIGURED |
  1491. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  1492. STATUS_IN_SUSPEND |
  1493. test_bit(STATUS_FW_ERROR, &priv->status) <<
  1494. STATUS_FW_ERROR |
  1495. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  1496. STATUS_EXIT_PENDING;
  1497. spin_lock_irqsave(&priv->lock, flags);
  1498. iwl_clear_bit(priv, CSR_GP_CNTRL,
  1499. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  1500. spin_unlock_irqrestore(&priv->lock, flags);
  1501. iwl_txq_ctx_stop(priv);
  1502. iwl_rxq_stop(priv);
  1503. spin_lock_irqsave(&priv->lock, flags);
  1504. if (!iwl_grab_nic_access(priv)) {
  1505. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  1506. APMG_CLK_VAL_DMA_CLK_RQT);
  1507. iwl_release_nic_access(priv);
  1508. }
  1509. spin_unlock_irqrestore(&priv->lock, flags);
  1510. udelay(5);
  1511. /* FIXME: apm_ops.suspend(priv) */
  1512. if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
  1513. priv->cfg->ops->lib->apm_ops.stop(priv);
  1514. else
  1515. priv->cfg->ops->lib->apm_ops.reset(priv);
  1516. exit:
  1517. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  1518. if (priv->ibss_beacon)
  1519. dev_kfree_skb(priv->ibss_beacon);
  1520. priv->ibss_beacon = NULL;
  1521. /* clear out any free frames */
  1522. iwl_clear_free_frames(priv);
  1523. }
  1524. static void iwl_down(struct iwl_priv *priv)
  1525. {
  1526. mutex_lock(&priv->mutex);
  1527. __iwl_down(priv);
  1528. mutex_unlock(&priv->mutex);
  1529. iwl_cancel_deferred_work(priv);
  1530. }
  1531. #define MAX_HW_RESTARTS 5
  1532. static int __iwl_up(struct iwl_priv *priv)
  1533. {
  1534. int i;
  1535. int ret;
  1536. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  1537. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  1538. return -EIO;
  1539. }
  1540. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  1541. IWL_ERR(priv, "ucode not available for device bringup\n");
  1542. return -EIO;
  1543. }
  1544. /* If platform's RF_KILL switch is NOT set to KILL */
  1545. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  1546. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  1547. else
  1548. set_bit(STATUS_RF_KILL_HW, &priv->status);
  1549. if (iwl_is_rfkill(priv)) {
  1550. iwl_enable_interrupts(priv);
  1551. IWL_WARN(priv, "Radio disabled by %s RF Kill switch\n",
  1552. test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
  1553. return 0;
  1554. }
  1555. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  1556. ret = iwl_hw_nic_init(priv);
  1557. if (ret) {
  1558. IWL_ERR(priv, "Unable to init nic\n");
  1559. return ret;
  1560. }
  1561. /* make sure rfkill handshake bits are cleared */
  1562. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  1563. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1564. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  1565. /* clear (again), then enable host interrupts */
  1566. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  1567. iwl_enable_interrupts(priv);
  1568. /* really make sure rfkill handshake bits are cleared */
  1569. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  1570. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  1571. /* Copy original ucode data image from disk into backup cache.
  1572. * This will be used to initialize the on-board processor's
  1573. * data SRAM for a clean start when the runtime program first loads. */
  1574. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  1575. priv->ucode_data.len);
  1576. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  1577. iwl_clear_stations_table(priv);
  1578. /* load bootstrap state machine,
  1579. * load bootstrap program into processor's memory,
  1580. * prepare to load the "initialize" uCode */
  1581. ret = priv->cfg->ops->lib->load_ucode(priv);
  1582. if (ret) {
  1583. IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
  1584. ret);
  1585. continue;
  1586. }
  1587. /* Clear out the uCode error bit if it is set */
  1588. clear_bit(STATUS_FW_ERROR, &priv->status);
  1589. /* start card; "initialize" will load runtime ucode */
  1590. iwl_nic_start(priv);
  1591. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  1592. return 0;
  1593. }
  1594. set_bit(STATUS_EXIT_PENDING, &priv->status);
  1595. __iwl_down(priv);
  1596. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  1597. /* tried to restart and config the device for as long as our
  1598. * patience could withstand */
  1599. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  1600. return -EIO;
  1601. }
  1602. /*****************************************************************************
  1603. *
  1604. * Workqueue callbacks
  1605. *
  1606. *****************************************************************************/
  1607. static void iwl_bg_init_alive_start(struct work_struct *data)
  1608. {
  1609. struct iwl_priv *priv =
  1610. container_of(data, struct iwl_priv, init_alive_start.work);
  1611. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1612. return;
  1613. mutex_lock(&priv->mutex);
  1614. priv->cfg->ops->lib->init_alive_start(priv);
  1615. mutex_unlock(&priv->mutex);
  1616. }
  1617. static void iwl_bg_alive_start(struct work_struct *data)
  1618. {
  1619. struct iwl_priv *priv =
  1620. container_of(data, struct iwl_priv, alive_start.work);
  1621. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1622. return;
  1623. mutex_lock(&priv->mutex);
  1624. iwl_alive_start(priv);
  1625. mutex_unlock(&priv->mutex);
  1626. }
  1627. static void iwl_bg_run_time_calib_work(struct work_struct *work)
  1628. {
  1629. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  1630. run_time_calib_work);
  1631. mutex_lock(&priv->mutex);
  1632. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  1633. test_bit(STATUS_SCANNING, &priv->status)) {
  1634. mutex_unlock(&priv->mutex);
  1635. return;
  1636. }
  1637. if (priv->start_calib) {
  1638. iwl_chain_noise_calibration(priv, &priv->statistics);
  1639. iwl_sensitivity_calibration(priv, &priv->statistics);
  1640. }
  1641. mutex_unlock(&priv->mutex);
  1642. return;
  1643. }
  1644. static void iwl_bg_up(struct work_struct *data)
  1645. {
  1646. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  1647. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1648. return;
  1649. mutex_lock(&priv->mutex);
  1650. __iwl_up(priv);
  1651. mutex_unlock(&priv->mutex);
  1652. iwl_rfkill_set_hw_state(priv);
  1653. }
  1654. static void iwl_bg_restart(struct work_struct *data)
  1655. {
  1656. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  1657. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1658. return;
  1659. iwl_down(priv);
  1660. queue_work(priv->workqueue, &priv->up);
  1661. }
  1662. static void iwl_bg_rx_replenish(struct work_struct *data)
  1663. {
  1664. struct iwl_priv *priv =
  1665. container_of(data, struct iwl_priv, rx_replenish);
  1666. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1667. return;
  1668. mutex_lock(&priv->mutex);
  1669. iwl_rx_replenish(priv);
  1670. mutex_unlock(&priv->mutex);
  1671. }
  1672. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  1673. static void iwl_post_associate(struct iwl_priv *priv)
  1674. {
  1675. struct ieee80211_conf *conf = NULL;
  1676. int ret = 0;
  1677. unsigned long flags;
  1678. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  1679. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  1680. return;
  1681. }
  1682. IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
  1683. priv->assoc_id, priv->active_rxon.bssid_addr);
  1684. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1685. return;
  1686. if (!priv->vif || !priv->is_open)
  1687. return;
  1688. iwl_power_cancel_timeout(priv);
  1689. iwl_scan_cancel_timeout(priv, 200);
  1690. conf = ieee80211_get_hw_conf(priv->hw);
  1691. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1692. iwl_commit_rxon(priv);
  1693. iwl_setup_rxon_timing(priv);
  1694. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  1695. sizeof(priv->rxon_timing), &priv->rxon_timing);
  1696. if (ret)
  1697. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  1698. "Attempting to continue.\n");
  1699. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1700. iwl_set_rxon_ht(priv, &priv->current_ht_config);
  1701. iwl_set_rxon_chain(priv);
  1702. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  1703. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  1704. priv->assoc_id, priv->beacon_int);
  1705. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  1706. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1707. else
  1708. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1709. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  1710. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1711. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1712. else
  1713. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1714. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  1715. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1716. }
  1717. iwl_commit_rxon(priv);
  1718. switch (priv->iw_mode) {
  1719. case NL80211_IFTYPE_STATION:
  1720. break;
  1721. case NL80211_IFTYPE_ADHOC:
  1722. /* assume default assoc id */
  1723. priv->assoc_id = 1;
  1724. iwl_rxon_add_station(priv, priv->bssid, 0);
  1725. iwl_send_beacon_cmd(priv);
  1726. break;
  1727. default:
  1728. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  1729. __func__, priv->iw_mode);
  1730. break;
  1731. }
  1732. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  1733. priv->assoc_station_added = 1;
  1734. spin_lock_irqsave(&priv->lock, flags);
  1735. iwl_activate_qos(priv, 0);
  1736. spin_unlock_irqrestore(&priv->lock, flags);
  1737. /* the chain noise calibration will enabled PM upon completion
  1738. * If chain noise has already been run, then we need to enable
  1739. * power management here */
  1740. if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
  1741. iwl_power_enable_management(priv);
  1742. /* Enable Rx differential gain and sensitivity calibrations */
  1743. iwl_chain_noise_reset(priv);
  1744. priv->start_calib = 1;
  1745. }
  1746. /*****************************************************************************
  1747. *
  1748. * mac80211 entry point functions
  1749. *
  1750. *****************************************************************************/
  1751. #define UCODE_READY_TIMEOUT (4 * HZ)
  1752. static int iwl_mac_start(struct ieee80211_hw *hw)
  1753. {
  1754. struct iwl_priv *priv = hw->priv;
  1755. int ret;
  1756. IWL_DEBUG_MAC80211("enter\n");
  1757. /* we should be verifying the device is ready to be opened */
  1758. mutex_lock(&priv->mutex);
  1759. memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
  1760. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  1761. * ucode filename and max sizes are card-specific. */
  1762. if (!priv->ucode_code.len) {
  1763. ret = iwl_read_ucode(priv);
  1764. if (ret) {
  1765. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  1766. mutex_unlock(&priv->mutex);
  1767. return ret;
  1768. }
  1769. }
  1770. ret = __iwl_up(priv);
  1771. mutex_unlock(&priv->mutex);
  1772. iwl_rfkill_set_hw_state(priv);
  1773. if (ret)
  1774. return ret;
  1775. if (iwl_is_rfkill(priv))
  1776. goto out;
  1777. IWL_DEBUG_INFO("Start UP work done.\n");
  1778. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  1779. return 0;
  1780. /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
  1781. * mac80211 will not be run successfully. */
  1782. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  1783. test_bit(STATUS_READY, &priv->status),
  1784. UCODE_READY_TIMEOUT);
  1785. if (!ret) {
  1786. if (!test_bit(STATUS_READY, &priv->status)) {
  1787. IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
  1788. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  1789. return -ETIMEDOUT;
  1790. }
  1791. }
  1792. out:
  1793. priv->is_open = 1;
  1794. IWL_DEBUG_MAC80211("leave\n");
  1795. return 0;
  1796. }
  1797. static void iwl_mac_stop(struct ieee80211_hw *hw)
  1798. {
  1799. struct iwl_priv *priv = hw->priv;
  1800. IWL_DEBUG_MAC80211("enter\n");
  1801. if (!priv->is_open) {
  1802. IWL_DEBUG_MAC80211("leave - skip\n");
  1803. return;
  1804. }
  1805. priv->is_open = 0;
  1806. if (iwl_is_ready_rf(priv)) {
  1807. /* stop mac, cancel any scan request and clear
  1808. * RXON_FILTER_ASSOC_MSK BIT
  1809. */
  1810. mutex_lock(&priv->mutex);
  1811. iwl_scan_cancel_timeout(priv, 100);
  1812. mutex_unlock(&priv->mutex);
  1813. }
  1814. iwl_down(priv);
  1815. flush_workqueue(priv->workqueue);
  1816. /* enable interrupts again in order to receive rfkill changes */
  1817. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  1818. iwl_enable_interrupts(priv);
  1819. IWL_DEBUG_MAC80211("leave\n");
  1820. }
  1821. static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  1822. {
  1823. struct iwl_priv *priv = hw->priv;
  1824. IWL_DEBUG_MACDUMP("enter\n");
  1825. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  1826. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  1827. if (iwl_tx_skb(priv, skb))
  1828. dev_kfree_skb_any(skb);
  1829. IWL_DEBUG_MACDUMP("leave\n");
  1830. return NETDEV_TX_OK;
  1831. }
  1832. static int iwl_mac_add_interface(struct ieee80211_hw *hw,
  1833. struct ieee80211_if_init_conf *conf)
  1834. {
  1835. struct iwl_priv *priv = hw->priv;
  1836. unsigned long flags;
  1837. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  1838. if (priv->vif) {
  1839. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  1840. return -EOPNOTSUPP;
  1841. }
  1842. spin_lock_irqsave(&priv->lock, flags);
  1843. priv->vif = conf->vif;
  1844. priv->iw_mode = conf->type;
  1845. spin_unlock_irqrestore(&priv->lock, flags);
  1846. mutex_lock(&priv->mutex);
  1847. if (conf->mac_addr) {
  1848. IWL_DEBUG_MAC80211("Set %pM\n", conf->mac_addr);
  1849. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  1850. }
  1851. if (iwl_set_mode(priv, conf->type) == -EAGAIN)
  1852. /* we are not ready, will run again when ready */
  1853. set_bit(STATUS_MODE_PENDING, &priv->status);
  1854. mutex_unlock(&priv->mutex);
  1855. IWL_DEBUG_MAC80211("leave\n");
  1856. return 0;
  1857. }
  1858. /**
  1859. * iwl_mac_config - mac80211 config callback
  1860. *
  1861. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  1862. * be set inappropriately and the driver currently sets the hardware up to
  1863. * use it whenever needed.
  1864. */
  1865. static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
  1866. {
  1867. struct iwl_priv *priv = hw->priv;
  1868. const struct iwl_channel_info *ch_info;
  1869. struct ieee80211_conf *conf = &hw->conf;
  1870. unsigned long flags;
  1871. int ret = 0;
  1872. u16 channel;
  1873. mutex_lock(&priv->mutex);
  1874. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  1875. priv->current_ht_config.is_ht = conf_is_ht(conf);
  1876. if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
  1877. IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n");
  1878. goto out;
  1879. }
  1880. if (!conf->radio_enabled)
  1881. iwl_radio_kill_sw_disable_radio(priv);
  1882. if (!iwl_is_ready(priv)) {
  1883. IWL_DEBUG_MAC80211("leave - not ready\n");
  1884. ret = -EIO;
  1885. goto out;
  1886. }
  1887. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  1888. test_bit(STATUS_SCANNING, &priv->status))) {
  1889. IWL_DEBUG_MAC80211("leave - scanning\n");
  1890. mutex_unlock(&priv->mutex);
  1891. return 0;
  1892. }
  1893. channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
  1894. ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
  1895. if (!is_channel_valid(ch_info)) {
  1896. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  1897. ret = -EINVAL;
  1898. goto out;
  1899. }
  1900. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  1901. !is_channel_ibss(ch_info)) {
  1902. IWL_ERR(priv, "channel %d in band %d not IBSS channel\n",
  1903. conf->channel->hw_value, conf->channel->band);
  1904. ret = -EINVAL;
  1905. goto out;
  1906. }
  1907. spin_lock_irqsave(&priv->lock, flags);
  1908. /* if we are switching from ht to 2.4 clear flags
  1909. * from any ht related info since 2.4 does not
  1910. * support ht */
  1911. if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
  1912. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  1913. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  1914. #endif
  1915. )
  1916. priv->staging_rxon.flags = 0;
  1917. iwl_set_rxon_channel(priv, conf->channel);
  1918. iwl_set_flags_for_band(priv, conf->channel->band);
  1919. /* The list of supported rates and rate mask can be different
  1920. * for each band; since the band may have changed, reset
  1921. * the rate mask to what mac80211 lists */
  1922. iwl_set_rate(priv);
  1923. spin_unlock_irqrestore(&priv->lock, flags);
  1924. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  1925. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  1926. iwl_hw_channel_switch(priv, conf->channel);
  1927. goto out;
  1928. }
  1929. #endif
  1930. if (!conf->radio_enabled) {
  1931. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  1932. goto out;
  1933. }
  1934. if (iwl_is_rfkill(priv)) {
  1935. IWL_DEBUG_MAC80211("leave - RF kill\n");
  1936. ret = -EIO;
  1937. goto out;
  1938. }
  1939. if (conf->flags & IEEE80211_CONF_PS)
  1940. ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3);
  1941. else
  1942. ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM);
  1943. if (ret)
  1944. IWL_DEBUG_MAC80211("Error setting power level\n");
  1945. IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n",
  1946. priv->tx_power_user_lmt, conf->power_level);
  1947. iwl_set_tx_power(priv, conf->power_level, false);
  1948. iwl_set_rate(priv);
  1949. /* call to ensure that 4965 rx_chain is set properly in monitor mode */
  1950. iwl_set_rxon_chain(priv);
  1951. if (memcmp(&priv->active_rxon,
  1952. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  1953. iwl_commit_rxon(priv);
  1954. else
  1955. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  1956. IWL_DEBUG_MAC80211("leave\n");
  1957. out:
  1958. mutex_unlock(&priv->mutex);
  1959. return ret;
  1960. }
  1961. static void iwl_config_ap(struct iwl_priv *priv)
  1962. {
  1963. int ret = 0;
  1964. unsigned long flags;
  1965. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1966. return;
  1967. /* The following should be done only at AP bring up */
  1968. if (!iwl_is_associated(priv)) {
  1969. /* RXON - unassoc (to set timing command) */
  1970. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1971. iwl_commit_rxon(priv);
  1972. /* RXON Timing */
  1973. iwl_setup_rxon_timing(priv);
  1974. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  1975. sizeof(priv->rxon_timing), &priv->rxon_timing);
  1976. if (ret)
  1977. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  1978. "Attempting to continue.\n");
  1979. iwl_set_rxon_chain(priv);
  1980. /* FIXME: what should be the assoc_id for AP? */
  1981. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  1982. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  1983. priv->staging_rxon.flags |=
  1984. RXON_FLG_SHORT_PREAMBLE_MSK;
  1985. else
  1986. priv->staging_rxon.flags &=
  1987. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1988. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  1989. if (priv->assoc_capability &
  1990. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1991. priv->staging_rxon.flags |=
  1992. RXON_FLG_SHORT_SLOT_MSK;
  1993. else
  1994. priv->staging_rxon.flags &=
  1995. ~RXON_FLG_SHORT_SLOT_MSK;
  1996. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  1997. priv->staging_rxon.flags &=
  1998. ~RXON_FLG_SHORT_SLOT_MSK;
  1999. }
  2000. /* restore RXON assoc */
  2001. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2002. iwl_commit_rxon(priv);
  2003. spin_lock_irqsave(&priv->lock, flags);
  2004. iwl_activate_qos(priv, 1);
  2005. spin_unlock_irqrestore(&priv->lock, flags);
  2006. iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
  2007. }
  2008. iwl_send_beacon_cmd(priv);
  2009. /* FIXME - we need to add code here to detect a totally new
  2010. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2011. * clear sta table, add BCAST sta... */
  2012. }
  2013. static int iwl_mac_config_interface(struct ieee80211_hw *hw,
  2014. struct ieee80211_vif *vif,
  2015. struct ieee80211_if_conf *conf)
  2016. {
  2017. struct iwl_priv *priv = hw->priv;
  2018. int rc;
  2019. if (conf == NULL)
  2020. return -EIO;
  2021. if (priv->vif != vif) {
  2022. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  2023. return 0;
  2024. }
  2025. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  2026. conf->changed & IEEE80211_IFCC_BEACON) {
  2027. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  2028. if (!beacon)
  2029. return -ENOMEM;
  2030. mutex_lock(&priv->mutex);
  2031. rc = iwl_mac_beacon_update(hw, beacon);
  2032. mutex_unlock(&priv->mutex);
  2033. if (rc)
  2034. return rc;
  2035. }
  2036. if (!iwl_is_alive(priv))
  2037. return -EAGAIN;
  2038. mutex_lock(&priv->mutex);
  2039. if (conf->bssid)
  2040. IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
  2041. /*
  2042. * very dubious code was here; the probe filtering flag is never set:
  2043. *
  2044. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  2045. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  2046. */
  2047. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2048. if (!conf->bssid) {
  2049. conf->bssid = priv->mac_addr;
  2050. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  2051. IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
  2052. conf->bssid);
  2053. }
  2054. if (priv->ibss_beacon)
  2055. dev_kfree_skb(priv->ibss_beacon);
  2056. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  2057. }
  2058. if (iwl_is_rfkill(priv))
  2059. goto done;
  2060. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  2061. !is_multicast_ether_addr(conf->bssid)) {
  2062. /* If there is currently a HW scan going on in the background
  2063. * then we need to cancel it else the RXON below will fail. */
  2064. if (iwl_scan_cancel_timeout(priv, 100)) {
  2065. IWL_WARN(priv, "Aborted scan still in progress "
  2066. "after 100ms\n");
  2067. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2068. mutex_unlock(&priv->mutex);
  2069. return -EAGAIN;
  2070. }
  2071. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  2072. /* TODO: Audit driver for usage of these members and see
  2073. * if mac80211 deprecates them (priv->bssid looks like it
  2074. * shouldn't be there, but I haven't scanned the IBSS code
  2075. * to verify) - jpk */
  2076. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  2077. if (priv->iw_mode == NL80211_IFTYPE_AP)
  2078. iwl_config_ap(priv);
  2079. else {
  2080. rc = iwl_commit_rxon(priv);
  2081. if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
  2082. iwl_rxon_add_station(
  2083. priv, priv->active_rxon.bssid_addr, 1);
  2084. }
  2085. } else {
  2086. iwl_scan_cancel_timeout(priv, 100);
  2087. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2088. iwl_commit_rxon(priv);
  2089. }
  2090. done:
  2091. IWL_DEBUG_MAC80211("leave\n");
  2092. mutex_unlock(&priv->mutex);
  2093. return 0;
  2094. }
  2095. static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  2096. struct ieee80211_if_init_conf *conf)
  2097. {
  2098. struct iwl_priv *priv = hw->priv;
  2099. IWL_DEBUG_MAC80211("enter\n");
  2100. mutex_lock(&priv->mutex);
  2101. if (iwl_is_ready_rf(priv)) {
  2102. iwl_scan_cancel_timeout(priv, 100);
  2103. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2104. iwl_commit_rxon(priv);
  2105. }
  2106. if (priv->vif == conf->vif) {
  2107. priv->vif = NULL;
  2108. memset(priv->bssid, 0, ETH_ALEN);
  2109. }
  2110. mutex_unlock(&priv->mutex);
  2111. IWL_DEBUG_MAC80211("leave\n");
  2112. }
  2113. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  2114. static void iwl_bss_info_changed(struct ieee80211_hw *hw,
  2115. struct ieee80211_vif *vif,
  2116. struct ieee80211_bss_conf *bss_conf,
  2117. u32 changes)
  2118. {
  2119. struct iwl_priv *priv = hw->priv;
  2120. IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
  2121. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  2122. IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
  2123. bss_conf->use_short_preamble);
  2124. if (bss_conf->use_short_preamble)
  2125. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2126. else
  2127. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2128. }
  2129. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  2130. IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  2131. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  2132. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  2133. else
  2134. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  2135. }
  2136. if (changes & BSS_CHANGED_HT) {
  2137. iwl_ht_conf(priv, bss_conf);
  2138. iwl_set_rxon_chain(priv);
  2139. }
  2140. if (changes & BSS_CHANGED_ASSOC) {
  2141. IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
  2142. /* This should never happen as this function should
  2143. * never be called from interrupt context. */
  2144. if (WARN_ON_ONCE(in_interrupt()))
  2145. return;
  2146. if (bss_conf->assoc) {
  2147. priv->assoc_id = bss_conf->aid;
  2148. priv->beacon_int = bss_conf->beacon_int;
  2149. priv->power_data.dtim_period = bss_conf->dtim_period;
  2150. priv->timestamp = bss_conf->timestamp;
  2151. priv->assoc_capability = bss_conf->assoc_capability;
  2152. /* we have just associated, don't start scan too early
  2153. * leave time for EAPOL exchange to complete
  2154. */
  2155. priv->next_scan_jiffies = jiffies +
  2156. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  2157. mutex_lock(&priv->mutex);
  2158. iwl_post_associate(priv);
  2159. mutex_unlock(&priv->mutex);
  2160. } else {
  2161. priv->assoc_id = 0;
  2162. IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
  2163. }
  2164. } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  2165. IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
  2166. iwl_send_rxon_assoc(priv);
  2167. }
  2168. }
  2169. static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t ssid_len)
  2170. {
  2171. unsigned long flags;
  2172. struct iwl_priv *priv = hw->priv;
  2173. int ret;
  2174. IWL_DEBUG_MAC80211("enter\n");
  2175. mutex_lock(&priv->mutex);
  2176. spin_lock_irqsave(&priv->lock, flags);
  2177. if (!iwl_is_ready_rf(priv)) {
  2178. ret = -EIO;
  2179. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  2180. goto out_unlock;
  2181. }
  2182. /* We don't schedule scan within next_scan_jiffies period.
  2183. * Avoid scanning during possible EAPOL exchange, return
  2184. * success immediately.
  2185. */
  2186. if (priv->next_scan_jiffies &&
  2187. time_after(priv->next_scan_jiffies, jiffies)) {
  2188. IWL_DEBUG_SCAN("scan rejected: within next scan period\n");
  2189. queue_work(priv->workqueue, &priv->scan_completed);
  2190. ret = 0;
  2191. goto out_unlock;
  2192. }
  2193. /* if we just finished scan ask for delay */
  2194. if (iwl_is_associated(priv) && priv->last_scan_jiffies &&
  2195. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) {
  2196. IWL_DEBUG_SCAN("scan rejected: within previous scan period\n");
  2197. queue_work(priv->workqueue, &priv->scan_completed);
  2198. ret = 0;
  2199. goto out_unlock;
  2200. }
  2201. if (ssid_len) {
  2202. priv->one_direct_scan = 1;
  2203. priv->direct_ssid_len = min_t(u8, ssid_len, IW_ESSID_MAX_SIZE);
  2204. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  2205. } else {
  2206. priv->one_direct_scan = 0;
  2207. }
  2208. ret = iwl_scan_initiate(priv);
  2209. IWL_DEBUG_MAC80211("leave\n");
  2210. out_unlock:
  2211. spin_unlock_irqrestore(&priv->lock, flags);
  2212. mutex_unlock(&priv->mutex);
  2213. return ret;
  2214. }
  2215. static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
  2216. struct ieee80211_key_conf *keyconf, const u8 *addr,
  2217. u32 iv32, u16 *phase1key)
  2218. {
  2219. struct iwl_priv *priv = hw->priv;
  2220. IWL_DEBUG_MAC80211("enter\n");
  2221. iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
  2222. IWL_DEBUG_MAC80211("leave\n");
  2223. }
  2224. static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2225. struct ieee80211_vif *vif,
  2226. struct ieee80211_sta *sta,
  2227. struct ieee80211_key_conf *key)
  2228. {
  2229. struct iwl_priv *priv = hw->priv;
  2230. const u8 *addr;
  2231. int ret;
  2232. u8 sta_id;
  2233. bool is_default_wep_key = false;
  2234. IWL_DEBUG_MAC80211("enter\n");
  2235. if (priv->hw_params.sw_crypto) {
  2236. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  2237. return -EOPNOTSUPP;
  2238. }
  2239. addr = sta ? sta->addr : iwl_bcast_addr;
  2240. sta_id = iwl_find_station(priv, addr);
  2241. if (sta_id == IWL_INVALID_STATION) {
  2242. IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
  2243. addr);
  2244. return -EINVAL;
  2245. }
  2246. mutex_lock(&priv->mutex);
  2247. iwl_scan_cancel_timeout(priv, 100);
  2248. mutex_unlock(&priv->mutex);
  2249. /* If we are getting WEP group key and we didn't receive any key mapping
  2250. * so far, we are in legacy wep mode (group key only), otherwise we are
  2251. * in 1X mode.
  2252. * In legacy wep mode, we use another host command to the uCode */
  2253. if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
  2254. priv->iw_mode != NL80211_IFTYPE_AP) {
  2255. if (cmd == SET_KEY)
  2256. is_default_wep_key = !priv->key_mapping_key;
  2257. else
  2258. is_default_wep_key =
  2259. (key->hw_key_idx == HW_KEY_DEFAULT);
  2260. }
  2261. switch (cmd) {
  2262. case SET_KEY:
  2263. if (is_default_wep_key)
  2264. ret = iwl_set_default_wep_key(priv, key);
  2265. else
  2266. ret = iwl_set_dynamic_key(priv, key, sta_id);
  2267. IWL_DEBUG_MAC80211("enable hwcrypto key\n");
  2268. break;
  2269. case DISABLE_KEY:
  2270. if (is_default_wep_key)
  2271. ret = iwl_remove_default_wep_key(priv, key);
  2272. else
  2273. ret = iwl_remove_dynamic_key(priv, key, sta_id);
  2274. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  2275. break;
  2276. default:
  2277. ret = -EINVAL;
  2278. }
  2279. IWL_DEBUG_MAC80211("leave\n");
  2280. return ret;
  2281. }
  2282. static int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  2283. const struct ieee80211_tx_queue_params *params)
  2284. {
  2285. struct iwl_priv *priv = hw->priv;
  2286. unsigned long flags;
  2287. int q;
  2288. IWL_DEBUG_MAC80211("enter\n");
  2289. if (!iwl_is_ready_rf(priv)) {
  2290. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  2291. return -EIO;
  2292. }
  2293. if (queue >= AC_NUM) {
  2294. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  2295. return 0;
  2296. }
  2297. q = AC_NUM - 1 - queue;
  2298. spin_lock_irqsave(&priv->lock, flags);
  2299. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  2300. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  2301. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  2302. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  2303. cpu_to_le16((params->txop * 32));
  2304. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  2305. priv->qos_data.qos_active = 1;
  2306. if (priv->iw_mode == NL80211_IFTYPE_AP)
  2307. iwl_activate_qos(priv, 1);
  2308. else if (priv->assoc_id && iwl_is_associated(priv))
  2309. iwl_activate_qos(priv, 0);
  2310. spin_unlock_irqrestore(&priv->lock, flags);
  2311. IWL_DEBUG_MAC80211("leave\n");
  2312. return 0;
  2313. }
  2314. static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
  2315. enum ieee80211_ampdu_mlme_action action,
  2316. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  2317. {
  2318. struct iwl_priv *priv = hw->priv;
  2319. IWL_DEBUG_HT("A-MPDU action on addr %pM tid %d\n",
  2320. sta->addr, tid);
  2321. if (!(priv->cfg->sku & IWL_SKU_N))
  2322. return -EACCES;
  2323. switch (action) {
  2324. case IEEE80211_AMPDU_RX_START:
  2325. IWL_DEBUG_HT("start Rx\n");
  2326. return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
  2327. case IEEE80211_AMPDU_RX_STOP:
  2328. IWL_DEBUG_HT("stop Rx\n");
  2329. return iwl_sta_rx_agg_stop(priv, sta->addr, tid);
  2330. case IEEE80211_AMPDU_TX_START:
  2331. IWL_DEBUG_HT("start Tx\n");
  2332. return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
  2333. case IEEE80211_AMPDU_TX_STOP:
  2334. IWL_DEBUG_HT("stop Tx\n");
  2335. return iwl_tx_agg_stop(priv, sta->addr, tid);
  2336. default:
  2337. IWL_DEBUG_HT("unknown\n");
  2338. return -EINVAL;
  2339. break;
  2340. }
  2341. return 0;
  2342. }
  2343. static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  2344. struct ieee80211_tx_queue_stats *stats)
  2345. {
  2346. struct iwl_priv *priv = hw->priv;
  2347. int i, avail;
  2348. struct iwl_tx_queue *txq;
  2349. struct iwl_queue *q;
  2350. unsigned long flags;
  2351. IWL_DEBUG_MAC80211("enter\n");
  2352. if (!iwl_is_ready_rf(priv)) {
  2353. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  2354. return -EIO;
  2355. }
  2356. spin_lock_irqsave(&priv->lock, flags);
  2357. for (i = 0; i < AC_NUM; i++) {
  2358. txq = &priv->txq[i];
  2359. q = &txq->q;
  2360. avail = iwl_queue_space(q);
  2361. stats[i].len = q->n_window - avail;
  2362. stats[i].limit = q->n_window - q->high_mark;
  2363. stats[i].count = q->n_window;
  2364. }
  2365. spin_unlock_irqrestore(&priv->lock, flags);
  2366. IWL_DEBUG_MAC80211("leave\n");
  2367. return 0;
  2368. }
  2369. static int iwl_mac_get_stats(struct ieee80211_hw *hw,
  2370. struct ieee80211_low_level_stats *stats)
  2371. {
  2372. struct iwl_priv *priv = hw->priv;
  2373. priv = hw->priv;
  2374. IWL_DEBUG_MAC80211("enter\n");
  2375. IWL_DEBUG_MAC80211("leave\n");
  2376. return 0;
  2377. }
  2378. static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  2379. {
  2380. struct iwl_priv *priv = hw->priv;
  2381. unsigned long flags;
  2382. mutex_lock(&priv->mutex);
  2383. IWL_DEBUG_MAC80211("enter\n");
  2384. spin_lock_irqsave(&priv->lock, flags);
  2385. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  2386. spin_unlock_irqrestore(&priv->lock, flags);
  2387. iwl_reset_qos(priv);
  2388. spin_lock_irqsave(&priv->lock, flags);
  2389. priv->assoc_id = 0;
  2390. priv->assoc_capability = 0;
  2391. priv->assoc_station_added = 0;
  2392. /* new association get rid of ibss beacon skb */
  2393. if (priv->ibss_beacon)
  2394. dev_kfree_skb(priv->ibss_beacon);
  2395. priv->ibss_beacon = NULL;
  2396. priv->beacon_int = priv->hw->conf.beacon_int;
  2397. priv->timestamp = 0;
  2398. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  2399. priv->beacon_int = 0;
  2400. spin_unlock_irqrestore(&priv->lock, flags);
  2401. if (!iwl_is_ready_rf(priv)) {
  2402. IWL_DEBUG_MAC80211("leave - not ready\n");
  2403. mutex_unlock(&priv->mutex);
  2404. return;
  2405. }
  2406. /* we are restarting association process
  2407. * clear RXON_FILTER_ASSOC_MSK bit
  2408. */
  2409. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  2410. iwl_scan_cancel_timeout(priv, 100);
  2411. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2412. iwl_commit_rxon(priv);
  2413. }
  2414. iwl_power_update_mode(priv, 0);
  2415. /* Per mac80211.h: This is only used in IBSS mode... */
  2416. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  2417. /* switch to CAM during association period.
  2418. * the ucode will block any association/authentication
  2419. * frome during assiciation period if it can not hear
  2420. * the AP because of PM. the timer enable PM back is
  2421. * association do not complete
  2422. */
  2423. if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN |
  2424. IEEE80211_CHAN_RADAR))
  2425. iwl_power_disable_management(priv, 3000);
  2426. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  2427. mutex_unlock(&priv->mutex);
  2428. return;
  2429. }
  2430. iwl_set_rate(priv);
  2431. mutex_unlock(&priv->mutex);
  2432. IWL_DEBUG_MAC80211("leave\n");
  2433. }
  2434. static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  2435. {
  2436. struct iwl_priv *priv = hw->priv;
  2437. unsigned long flags;
  2438. __le64 timestamp;
  2439. IWL_DEBUG_MAC80211("enter\n");
  2440. if (!iwl_is_ready_rf(priv)) {
  2441. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  2442. return -EIO;
  2443. }
  2444. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  2445. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  2446. return -EIO;
  2447. }
  2448. spin_lock_irqsave(&priv->lock, flags);
  2449. if (priv->ibss_beacon)
  2450. dev_kfree_skb(priv->ibss_beacon);
  2451. priv->ibss_beacon = skb;
  2452. priv->assoc_id = 0;
  2453. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  2454. priv->timestamp = le64_to_cpu(timestamp);
  2455. IWL_DEBUG_MAC80211("leave\n");
  2456. spin_unlock_irqrestore(&priv->lock, flags);
  2457. iwl_reset_qos(priv);
  2458. iwl_post_associate(priv);
  2459. return 0;
  2460. }
  2461. /*****************************************************************************
  2462. *
  2463. * sysfs attributes
  2464. *
  2465. *****************************************************************************/
  2466. #ifdef CONFIG_IWLWIFI_DEBUG
  2467. /*
  2468. * The following adds a new attribute to the sysfs representation
  2469. * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
  2470. * used for controlling the debug level.
  2471. *
  2472. * See the level definitions in iwl for details.
  2473. */
  2474. static ssize_t show_debug_level(struct device *d,
  2475. struct device_attribute *attr, char *buf)
  2476. {
  2477. struct iwl_priv *priv = d->driver_data;
  2478. return sprintf(buf, "0x%08X\n", priv->debug_level);
  2479. }
  2480. static ssize_t store_debug_level(struct device *d,
  2481. struct device_attribute *attr,
  2482. const char *buf, size_t count)
  2483. {
  2484. struct iwl_priv *priv = d->driver_data;
  2485. unsigned long val;
  2486. int ret;
  2487. ret = strict_strtoul(buf, 0, &val);
  2488. if (ret)
  2489. IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
  2490. else
  2491. priv->debug_level = val;
  2492. return strnlen(buf, count);
  2493. }
  2494. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2495. show_debug_level, store_debug_level);
  2496. #endif /* CONFIG_IWLWIFI_DEBUG */
  2497. static ssize_t show_version(struct device *d,
  2498. struct device_attribute *attr, char *buf)
  2499. {
  2500. struct iwl_priv *priv = d->driver_data;
  2501. struct iwl_alive_resp *palive = &priv->card_alive;
  2502. ssize_t pos = 0;
  2503. u16 eeprom_ver;
  2504. if (palive->is_valid)
  2505. pos += sprintf(buf + pos,
  2506. "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
  2507. "fw type: 0x%01X 0x%01X\n",
  2508. palive->ucode_major, palive->ucode_minor,
  2509. palive->sw_rev[0], palive->sw_rev[1],
  2510. palive->ver_type, palive->ver_subtype);
  2511. else
  2512. pos += sprintf(buf + pos, "fw not loaded\n");
  2513. if (priv->eeprom) {
  2514. eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
  2515. pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
  2516. eeprom_ver);
  2517. } else {
  2518. pos += sprintf(buf + pos, "EEPROM not initialzed\n");
  2519. }
  2520. return pos;
  2521. }
  2522. static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
  2523. static ssize_t show_temperature(struct device *d,
  2524. struct device_attribute *attr, char *buf)
  2525. {
  2526. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  2527. if (!iwl_is_alive(priv))
  2528. return -EAGAIN;
  2529. return sprintf(buf, "%d\n", priv->temperature);
  2530. }
  2531. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2532. static ssize_t show_tx_power(struct device *d,
  2533. struct device_attribute *attr, char *buf)
  2534. {
  2535. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  2536. if (!iwl_is_ready_rf(priv))
  2537. return sprintf(buf, "off\n");
  2538. else
  2539. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2540. }
  2541. static ssize_t store_tx_power(struct device *d,
  2542. struct device_attribute *attr,
  2543. const char *buf, size_t count)
  2544. {
  2545. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  2546. unsigned long val;
  2547. int ret;
  2548. ret = strict_strtoul(buf, 10, &val);
  2549. if (ret)
  2550. IWL_INFO(priv, "%s is not in decimal form.\n", buf);
  2551. else
  2552. iwl_set_tx_power(priv, val, false);
  2553. return count;
  2554. }
  2555. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2556. static ssize_t show_flags(struct device *d,
  2557. struct device_attribute *attr, char *buf)
  2558. {
  2559. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  2560. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2561. }
  2562. static ssize_t store_flags(struct device *d,
  2563. struct device_attribute *attr,
  2564. const char *buf, size_t count)
  2565. {
  2566. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  2567. unsigned long val;
  2568. u32 flags;
  2569. int ret = strict_strtoul(buf, 0, &val);
  2570. if (ret)
  2571. return ret;
  2572. flags = (u32)val;
  2573. mutex_lock(&priv->mutex);
  2574. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2575. /* Cancel any currently running scans... */
  2576. if (iwl_scan_cancel_timeout(priv, 100))
  2577. IWL_WARN(priv, "Could not cancel scan.\n");
  2578. else {
  2579. IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags);
  2580. priv->staging_rxon.flags = cpu_to_le32(flags);
  2581. iwl_commit_rxon(priv);
  2582. }
  2583. }
  2584. mutex_unlock(&priv->mutex);
  2585. return count;
  2586. }
  2587. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2588. static ssize_t show_filter_flags(struct device *d,
  2589. struct device_attribute *attr, char *buf)
  2590. {
  2591. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  2592. return sprintf(buf, "0x%04X\n",
  2593. le32_to_cpu(priv->active_rxon.filter_flags));
  2594. }
  2595. static ssize_t store_filter_flags(struct device *d,
  2596. struct device_attribute *attr,
  2597. const char *buf, size_t count)
  2598. {
  2599. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  2600. unsigned long val;
  2601. u32 filter_flags;
  2602. int ret = strict_strtoul(buf, 0, &val);
  2603. if (ret)
  2604. return ret;
  2605. filter_flags = (u32)val;
  2606. mutex_lock(&priv->mutex);
  2607. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2608. /* Cancel any currently running scans... */
  2609. if (iwl_scan_cancel_timeout(priv, 100))
  2610. IWL_WARN(priv, "Could not cancel scan.\n");
  2611. else {
  2612. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  2613. "0x%04X\n", filter_flags);
  2614. priv->staging_rxon.filter_flags =
  2615. cpu_to_le32(filter_flags);
  2616. iwl_commit_rxon(priv);
  2617. }
  2618. }
  2619. mutex_unlock(&priv->mutex);
  2620. return count;
  2621. }
  2622. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2623. store_filter_flags);
  2624. static ssize_t store_power_level(struct device *d,
  2625. struct device_attribute *attr,
  2626. const char *buf, size_t count)
  2627. {
  2628. struct iwl_priv *priv = dev_get_drvdata(d);
  2629. int ret;
  2630. unsigned long mode;
  2631. mutex_lock(&priv->mutex);
  2632. if (!iwl_is_ready(priv)) {
  2633. ret = -EAGAIN;
  2634. goto out;
  2635. }
  2636. ret = strict_strtoul(buf, 10, &mode);
  2637. if (ret)
  2638. goto out;
  2639. ret = iwl_power_set_user_mode(priv, mode);
  2640. if (ret) {
  2641. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  2642. goto out;
  2643. }
  2644. ret = count;
  2645. out:
  2646. mutex_unlock(&priv->mutex);
  2647. return ret;
  2648. }
  2649. static ssize_t show_power_level(struct device *d,
  2650. struct device_attribute *attr, char *buf)
  2651. {
  2652. struct iwl_priv *priv = dev_get_drvdata(d);
  2653. int mode = priv->power_data.user_power_setting;
  2654. int system = priv->power_data.system_power_setting;
  2655. int level = priv->power_data.power_mode;
  2656. char *p = buf;
  2657. switch (system) {
  2658. case IWL_POWER_SYS_AUTO:
  2659. p += sprintf(p, "SYSTEM:auto");
  2660. break;
  2661. case IWL_POWER_SYS_AC:
  2662. p += sprintf(p, "SYSTEM:ac");
  2663. break;
  2664. case IWL_POWER_SYS_BATTERY:
  2665. p += sprintf(p, "SYSTEM:battery");
  2666. break;
  2667. }
  2668. p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
  2669. "fixed" : "auto");
  2670. p += sprintf(p, "\tINDEX:%d", level);
  2671. p += sprintf(p, "\n");
  2672. return p - buf + 1;
  2673. }
  2674. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  2675. store_power_level);
  2676. static ssize_t show_statistics(struct device *d,
  2677. struct device_attribute *attr, char *buf)
  2678. {
  2679. struct iwl_priv *priv = dev_get_drvdata(d);
  2680. u32 size = sizeof(struct iwl_notif_statistics);
  2681. u32 len = 0, ofs = 0;
  2682. u8 *data = (u8 *)&priv->statistics;
  2683. int rc = 0;
  2684. if (!iwl_is_alive(priv))
  2685. return -EAGAIN;
  2686. mutex_lock(&priv->mutex);
  2687. rc = iwl_send_statistics_request(priv, 0);
  2688. mutex_unlock(&priv->mutex);
  2689. if (rc) {
  2690. len = sprintf(buf,
  2691. "Error sending statistics request: 0x%08X\n", rc);
  2692. return len;
  2693. }
  2694. while (size && (PAGE_SIZE - len)) {
  2695. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2696. PAGE_SIZE - len, 1);
  2697. len = strlen(buf);
  2698. if (PAGE_SIZE - len)
  2699. buf[len++] = '\n';
  2700. ofs += 16;
  2701. size -= min(size, 16U);
  2702. }
  2703. return len;
  2704. }
  2705. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  2706. /*****************************************************************************
  2707. *
  2708. * driver setup and teardown
  2709. *
  2710. *****************************************************************************/
  2711. static void iwl_setup_deferred_work(struct iwl_priv *priv)
  2712. {
  2713. priv->workqueue = create_workqueue(DRV_NAME);
  2714. init_waitqueue_head(&priv->wait_command_queue);
  2715. INIT_WORK(&priv->up, iwl_bg_up);
  2716. INIT_WORK(&priv->restart, iwl_bg_restart);
  2717. INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
  2718. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  2719. INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
  2720. INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
  2721. INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
  2722. INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
  2723. iwl_setup_scan_deferred_work(priv);
  2724. iwl_setup_power_deferred_work(priv);
  2725. if (priv->cfg->ops->lib->setup_deferred_work)
  2726. priv->cfg->ops->lib->setup_deferred_work(priv);
  2727. init_timer(&priv->statistics_periodic);
  2728. priv->statistics_periodic.data = (unsigned long)priv;
  2729. priv->statistics_periodic.function = iwl_bg_statistics_periodic;
  2730. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  2731. iwl_irq_tasklet, (unsigned long)priv);
  2732. }
  2733. static void iwl_cancel_deferred_work(struct iwl_priv *priv)
  2734. {
  2735. if (priv->cfg->ops->lib->cancel_deferred_work)
  2736. priv->cfg->ops->lib->cancel_deferred_work(priv);
  2737. cancel_delayed_work_sync(&priv->init_alive_start);
  2738. cancel_delayed_work(&priv->scan_check);
  2739. cancel_delayed_work_sync(&priv->set_power_save);
  2740. cancel_delayed_work(&priv->alive_start);
  2741. cancel_work_sync(&priv->beacon_update);
  2742. del_timer_sync(&priv->statistics_periodic);
  2743. }
  2744. static struct attribute *iwl_sysfs_entries[] = {
  2745. &dev_attr_flags.attr,
  2746. &dev_attr_filter_flags.attr,
  2747. &dev_attr_power_level.attr,
  2748. &dev_attr_statistics.attr,
  2749. &dev_attr_temperature.attr,
  2750. &dev_attr_tx_power.attr,
  2751. #ifdef CONFIG_IWLWIFI_DEBUG
  2752. &dev_attr_debug_level.attr,
  2753. #endif
  2754. &dev_attr_version.attr,
  2755. NULL
  2756. };
  2757. static struct attribute_group iwl_attribute_group = {
  2758. .name = NULL, /* put in device directory */
  2759. .attrs = iwl_sysfs_entries,
  2760. };
  2761. static struct ieee80211_ops iwl_hw_ops = {
  2762. .tx = iwl_mac_tx,
  2763. .start = iwl_mac_start,
  2764. .stop = iwl_mac_stop,
  2765. .add_interface = iwl_mac_add_interface,
  2766. .remove_interface = iwl_mac_remove_interface,
  2767. .config = iwl_mac_config,
  2768. .config_interface = iwl_mac_config_interface,
  2769. .configure_filter = iwl_configure_filter,
  2770. .set_key = iwl_mac_set_key,
  2771. .update_tkip_key = iwl_mac_update_tkip_key,
  2772. .get_stats = iwl_mac_get_stats,
  2773. .get_tx_stats = iwl_mac_get_tx_stats,
  2774. .conf_tx = iwl_mac_conf_tx,
  2775. .reset_tsf = iwl_mac_reset_tsf,
  2776. .bss_info_changed = iwl_bss_info_changed,
  2777. .ampdu_action = iwl_mac_ampdu_action,
  2778. .hw_scan = iwl_mac_hw_scan
  2779. };
  2780. static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  2781. {
  2782. int err = 0;
  2783. struct iwl_priv *priv;
  2784. struct ieee80211_hw *hw;
  2785. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  2786. unsigned long flags;
  2787. u16 pci_cmd;
  2788. /************************
  2789. * 1. Allocating HW data
  2790. ************************/
  2791. /* Disabling hardware scan means that mac80211 will perform scans
  2792. * "the hard way", rather than using device's scan. */
  2793. if (cfg->mod_params->disable_hw_scan) {
  2794. if (cfg->mod_params->debug & IWL_DL_INFO)
  2795. dev_printk(KERN_DEBUG, &(pdev->dev),
  2796. "Disabling hw_scan\n");
  2797. iwl_hw_ops.hw_scan = NULL;
  2798. }
  2799. hw = iwl_alloc_all(cfg, &iwl_hw_ops);
  2800. if (!hw) {
  2801. err = -ENOMEM;
  2802. goto out;
  2803. }
  2804. priv = hw->priv;
  2805. /* At this point both hw and priv are allocated. */
  2806. SET_IEEE80211_DEV(hw, &pdev->dev);
  2807. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  2808. priv->cfg = cfg;
  2809. priv->pci_dev = pdev;
  2810. #ifdef CONFIG_IWLWIFI_DEBUG
  2811. priv->debug_level = priv->cfg->mod_params->debug;
  2812. atomic_set(&priv->restrict_refcnt, 0);
  2813. #endif
  2814. /**************************
  2815. * 2. Initializing PCI bus
  2816. **************************/
  2817. if (pci_enable_device(pdev)) {
  2818. err = -ENODEV;
  2819. goto out_ieee80211_free_hw;
  2820. }
  2821. pci_set_master(pdev);
  2822. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
  2823. if (!err)
  2824. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
  2825. if (err) {
  2826. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  2827. if (!err)
  2828. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2829. /* both attempts failed: */
  2830. if (err) {
  2831. IWL_WARN(priv, "No suitable DMA available.\n");
  2832. goto out_pci_disable_device;
  2833. }
  2834. }
  2835. err = pci_request_regions(pdev, DRV_NAME);
  2836. if (err)
  2837. goto out_pci_disable_device;
  2838. pci_set_drvdata(pdev, priv);
  2839. /***********************
  2840. * 3. Read REV register
  2841. ***********************/
  2842. priv->hw_base = pci_iomap(pdev, 0, 0);
  2843. if (!priv->hw_base) {
  2844. err = -ENODEV;
  2845. goto out_pci_release_regions;
  2846. }
  2847. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  2848. (unsigned long long) pci_resource_len(pdev, 0));
  2849. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  2850. iwl_hw_detect(priv);
  2851. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
  2852. priv->cfg->name, priv->hw_rev);
  2853. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  2854. * PCI Tx retries from interfering with C3 CPU state */
  2855. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  2856. /* amp init */
  2857. err = priv->cfg->ops->lib->apm_ops.init(priv);
  2858. if (err < 0) {
  2859. IWL_DEBUG_INFO("Failed to init APMG\n");
  2860. goto out_iounmap;
  2861. }
  2862. /*****************
  2863. * 4. Read EEPROM
  2864. *****************/
  2865. /* Read the EEPROM */
  2866. err = iwl_eeprom_init(priv);
  2867. if (err) {
  2868. IWL_ERR(priv, "Unable to init EEPROM\n");
  2869. goto out_iounmap;
  2870. }
  2871. err = iwl_eeprom_check_version(priv);
  2872. if (err)
  2873. goto out_iounmap;
  2874. /* extract MAC Address */
  2875. iwl_eeprom_get_mac(priv, priv->mac_addr);
  2876. IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
  2877. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  2878. /************************
  2879. * 5. Setup HW constants
  2880. ************************/
  2881. if (iwl_set_hw_params(priv)) {
  2882. IWL_ERR(priv, "failed to set hw parameters\n");
  2883. goto out_free_eeprom;
  2884. }
  2885. /*******************
  2886. * 6. Setup priv
  2887. *******************/
  2888. err = iwl_init_drv(priv);
  2889. if (err)
  2890. goto out_free_eeprom;
  2891. /* At this point both hw and priv are initialized. */
  2892. /**********************************
  2893. * 7. Initialize module parameters
  2894. **********************************/
  2895. /* Disable radio (SW RF KILL) via parameter when loading driver */
  2896. if (priv->cfg->mod_params->disable) {
  2897. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2898. IWL_DEBUG_INFO("Radio disabled.\n");
  2899. }
  2900. /********************
  2901. * 8. Setup services
  2902. ********************/
  2903. spin_lock_irqsave(&priv->lock, flags);
  2904. iwl_disable_interrupts(priv);
  2905. spin_unlock_irqrestore(&priv->lock, flags);
  2906. pci_enable_msi(priv->pci_dev);
  2907. err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
  2908. DRV_NAME, priv);
  2909. if (err) {
  2910. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  2911. goto out_disable_msi;
  2912. }
  2913. err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
  2914. if (err) {
  2915. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  2916. goto out_uninit_drv;
  2917. }
  2918. iwl_setup_deferred_work(priv);
  2919. iwl_setup_rx_handlers(priv);
  2920. /**********************************
  2921. * 9. Setup and register mac80211
  2922. **********************************/
  2923. /* enable interrupts if needed: hw bug w/a */
  2924. pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
  2925. if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
  2926. pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
  2927. pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
  2928. }
  2929. iwl_enable_interrupts(priv);
  2930. err = iwl_setup_mac(priv);
  2931. if (err)
  2932. goto out_remove_sysfs;
  2933. err = iwl_dbgfs_register(priv, DRV_NAME);
  2934. if (err)
  2935. IWL_ERR(priv, "failed to create debugfs files\n");
  2936. /* If platform's RF_KILL switch is NOT set to KILL */
  2937. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2938. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2939. else
  2940. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2941. err = iwl_rfkill_init(priv);
  2942. if (err)
  2943. IWL_ERR(priv, "Unable to initialize RFKILL system. "
  2944. "Ignoring error: %d\n", err);
  2945. else
  2946. iwl_rfkill_set_hw_state(priv);
  2947. iwl_power_initialize(priv);
  2948. return 0;
  2949. out_remove_sysfs:
  2950. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  2951. out_disable_msi:
  2952. pci_disable_msi(priv->pci_dev);
  2953. pci_disable_device(priv->pci_dev);
  2954. out_uninit_drv:
  2955. iwl_uninit_drv(priv);
  2956. out_free_eeprom:
  2957. iwl_eeprom_free(priv);
  2958. out_iounmap:
  2959. pci_iounmap(pdev, priv->hw_base);
  2960. out_pci_release_regions:
  2961. pci_release_regions(pdev);
  2962. pci_set_drvdata(pdev, NULL);
  2963. out_pci_disable_device:
  2964. pci_disable_device(pdev);
  2965. out_ieee80211_free_hw:
  2966. ieee80211_free_hw(priv->hw);
  2967. out:
  2968. return err;
  2969. }
  2970. static void __devexit iwl_pci_remove(struct pci_dev *pdev)
  2971. {
  2972. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2973. unsigned long flags;
  2974. if (!priv)
  2975. return;
  2976. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  2977. iwl_dbgfs_unregister(priv);
  2978. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  2979. /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
  2980. * to be called and iwl_down since we are removing the device
  2981. * we need to set STATUS_EXIT_PENDING bit.
  2982. */
  2983. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2984. if (priv->mac80211_registered) {
  2985. ieee80211_unregister_hw(priv->hw);
  2986. priv->mac80211_registered = 0;
  2987. } else {
  2988. iwl_down(priv);
  2989. }
  2990. /* make sure we flush any pending irq or
  2991. * tasklet for the driver
  2992. */
  2993. spin_lock_irqsave(&priv->lock, flags);
  2994. iwl_disable_interrupts(priv);
  2995. spin_unlock_irqrestore(&priv->lock, flags);
  2996. iwl_synchronize_irq(priv);
  2997. iwl_rfkill_unregister(priv);
  2998. iwl_dealloc_ucode_pci(priv);
  2999. if (priv->rxq.bd)
  3000. iwl_rx_queue_free(priv, &priv->rxq);
  3001. iwl_hw_txq_ctx_free(priv);
  3002. iwl_clear_stations_table(priv);
  3003. iwl_eeprom_free(priv);
  3004. /*netif_stop_queue(dev); */
  3005. flush_workqueue(priv->workqueue);
  3006. /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
  3007. * priv->workqueue... so we can't take down the workqueue
  3008. * until now... */
  3009. destroy_workqueue(priv->workqueue);
  3010. priv->workqueue = NULL;
  3011. free_irq(priv->pci_dev->irq, priv);
  3012. pci_disable_msi(priv->pci_dev);
  3013. pci_iounmap(pdev, priv->hw_base);
  3014. pci_release_regions(pdev);
  3015. pci_disable_device(pdev);
  3016. pci_set_drvdata(pdev, NULL);
  3017. iwl_uninit_drv(priv);
  3018. if (priv->ibss_beacon)
  3019. dev_kfree_skb(priv->ibss_beacon);
  3020. ieee80211_free_hw(priv->hw);
  3021. }
  3022. #ifdef CONFIG_PM
  3023. static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  3024. {
  3025. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3026. if (priv->is_open) {
  3027. set_bit(STATUS_IN_SUSPEND, &priv->status);
  3028. iwl_mac_stop(priv->hw);
  3029. priv->is_open = 1;
  3030. }
  3031. pci_save_state(pdev);
  3032. pci_disable_device(pdev);
  3033. pci_set_power_state(pdev, PCI_D3hot);
  3034. return 0;
  3035. }
  3036. static int iwl_pci_resume(struct pci_dev *pdev)
  3037. {
  3038. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3039. pci_set_power_state(pdev, PCI_D0);
  3040. pci_enable_device(pdev);
  3041. pci_restore_state(pdev);
  3042. iwl_enable_interrupts(priv);
  3043. if (priv->is_open)
  3044. iwl_mac_start(priv->hw);
  3045. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  3046. return 0;
  3047. }
  3048. #endif /* CONFIG_PM */
  3049. /*****************************************************************************
  3050. *
  3051. * driver and module entry point
  3052. *
  3053. *****************************************************************************/
  3054. /* Hardware specific file defines the PCI IDs table for that hardware module */
  3055. static struct pci_device_id iwl_hw_card_ids[] = {
  3056. #ifdef CONFIG_IWL4965
  3057. {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
  3058. {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
  3059. #endif /* CONFIG_IWL4965 */
  3060. #ifdef CONFIG_IWL5000
  3061. {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
  3062. {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
  3063. {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
  3064. {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
  3065. {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
  3066. {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
  3067. {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
  3068. {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
  3069. {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
  3070. {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
  3071. /* 5350 WiFi/WiMax */
  3072. {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
  3073. {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
  3074. {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
  3075. /* 5150 Wifi/WiMax */
  3076. {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
  3077. {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
  3078. /* 6000/6050 Series */
  3079. {IWL_PCI_DEVICE(0x0082, 0x1102, iwl6000_2ag_cfg)},
  3080. {IWL_PCI_DEVICE(0x0085, 0x1112, iwl6000_2ag_cfg)},
  3081. {IWL_PCI_DEVICE(0x0082, 0x1122, iwl6000_2ag_cfg)},
  3082. {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)},
  3083. {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)},
  3084. {IWL_PCI_DEVICE(0x0082, PCI_ANY_ID, iwl6000_2agn_cfg)},
  3085. {IWL_PCI_DEVICE(0x0085, PCI_ANY_ID, iwl6000_3agn_cfg)},
  3086. {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)},
  3087. {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)},
  3088. {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)},
  3089. {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)},
  3090. /* 100 Series WiFi */
  3091. {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl100_bgn_cfg)},
  3092. {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl100_bgn_cfg)},
  3093. #endif /* CONFIG_IWL5000 */
  3094. {0}
  3095. };
  3096. MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
  3097. static struct pci_driver iwl_driver = {
  3098. .name = DRV_NAME,
  3099. .id_table = iwl_hw_card_ids,
  3100. .probe = iwl_pci_probe,
  3101. .remove = __devexit_p(iwl_pci_remove),
  3102. #ifdef CONFIG_PM
  3103. .suspend = iwl_pci_suspend,
  3104. .resume = iwl_pci_resume,
  3105. #endif
  3106. };
  3107. static int __init iwl_init(void)
  3108. {
  3109. int ret;
  3110. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3111. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3112. ret = iwlagn_rate_control_register();
  3113. if (ret) {
  3114. printk(KERN_ERR DRV_NAME
  3115. "Unable to register rate control algorithm: %d\n", ret);
  3116. return ret;
  3117. }
  3118. ret = pci_register_driver(&iwl_driver);
  3119. if (ret) {
  3120. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3121. goto error_register;
  3122. }
  3123. return ret;
  3124. error_register:
  3125. iwlagn_rate_control_unregister();
  3126. return ret;
  3127. }
  3128. static void __exit iwl_exit(void)
  3129. {
  3130. pci_unregister_driver(&iwl_driver);
  3131. iwlagn_rate_control_unregister();
  3132. }
  3133. module_exit(iwl_exit);
  3134. module_init(iwl_init);