omap_hwmod.c 96 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include <linux/bootmem.h>
  140. #include "common.h"
  141. #include <plat/cpu.h>
  142. #include "clockdomain.h"
  143. #include "powerdomain.h"
  144. #include <plat/clock.h>
  145. #include <plat/omap_hwmod.h>
  146. #include <plat/prcm.h>
  147. #include "cm2xxx_3xxx.h"
  148. #include "cminst44xx.h"
  149. #include "prm2xxx_3xxx.h"
  150. #include "prm44xx.h"
  151. #include "prminst44xx.h"
  152. #include "mux.h"
  153. /* Maximum microseconds to wait for OMAP module to softreset */
  154. #define MAX_MODULE_SOFTRESET_WAIT 10000
  155. /* Name of the OMAP hwmod for the MPU */
  156. #define MPU_INITIATOR_NAME "mpu"
  157. /*
  158. * Number of struct omap_hwmod_link records per struct
  159. * omap_hwmod_ocp_if record (master->slave and slave->master)
  160. */
  161. #define LINKS_PER_OCP_IF 2
  162. /* omap_hwmod_list contains all registered struct omap_hwmods */
  163. static LIST_HEAD(omap_hwmod_list);
  164. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  165. static struct omap_hwmod *mpu_oh;
  166. /*
  167. * linkspace: ptr to a buffer that struct omap_hwmod_link records are
  168. * allocated from - used to reduce the number of small memory
  169. * allocations, which has a significant impact on performance
  170. */
  171. static struct omap_hwmod_link *linkspace;
  172. /*
  173. * free_ls, max_ls: array indexes into linkspace; representing the
  174. * next free struct omap_hwmod_link index, and the maximum number of
  175. * struct omap_hwmod_link records allocated (respectively)
  176. */
  177. static unsigned short free_ls, max_ls, ls_supp;
  178. /* Private functions */
  179. /**
  180. * _fetch_next_ocp_if - return the next OCP interface in a list
  181. * @p: ptr to a ptr to the list_head inside the ocp_if to return
  182. * @i: pointer to the index of the element pointed to by @p in the list
  183. *
  184. * Return a pointer to the struct omap_hwmod_ocp_if record
  185. * containing the struct list_head pointed to by @p, and increment
  186. * @p such that a future call to this routine will return the next
  187. * record.
  188. */
  189. static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
  190. int *i)
  191. {
  192. struct omap_hwmod_ocp_if *oi;
  193. oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
  194. *p = (*p)->next;
  195. *i = *i + 1;
  196. return oi;
  197. }
  198. /**
  199. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  200. * @oh: struct omap_hwmod *
  201. *
  202. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  203. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  204. * OCP_SYSCONFIG register or 0 upon success.
  205. */
  206. static int _update_sysc_cache(struct omap_hwmod *oh)
  207. {
  208. if (!oh->class->sysc) {
  209. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  210. return -EINVAL;
  211. }
  212. /* XXX ensure module interface clock is up */
  213. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  214. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  215. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  216. return 0;
  217. }
  218. /**
  219. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  220. * @v: OCP_SYSCONFIG value to write
  221. * @oh: struct omap_hwmod *
  222. *
  223. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  224. * one. No return value.
  225. */
  226. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  227. {
  228. if (!oh->class->sysc) {
  229. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  230. return;
  231. }
  232. /* XXX ensure module interface clock is up */
  233. /* Module might have lost context, always update cache and register */
  234. oh->_sysc_cache = v;
  235. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  236. }
  237. /**
  238. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  239. * @oh: struct omap_hwmod *
  240. * @standbymode: MIDLEMODE field bits
  241. * @v: pointer to register contents to modify
  242. *
  243. * Update the master standby mode bits in @v to be @standbymode for
  244. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  245. * upon error or 0 upon success.
  246. */
  247. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  248. u32 *v)
  249. {
  250. u32 mstandby_mask;
  251. u8 mstandby_shift;
  252. if (!oh->class->sysc ||
  253. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  254. return -EINVAL;
  255. if (!oh->class->sysc->sysc_fields) {
  256. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  257. return -EINVAL;
  258. }
  259. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  260. mstandby_mask = (0x3 << mstandby_shift);
  261. *v &= ~mstandby_mask;
  262. *v |= __ffs(standbymode) << mstandby_shift;
  263. return 0;
  264. }
  265. /**
  266. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  267. * @oh: struct omap_hwmod *
  268. * @idlemode: SIDLEMODE field bits
  269. * @v: pointer to register contents to modify
  270. *
  271. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  272. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  273. * or 0 upon success.
  274. */
  275. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  276. {
  277. u32 sidle_mask;
  278. u8 sidle_shift;
  279. if (!oh->class->sysc ||
  280. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  281. return -EINVAL;
  282. if (!oh->class->sysc->sysc_fields) {
  283. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  284. return -EINVAL;
  285. }
  286. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  287. sidle_mask = (0x3 << sidle_shift);
  288. *v &= ~sidle_mask;
  289. *v |= __ffs(idlemode) << sidle_shift;
  290. return 0;
  291. }
  292. /**
  293. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  294. * @oh: struct omap_hwmod *
  295. * @clockact: CLOCKACTIVITY field bits
  296. * @v: pointer to register contents to modify
  297. *
  298. * Update the clockactivity mode bits in @v to be @clockact for the
  299. * @oh hwmod. Used for additional powersaving on some modules. Does
  300. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  301. * success.
  302. */
  303. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  304. {
  305. u32 clkact_mask;
  306. u8 clkact_shift;
  307. if (!oh->class->sysc ||
  308. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  309. return -EINVAL;
  310. if (!oh->class->sysc->sysc_fields) {
  311. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  312. return -EINVAL;
  313. }
  314. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  315. clkact_mask = (0x3 << clkact_shift);
  316. *v &= ~clkact_mask;
  317. *v |= clockact << clkact_shift;
  318. return 0;
  319. }
  320. /**
  321. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  322. * @oh: struct omap_hwmod *
  323. * @v: pointer to register contents to modify
  324. *
  325. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  326. * error or 0 upon success.
  327. */
  328. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  329. {
  330. u32 softrst_mask;
  331. if (!oh->class->sysc ||
  332. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  333. return -EINVAL;
  334. if (!oh->class->sysc->sysc_fields) {
  335. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  336. return -EINVAL;
  337. }
  338. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  339. *v |= softrst_mask;
  340. return 0;
  341. }
  342. /**
  343. * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
  344. * @oh: struct omap_hwmod *
  345. *
  346. * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
  347. * of some modules. When the DMA must perform read/write accesses, the
  348. * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
  349. * for power management, software must set the DMADISABLE bit back to 1.
  350. *
  351. * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
  352. * error or 0 upon success.
  353. */
  354. static int _set_dmadisable(struct omap_hwmod *oh)
  355. {
  356. u32 v;
  357. u32 dmadisable_mask;
  358. if (!oh->class->sysc ||
  359. !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
  360. return -EINVAL;
  361. if (!oh->class->sysc->sysc_fields) {
  362. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  363. return -EINVAL;
  364. }
  365. /* clocks must be on for this operation */
  366. if (oh->_state != _HWMOD_STATE_ENABLED) {
  367. pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
  368. return -EINVAL;
  369. }
  370. pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
  371. v = oh->_sysc_cache;
  372. dmadisable_mask =
  373. (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
  374. v |= dmadisable_mask;
  375. _write_sysconfig(v, oh);
  376. return 0;
  377. }
  378. /**
  379. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  380. * @oh: struct omap_hwmod *
  381. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  382. * @v: pointer to register contents to modify
  383. *
  384. * Update the module autoidle bit in @v to be @autoidle for the @oh
  385. * hwmod. The autoidle bit controls whether the module can gate
  386. * internal clocks automatically when it isn't doing anything; the
  387. * exact function of this bit varies on a per-module basis. This
  388. * function does not write to the hardware. Returns -EINVAL upon
  389. * error or 0 upon success.
  390. */
  391. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  392. u32 *v)
  393. {
  394. u32 autoidle_mask;
  395. u8 autoidle_shift;
  396. if (!oh->class->sysc ||
  397. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  398. return -EINVAL;
  399. if (!oh->class->sysc->sysc_fields) {
  400. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  401. return -EINVAL;
  402. }
  403. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  404. autoidle_mask = (0x1 << autoidle_shift);
  405. *v &= ~autoidle_mask;
  406. *v |= autoidle << autoidle_shift;
  407. return 0;
  408. }
  409. /**
  410. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  411. * @oh: struct omap_hwmod *
  412. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  413. *
  414. * Set or clear the I/O pad wakeup flag in the mux entries for the
  415. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  416. * in memory. If the hwmod is currently idled, and the new idle
  417. * values don't match the previous ones, this function will also
  418. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  419. * currently idled, this function won't touch the hardware: the new
  420. * mux settings are written to the SCM PADCTRL registers when the
  421. * hwmod is idled. No return value.
  422. */
  423. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  424. {
  425. struct omap_device_pad *pad;
  426. bool change = false;
  427. u16 prev_idle;
  428. int j;
  429. if (!oh->mux || !oh->mux->enabled)
  430. return;
  431. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  432. pad = oh->mux->pads_dynamic[j];
  433. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  434. continue;
  435. prev_idle = pad->idle;
  436. if (set_wake)
  437. pad->idle |= OMAP_WAKEUP_EN;
  438. else
  439. pad->idle &= ~OMAP_WAKEUP_EN;
  440. if (prev_idle != pad->idle)
  441. change = true;
  442. }
  443. if (change && oh->_state == _HWMOD_STATE_IDLE)
  444. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  445. }
  446. /**
  447. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  448. * @oh: struct omap_hwmod *
  449. *
  450. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  451. * upon error or 0 upon success.
  452. */
  453. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  454. {
  455. if (!oh->class->sysc ||
  456. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  457. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  458. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  459. return -EINVAL;
  460. if (!oh->class->sysc->sysc_fields) {
  461. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  462. return -EINVAL;
  463. }
  464. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  465. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  466. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  467. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  468. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  469. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  470. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  471. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  472. return 0;
  473. }
  474. /**
  475. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  476. * @oh: struct omap_hwmod *
  477. *
  478. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  479. * upon error or 0 upon success.
  480. */
  481. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  482. {
  483. if (!oh->class->sysc ||
  484. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  485. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  486. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  487. return -EINVAL;
  488. if (!oh->class->sysc->sysc_fields) {
  489. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  490. return -EINVAL;
  491. }
  492. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  493. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  494. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  495. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  496. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  497. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
  498. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  499. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  500. return 0;
  501. }
  502. /**
  503. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  504. * @oh: struct omap_hwmod *
  505. *
  506. * Prevent the hardware module @oh from entering idle while the
  507. * hardare module initiator @init_oh is active. Useful when a module
  508. * will be accessed by a particular initiator (e.g., if a module will
  509. * be accessed by the IVA, there should be a sleepdep between the IVA
  510. * initiator and the module). Only applies to modules in smart-idle
  511. * mode. If the clockdomain is marked as not needing autodeps, return
  512. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  513. * passes along clkdm_add_sleepdep() value upon success.
  514. */
  515. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  516. {
  517. if (!oh->_clk)
  518. return -EINVAL;
  519. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  520. return 0;
  521. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  522. }
  523. /**
  524. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  525. * @oh: struct omap_hwmod *
  526. *
  527. * Allow the hardware module @oh to enter idle while the hardare
  528. * module initiator @init_oh is active. Useful when a module will not
  529. * be accessed by a particular initiator (e.g., if a module will not
  530. * be accessed by the IVA, there should be no sleepdep between the IVA
  531. * initiator and the module). Only applies to modules in smart-idle
  532. * mode. If the clockdomain is marked as not needing autodeps, return
  533. * 0 without doing anything. Returns -EINVAL upon error or passes
  534. * along clkdm_del_sleepdep() value upon success.
  535. */
  536. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  537. {
  538. if (!oh->_clk)
  539. return -EINVAL;
  540. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  541. return 0;
  542. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  543. }
  544. /**
  545. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  546. * @oh: struct omap_hwmod *
  547. *
  548. * Called from _init_clocks(). Populates the @oh _clk (main
  549. * functional clock pointer) if a main_clk is present. Returns 0 on
  550. * success or -EINVAL on error.
  551. */
  552. static int _init_main_clk(struct omap_hwmod *oh)
  553. {
  554. int ret = 0;
  555. if (!oh->main_clk)
  556. return 0;
  557. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  558. if (!oh->_clk) {
  559. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  560. oh->name, oh->main_clk);
  561. return -EINVAL;
  562. }
  563. if (!oh->_clk->clkdm)
  564. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  565. oh->main_clk, oh->_clk->name);
  566. return ret;
  567. }
  568. /**
  569. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  570. * @oh: struct omap_hwmod *
  571. *
  572. * Called from _init_clocks(). Populates the @oh OCP slave interface
  573. * clock pointers. Returns 0 on success or -EINVAL on error.
  574. */
  575. static int _init_interface_clks(struct omap_hwmod *oh)
  576. {
  577. struct omap_hwmod_ocp_if *os;
  578. struct list_head *p;
  579. struct clk *c;
  580. int i = 0;
  581. int ret = 0;
  582. p = oh->slave_ports.next;
  583. while (i < oh->slaves_cnt) {
  584. os = _fetch_next_ocp_if(&p, &i);
  585. if (!os->clk)
  586. continue;
  587. c = omap_clk_get_by_name(os->clk);
  588. if (!c) {
  589. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  590. oh->name, os->clk);
  591. ret = -EINVAL;
  592. }
  593. os->_clk = c;
  594. }
  595. return ret;
  596. }
  597. /**
  598. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  599. * @oh: struct omap_hwmod *
  600. *
  601. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  602. * clock pointers. Returns 0 on success or -EINVAL on error.
  603. */
  604. static int _init_opt_clks(struct omap_hwmod *oh)
  605. {
  606. struct omap_hwmod_opt_clk *oc;
  607. struct clk *c;
  608. int i;
  609. int ret = 0;
  610. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  611. c = omap_clk_get_by_name(oc->clk);
  612. if (!c) {
  613. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  614. oh->name, oc->clk);
  615. ret = -EINVAL;
  616. }
  617. oc->_clk = c;
  618. }
  619. return ret;
  620. }
  621. /**
  622. * _enable_clocks - enable hwmod main clock and interface clocks
  623. * @oh: struct omap_hwmod *
  624. *
  625. * Enables all clocks necessary for register reads and writes to succeed
  626. * on the hwmod @oh. Returns 0.
  627. */
  628. static int _enable_clocks(struct omap_hwmod *oh)
  629. {
  630. struct omap_hwmod_ocp_if *os;
  631. struct list_head *p;
  632. int i = 0;
  633. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  634. if (oh->_clk)
  635. clk_enable(oh->_clk);
  636. p = oh->slave_ports.next;
  637. while (i < oh->slaves_cnt) {
  638. os = _fetch_next_ocp_if(&p, &i);
  639. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  640. clk_enable(os->_clk);
  641. }
  642. /* The opt clocks are controlled by the device driver. */
  643. return 0;
  644. }
  645. /**
  646. * _disable_clocks - disable hwmod main clock and interface clocks
  647. * @oh: struct omap_hwmod *
  648. *
  649. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  650. */
  651. static int _disable_clocks(struct omap_hwmod *oh)
  652. {
  653. struct omap_hwmod_ocp_if *os;
  654. struct list_head *p;
  655. int i = 0;
  656. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  657. if (oh->_clk)
  658. clk_disable(oh->_clk);
  659. p = oh->slave_ports.next;
  660. while (i < oh->slaves_cnt) {
  661. os = _fetch_next_ocp_if(&p, &i);
  662. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  663. clk_disable(os->_clk);
  664. }
  665. /* The opt clocks are controlled by the device driver. */
  666. return 0;
  667. }
  668. static void _enable_optional_clocks(struct omap_hwmod *oh)
  669. {
  670. struct omap_hwmod_opt_clk *oc;
  671. int i;
  672. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  673. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  674. if (oc->_clk) {
  675. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  676. oc->_clk->name);
  677. clk_enable(oc->_clk);
  678. }
  679. }
  680. static void _disable_optional_clocks(struct omap_hwmod *oh)
  681. {
  682. struct omap_hwmod_opt_clk *oc;
  683. int i;
  684. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  685. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  686. if (oc->_clk) {
  687. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  688. oc->_clk->name);
  689. clk_disable(oc->_clk);
  690. }
  691. }
  692. /**
  693. * _enable_module - enable CLKCTRL modulemode on OMAP4
  694. * @oh: struct omap_hwmod *
  695. *
  696. * Enables the PRCM module mode related to the hwmod @oh.
  697. * No return value.
  698. */
  699. static void _enable_module(struct omap_hwmod *oh)
  700. {
  701. /* The module mode does not exist prior OMAP4 */
  702. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  703. return;
  704. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  705. return;
  706. pr_debug("omap_hwmod: %s: _enable_module: %d\n",
  707. oh->name, oh->prcm.omap4.modulemode);
  708. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  709. oh->clkdm->prcm_partition,
  710. oh->clkdm->cm_inst,
  711. oh->clkdm->clkdm_offs,
  712. oh->prcm.omap4.clkctrl_offs);
  713. }
  714. /**
  715. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  716. * @oh: struct omap_hwmod *
  717. *
  718. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  719. * does not have an IDLEST bit or if the module successfully enters
  720. * slave idle; otherwise, pass along the return value of the
  721. * appropriate *_cm*_wait_module_idle() function.
  722. */
  723. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  724. {
  725. if (!cpu_is_omap44xx())
  726. return 0;
  727. if (!oh)
  728. return -EINVAL;
  729. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  730. return 0;
  731. if (oh->flags & HWMOD_NO_IDLEST)
  732. return 0;
  733. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  734. oh->clkdm->cm_inst,
  735. oh->clkdm->clkdm_offs,
  736. oh->prcm.omap4.clkctrl_offs);
  737. }
  738. /**
  739. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  740. * @oh: struct omap_hwmod *oh
  741. *
  742. * Count and return the number of MPU IRQs associated with the hwmod
  743. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  744. * NULL.
  745. */
  746. static int _count_mpu_irqs(struct omap_hwmod *oh)
  747. {
  748. struct omap_hwmod_irq_info *ohii;
  749. int i = 0;
  750. if (!oh || !oh->mpu_irqs)
  751. return 0;
  752. do {
  753. ohii = &oh->mpu_irqs[i++];
  754. } while (ohii->irq != -1);
  755. return i-1;
  756. }
  757. /**
  758. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  759. * @oh: struct omap_hwmod *oh
  760. *
  761. * Count and return the number of SDMA request lines associated with
  762. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  763. * if @oh is NULL.
  764. */
  765. static int _count_sdma_reqs(struct omap_hwmod *oh)
  766. {
  767. struct omap_hwmod_dma_info *ohdi;
  768. int i = 0;
  769. if (!oh || !oh->sdma_reqs)
  770. return 0;
  771. do {
  772. ohdi = &oh->sdma_reqs[i++];
  773. } while (ohdi->dma_req != -1);
  774. return i-1;
  775. }
  776. /**
  777. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  778. * @oh: struct omap_hwmod *oh
  779. *
  780. * Count and return the number of address space ranges associated with
  781. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  782. * if @oh is NULL.
  783. */
  784. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  785. {
  786. struct omap_hwmod_addr_space *mem;
  787. int i = 0;
  788. if (!os || !os->addr)
  789. return 0;
  790. do {
  791. mem = &os->addr[i++];
  792. } while (mem->pa_start != mem->pa_end);
  793. return i-1;
  794. }
  795. /**
  796. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  797. * @oh: struct omap_hwmod * to operate on
  798. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  799. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  800. *
  801. * Retrieve a MPU hardware IRQ line number named by @name associated
  802. * with the IP block pointed to by @oh. The IRQ number will be filled
  803. * into the address pointed to by @dma. When @name is non-null, the
  804. * IRQ line number associated with the named entry will be returned.
  805. * If @name is null, the first matching entry will be returned. Data
  806. * order is not meaningful in hwmod data, so callers are strongly
  807. * encouraged to use a non-null @name whenever possible to avoid
  808. * unpredictable effects if hwmod data is later added that causes data
  809. * ordering to change. Returns 0 upon success or a negative error
  810. * code upon error.
  811. */
  812. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  813. unsigned int *irq)
  814. {
  815. int i;
  816. bool found = false;
  817. if (!oh->mpu_irqs)
  818. return -ENOENT;
  819. i = 0;
  820. while (oh->mpu_irqs[i].irq != -1) {
  821. if (name == oh->mpu_irqs[i].name ||
  822. !strcmp(name, oh->mpu_irqs[i].name)) {
  823. found = true;
  824. break;
  825. }
  826. i++;
  827. }
  828. if (!found)
  829. return -ENOENT;
  830. *irq = oh->mpu_irqs[i].irq;
  831. return 0;
  832. }
  833. /**
  834. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  835. * @oh: struct omap_hwmod * to operate on
  836. * @name: pointer to the name of the SDMA request line to fetch (optional)
  837. * @dma: pointer to an unsigned int to store the request line ID to
  838. *
  839. * Retrieve an SDMA request line ID named by @name on the IP block
  840. * pointed to by @oh. The ID will be filled into the address pointed
  841. * to by @dma. When @name is non-null, the request line ID associated
  842. * with the named entry will be returned. If @name is null, the first
  843. * matching entry will be returned. Data order is not meaningful in
  844. * hwmod data, so callers are strongly encouraged to use a non-null
  845. * @name whenever possible to avoid unpredictable effects if hwmod
  846. * data is later added that causes data ordering to change. Returns 0
  847. * upon success or a negative error code upon error.
  848. */
  849. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  850. unsigned int *dma)
  851. {
  852. int i;
  853. bool found = false;
  854. if (!oh->sdma_reqs)
  855. return -ENOENT;
  856. i = 0;
  857. while (oh->sdma_reqs[i].dma_req != -1) {
  858. if (name == oh->sdma_reqs[i].name ||
  859. !strcmp(name, oh->sdma_reqs[i].name)) {
  860. found = true;
  861. break;
  862. }
  863. i++;
  864. }
  865. if (!found)
  866. return -ENOENT;
  867. *dma = oh->sdma_reqs[i].dma_req;
  868. return 0;
  869. }
  870. /**
  871. * _get_addr_space_by_name - fetch address space start & end by name
  872. * @oh: struct omap_hwmod * to operate on
  873. * @name: pointer to the name of the address space to fetch (optional)
  874. * @pa_start: pointer to a u32 to store the starting address to
  875. * @pa_end: pointer to a u32 to store the ending address to
  876. *
  877. * Retrieve address space start and end addresses for the IP block
  878. * pointed to by @oh. The data will be filled into the addresses
  879. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  880. * address space data associated with the named entry will be
  881. * returned. If @name is null, the first matching entry will be
  882. * returned. Data order is not meaningful in hwmod data, so callers
  883. * are strongly encouraged to use a non-null @name whenever possible
  884. * to avoid unpredictable effects if hwmod data is later added that
  885. * causes data ordering to change. Returns 0 upon success or a
  886. * negative error code upon error.
  887. */
  888. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  889. u32 *pa_start, u32 *pa_end)
  890. {
  891. int i, j;
  892. struct omap_hwmod_ocp_if *os;
  893. struct list_head *p = NULL;
  894. bool found = false;
  895. p = oh->slave_ports.next;
  896. i = 0;
  897. while (i < oh->slaves_cnt) {
  898. os = _fetch_next_ocp_if(&p, &i);
  899. if (!os->addr)
  900. return -ENOENT;
  901. j = 0;
  902. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  903. if (name == os->addr[j].name ||
  904. !strcmp(name, os->addr[j].name)) {
  905. found = true;
  906. break;
  907. }
  908. j++;
  909. }
  910. if (found)
  911. break;
  912. }
  913. if (!found)
  914. return -ENOENT;
  915. *pa_start = os->addr[j].pa_start;
  916. *pa_end = os->addr[j].pa_end;
  917. return 0;
  918. }
  919. /**
  920. * _save_mpu_port_index - find and save the index to @oh's MPU port
  921. * @oh: struct omap_hwmod *
  922. *
  923. * Determines the array index of the OCP slave port that the MPU uses
  924. * to address the device, and saves it into the struct omap_hwmod.
  925. * Intended to be called during hwmod registration only. No return
  926. * value.
  927. */
  928. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  929. {
  930. struct omap_hwmod_ocp_if *os = NULL;
  931. struct list_head *p;
  932. int i = 0;
  933. if (!oh)
  934. return;
  935. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  936. p = oh->slave_ports.next;
  937. while (i < oh->slaves_cnt) {
  938. os = _fetch_next_ocp_if(&p, &i);
  939. if (os->user & OCP_USER_MPU) {
  940. oh->_mpu_port = os;
  941. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  942. break;
  943. }
  944. }
  945. return;
  946. }
  947. /**
  948. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  949. * @oh: struct omap_hwmod *
  950. *
  951. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  952. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  953. * communicate with the IP block. This interface need not be directly
  954. * connected to the MPU (and almost certainly is not), but is directly
  955. * connected to the IP block represented by @oh. Returns a pointer
  956. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  957. * error or if there does not appear to be a path from the MPU to this
  958. * IP block.
  959. */
  960. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  961. {
  962. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  963. return NULL;
  964. return oh->_mpu_port;
  965. };
  966. /**
  967. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  968. * @oh: struct omap_hwmod *
  969. *
  970. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  971. * the register target MPU address space; or returns NULL upon error.
  972. */
  973. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  974. {
  975. struct omap_hwmod_ocp_if *os;
  976. struct omap_hwmod_addr_space *mem;
  977. int found = 0, i = 0;
  978. os = _find_mpu_rt_port(oh);
  979. if (!os || !os->addr)
  980. return NULL;
  981. do {
  982. mem = &os->addr[i++];
  983. if (mem->flags & ADDR_TYPE_RT)
  984. found = 1;
  985. } while (!found && mem->pa_start != mem->pa_end);
  986. return (found) ? mem : NULL;
  987. }
  988. /**
  989. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  990. * @oh: struct omap_hwmod *
  991. *
  992. * If module is marked as SWSUP_SIDLE, force the module out of slave
  993. * idle; otherwise, configure it for smart-idle. If module is marked
  994. * as SWSUP_MSUSPEND, force the module out of master standby;
  995. * otherwise, configure it for smart-standby. No return value.
  996. */
  997. static void _enable_sysc(struct omap_hwmod *oh)
  998. {
  999. u8 idlemode, sf;
  1000. u32 v;
  1001. if (!oh->class->sysc)
  1002. return;
  1003. v = oh->_sysc_cache;
  1004. sf = oh->class->sysc->sysc_flags;
  1005. if (sf & SYSC_HAS_SIDLEMODE) {
  1006. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  1007. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  1008. _set_slave_idlemode(oh, idlemode, &v);
  1009. }
  1010. if (sf & SYSC_HAS_MIDLEMODE) {
  1011. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1012. idlemode = HWMOD_IDLEMODE_NO;
  1013. } else {
  1014. if (sf & SYSC_HAS_ENAWAKEUP)
  1015. _enable_wakeup(oh, &v);
  1016. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1017. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1018. else
  1019. idlemode = HWMOD_IDLEMODE_SMART;
  1020. }
  1021. _set_master_standbymode(oh, idlemode, &v);
  1022. }
  1023. /*
  1024. * XXX The clock framework should handle this, by
  1025. * calling into this code. But this must wait until the
  1026. * clock structures are tagged with omap_hwmod entries
  1027. */
  1028. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  1029. (sf & SYSC_HAS_CLOCKACTIVITY))
  1030. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  1031. /* If slave is in SMARTIDLE, also enable wakeup */
  1032. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1033. _enable_wakeup(oh, &v);
  1034. _write_sysconfig(v, oh);
  1035. /*
  1036. * Set the autoidle bit only after setting the smartidle bit
  1037. * Setting this will not have any impact on the other modules.
  1038. */
  1039. if (sf & SYSC_HAS_AUTOIDLE) {
  1040. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  1041. 0 : 1;
  1042. _set_module_autoidle(oh, idlemode, &v);
  1043. _write_sysconfig(v, oh);
  1044. }
  1045. }
  1046. /**
  1047. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  1048. * @oh: struct omap_hwmod *
  1049. *
  1050. * If module is marked as SWSUP_SIDLE, force the module into slave
  1051. * idle; otherwise, configure it for smart-idle. If module is marked
  1052. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  1053. * configure it for smart-standby. No return value.
  1054. */
  1055. static void _idle_sysc(struct omap_hwmod *oh)
  1056. {
  1057. u8 idlemode, sf;
  1058. u32 v;
  1059. if (!oh->class->sysc)
  1060. return;
  1061. v = oh->_sysc_cache;
  1062. sf = oh->class->sysc->sysc_flags;
  1063. if (sf & SYSC_HAS_SIDLEMODE) {
  1064. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  1065. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  1066. _set_slave_idlemode(oh, idlemode, &v);
  1067. }
  1068. if (sf & SYSC_HAS_MIDLEMODE) {
  1069. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1070. idlemode = HWMOD_IDLEMODE_FORCE;
  1071. } else {
  1072. if (sf & SYSC_HAS_ENAWAKEUP)
  1073. _enable_wakeup(oh, &v);
  1074. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1075. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1076. else
  1077. idlemode = HWMOD_IDLEMODE_SMART;
  1078. }
  1079. _set_master_standbymode(oh, idlemode, &v);
  1080. }
  1081. /* If slave is in SMARTIDLE, also enable wakeup */
  1082. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1083. _enable_wakeup(oh, &v);
  1084. _write_sysconfig(v, oh);
  1085. }
  1086. /**
  1087. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1088. * @oh: struct omap_hwmod *
  1089. *
  1090. * Force the module into slave idle and master suspend. No return
  1091. * value.
  1092. */
  1093. static void _shutdown_sysc(struct omap_hwmod *oh)
  1094. {
  1095. u32 v;
  1096. u8 sf;
  1097. if (!oh->class->sysc)
  1098. return;
  1099. v = oh->_sysc_cache;
  1100. sf = oh->class->sysc->sysc_flags;
  1101. if (sf & SYSC_HAS_SIDLEMODE)
  1102. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1103. if (sf & SYSC_HAS_MIDLEMODE)
  1104. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1105. if (sf & SYSC_HAS_AUTOIDLE)
  1106. _set_module_autoidle(oh, 1, &v);
  1107. _write_sysconfig(v, oh);
  1108. }
  1109. /**
  1110. * _lookup - find an omap_hwmod by name
  1111. * @name: find an omap_hwmod by name
  1112. *
  1113. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1114. */
  1115. static struct omap_hwmod *_lookup(const char *name)
  1116. {
  1117. struct omap_hwmod *oh, *temp_oh;
  1118. oh = NULL;
  1119. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1120. if (!strcmp(name, temp_oh->name)) {
  1121. oh = temp_oh;
  1122. break;
  1123. }
  1124. }
  1125. return oh;
  1126. }
  1127. /**
  1128. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1129. * @oh: struct omap_hwmod *
  1130. *
  1131. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1132. * clockdomain pointer, and save it into the struct omap_hwmod.
  1133. * return -EINVAL if clkdm_name does not exist or if the lookup failed.
  1134. */
  1135. static int _init_clkdm(struct omap_hwmod *oh)
  1136. {
  1137. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1138. return 0;
  1139. if (!oh->clkdm_name) {
  1140. pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
  1141. return -EINVAL;
  1142. }
  1143. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1144. if (!oh->clkdm) {
  1145. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  1146. oh->name, oh->clkdm_name);
  1147. return -EINVAL;
  1148. }
  1149. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1150. oh->name, oh->clkdm_name);
  1151. return 0;
  1152. }
  1153. /**
  1154. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1155. * well the clockdomain.
  1156. * @oh: struct omap_hwmod *
  1157. * @data: not used; pass NULL
  1158. *
  1159. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1160. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1161. * success, or a negative error code on failure.
  1162. */
  1163. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1164. {
  1165. int ret = 0;
  1166. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1167. return 0;
  1168. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1169. ret |= _init_main_clk(oh);
  1170. ret |= _init_interface_clks(oh);
  1171. ret |= _init_opt_clks(oh);
  1172. ret |= _init_clkdm(oh);
  1173. if (!ret)
  1174. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1175. else
  1176. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1177. return ret;
  1178. }
  1179. /**
  1180. * _wait_target_ready - wait for a module to leave slave idle
  1181. * @oh: struct omap_hwmod *
  1182. *
  1183. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  1184. * does not have an IDLEST bit or if the module successfully leaves
  1185. * slave idle; otherwise, pass along the return value of the
  1186. * appropriate *_cm*_wait_module_ready() function.
  1187. */
  1188. static int _wait_target_ready(struct omap_hwmod *oh)
  1189. {
  1190. struct omap_hwmod_ocp_if *os;
  1191. int ret;
  1192. if (!oh)
  1193. return -EINVAL;
  1194. if (oh->flags & HWMOD_NO_IDLEST)
  1195. return 0;
  1196. os = _find_mpu_rt_port(oh);
  1197. if (!os)
  1198. return 0;
  1199. /* XXX check module SIDLEMODE */
  1200. /* XXX check clock enable states */
  1201. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1202. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  1203. oh->prcm.omap2.idlest_reg_id,
  1204. oh->prcm.omap2.idlest_idle_bit);
  1205. } else if (cpu_is_omap44xx()) {
  1206. if (!oh->clkdm)
  1207. return -EINVAL;
  1208. ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  1209. oh->clkdm->cm_inst,
  1210. oh->clkdm->clkdm_offs,
  1211. oh->prcm.omap4.clkctrl_offs);
  1212. } else {
  1213. BUG();
  1214. };
  1215. return ret;
  1216. }
  1217. /**
  1218. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1219. * @oh: struct omap_hwmod *
  1220. * @name: name of the reset line in the context of this hwmod
  1221. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1222. *
  1223. * Return the bit position of the reset line that match the
  1224. * input name. Return -ENOENT if not found.
  1225. */
  1226. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1227. struct omap_hwmod_rst_info *ohri)
  1228. {
  1229. int i;
  1230. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1231. const char *rst_line = oh->rst_lines[i].name;
  1232. if (!strcmp(rst_line, name)) {
  1233. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1234. ohri->st_shift = oh->rst_lines[i].st_shift;
  1235. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1236. oh->name, __func__, rst_line, ohri->rst_shift,
  1237. ohri->st_shift);
  1238. return 0;
  1239. }
  1240. }
  1241. return -ENOENT;
  1242. }
  1243. /**
  1244. * _assert_hardreset - assert the HW reset line of submodules
  1245. * contained in the hwmod module.
  1246. * @oh: struct omap_hwmod *
  1247. * @name: name of the reset line to lookup and assert
  1248. *
  1249. * Some IP like dsp, ipu or iva contain processor that require
  1250. * an HW reset line to be assert / deassert in order to enable fully
  1251. * the IP.
  1252. */
  1253. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1254. {
  1255. struct omap_hwmod_rst_info ohri;
  1256. u8 ret;
  1257. if (!oh)
  1258. return -EINVAL;
  1259. ret = _lookup_hardreset(oh, name, &ohri);
  1260. if (IS_ERR_VALUE(ret))
  1261. return ret;
  1262. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1263. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  1264. ohri.rst_shift);
  1265. else if (cpu_is_omap44xx())
  1266. return omap4_prminst_assert_hardreset(ohri.rst_shift,
  1267. oh->clkdm->pwrdm.ptr->prcm_partition,
  1268. oh->clkdm->pwrdm.ptr->prcm_offs,
  1269. oh->prcm.omap4.rstctrl_offs);
  1270. else
  1271. return -EINVAL;
  1272. }
  1273. /**
  1274. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1275. * in the hwmod module.
  1276. * @oh: struct omap_hwmod *
  1277. * @name: name of the reset line to look up and deassert
  1278. *
  1279. * Some IP like dsp, ipu or iva contain processor that require
  1280. * an HW reset line to be assert / deassert in order to enable fully
  1281. * the IP.
  1282. */
  1283. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1284. {
  1285. struct omap_hwmod_rst_info ohri;
  1286. int ret;
  1287. if (!oh)
  1288. return -EINVAL;
  1289. ret = _lookup_hardreset(oh, name, &ohri);
  1290. if (IS_ERR_VALUE(ret))
  1291. return ret;
  1292. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1293. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  1294. ohri.rst_shift,
  1295. ohri.st_shift);
  1296. } else if (cpu_is_omap44xx()) {
  1297. if (ohri.st_shift)
  1298. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  1299. oh->name, name);
  1300. ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
  1301. oh->clkdm->pwrdm.ptr->prcm_partition,
  1302. oh->clkdm->pwrdm.ptr->prcm_offs,
  1303. oh->prcm.omap4.rstctrl_offs);
  1304. } else {
  1305. return -EINVAL;
  1306. }
  1307. if (ret == -EBUSY)
  1308. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1309. return ret;
  1310. }
  1311. /**
  1312. * _read_hardreset - read the HW reset line state of submodules
  1313. * contained in the hwmod module
  1314. * @oh: struct omap_hwmod *
  1315. * @name: name of the reset line to look up and read
  1316. *
  1317. * Return the state of the reset line.
  1318. */
  1319. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1320. {
  1321. struct omap_hwmod_rst_info ohri;
  1322. u8 ret;
  1323. if (!oh)
  1324. return -EINVAL;
  1325. ret = _lookup_hardreset(oh, name, &ohri);
  1326. if (IS_ERR_VALUE(ret))
  1327. return ret;
  1328. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1329. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  1330. ohri.st_shift);
  1331. } else if (cpu_is_omap44xx()) {
  1332. return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
  1333. oh->clkdm->pwrdm.ptr->prcm_partition,
  1334. oh->clkdm->pwrdm.ptr->prcm_offs,
  1335. oh->prcm.omap4.rstctrl_offs);
  1336. } else {
  1337. return -EINVAL;
  1338. }
  1339. }
  1340. /**
  1341. * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
  1342. * @oh: struct omap_hwmod *
  1343. *
  1344. * If any hardreset line associated with @oh is asserted, then return true.
  1345. * Otherwise, if @oh has no hardreset lines associated with it, or if
  1346. * no hardreset lines associated with @oh are asserted, then return false.
  1347. * This function is used to avoid executing some parts of the IP block
  1348. * enable/disable sequence if a hardreset line is set.
  1349. */
  1350. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1351. {
  1352. int i;
  1353. if (oh->rst_lines_cnt == 0)
  1354. return false;
  1355. for (i = 0; i < oh->rst_lines_cnt; i++)
  1356. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1357. return true;
  1358. return false;
  1359. }
  1360. /**
  1361. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1362. * @oh: struct omap_hwmod *
  1363. *
  1364. * Disable the PRCM module mode related to the hwmod @oh.
  1365. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1366. */
  1367. static int _omap4_disable_module(struct omap_hwmod *oh)
  1368. {
  1369. int v;
  1370. /* The module mode does not exist prior OMAP4 */
  1371. if (!cpu_is_omap44xx())
  1372. return -EINVAL;
  1373. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1374. return -EINVAL;
  1375. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1376. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1377. oh->clkdm->cm_inst,
  1378. oh->clkdm->clkdm_offs,
  1379. oh->prcm.omap4.clkctrl_offs);
  1380. if (_are_any_hardreset_lines_asserted(oh))
  1381. return 0;
  1382. v = _omap4_wait_target_disable(oh);
  1383. if (v)
  1384. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1385. oh->name);
  1386. return 0;
  1387. }
  1388. /**
  1389. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1390. * @oh: struct omap_hwmod *
  1391. *
  1392. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1393. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1394. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1395. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1396. *
  1397. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1398. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1399. * use the SYSCONFIG softreset bit to provide the status.
  1400. *
  1401. * Note that some IP like McBSP do have reset control but don't have
  1402. * reset status.
  1403. */
  1404. static int _ocp_softreset(struct omap_hwmod *oh)
  1405. {
  1406. u32 v, softrst_mask;
  1407. int c = 0;
  1408. int ret = 0;
  1409. if (!oh->class->sysc ||
  1410. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1411. return -ENOENT;
  1412. /* clocks must be on for this operation */
  1413. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1414. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1415. "enabled state\n", oh->name);
  1416. return -EINVAL;
  1417. }
  1418. /* For some modules, all optionnal clocks need to be enabled as well */
  1419. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1420. _enable_optional_clocks(oh);
  1421. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1422. v = oh->_sysc_cache;
  1423. ret = _set_softreset(oh, &v);
  1424. if (ret)
  1425. goto dis_opt_clks;
  1426. _write_sysconfig(v, oh);
  1427. if (oh->class->sysc->srst_udelay)
  1428. udelay(oh->class->sysc->srst_udelay);
  1429. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1430. omap_test_timeout((omap_hwmod_read(oh,
  1431. oh->class->sysc->syss_offs)
  1432. & SYSS_RESETDONE_MASK),
  1433. MAX_MODULE_SOFTRESET_WAIT, c);
  1434. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  1435. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  1436. omap_test_timeout(!(omap_hwmod_read(oh,
  1437. oh->class->sysc->sysc_offs)
  1438. & softrst_mask),
  1439. MAX_MODULE_SOFTRESET_WAIT, c);
  1440. }
  1441. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1442. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1443. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1444. else
  1445. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1446. /*
  1447. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1448. * _wait_target_ready() or _reset()
  1449. */
  1450. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1451. dis_opt_clks:
  1452. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1453. _disable_optional_clocks(oh);
  1454. return ret;
  1455. }
  1456. /**
  1457. * _reset - reset an omap_hwmod
  1458. * @oh: struct omap_hwmod *
  1459. *
  1460. * Resets an omap_hwmod @oh. If the module has a custom reset
  1461. * function pointer defined, then call it to reset the IP block, and
  1462. * pass along its return value to the caller. Otherwise, if the IP
  1463. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1464. * associated with it, call a function to reset the IP block via that
  1465. * method, and pass along the return value to the caller. Finally, if
  1466. * the IP block has some hardreset lines associated with it, assert
  1467. * all of those, but do _not_ deassert them. (This is because driver
  1468. * authors have expressed an apparent requirement to control the
  1469. * deassertion of the hardreset lines themselves.)
  1470. *
  1471. * The default software reset mechanism for most OMAP IP blocks is
  1472. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1473. * hwmods cannot be reset via this method. Some are not targets and
  1474. * therefore have no OCP header registers to access. Others (like the
  1475. * IVA) have idiosyncratic reset sequences. So for these relatively
  1476. * rare cases, custom reset code can be supplied in the struct
  1477. * omap_hwmod_class .reset function pointer.
  1478. *
  1479. * _set_dmadisable() is called to set the DMADISABLE bit so that it
  1480. * does not prevent idling of the system. This is necessary for cases
  1481. * where ROMCODE/BOOTLOADER uses dma and transfers control to the
  1482. * kernel without disabling dma.
  1483. *
  1484. * Passes along the return value from either _ocp_softreset() or the
  1485. * custom reset function - these must return -EINVAL if the hwmod
  1486. * cannot be reset this way or if the hwmod is in the wrong state,
  1487. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1488. */
  1489. static int _reset(struct omap_hwmod *oh)
  1490. {
  1491. int i, r;
  1492. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1493. if (oh->class->reset) {
  1494. r = oh->class->reset(oh);
  1495. } else {
  1496. if (oh->rst_lines_cnt > 0) {
  1497. for (i = 0; i < oh->rst_lines_cnt; i++)
  1498. _assert_hardreset(oh, oh->rst_lines[i].name);
  1499. return 0;
  1500. } else {
  1501. r = _ocp_softreset(oh);
  1502. if (r == -ENOENT)
  1503. r = 0;
  1504. }
  1505. }
  1506. _set_dmadisable(oh);
  1507. /*
  1508. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1509. * softreset. The _enable() function should be split to avoid
  1510. * the rewrite of the OCP_SYSCONFIG register.
  1511. */
  1512. if (oh->class->sysc) {
  1513. _update_sysc_cache(oh);
  1514. _enable_sysc(oh);
  1515. }
  1516. return r;
  1517. }
  1518. /**
  1519. * _enable - enable an omap_hwmod
  1520. * @oh: struct omap_hwmod *
  1521. *
  1522. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1523. * register target. Returns -EINVAL if the hwmod is in the wrong
  1524. * state or passes along the return value of _wait_target_ready().
  1525. */
  1526. static int _enable(struct omap_hwmod *oh)
  1527. {
  1528. int r;
  1529. int hwsup = 0;
  1530. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1531. /*
  1532. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1533. * state at init. Now that someone is really trying to enable
  1534. * them, just ensure that the hwmod mux is set.
  1535. */
  1536. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1537. /*
  1538. * If the caller has mux data populated, do the mux'ing
  1539. * which wouldn't have been done as part of the _enable()
  1540. * done during setup.
  1541. */
  1542. if (oh->mux)
  1543. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1544. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1545. return 0;
  1546. }
  1547. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1548. oh->_state != _HWMOD_STATE_IDLE &&
  1549. oh->_state != _HWMOD_STATE_DISABLED) {
  1550. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1551. oh->name);
  1552. return -EINVAL;
  1553. }
  1554. /*
  1555. * If an IP block contains HW reset lines and any of them are
  1556. * asserted, we let integration code associated with that
  1557. * block handle the enable. We've received very little
  1558. * information on what those driver authors need, and until
  1559. * detailed information is provided and the driver code is
  1560. * posted to the public lists, this is probably the best we
  1561. * can do.
  1562. */
  1563. if (_are_any_hardreset_lines_asserted(oh))
  1564. return 0;
  1565. /* Mux pins for device runtime if populated */
  1566. if (oh->mux && (!oh->mux->enabled ||
  1567. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1568. oh->mux->pads_dynamic)))
  1569. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1570. _add_initiator_dep(oh, mpu_oh);
  1571. if (oh->clkdm) {
  1572. /*
  1573. * A clockdomain must be in SW_SUP before enabling
  1574. * completely the module. The clockdomain can be set
  1575. * in HW_AUTO only when the module become ready.
  1576. */
  1577. hwsup = clkdm_in_hwsup(oh->clkdm);
  1578. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1579. if (r) {
  1580. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1581. oh->name, oh->clkdm->name, r);
  1582. return r;
  1583. }
  1584. }
  1585. _enable_clocks(oh);
  1586. _enable_module(oh);
  1587. r = _wait_target_ready(oh);
  1588. if (!r) {
  1589. /*
  1590. * Set the clockdomain to HW_AUTO only if the target is ready,
  1591. * assuming that the previous state was HW_AUTO
  1592. */
  1593. if (oh->clkdm && hwsup)
  1594. clkdm_allow_idle(oh->clkdm);
  1595. oh->_state = _HWMOD_STATE_ENABLED;
  1596. /* Access the sysconfig only if the target is ready */
  1597. if (oh->class->sysc) {
  1598. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1599. _update_sysc_cache(oh);
  1600. _enable_sysc(oh);
  1601. }
  1602. } else {
  1603. _disable_clocks(oh);
  1604. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1605. oh->name, r);
  1606. if (oh->clkdm)
  1607. clkdm_hwmod_disable(oh->clkdm, oh);
  1608. }
  1609. return r;
  1610. }
  1611. /**
  1612. * _idle - idle an omap_hwmod
  1613. * @oh: struct omap_hwmod *
  1614. *
  1615. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1616. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1617. * state or returns 0.
  1618. */
  1619. static int _idle(struct omap_hwmod *oh)
  1620. {
  1621. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1622. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1623. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1624. oh->name);
  1625. return -EINVAL;
  1626. }
  1627. if (_are_any_hardreset_lines_asserted(oh))
  1628. return 0;
  1629. if (oh->class->sysc)
  1630. _idle_sysc(oh);
  1631. _del_initiator_dep(oh, mpu_oh);
  1632. _omap4_disable_module(oh);
  1633. /*
  1634. * The module must be in idle mode before disabling any parents
  1635. * clocks. Otherwise, the parent clock might be disabled before
  1636. * the module transition is done, and thus will prevent the
  1637. * transition to complete properly.
  1638. */
  1639. _disable_clocks(oh);
  1640. if (oh->clkdm)
  1641. clkdm_hwmod_disable(oh->clkdm, oh);
  1642. /* Mux pins for device idle if populated */
  1643. if (oh->mux && oh->mux->pads_dynamic)
  1644. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1645. oh->_state = _HWMOD_STATE_IDLE;
  1646. return 0;
  1647. }
  1648. /**
  1649. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1650. * @oh: struct omap_hwmod *
  1651. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1652. *
  1653. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1654. * local copy. Intended to be used by drivers that require
  1655. * direct manipulation of the AUTOIDLE bits.
  1656. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1657. * along the return value from _set_module_autoidle().
  1658. *
  1659. * Any users of this function should be scrutinized carefully.
  1660. */
  1661. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1662. {
  1663. u32 v;
  1664. int retval = 0;
  1665. unsigned long flags;
  1666. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1667. return -EINVAL;
  1668. spin_lock_irqsave(&oh->_lock, flags);
  1669. v = oh->_sysc_cache;
  1670. retval = _set_module_autoidle(oh, autoidle, &v);
  1671. if (!retval)
  1672. _write_sysconfig(v, oh);
  1673. spin_unlock_irqrestore(&oh->_lock, flags);
  1674. return retval;
  1675. }
  1676. /**
  1677. * _shutdown - shutdown an omap_hwmod
  1678. * @oh: struct omap_hwmod *
  1679. *
  1680. * Shut down an omap_hwmod @oh. This should be called when the driver
  1681. * used for the hwmod is removed or unloaded or if the driver is not
  1682. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1683. * state or returns 0.
  1684. */
  1685. static int _shutdown(struct omap_hwmod *oh)
  1686. {
  1687. int ret, i;
  1688. u8 prev_state;
  1689. if (oh->_state != _HWMOD_STATE_IDLE &&
  1690. oh->_state != _HWMOD_STATE_ENABLED) {
  1691. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1692. oh->name);
  1693. return -EINVAL;
  1694. }
  1695. if (_are_any_hardreset_lines_asserted(oh))
  1696. return 0;
  1697. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1698. if (oh->class->pre_shutdown) {
  1699. prev_state = oh->_state;
  1700. if (oh->_state == _HWMOD_STATE_IDLE)
  1701. _enable(oh);
  1702. ret = oh->class->pre_shutdown(oh);
  1703. if (ret) {
  1704. if (prev_state == _HWMOD_STATE_IDLE)
  1705. _idle(oh);
  1706. return ret;
  1707. }
  1708. }
  1709. if (oh->class->sysc) {
  1710. if (oh->_state == _HWMOD_STATE_IDLE)
  1711. _enable(oh);
  1712. _shutdown_sysc(oh);
  1713. }
  1714. /* clocks and deps are already disabled in idle */
  1715. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1716. _del_initiator_dep(oh, mpu_oh);
  1717. /* XXX what about the other system initiators here? dma, dsp */
  1718. _omap4_disable_module(oh);
  1719. _disable_clocks(oh);
  1720. if (oh->clkdm)
  1721. clkdm_hwmod_disable(oh->clkdm, oh);
  1722. }
  1723. /* XXX Should this code also force-disable the optional clocks? */
  1724. for (i = 0; i < oh->rst_lines_cnt; i++)
  1725. _assert_hardreset(oh, oh->rst_lines[i].name);
  1726. /* Mux pins to safe mode or use populated off mode values */
  1727. if (oh->mux)
  1728. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1729. oh->_state = _HWMOD_STATE_DISABLED;
  1730. return 0;
  1731. }
  1732. /**
  1733. * _init_mpu_rt_base - populate the virtual address for a hwmod
  1734. * @oh: struct omap_hwmod * to locate the virtual address
  1735. *
  1736. * Cache the virtual address used by the MPU to access this IP block's
  1737. * registers. This address is needed early so the OCP registers that
  1738. * are part of the device's address space can be ioremapped properly.
  1739. * No return value.
  1740. */
  1741. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1742. {
  1743. struct omap_hwmod_addr_space *mem;
  1744. void __iomem *va_start;
  1745. if (!oh)
  1746. return;
  1747. _save_mpu_port_index(oh);
  1748. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1749. return;
  1750. mem = _find_mpu_rt_addr_space(oh);
  1751. if (!mem) {
  1752. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  1753. oh->name);
  1754. return;
  1755. }
  1756. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  1757. if (!va_start) {
  1758. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  1759. return;
  1760. }
  1761. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  1762. oh->name, va_start);
  1763. oh->_mpu_rt_va = va_start;
  1764. }
  1765. /**
  1766. * _init - initialize internal data for the hwmod @oh
  1767. * @oh: struct omap_hwmod *
  1768. * @n: (unused)
  1769. *
  1770. * Look up the clocks and the address space used by the MPU to access
  1771. * registers belonging to the hwmod @oh. @oh must already be
  1772. * registered at this point. This is the first of two phases for
  1773. * hwmod initialization. Code called here does not touch any hardware
  1774. * registers, it simply prepares internal data structures. Returns 0
  1775. * upon success or if the hwmod isn't registered, or -EINVAL upon
  1776. * failure.
  1777. */
  1778. static int __init _init(struct omap_hwmod *oh, void *data)
  1779. {
  1780. int r;
  1781. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1782. return 0;
  1783. _init_mpu_rt_base(oh, NULL);
  1784. r = _init_clocks(oh, NULL);
  1785. if (IS_ERR_VALUE(r)) {
  1786. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  1787. return -EINVAL;
  1788. }
  1789. oh->_state = _HWMOD_STATE_INITIALIZED;
  1790. return 0;
  1791. }
  1792. /**
  1793. * _setup_iclk_autoidle - configure an IP block's interface clocks
  1794. * @oh: struct omap_hwmod *
  1795. *
  1796. * Set up the module's interface clocks. XXX This function is still mostly
  1797. * a stub; implementing this properly requires iclk autoidle usecounting in
  1798. * the clock code. No return value.
  1799. */
  1800. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  1801. {
  1802. struct omap_hwmod_ocp_if *os;
  1803. struct list_head *p;
  1804. int i = 0;
  1805. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1806. return;
  1807. p = oh->slave_ports.next;
  1808. while (i < oh->slaves_cnt) {
  1809. os = _fetch_next_ocp_if(&p, &i);
  1810. if (!os->_clk)
  1811. continue;
  1812. if (os->flags & OCPIF_SWSUP_IDLE) {
  1813. /* XXX omap_iclk_deny_idle(c); */
  1814. } else {
  1815. /* XXX omap_iclk_allow_idle(c); */
  1816. clk_enable(os->_clk);
  1817. }
  1818. }
  1819. return;
  1820. }
  1821. /**
  1822. * _setup_reset - reset an IP block during the setup process
  1823. * @oh: struct omap_hwmod *
  1824. *
  1825. * Reset the IP block corresponding to the hwmod @oh during the setup
  1826. * process. The IP block is first enabled so it can be successfully
  1827. * reset. Returns 0 upon success or a negative error code upon
  1828. * failure.
  1829. */
  1830. static int __init _setup_reset(struct omap_hwmod *oh)
  1831. {
  1832. int r;
  1833. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1834. return -EINVAL;
  1835. if (oh->rst_lines_cnt == 0) {
  1836. r = _enable(oh);
  1837. if (r) {
  1838. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  1839. oh->name, oh->_state);
  1840. return -EINVAL;
  1841. }
  1842. }
  1843. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  1844. r = _reset(oh);
  1845. return r;
  1846. }
  1847. /**
  1848. * _setup_postsetup - transition to the appropriate state after _setup
  1849. * @oh: struct omap_hwmod *
  1850. *
  1851. * Place an IP block represented by @oh into a "post-setup" state --
  1852. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  1853. * this function is called at the end of _setup().) The postsetup
  1854. * state for an IP block can be changed by calling
  1855. * omap_hwmod_enter_postsetup_state() early in the boot process,
  1856. * before one of the omap_hwmod_setup*() functions are called for the
  1857. * IP block.
  1858. *
  1859. * The IP block stays in this state until a PM runtime-based driver is
  1860. * loaded for that IP block. A post-setup state of IDLE is
  1861. * appropriate for almost all IP blocks with runtime PM-enabled
  1862. * drivers, since those drivers are able to enable the IP block. A
  1863. * post-setup state of ENABLED is appropriate for kernels with PM
  1864. * runtime disabled. The DISABLED state is appropriate for unusual IP
  1865. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  1866. * included, since the WDTIMER starts running on reset and will reset
  1867. * the MPU if left active.
  1868. *
  1869. * This post-setup mechanism is deprecated. Once all of the OMAP
  1870. * drivers have been converted to use PM runtime, and all of the IP
  1871. * block data and interconnect data is available to the hwmod code, it
  1872. * should be possible to replace this mechanism with a "lazy reset"
  1873. * arrangement. In a "lazy reset" setup, each IP block is enabled
  1874. * when the driver first probes, then all remaining IP blocks without
  1875. * drivers are either shut down or enabled after the drivers have
  1876. * loaded. However, this cannot take place until the above
  1877. * preconditions have been met, since otherwise the late reset code
  1878. * has no way of knowing which IP blocks are in use by drivers, and
  1879. * which ones are unused.
  1880. *
  1881. * No return value.
  1882. */
  1883. static void __init _setup_postsetup(struct omap_hwmod *oh)
  1884. {
  1885. u8 postsetup_state;
  1886. if (oh->rst_lines_cnt > 0)
  1887. return;
  1888. postsetup_state = oh->_postsetup_state;
  1889. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1890. postsetup_state = _HWMOD_STATE_ENABLED;
  1891. /*
  1892. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1893. * it should be set by the core code as a runtime flag during startup
  1894. */
  1895. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1896. (postsetup_state == _HWMOD_STATE_IDLE)) {
  1897. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  1898. postsetup_state = _HWMOD_STATE_ENABLED;
  1899. }
  1900. if (postsetup_state == _HWMOD_STATE_IDLE)
  1901. _idle(oh);
  1902. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1903. _shutdown(oh);
  1904. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1905. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1906. oh->name, postsetup_state);
  1907. return;
  1908. }
  1909. /**
  1910. * _setup - prepare IP block hardware for use
  1911. * @oh: struct omap_hwmod *
  1912. * @n: (unused, pass NULL)
  1913. *
  1914. * Configure the IP block represented by @oh. This may include
  1915. * enabling the IP block, resetting it, and placing it into a
  1916. * post-setup state, depending on the type of IP block and applicable
  1917. * flags. IP blocks are reset to prevent any previous configuration
  1918. * by the bootloader or previous operating system from interfering
  1919. * with power management or other parts of the system. The reset can
  1920. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  1921. * two phases for hwmod initialization. Code called here generally
  1922. * affects the IP block hardware, or system integration hardware
  1923. * associated with the IP block. Returns 0.
  1924. */
  1925. static int __init _setup(struct omap_hwmod *oh, void *data)
  1926. {
  1927. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1928. return 0;
  1929. _setup_iclk_autoidle(oh);
  1930. if (!_setup_reset(oh))
  1931. _setup_postsetup(oh);
  1932. return 0;
  1933. }
  1934. /**
  1935. * _register - register a struct omap_hwmod
  1936. * @oh: struct omap_hwmod *
  1937. *
  1938. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1939. * already has been registered by the same name; -EINVAL if the
  1940. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1941. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1942. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1943. * success.
  1944. *
  1945. * XXX The data should be copied into bootmem, so the original data
  1946. * should be marked __initdata and freed after init. This would allow
  1947. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1948. * that the copy process would be relatively complex due to the large number
  1949. * of substructures.
  1950. */
  1951. static int __init _register(struct omap_hwmod *oh)
  1952. {
  1953. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1954. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1955. return -EINVAL;
  1956. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1957. if (_lookup(oh->name))
  1958. return -EEXIST;
  1959. list_add_tail(&oh->node, &omap_hwmod_list);
  1960. INIT_LIST_HEAD(&oh->master_ports);
  1961. INIT_LIST_HEAD(&oh->slave_ports);
  1962. spin_lock_init(&oh->_lock);
  1963. oh->_state = _HWMOD_STATE_REGISTERED;
  1964. /*
  1965. * XXX Rather than doing a strcmp(), this should test a flag
  1966. * set in the hwmod data, inserted by the autogenerator code.
  1967. */
  1968. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1969. mpu_oh = oh;
  1970. return 0;
  1971. }
  1972. /**
  1973. * _alloc_links - return allocated memory for hwmod links
  1974. * @ml: pointer to a struct omap_hwmod_link * for the master link
  1975. * @sl: pointer to a struct omap_hwmod_link * for the slave link
  1976. *
  1977. * Return pointers to two struct omap_hwmod_link records, via the
  1978. * addresses pointed to by @ml and @sl. Will first attempt to return
  1979. * memory allocated as part of a large initial block, but if that has
  1980. * been exhausted, will allocate memory itself. Since ideally this
  1981. * second allocation path will never occur, the number of these
  1982. * 'supplemental' allocations will be logged when debugging is
  1983. * enabled. Returns 0.
  1984. */
  1985. static int __init _alloc_links(struct omap_hwmod_link **ml,
  1986. struct omap_hwmod_link **sl)
  1987. {
  1988. unsigned int sz;
  1989. if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
  1990. *ml = &linkspace[free_ls++];
  1991. *sl = &linkspace[free_ls++];
  1992. return 0;
  1993. }
  1994. sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
  1995. *sl = NULL;
  1996. *ml = alloc_bootmem(sz);
  1997. memset(*ml, 0, sz);
  1998. *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
  1999. ls_supp++;
  2000. pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
  2001. ls_supp * LINKS_PER_OCP_IF);
  2002. return 0;
  2003. };
  2004. /**
  2005. * _add_link - add an interconnect between two IP blocks
  2006. * @oi: pointer to a struct omap_hwmod_ocp_if record
  2007. *
  2008. * Add struct omap_hwmod_link records connecting the master IP block
  2009. * specified in @oi->master to @oi, and connecting the slave IP block
  2010. * specified in @oi->slave to @oi. This code is assumed to run before
  2011. * preemption or SMP has been enabled, thus avoiding the need for
  2012. * locking in this code. Changes to this assumption will require
  2013. * additional locking. Returns 0.
  2014. */
  2015. static int __init _add_link(struct omap_hwmod_ocp_if *oi)
  2016. {
  2017. struct omap_hwmod_link *ml, *sl;
  2018. pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
  2019. oi->slave->name);
  2020. _alloc_links(&ml, &sl);
  2021. ml->ocp_if = oi;
  2022. INIT_LIST_HEAD(&ml->node);
  2023. list_add(&ml->node, &oi->master->master_ports);
  2024. oi->master->masters_cnt++;
  2025. sl->ocp_if = oi;
  2026. INIT_LIST_HEAD(&sl->node);
  2027. list_add(&sl->node, &oi->slave->slave_ports);
  2028. oi->slave->slaves_cnt++;
  2029. return 0;
  2030. }
  2031. /**
  2032. * _register_link - register a struct omap_hwmod_ocp_if
  2033. * @oi: struct omap_hwmod_ocp_if *
  2034. *
  2035. * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
  2036. * has already been registered; -EINVAL if @oi is NULL or if the
  2037. * record pointed to by @oi is missing required fields; or 0 upon
  2038. * success.
  2039. *
  2040. * XXX The data should be copied into bootmem, so the original data
  2041. * should be marked __initdata and freed after init. This would allow
  2042. * unneeded omap_hwmods to be freed on multi-OMAP configurations.
  2043. */
  2044. static int __init _register_link(struct omap_hwmod_ocp_if *oi)
  2045. {
  2046. if (!oi || !oi->master || !oi->slave || !oi->user)
  2047. return -EINVAL;
  2048. if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
  2049. return -EEXIST;
  2050. pr_debug("omap_hwmod: registering link from %s to %s\n",
  2051. oi->master->name, oi->slave->name);
  2052. /*
  2053. * Register the connected hwmods, if they haven't been
  2054. * registered already
  2055. */
  2056. if (oi->master->_state != _HWMOD_STATE_REGISTERED)
  2057. _register(oi->master);
  2058. if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
  2059. _register(oi->slave);
  2060. _add_link(oi);
  2061. oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
  2062. return 0;
  2063. }
  2064. /**
  2065. * _alloc_linkspace - allocate large block of hwmod links
  2066. * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
  2067. *
  2068. * Allocate a large block of struct omap_hwmod_link records. This
  2069. * improves boot time significantly by avoiding the need to allocate
  2070. * individual records one by one. If the number of records to
  2071. * allocate in the block hasn't been manually specified, this function
  2072. * will count the number of struct omap_hwmod_ocp_if records in @ois
  2073. * and use that to determine the allocation size. For SoC families
  2074. * that require multiple list registrations, such as OMAP3xxx, this
  2075. * estimation process isn't optimal, so manual estimation is advised
  2076. * in those cases. Returns -EEXIST if the allocation has already occurred
  2077. * or 0 upon success.
  2078. */
  2079. static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  2080. {
  2081. unsigned int i = 0;
  2082. unsigned int sz;
  2083. if (linkspace) {
  2084. WARN(1, "linkspace already allocated\n");
  2085. return -EEXIST;
  2086. }
  2087. if (max_ls == 0)
  2088. while (ois[i++])
  2089. max_ls += LINKS_PER_OCP_IF;
  2090. sz = sizeof(struct omap_hwmod_link) * max_ls;
  2091. pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
  2092. __func__, sz, max_ls);
  2093. linkspace = alloc_bootmem(sz);
  2094. memset(linkspace, 0, sz);
  2095. return 0;
  2096. }
  2097. /* Public functions */
  2098. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  2099. {
  2100. if (oh->flags & HWMOD_16BIT_REG)
  2101. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  2102. else
  2103. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  2104. }
  2105. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  2106. {
  2107. if (oh->flags & HWMOD_16BIT_REG)
  2108. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  2109. else
  2110. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  2111. }
  2112. /**
  2113. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  2114. * @oh: struct omap_hwmod *
  2115. *
  2116. * This is a public function exposed to drivers. Some drivers may need to do
  2117. * some settings before and after resetting the device. Those drivers after
  2118. * doing the necessary settings could use this function to start a reset by
  2119. * setting the SYSCONFIG.SOFTRESET bit.
  2120. */
  2121. int omap_hwmod_softreset(struct omap_hwmod *oh)
  2122. {
  2123. u32 v;
  2124. int ret;
  2125. if (!oh || !(oh->_sysc_cache))
  2126. return -EINVAL;
  2127. v = oh->_sysc_cache;
  2128. ret = _set_softreset(oh, &v);
  2129. if (ret)
  2130. goto error;
  2131. _write_sysconfig(v, oh);
  2132. error:
  2133. return ret;
  2134. }
  2135. /**
  2136. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  2137. * @oh: struct omap_hwmod *
  2138. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  2139. *
  2140. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  2141. * local copy. Intended to be used by drivers that have some erratum
  2142. * that requires direct manipulation of the SIDLEMODE bits. Returns
  2143. * -EINVAL if @oh is null, or passes along the return value from
  2144. * _set_slave_idlemode().
  2145. *
  2146. * XXX Does this function have any current users? If not, we should
  2147. * remove it; it is better to let the rest of the hwmod code handle this.
  2148. * Any users of this function should be scrutinized carefully.
  2149. */
  2150. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  2151. {
  2152. u32 v;
  2153. int retval = 0;
  2154. if (!oh)
  2155. return -EINVAL;
  2156. v = oh->_sysc_cache;
  2157. retval = _set_slave_idlemode(oh, idlemode, &v);
  2158. if (!retval)
  2159. _write_sysconfig(v, oh);
  2160. return retval;
  2161. }
  2162. /**
  2163. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  2164. * @name: name of the omap_hwmod to look up
  2165. *
  2166. * Given a @name of an omap_hwmod, return a pointer to the registered
  2167. * struct omap_hwmod *, or NULL upon error.
  2168. */
  2169. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  2170. {
  2171. struct omap_hwmod *oh;
  2172. if (!name)
  2173. return NULL;
  2174. oh = _lookup(name);
  2175. return oh;
  2176. }
  2177. /**
  2178. * omap_hwmod_for_each - call function for each registered omap_hwmod
  2179. * @fn: pointer to a callback function
  2180. * @data: void * data to pass to callback function
  2181. *
  2182. * Call @fn for each registered omap_hwmod, passing @data to each
  2183. * function. @fn must return 0 for success or any other value for
  2184. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  2185. * will stop and the non-zero return value will be passed to the
  2186. * caller of omap_hwmod_for_each(). @fn is called with
  2187. * omap_hwmod_for_each() held.
  2188. */
  2189. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  2190. void *data)
  2191. {
  2192. struct omap_hwmod *temp_oh;
  2193. int ret = 0;
  2194. if (!fn)
  2195. return -EINVAL;
  2196. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2197. ret = (*fn)(temp_oh, data);
  2198. if (ret)
  2199. break;
  2200. }
  2201. return ret;
  2202. }
  2203. /**
  2204. * omap_hwmod_register_links - register an array of hwmod links
  2205. * @ois: pointer to an array of omap_hwmod_ocp_if to register
  2206. *
  2207. * Intended to be called early in boot before the clock framework is
  2208. * initialized. If @ois is not null, will register all omap_hwmods
  2209. * listed in @ois that are valid for this chip. Returns 0.
  2210. */
  2211. int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
  2212. {
  2213. int r, i;
  2214. if (!ois)
  2215. return 0;
  2216. if (!linkspace) {
  2217. if (_alloc_linkspace(ois)) {
  2218. pr_err("omap_hwmod: could not allocate link space\n");
  2219. return -ENOMEM;
  2220. }
  2221. }
  2222. i = 0;
  2223. do {
  2224. r = _register_link(ois[i]);
  2225. WARN(r && r != -EEXIST,
  2226. "omap_hwmod: _register_link(%s -> %s) returned %d\n",
  2227. ois[i]->master->name, ois[i]->slave->name, r);
  2228. } while (ois[++i]);
  2229. return 0;
  2230. }
  2231. /**
  2232. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2233. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2234. *
  2235. * If the hwmod data corresponding to the MPU subsystem IP block
  2236. * hasn't been initialized and set up yet, do so now. This must be
  2237. * done first since sleep dependencies may be added from other hwmods
  2238. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2239. * return value.
  2240. */
  2241. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2242. {
  2243. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2244. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2245. __func__, MPU_INITIATOR_NAME);
  2246. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2247. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2248. }
  2249. /**
  2250. * omap_hwmod_setup_one - set up a single hwmod
  2251. * @oh_name: const char * name of the already-registered hwmod to set up
  2252. *
  2253. * Initialize and set up a single hwmod. Intended to be used for a
  2254. * small number of early devices, such as the timer IP blocks used for
  2255. * the scheduler clock. Must be called after omap2_clk_init().
  2256. * Resolves the struct clk names to struct clk pointers for each
  2257. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2258. * -EINVAL upon error or 0 upon success.
  2259. */
  2260. int __init omap_hwmod_setup_one(const char *oh_name)
  2261. {
  2262. struct omap_hwmod *oh;
  2263. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2264. oh = _lookup(oh_name);
  2265. if (!oh) {
  2266. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2267. return -EINVAL;
  2268. }
  2269. _ensure_mpu_hwmod_is_setup(oh);
  2270. _init(oh, NULL);
  2271. _setup(oh, NULL);
  2272. return 0;
  2273. }
  2274. /**
  2275. * omap_hwmod_setup_all - set up all registered IP blocks
  2276. *
  2277. * Initialize and set up all IP blocks registered with the hwmod code.
  2278. * Must be called after omap2_clk_init(). Resolves the struct clk
  2279. * names to struct clk pointers for each registered omap_hwmod. Also
  2280. * calls _setup() on each hwmod. Returns 0 upon success.
  2281. */
  2282. static int __init omap_hwmod_setup_all(void)
  2283. {
  2284. _ensure_mpu_hwmod_is_setup(NULL);
  2285. omap_hwmod_for_each(_init, NULL);
  2286. omap_hwmod_for_each(_setup, NULL);
  2287. return 0;
  2288. }
  2289. core_initcall(omap_hwmod_setup_all);
  2290. /**
  2291. * omap_hwmod_enable - enable an omap_hwmod
  2292. * @oh: struct omap_hwmod *
  2293. *
  2294. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2295. * Returns -EINVAL on error or passes along the return value from _enable().
  2296. */
  2297. int omap_hwmod_enable(struct omap_hwmod *oh)
  2298. {
  2299. int r;
  2300. unsigned long flags;
  2301. if (!oh)
  2302. return -EINVAL;
  2303. spin_lock_irqsave(&oh->_lock, flags);
  2304. r = _enable(oh);
  2305. spin_unlock_irqrestore(&oh->_lock, flags);
  2306. return r;
  2307. }
  2308. /**
  2309. * omap_hwmod_idle - idle an omap_hwmod
  2310. * @oh: struct omap_hwmod *
  2311. *
  2312. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2313. * Returns -EINVAL on error or passes along the return value from _idle().
  2314. */
  2315. int omap_hwmod_idle(struct omap_hwmod *oh)
  2316. {
  2317. unsigned long flags;
  2318. if (!oh)
  2319. return -EINVAL;
  2320. spin_lock_irqsave(&oh->_lock, flags);
  2321. _idle(oh);
  2322. spin_unlock_irqrestore(&oh->_lock, flags);
  2323. return 0;
  2324. }
  2325. /**
  2326. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2327. * @oh: struct omap_hwmod *
  2328. *
  2329. * Shutdown an omap_hwmod @oh. Intended to be called by
  2330. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2331. * the return value from _shutdown().
  2332. */
  2333. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2334. {
  2335. unsigned long flags;
  2336. if (!oh)
  2337. return -EINVAL;
  2338. spin_lock_irqsave(&oh->_lock, flags);
  2339. _shutdown(oh);
  2340. spin_unlock_irqrestore(&oh->_lock, flags);
  2341. return 0;
  2342. }
  2343. /**
  2344. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  2345. * @oh: struct omap_hwmod *oh
  2346. *
  2347. * Intended to be called by the omap_device code.
  2348. */
  2349. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  2350. {
  2351. unsigned long flags;
  2352. spin_lock_irqsave(&oh->_lock, flags);
  2353. _enable_clocks(oh);
  2354. spin_unlock_irqrestore(&oh->_lock, flags);
  2355. return 0;
  2356. }
  2357. /**
  2358. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2359. * @oh: struct omap_hwmod *oh
  2360. *
  2361. * Intended to be called by the omap_device code.
  2362. */
  2363. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2364. {
  2365. unsigned long flags;
  2366. spin_lock_irqsave(&oh->_lock, flags);
  2367. _disable_clocks(oh);
  2368. spin_unlock_irqrestore(&oh->_lock, flags);
  2369. return 0;
  2370. }
  2371. /**
  2372. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2373. * @oh: struct omap_hwmod *oh
  2374. *
  2375. * Intended to be called by drivers and core code when all posted
  2376. * writes to a device must complete before continuing further
  2377. * execution (for example, after clearing some device IRQSTATUS
  2378. * register bits)
  2379. *
  2380. * XXX what about targets with multiple OCP threads?
  2381. */
  2382. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2383. {
  2384. BUG_ON(!oh);
  2385. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2386. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2387. oh->name);
  2388. return;
  2389. }
  2390. /*
  2391. * Forces posted writes to complete on the OCP thread handling
  2392. * register writes
  2393. */
  2394. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2395. }
  2396. /**
  2397. * omap_hwmod_reset - reset the hwmod
  2398. * @oh: struct omap_hwmod *
  2399. *
  2400. * Under some conditions, a driver may wish to reset the entire device.
  2401. * Called from omap_device code. Returns -EINVAL on error or passes along
  2402. * the return value from _reset().
  2403. */
  2404. int omap_hwmod_reset(struct omap_hwmod *oh)
  2405. {
  2406. int r;
  2407. unsigned long flags;
  2408. if (!oh)
  2409. return -EINVAL;
  2410. spin_lock_irqsave(&oh->_lock, flags);
  2411. r = _reset(oh);
  2412. spin_unlock_irqrestore(&oh->_lock, flags);
  2413. return r;
  2414. }
  2415. /*
  2416. * IP block data retrieval functions
  2417. */
  2418. /**
  2419. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2420. * @oh: struct omap_hwmod *
  2421. * @res: pointer to the first element of an array of struct resource to fill
  2422. *
  2423. * Count the number of struct resource array elements necessary to
  2424. * contain omap_hwmod @oh resources. Intended to be called by code
  2425. * that registers omap_devices. Intended to be used to determine the
  2426. * size of a dynamically-allocated struct resource array, before
  2427. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2428. * resource array elements needed.
  2429. *
  2430. * XXX This code is not optimized. It could attempt to merge adjacent
  2431. * resource IDs.
  2432. *
  2433. */
  2434. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  2435. {
  2436. struct omap_hwmod_ocp_if *os;
  2437. struct list_head *p;
  2438. int ret;
  2439. int i = 0;
  2440. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  2441. p = oh->slave_ports.next;
  2442. while (i < oh->slaves_cnt) {
  2443. os = _fetch_next_ocp_if(&p, &i);
  2444. ret += _count_ocp_if_addr_spaces(os);
  2445. }
  2446. return ret;
  2447. }
  2448. /**
  2449. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2450. * @oh: struct omap_hwmod *
  2451. * @res: pointer to the first element of an array of struct resource to fill
  2452. *
  2453. * Fill the struct resource array @res with resource data from the
  2454. * omap_hwmod @oh. Intended to be called by code that registers
  2455. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2456. * number of array elements filled.
  2457. */
  2458. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  2459. {
  2460. struct omap_hwmod_ocp_if *os;
  2461. struct list_head *p;
  2462. int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
  2463. int r = 0;
  2464. /* For each IRQ, DMA, memory area, fill in array.*/
  2465. mpu_irqs_cnt = _count_mpu_irqs(oh);
  2466. for (i = 0; i < mpu_irqs_cnt; i++) {
  2467. (res + r)->name = (oh->mpu_irqs + i)->name;
  2468. (res + r)->start = (oh->mpu_irqs + i)->irq;
  2469. (res + r)->end = (oh->mpu_irqs + i)->irq;
  2470. (res + r)->flags = IORESOURCE_IRQ;
  2471. r++;
  2472. }
  2473. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2474. for (i = 0; i < sdma_reqs_cnt; i++) {
  2475. (res + r)->name = (oh->sdma_reqs + i)->name;
  2476. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2477. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  2478. (res + r)->flags = IORESOURCE_DMA;
  2479. r++;
  2480. }
  2481. p = oh->slave_ports.next;
  2482. i = 0;
  2483. while (i < oh->slaves_cnt) {
  2484. os = _fetch_next_ocp_if(&p, &i);
  2485. addr_cnt = _count_ocp_if_addr_spaces(os);
  2486. for (j = 0; j < addr_cnt; j++) {
  2487. (res + r)->name = (os->addr + j)->name;
  2488. (res + r)->start = (os->addr + j)->pa_start;
  2489. (res + r)->end = (os->addr + j)->pa_end;
  2490. (res + r)->flags = IORESOURCE_MEM;
  2491. r++;
  2492. }
  2493. }
  2494. return r;
  2495. }
  2496. /**
  2497. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  2498. * @oh: struct omap_hwmod * to operate on
  2499. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  2500. * @name: pointer to the name of the data to fetch (optional)
  2501. * @rsrc: pointer to a struct resource, allocated by the caller
  2502. *
  2503. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  2504. * data for the IP block pointed to by @oh. The data will be filled
  2505. * into a struct resource record pointed to by @rsrc. The struct
  2506. * resource must be allocated by the caller. When @name is non-null,
  2507. * the data associated with the matching entry in the IRQ/SDMA/address
  2508. * space hwmod data arrays will be returned. If @name is null, the
  2509. * first array entry will be returned. Data order is not meaningful
  2510. * in hwmod data, so callers are strongly encouraged to use a non-null
  2511. * @name whenever possible to avoid unpredictable effects if hwmod
  2512. * data is later added that causes data ordering to change. This
  2513. * function is only intended for use by OMAP core code. Device
  2514. * drivers should not call this function - the appropriate bus-related
  2515. * data accessor functions should be used instead. Returns 0 upon
  2516. * success or a negative error code upon error.
  2517. */
  2518. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  2519. const char *name, struct resource *rsrc)
  2520. {
  2521. int r;
  2522. unsigned int irq, dma;
  2523. u32 pa_start, pa_end;
  2524. if (!oh || !rsrc)
  2525. return -EINVAL;
  2526. if (type == IORESOURCE_IRQ) {
  2527. r = _get_mpu_irq_by_name(oh, name, &irq);
  2528. if (r)
  2529. return r;
  2530. rsrc->start = irq;
  2531. rsrc->end = irq;
  2532. } else if (type == IORESOURCE_DMA) {
  2533. r = _get_sdma_req_by_name(oh, name, &dma);
  2534. if (r)
  2535. return r;
  2536. rsrc->start = dma;
  2537. rsrc->end = dma;
  2538. } else if (type == IORESOURCE_MEM) {
  2539. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  2540. if (r)
  2541. return r;
  2542. rsrc->start = pa_start;
  2543. rsrc->end = pa_end;
  2544. } else {
  2545. return -EINVAL;
  2546. }
  2547. rsrc->flags = type;
  2548. rsrc->name = name;
  2549. return 0;
  2550. }
  2551. /**
  2552. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  2553. * @oh: struct omap_hwmod *
  2554. *
  2555. * Return the powerdomain pointer associated with the OMAP module
  2556. * @oh's main clock. If @oh does not have a main clk, return the
  2557. * powerdomain associated with the interface clock associated with the
  2558. * module's MPU port. (XXX Perhaps this should use the SDMA port
  2559. * instead?) Returns NULL on error, or a struct powerdomain * on
  2560. * success.
  2561. */
  2562. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  2563. {
  2564. struct clk *c;
  2565. struct omap_hwmod_ocp_if *oi;
  2566. if (!oh)
  2567. return NULL;
  2568. if (oh->_clk) {
  2569. c = oh->_clk;
  2570. } else {
  2571. oi = _find_mpu_rt_port(oh);
  2572. if (!oi)
  2573. return NULL;
  2574. c = oi->_clk;
  2575. }
  2576. if (!c->clkdm)
  2577. return NULL;
  2578. return c->clkdm->pwrdm.ptr;
  2579. }
  2580. /**
  2581. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  2582. * @oh: struct omap_hwmod *
  2583. *
  2584. * Returns the virtual address corresponding to the beginning of the
  2585. * module's register target, in the address range that is intended to
  2586. * be used by the MPU. Returns the virtual address upon success or NULL
  2587. * upon error.
  2588. */
  2589. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  2590. {
  2591. if (!oh)
  2592. return NULL;
  2593. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2594. return NULL;
  2595. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  2596. return NULL;
  2597. return oh->_mpu_rt_va;
  2598. }
  2599. /**
  2600. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  2601. * @oh: struct omap_hwmod *
  2602. * @init_oh: struct omap_hwmod * (initiator)
  2603. *
  2604. * Add a sleep dependency between the initiator @init_oh and @oh.
  2605. * Intended to be called by DSP/Bridge code via platform_data for the
  2606. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2607. * code needs to add/del initiator dependencies dynamically
  2608. * before/after accessing a device. Returns the return value from
  2609. * _add_initiator_dep().
  2610. *
  2611. * XXX Keep a usecount in the clockdomain code
  2612. */
  2613. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  2614. struct omap_hwmod *init_oh)
  2615. {
  2616. return _add_initiator_dep(oh, init_oh);
  2617. }
  2618. /*
  2619. * XXX what about functions for drivers to save/restore ocp_sysconfig
  2620. * for context save/restore operations?
  2621. */
  2622. /**
  2623. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  2624. * @oh: struct omap_hwmod *
  2625. * @init_oh: struct omap_hwmod * (initiator)
  2626. *
  2627. * Remove a sleep dependency between the initiator @init_oh and @oh.
  2628. * Intended to be called by DSP/Bridge code via platform_data for the
  2629. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2630. * code needs to add/del initiator dependencies dynamically
  2631. * before/after accessing a device. Returns the return value from
  2632. * _del_initiator_dep().
  2633. *
  2634. * XXX Keep a usecount in the clockdomain code
  2635. */
  2636. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  2637. struct omap_hwmod *init_oh)
  2638. {
  2639. return _del_initiator_dep(oh, init_oh);
  2640. }
  2641. /**
  2642. * omap_hwmod_enable_wakeup - allow device to wake up the system
  2643. * @oh: struct omap_hwmod *
  2644. *
  2645. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  2646. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  2647. * this IP block if it has dynamic mux entries. Eventually this
  2648. * should set PRCM wakeup registers to cause the PRCM to receive
  2649. * wakeup events from the module. Does not set any wakeup routing
  2650. * registers beyond this point - if the module is to wake up any other
  2651. * module or subsystem, that must be set separately. Called by
  2652. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2653. */
  2654. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  2655. {
  2656. unsigned long flags;
  2657. u32 v;
  2658. spin_lock_irqsave(&oh->_lock, flags);
  2659. if (oh->class->sysc &&
  2660. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2661. v = oh->_sysc_cache;
  2662. _enable_wakeup(oh, &v);
  2663. _write_sysconfig(v, oh);
  2664. }
  2665. _set_idle_ioring_wakeup(oh, true);
  2666. spin_unlock_irqrestore(&oh->_lock, flags);
  2667. return 0;
  2668. }
  2669. /**
  2670. * omap_hwmod_disable_wakeup - prevent device from waking the system
  2671. * @oh: struct omap_hwmod *
  2672. *
  2673. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  2674. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  2675. * events for this IP block if it has dynamic mux entries. Eventually
  2676. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  2677. * wakeup events from the module. Does not set any wakeup routing
  2678. * registers beyond this point - if the module is to wake up any other
  2679. * module or subsystem, that must be set separately. Called by
  2680. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2681. */
  2682. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  2683. {
  2684. unsigned long flags;
  2685. u32 v;
  2686. spin_lock_irqsave(&oh->_lock, flags);
  2687. if (oh->class->sysc &&
  2688. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2689. v = oh->_sysc_cache;
  2690. _disable_wakeup(oh, &v);
  2691. _write_sysconfig(v, oh);
  2692. }
  2693. _set_idle_ioring_wakeup(oh, false);
  2694. spin_unlock_irqrestore(&oh->_lock, flags);
  2695. return 0;
  2696. }
  2697. /**
  2698. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  2699. * contained in the hwmod module.
  2700. * @oh: struct omap_hwmod *
  2701. * @name: name of the reset line to lookup and assert
  2702. *
  2703. * Some IP like dsp, ipu or iva contain processor that require
  2704. * an HW reset line to be assert / deassert in order to enable fully
  2705. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2706. * yet supported on this OMAP; otherwise, passes along the return value
  2707. * from _assert_hardreset().
  2708. */
  2709. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  2710. {
  2711. int ret;
  2712. unsigned long flags;
  2713. if (!oh)
  2714. return -EINVAL;
  2715. spin_lock_irqsave(&oh->_lock, flags);
  2716. ret = _assert_hardreset(oh, name);
  2717. spin_unlock_irqrestore(&oh->_lock, flags);
  2718. return ret;
  2719. }
  2720. /**
  2721. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  2722. * contained in the hwmod module.
  2723. * @oh: struct omap_hwmod *
  2724. * @name: name of the reset line to look up and deassert
  2725. *
  2726. * Some IP like dsp, ipu or iva contain processor that require
  2727. * an HW reset line to be assert / deassert in order to enable fully
  2728. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2729. * yet supported on this OMAP; otherwise, passes along the return value
  2730. * from _deassert_hardreset().
  2731. */
  2732. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  2733. {
  2734. int ret;
  2735. unsigned long flags;
  2736. if (!oh)
  2737. return -EINVAL;
  2738. spin_lock_irqsave(&oh->_lock, flags);
  2739. ret = _deassert_hardreset(oh, name);
  2740. spin_unlock_irqrestore(&oh->_lock, flags);
  2741. return ret;
  2742. }
  2743. /**
  2744. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  2745. * contained in the hwmod module
  2746. * @oh: struct omap_hwmod *
  2747. * @name: name of the reset line to look up and read
  2748. *
  2749. * Return the current state of the hwmod @oh's reset line named @name:
  2750. * returns -EINVAL upon parameter error or if this operation
  2751. * is unsupported on the current OMAP; otherwise, passes along the return
  2752. * value from _read_hardreset().
  2753. */
  2754. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  2755. {
  2756. int ret;
  2757. unsigned long flags;
  2758. if (!oh)
  2759. return -EINVAL;
  2760. spin_lock_irqsave(&oh->_lock, flags);
  2761. ret = _read_hardreset(oh, name);
  2762. spin_unlock_irqrestore(&oh->_lock, flags);
  2763. return ret;
  2764. }
  2765. /**
  2766. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  2767. * @classname: struct omap_hwmod_class name to search for
  2768. * @fn: callback function pointer to call for each hwmod in class @classname
  2769. * @user: arbitrary context data to pass to the callback function
  2770. *
  2771. * For each omap_hwmod of class @classname, call @fn.
  2772. * If the callback function returns something other than
  2773. * zero, the iterator is terminated, and the callback function's return
  2774. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  2775. * if @classname or @fn are NULL, or passes back the error code from @fn.
  2776. */
  2777. int omap_hwmod_for_each_by_class(const char *classname,
  2778. int (*fn)(struct omap_hwmod *oh,
  2779. void *user),
  2780. void *user)
  2781. {
  2782. struct omap_hwmod *temp_oh;
  2783. int ret = 0;
  2784. if (!classname || !fn)
  2785. return -EINVAL;
  2786. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  2787. __func__, classname);
  2788. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2789. if (!strcmp(temp_oh->class->name, classname)) {
  2790. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  2791. __func__, temp_oh->name);
  2792. ret = (*fn)(temp_oh, user);
  2793. if (ret)
  2794. break;
  2795. }
  2796. }
  2797. if (ret)
  2798. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  2799. __func__, ret);
  2800. return ret;
  2801. }
  2802. /**
  2803. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  2804. * @oh: struct omap_hwmod *
  2805. * @state: state that _setup() should leave the hwmod in
  2806. *
  2807. * Sets the hwmod state that @oh will enter at the end of _setup()
  2808. * (called by omap_hwmod_setup_*()). See also the documentation
  2809. * for _setup_postsetup(), above. Returns 0 upon success or
  2810. * -EINVAL if there is a problem with the arguments or if the hwmod is
  2811. * in the wrong state.
  2812. */
  2813. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  2814. {
  2815. int ret;
  2816. unsigned long flags;
  2817. if (!oh)
  2818. return -EINVAL;
  2819. if (state != _HWMOD_STATE_DISABLED &&
  2820. state != _HWMOD_STATE_ENABLED &&
  2821. state != _HWMOD_STATE_IDLE)
  2822. return -EINVAL;
  2823. spin_lock_irqsave(&oh->_lock, flags);
  2824. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2825. ret = -EINVAL;
  2826. goto ohsps_unlock;
  2827. }
  2828. oh->_postsetup_state = state;
  2829. ret = 0;
  2830. ohsps_unlock:
  2831. spin_unlock_irqrestore(&oh->_lock, flags);
  2832. return ret;
  2833. }
  2834. /**
  2835. * omap_hwmod_get_context_loss_count - get lost context count
  2836. * @oh: struct omap_hwmod *
  2837. *
  2838. * Query the powerdomain of of @oh to get the context loss
  2839. * count for this device.
  2840. *
  2841. * Returns the context loss count of the powerdomain assocated with @oh
  2842. * upon success, or zero if no powerdomain exists for @oh.
  2843. */
  2844. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  2845. {
  2846. struct powerdomain *pwrdm;
  2847. int ret = 0;
  2848. pwrdm = omap_hwmod_get_pwrdm(oh);
  2849. if (pwrdm)
  2850. ret = pwrdm_get_context_loss_count(pwrdm);
  2851. return ret;
  2852. }
  2853. /**
  2854. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  2855. * @oh: struct omap_hwmod *
  2856. *
  2857. * Prevent the hwmod @oh from being reset during the setup process.
  2858. * Intended for use by board-*.c files on boards with devices that
  2859. * cannot tolerate being reset. Must be called before the hwmod has
  2860. * been set up. Returns 0 upon success or negative error code upon
  2861. * failure.
  2862. */
  2863. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2864. {
  2865. if (!oh)
  2866. return -EINVAL;
  2867. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2868. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2869. oh->name);
  2870. return -EINVAL;
  2871. }
  2872. oh->flags |= HWMOD_INIT_NO_RESET;
  2873. return 0;
  2874. }
  2875. /**
  2876. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  2877. * @oh: struct omap_hwmod * containing hwmod mux entries
  2878. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  2879. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  2880. *
  2881. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  2882. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  2883. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  2884. * this function is not called for a given pad_idx, then the ISR
  2885. * associated with @oh's first MPU IRQ will be triggered when an I/O
  2886. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  2887. * the _dynamic or wakeup_ entry: if there are other entries not
  2888. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  2889. * entries are NOT COUNTED in the dynamic pad index. This function
  2890. * must be called separately for each pad that requires its interrupt
  2891. * to be re-routed this way. Returns -EINVAL if there is an argument
  2892. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  2893. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  2894. *
  2895. * XXX This function interface is fragile. Rather than using array
  2896. * indexes, which are subject to unpredictable change, it should be
  2897. * using hwmod IRQ names, and some other stable key for the hwmod mux
  2898. * pad records.
  2899. */
  2900. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  2901. {
  2902. int nr_irqs;
  2903. might_sleep();
  2904. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  2905. pad_idx >= oh->mux->nr_pads_dynamic)
  2906. return -EINVAL;
  2907. /* Check the number of available mpu_irqs */
  2908. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  2909. ;
  2910. if (irq_idx >= nr_irqs)
  2911. return -EINVAL;
  2912. if (!oh->mux->irqs) {
  2913. /* XXX What frees this? */
  2914. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  2915. GFP_KERNEL);
  2916. if (!oh->mux->irqs)
  2917. return -ENOMEM;
  2918. }
  2919. oh->mux->irqs[pad_idx] = irq_idx;
  2920. return 0;
  2921. }
  2922. /**
  2923. * omap_hwmod_get_main_clk - get pointer to main clock name
  2924. * @oh: struct omap_hwmod *
  2925. *
  2926. * Returns the main clock name assocated with @oh upon success,
  2927. * or NULL if @oh is NULL.
  2928. */
  2929. const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
  2930. {
  2931. if (!oh)
  2932. return NULL;
  2933. return oh->main_clk;
  2934. }