fusbh200-hcd.c 166 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975
  1. /*
  2. * Faraday FUSBH200 EHCI-like driver
  3. *
  4. * Copyright (c) 2013 Faraday Technology Corporation
  5. *
  6. * Author: Yuan-Hsin Chen <yhchen@faraday-tech.com>
  7. * Feng-Hsin Chiang <john453@faraday-tech.com>
  8. * Po-Yu Chuang <ratbert.chuang@gmail.com>
  9. *
  10. * Most of code borrowed from the Linux-3.7 EHCI driver
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful, but
  18. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  19. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  20. * for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software Foundation,
  24. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. */
  26. #include <linux/module.h>
  27. #include <linux/device.h>
  28. #include <linux/dmapool.h>
  29. #include <linux/kernel.h>
  30. #include <linux/delay.h>
  31. #include <linux/ioport.h>
  32. #include <linux/sched.h>
  33. #include <linux/vmalloc.h>
  34. #include <linux/errno.h>
  35. #include <linux/init.h>
  36. #include <linux/hrtimer.h>
  37. #include <linux/list.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/usb.h>
  40. #include <linux/usb/hcd.h>
  41. #include <linux/moduleparam.h>
  42. #include <linux/dma-mapping.h>
  43. #include <linux/debugfs.h>
  44. #include <linux/slab.h>
  45. #include <linux/uaccess.h>
  46. #include <linux/platform_device.h>
  47. #include <asm/byteorder.h>
  48. #include <asm/io.h>
  49. #include <asm/irq.h>
  50. #include <asm/unaligned.h>
  51. /*-------------------------------------------------------------------------*/
  52. #define DRIVER_AUTHOR "Yuan-Hsin Chen"
  53. #define DRIVER_DESC "FUSBH200 Host Controller (EHCI) Driver"
  54. static const char hcd_name [] = "fusbh200_hcd";
  55. #undef VERBOSE_DEBUG
  56. #undef FUSBH200_URB_TRACE
  57. #ifdef DEBUG
  58. #define FUSBH200_STATS
  59. #endif
  60. /* magic numbers that can affect system performance */
  61. #define FUSBH200_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
  62. #define FUSBH200_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
  63. #define FUSBH200_TUNE_RL_TT 0
  64. #define FUSBH200_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
  65. #define FUSBH200_TUNE_MULT_TT 1
  66. /*
  67. * Some drivers think it's safe to schedule isochronous transfers more than
  68. * 256 ms into the future (partly as a result of an old bug in the scheduling
  69. * code). In an attempt to avoid trouble, we will use a minimum scheduling
  70. * length of 512 frames instead of 256.
  71. */
  72. #define FUSBH200_TUNE_FLS 1 /* (medium) 512-frame schedule */
  73. /* Initial IRQ latency: faster than hw default */
  74. static int log2_irq_thresh = 0; // 0 to 6
  75. module_param (log2_irq_thresh, int, S_IRUGO);
  76. MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  77. /* initial park setting: slower than hw default */
  78. static unsigned park = 0;
  79. module_param (park, uint, S_IRUGO);
  80. MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
  81. /* for link power management(LPM) feature */
  82. static unsigned int hird;
  83. module_param(hird, int, S_IRUGO);
  84. MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us");
  85. #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
  86. #include "fusbh200.h"
  87. /*-------------------------------------------------------------------------*/
  88. #define fusbh200_dbg(fusbh200, fmt, args...) \
  89. dev_dbg (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
  90. #define fusbh200_err(fusbh200, fmt, args...) \
  91. dev_err (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
  92. #define fusbh200_info(fusbh200, fmt, args...) \
  93. dev_info (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
  94. #define fusbh200_warn(fusbh200, fmt, args...) \
  95. dev_warn (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
  96. #ifdef VERBOSE_DEBUG
  97. # define fusbh200_vdbg fusbh200_dbg
  98. #else
  99. static inline void fusbh200_vdbg(struct fusbh200_hcd *fusbh200, ...) {}
  100. #endif
  101. #ifdef DEBUG
  102. /* check the values in the HCSPARAMS register
  103. * (host controller _Structural_ parameters)
  104. * see EHCI spec, Table 2-4 for each value
  105. */
  106. static void dbg_hcs_params (struct fusbh200_hcd *fusbh200, char *label)
  107. {
  108. u32 params = fusbh200_readl(fusbh200, &fusbh200->caps->hcs_params);
  109. fusbh200_dbg (fusbh200,
  110. "%s hcs_params 0x%x ports=%d\n",
  111. label, params,
  112. HCS_N_PORTS (params)
  113. );
  114. }
  115. #else
  116. static inline void dbg_hcs_params (struct fusbh200_hcd *fusbh200, char *label) {}
  117. #endif
  118. #ifdef DEBUG
  119. /* check the values in the HCCPARAMS register
  120. * (host controller _Capability_ parameters)
  121. * see EHCI Spec, Table 2-5 for each value
  122. * */
  123. static void dbg_hcc_params (struct fusbh200_hcd *fusbh200, char *label)
  124. {
  125. u32 params = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
  126. fusbh200_dbg (fusbh200,
  127. "%s hcc_params %04x uframes %s%s\n",
  128. label,
  129. params,
  130. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  131. HCC_CANPARK(params) ? " park" : "");
  132. }
  133. #else
  134. static inline void dbg_hcc_params (struct fusbh200_hcd *fusbh200, char *label) {}
  135. #endif
  136. #ifdef DEBUG
  137. static void __maybe_unused
  138. dbg_qtd (const char *label, struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd)
  139. {
  140. fusbh200_dbg(fusbh200, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
  141. hc32_to_cpup(fusbh200, &qtd->hw_next),
  142. hc32_to_cpup(fusbh200, &qtd->hw_alt_next),
  143. hc32_to_cpup(fusbh200, &qtd->hw_token),
  144. hc32_to_cpup(fusbh200, &qtd->hw_buf [0]));
  145. if (qtd->hw_buf [1])
  146. fusbh200_dbg(fusbh200, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
  147. hc32_to_cpup(fusbh200, &qtd->hw_buf[1]),
  148. hc32_to_cpup(fusbh200, &qtd->hw_buf[2]),
  149. hc32_to_cpup(fusbh200, &qtd->hw_buf[3]),
  150. hc32_to_cpup(fusbh200, &qtd->hw_buf[4]));
  151. }
  152. static void __maybe_unused
  153. dbg_qh (const char *label, struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  154. {
  155. struct fusbh200_qh_hw *hw = qh->hw;
  156. fusbh200_dbg (fusbh200, "%s qh %p n%08x info %x %x qtd %x\n", label,
  157. qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
  158. dbg_qtd("overlay", fusbh200, (struct fusbh200_qtd *) &hw->hw_qtd_next);
  159. }
  160. static void __maybe_unused
  161. dbg_itd (const char *label, struct fusbh200_hcd *fusbh200, struct fusbh200_itd *itd)
  162. {
  163. fusbh200_dbg (fusbh200, "%s [%d] itd %p, next %08x, urb %p\n",
  164. label, itd->frame, itd, hc32_to_cpu(fusbh200, itd->hw_next),
  165. itd->urb);
  166. fusbh200_dbg (fusbh200,
  167. " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
  168. hc32_to_cpu(fusbh200, itd->hw_transaction[0]),
  169. hc32_to_cpu(fusbh200, itd->hw_transaction[1]),
  170. hc32_to_cpu(fusbh200, itd->hw_transaction[2]),
  171. hc32_to_cpu(fusbh200, itd->hw_transaction[3]),
  172. hc32_to_cpu(fusbh200, itd->hw_transaction[4]),
  173. hc32_to_cpu(fusbh200, itd->hw_transaction[5]),
  174. hc32_to_cpu(fusbh200, itd->hw_transaction[6]),
  175. hc32_to_cpu(fusbh200, itd->hw_transaction[7]));
  176. fusbh200_dbg (fusbh200,
  177. " buf: %08x %08x %08x %08x %08x %08x %08x\n",
  178. hc32_to_cpu(fusbh200, itd->hw_bufp[0]),
  179. hc32_to_cpu(fusbh200, itd->hw_bufp[1]),
  180. hc32_to_cpu(fusbh200, itd->hw_bufp[2]),
  181. hc32_to_cpu(fusbh200, itd->hw_bufp[3]),
  182. hc32_to_cpu(fusbh200, itd->hw_bufp[4]),
  183. hc32_to_cpu(fusbh200, itd->hw_bufp[5]),
  184. hc32_to_cpu(fusbh200, itd->hw_bufp[6]));
  185. fusbh200_dbg (fusbh200, " index: %d %d %d %d %d %d %d %d\n",
  186. itd->index[0], itd->index[1], itd->index[2],
  187. itd->index[3], itd->index[4], itd->index[5],
  188. itd->index[6], itd->index[7]);
  189. }
  190. static int __maybe_unused
  191. dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
  192. {
  193. return scnprintf (buf, len,
  194. "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
  195. label, label [0] ? " " : "", status,
  196. (status & STS_ASS) ? " Async" : "",
  197. (status & STS_PSS) ? " Periodic" : "",
  198. (status & STS_RECL) ? " Recl" : "",
  199. (status & STS_HALT) ? " Halt" : "",
  200. (status & STS_IAA) ? " IAA" : "",
  201. (status & STS_FATAL) ? " FATAL" : "",
  202. (status & STS_FLR) ? " FLR" : "",
  203. (status & STS_PCD) ? " PCD" : "",
  204. (status & STS_ERR) ? " ERR" : "",
  205. (status & STS_INT) ? " INT" : ""
  206. );
  207. }
  208. static int __maybe_unused
  209. dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
  210. {
  211. return scnprintf (buf, len,
  212. "%s%sintrenable %02x%s%s%s%s%s%s",
  213. label, label [0] ? " " : "", enable,
  214. (enable & STS_IAA) ? " IAA" : "",
  215. (enable & STS_FATAL) ? " FATAL" : "",
  216. (enable & STS_FLR) ? " FLR" : "",
  217. (enable & STS_PCD) ? " PCD" : "",
  218. (enable & STS_ERR) ? " ERR" : "",
  219. (enable & STS_INT) ? " INT" : ""
  220. );
  221. }
  222. static const char *const fls_strings [] =
  223. { "1024", "512", "256", "??" };
  224. static int
  225. dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
  226. {
  227. return scnprintf (buf, len,
  228. "%s%scommand %07x %s=%d ithresh=%d%s%s%s "
  229. "period=%s%s %s",
  230. label, label [0] ? " " : "", command,
  231. (command & CMD_PARK) ? " park" : "(park)",
  232. CMD_PARK_CNT (command),
  233. (command >> 16) & 0x3f,
  234. (command & CMD_IAAD) ? " IAAD" : "",
  235. (command & CMD_ASE) ? " Async" : "",
  236. (command & CMD_PSE) ? " Periodic" : "",
  237. fls_strings [(command >> 2) & 0x3],
  238. (command & CMD_RESET) ? " Reset" : "",
  239. (command & CMD_RUN) ? "RUN" : "HALT"
  240. );
  241. }
  242. static int
  243. dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
  244. {
  245. char *sig;
  246. /* signaling state */
  247. switch (status & (3 << 10)) {
  248. case 0 << 10: sig = "se0"; break;
  249. case 1 << 10: sig = "k"; break; /* low speed */
  250. case 2 << 10: sig = "j"; break;
  251. default: sig = "?"; break;
  252. }
  253. return scnprintf (buf, len,
  254. "%s%sport:%d status %06x %d "
  255. "sig=%s%s%s%s%s%s%s%s",
  256. label, label [0] ? " " : "", port, status,
  257. status>>25,/*device address */
  258. sig,
  259. (status & PORT_RESET) ? " RESET" : "",
  260. (status & PORT_SUSPEND) ? " SUSPEND" : "",
  261. (status & PORT_RESUME) ? " RESUME" : "",
  262. (status & PORT_PEC) ? " PEC" : "",
  263. (status & PORT_PE) ? " PE" : "",
  264. (status & PORT_CSC) ? " CSC" : "",
  265. (status & PORT_CONNECT) ? " CONNECT" : "");
  266. }
  267. #else
  268. static inline void __maybe_unused
  269. dbg_qh (char *label, struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  270. {}
  271. static inline int __maybe_unused
  272. dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
  273. { return 0; }
  274. static inline int __maybe_unused
  275. dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
  276. { return 0; }
  277. static inline int __maybe_unused
  278. dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
  279. { return 0; }
  280. static inline int __maybe_unused
  281. dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
  282. { return 0; }
  283. #endif /* DEBUG */
  284. /* functions have the "wrong" filename when they're output... */
  285. #define dbg_status(fusbh200, label, status) { \
  286. char _buf [80]; \
  287. dbg_status_buf (_buf, sizeof _buf, label, status); \
  288. fusbh200_dbg (fusbh200, "%s\n", _buf); \
  289. }
  290. #define dbg_cmd(fusbh200, label, command) { \
  291. char _buf [80]; \
  292. dbg_command_buf (_buf, sizeof _buf, label, command); \
  293. fusbh200_dbg (fusbh200, "%s\n", _buf); \
  294. }
  295. #define dbg_port(fusbh200, label, port, status) { \
  296. char _buf [80]; \
  297. dbg_port_buf (_buf, sizeof _buf, label, port, status); \
  298. fusbh200_dbg (fusbh200, "%s\n", _buf); \
  299. }
  300. /*-------------------------------------------------------------------------*/
  301. #ifdef STUB_DEBUG_FILES
  302. static inline void create_debug_files (struct fusbh200_hcd *bus) { }
  303. static inline void remove_debug_files (struct fusbh200_hcd *bus) { }
  304. #else
  305. /* troubleshooting help: expose state in debugfs */
  306. static int debug_async_open(struct inode *, struct file *);
  307. static int debug_periodic_open(struct inode *, struct file *);
  308. static int debug_registers_open(struct inode *, struct file *);
  309. static int debug_async_open(struct inode *, struct file *);
  310. static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
  311. static int debug_close(struct inode *, struct file *);
  312. static const struct file_operations debug_async_fops = {
  313. .owner = THIS_MODULE,
  314. .open = debug_async_open,
  315. .read = debug_output,
  316. .release = debug_close,
  317. .llseek = default_llseek,
  318. };
  319. static const struct file_operations debug_periodic_fops = {
  320. .owner = THIS_MODULE,
  321. .open = debug_periodic_open,
  322. .read = debug_output,
  323. .release = debug_close,
  324. .llseek = default_llseek,
  325. };
  326. static const struct file_operations debug_registers_fops = {
  327. .owner = THIS_MODULE,
  328. .open = debug_registers_open,
  329. .read = debug_output,
  330. .release = debug_close,
  331. .llseek = default_llseek,
  332. };
  333. static struct dentry *fusbh200_debug_root;
  334. struct debug_buffer {
  335. ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
  336. struct usb_bus *bus;
  337. struct mutex mutex; /* protect filling of buffer */
  338. size_t count; /* number of characters filled into buffer */
  339. char *output_buf;
  340. size_t alloc_size;
  341. };
  342. #define speed_char(info1) ({ char tmp; \
  343. switch (info1 & (3 << 12)) { \
  344. case QH_FULL_SPEED: tmp = 'f'; break; \
  345. case QH_LOW_SPEED: tmp = 'l'; break; \
  346. case QH_HIGH_SPEED: tmp = 'h'; break; \
  347. default: tmp = '?'; break; \
  348. }; tmp; })
  349. static inline char token_mark(struct fusbh200_hcd *fusbh200, __hc32 token)
  350. {
  351. __u32 v = hc32_to_cpu(fusbh200, token);
  352. if (v & QTD_STS_ACTIVE)
  353. return '*';
  354. if (v & QTD_STS_HALT)
  355. return '-';
  356. if (!IS_SHORT_READ (v))
  357. return ' ';
  358. /* tries to advance through hw_alt_next */
  359. return '/';
  360. }
  361. static void qh_lines (
  362. struct fusbh200_hcd *fusbh200,
  363. struct fusbh200_qh *qh,
  364. char **nextp,
  365. unsigned *sizep
  366. )
  367. {
  368. u32 scratch;
  369. u32 hw_curr;
  370. struct list_head *entry;
  371. struct fusbh200_qtd *td;
  372. unsigned temp;
  373. unsigned size = *sizep;
  374. char *next = *nextp;
  375. char mark;
  376. __le32 list_end = FUSBH200_LIST_END(fusbh200);
  377. struct fusbh200_qh_hw *hw = qh->hw;
  378. if (hw->hw_qtd_next == list_end) /* NEC does this */
  379. mark = '@';
  380. else
  381. mark = token_mark(fusbh200, hw->hw_token);
  382. if (mark == '/') { /* qh_alt_next controls qh advance? */
  383. if ((hw->hw_alt_next & QTD_MASK(fusbh200))
  384. == fusbh200->async->hw->hw_alt_next)
  385. mark = '#'; /* blocked */
  386. else if (hw->hw_alt_next == list_end)
  387. mark = '.'; /* use hw_qtd_next */
  388. /* else alt_next points to some other qtd */
  389. }
  390. scratch = hc32_to_cpup(fusbh200, &hw->hw_info1);
  391. hw_curr = (mark == '*') ? hc32_to_cpup(fusbh200, &hw->hw_current) : 0;
  392. temp = scnprintf (next, size,
  393. "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
  394. qh, scratch & 0x007f,
  395. speed_char (scratch),
  396. (scratch >> 8) & 0x000f,
  397. scratch, hc32_to_cpup(fusbh200, &hw->hw_info2),
  398. hc32_to_cpup(fusbh200, &hw->hw_token), mark,
  399. (cpu_to_hc32(fusbh200, QTD_TOGGLE) & hw->hw_token)
  400. ? "data1" : "data0",
  401. (hc32_to_cpup(fusbh200, &hw->hw_alt_next) >> 1) & 0x0f);
  402. size -= temp;
  403. next += temp;
  404. /* hc may be modifying the list as we read it ... */
  405. list_for_each (entry, &qh->qtd_list) {
  406. td = list_entry (entry, struct fusbh200_qtd, qtd_list);
  407. scratch = hc32_to_cpup(fusbh200, &td->hw_token);
  408. mark = ' ';
  409. if (hw_curr == td->qtd_dma)
  410. mark = '*';
  411. else if (hw->hw_qtd_next == cpu_to_hc32(fusbh200, td->qtd_dma))
  412. mark = '+';
  413. else if (QTD_LENGTH (scratch)) {
  414. if (td->hw_alt_next == fusbh200->async->hw->hw_alt_next)
  415. mark = '#';
  416. else if (td->hw_alt_next != list_end)
  417. mark = '/';
  418. }
  419. temp = snprintf (next, size,
  420. "\n\t%p%c%s len=%d %08x urb %p",
  421. td, mark, ({ char *tmp;
  422. switch ((scratch>>8)&0x03) {
  423. case 0: tmp = "out"; break;
  424. case 1: tmp = "in"; break;
  425. case 2: tmp = "setup"; break;
  426. default: tmp = "?"; break;
  427. } tmp;}),
  428. (scratch >> 16) & 0x7fff,
  429. scratch,
  430. td->urb);
  431. if (size < temp)
  432. temp = size;
  433. size -= temp;
  434. next += temp;
  435. if (temp == size)
  436. goto done;
  437. }
  438. temp = snprintf (next, size, "\n");
  439. if (size < temp)
  440. temp = size;
  441. size -= temp;
  442. next += temp;
  443. done:
  444. *sizep = size;
  445. *nextp = next;
  446. }
  447. static ssize_t fill_async_buffer(struct debug_buffer *buf)
  448. {
  449. struct usb_hcd *hcd;
  450. struct fusbh200_hcd *fusbh200;
  451. unsigned long flags;
  452. unsigned temp, size;
  453. char *next;
  454. struct fusbh200_qh *qh;
  455. hcd = bus_to_hcd(buf->bus);
  456. fusbh200 = hcd_to_fusbh200 (hcd);
  457. next = buf->output_buf;
  458. size = buf->alloc_size;
  459. *next = 0;
  460. /* dumps a snapshot of the async schedule.
  461. * usually empty except for long-term bulk reads, or head.
  462. * one QH per line, and TDs we know about
  463. */
  464. spin_lock_irqsave (&fusbh200->lock, flags);
  465. for (qh = fusbh200->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
  466. qh_lines (fusbh200, qh, &next, &size);
  467. if (fusbh200->async_unlink && size > 0) {
  468. temp = scnprintf(next, size, "\nunlink =\n");
  469. size -= temp;
  470. next += temp;
  471. for (qh = fusbh200->async_unlink; size > 0 && qh;
  472. qh = qh->unlink_next)
  473. qh_lines (fusbh200, qh, &next, &size);
  474. }
  475. spin_unlock_irqrestore (&fusbh200->lock, flags);
  476. return strlen(buf->output_buf);
  477. }
  478. #define DBG_SCHED_LIMIT 64
  479. static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
  480. {
  481. struct usb_hcd *hcd;
  482. struct fusbh200_hcd *fusbh200;
  483. unsigned long flags;
  484. union fusbh200_shadow p, *seen;
  485. unsigned temp, size, seen_count;
  486. char *next;
  487. unsigned i;
  488. __hc32 tag;
  489. if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC)))
  490. return 0;
  491. seen_count = 0;
  492. hcd = bus_to_hcd(buf->bus);
  493. fusbh200 = hcd_to_fusbh200 (hcd);
  494. next = buf->output_buf;
  495. size = buf->alloc_size;
  496. temp = scnprintf (next, size, "size = %d\n", fusbh200->periodic_size);
  497. size -= temp;
  498. next += temp;
  499. /* dump a snapshot of the periodic schedule.
  500. * iso changes, interrupt usually doesn't.
  501. */
  502. spin_lock_irqsave (&fusbh200->lock, flags);
  503. for (i = 0; i < fusbh200->periodic_size; i++) {
  504. p = fusbh200->pshadow [i];
  505. if (likely (!p.ptr))
  506. continue;
  507. tag = Q_NEXT_TYPE(fusbh200, fusbh200->periodic [i]);
  508. temp = scnprintf (next, size, "%4d: ", i);
  509. size -= temp;
  510. next += temp;
  511. do {
  512. struct fusbh200_qh_hw *hw;
  513. switch (hc32_to_cpu(fusbh200, tag)) {
  514. case Q_TYPE_QH:
  515. hw = p.qh->hw;
  516. temp = scnprintf (next, size, " qh%d-%04x/%p",
  517. p.qh->period,
  518. hc32_to_cpup(fusbh200,
  519. &hw->hw_info2)
  520. /* uframe masks */
  521. & (QH_CMASK | QH_SMASK),
  522. p.qh);
  523. size -= temp;
  524. next += temp;
  525. /* don't repeat what follows this qh */
  526. for (temp = 0; temp < seen_count; temp++) {
  527. if (seen [temp].ptr != p.ptr)
  528. continue;
  529. if (p.qh->qh_next.ptr) {
  530. temp = scnprintf (next, size,
  531. " ...");
  532. size -= temp;
  533. next += temp;
  534. }
  535. break;
  536. }
  537. /* show more info the first time around */
  538. if (temp == seen_count) {
  539. u32 scratch = hc32_to_cpup(fusbh200,
  540. &hw->hw_info1);
  541. struct fusbh200_qtd *qtd;
  542. char *type = "";
  543. /* count tds, get ep direction */
  544. temp = 0;
  545. list_for_each_entry (qtd,
  546. &p.qh->qtd_list,
  547. qtd_list) {
  548. temp++;
  549. switch (0x03 & (hc32_to_cpu(
  550. fusbh200,
  551. qtd->hw_token) >> 8)) {
  552. case 0: type = "out"; continue;
  553. case 1: type = "in"; continue;
  554. }
  555. }
  556. temp = scnprintf (next, size,
  557. " (%c%d ep%d%s "
  558. "[%d/%d] q%d p%d)",
  559. speed_char (scratch),
  560. scratch & 0x007f,
  561. (scratch >> 8) & 0x000f, type,
  562. p.qh->usecs, p.qh->c_usecs,
  563. temp,
  564. 0x7ff & (scratch >> 16));
  565. if (seen_count < DBG_SCHED_LIMIT)
  566. seen [seen_count++].qh = p.qh;
  567. } else
  568. temp = 0;
  569. tag = Q_NEXT_TYPE(fusbh200, hw->hw_next);
  570. p = p.qh->qh_next;
  571. break;
  572. case Q_TYPE_FSTN:
  573. temp = scnprintf (next, size,
  574. " fstn-%8x/%p", p.fstn->hw_prev,
  575. p.fstn);
  576. tag = Q_NEXT_TYPE(fusbh200, p.fstn->hw_next);
  577. p = p.fstn->fstn_next;
  578. break;
  579. case Q_TYPE_ITD:
  580. temp = scnprintf (next, size,
  581. " itd/%p", p.itd);
  582. tag = Q_NEXT_TYPE(fusbh200, p.itd->hw_next);
  583. p = p.itd->itd_next;
  584. break;
  585. }
  586. size -= temp;
  587. next += temp;
  588. } while (p.ptr);
  589. temp = scnprintf (next, size, "\n");
  590. size -= temp;
  591. next += temp;
  592. }
  593. spin_unlock_irqrestore (&fusbh200->lock, flags);
  594. kfree (seen);
  595. return buf->alloc_size - size;
  596. }
  597. #undef DBG_SCHED_LIMIT
  598. static const char *rh_state_string(struct fusbh200_hcd *fusbh200)
  599. {
  600. switch (fusbh200->rh_state) {
  601. case FUSBH200_RH_HALTED:
  602. return "halted";
  603. case FUSBH200_RH_SUSPENDED:
  604. return "suspended";
  605. case FUSBH200_RH_RUNNING:
  606. return "running";
  607. case FUSBH200_RH_STOPPING:
  608. return "stopping";
  609. }
  610. return "?";
  611. }
  612. static ssize_t fill_registers_buffer(struct debug_buffer *buf)
  613. {
  614. struct usb_hcd *hcd;
  615. struct fusbh200_hcd *fusbh200;
  616. unsigned long flags;
  617. unsigned temp, size, i;
  618. char *next, scratch [80];
  619. static char fmt [] = "%*s\n";
  620. static char label [] = "";
  621. hcd = bus_to_hcd(buf->bus);
  622. fusbh200 = hcd_to_fusbh200 (hcd);
  623. next = buf->output_buf;
  624. size = buf->alloc_size;
  625. spin_lock_irqsave (&fusbh200->lock, flags);
  626. if (!HCD_HW_ACCESSIBLE(hcd)) {
  627. size = scnprintf (next, size,
  628. "bus %s, device %s\n"
  629. "%s\n"
  630. "SUSPENDED (no register access)\n",
  631. hcd->self.controller->bus->name,
  632. dev_name(hcd->self.controller),
  633. hcd->product_desc);
  634. goto done;
  635. }
  636. /* Capability Registers */
  637. i = HC_VERSION(fusbh200, fusbh200_readl(fusbh200, &fusbh200->caps->hc_capbase));
  638. temp = scnprintf (next, size,
  639. "bus %s, device %s\n"
  640. "%s\n"
  641. "EHCI %x.%02x, rh state %s\n",
  642. hcd->self.controller->bus->name,
  643. dev_name(hcd->self.controller),
  644. hcd->product_desc,
  645. i >> 8, i & 0x0ff, rh_state_string(fusbh200));
  646. size -= temp;
  647. next += temp;
  648. // FIXME interpret both types of params
  649. i = fusbh200_readl(fusbh200, &fusbh200->caps->hcs_params);
  650. temp = scnprintf (next, size, "structural params 0x%08x\n", i);
  651. size -= temp;
  652. next += temp;
  653. i = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
  654. temp = scnprintf (next, size, "capability params 0x%08x\n", i);
  655. size -= temp;
  656. next += temp;
  657. /* Operational Registers */
  658. temp = dbg_status_buf (scratch, sizeof scratch, label,
  659. fusbh200_readl(fusbh200, &fusbh200->regs->status));
  660. temp = scnprintf (next, size, fmt, temp, scratch);
  661. size -= temp;
  662. next += temp;
  663. temp = dbg_command_buf (scratch, sizeof scratch, label,
  664. fusbh200_readl(fusbh200, &fusbh200->regs->command));
  665. temp = scnprintf (next, size, fmt, temp, scratch);
  666. size -= temp;
  667. next += temp;
  668. temp = dbg_intr_buf (scratch, sizeof scratch, label,
  669. fusbh200_readl(fusbh200, &fusbh200->regs->intr_enable));
  670. temp = scnprintf (next, size, fmt, temp, scratch);
  671. size -= temp;
  672. next += temp;
  673. temp = scnprintf (next, size, "uframe %04x\n",
  674. fusbh200_read_frame_index(fusbh200));
  675. size -= temp;
  676. next += temp;
  677. if (fusbh200->async_unlink) {
  678. temp = scnprintf(next, size, "async unlink qh %p\n",
  679. fusbh200->async_unlink);
  680. size -= temp;
  681. next += temp;
  682. }
  683. #ifdef FUSBH200_STATS
  684. temp = scnprintf (next, size,
  685. "irq normal %ld err %ld iaa %ld (lost %ld)\n",
  686. fusbh200->stats.normal, fusbh200->stats.error, fusbh200->stats.iaa,
  687. fusbh200->stats.lost_iaa);
  688. size -= temp;
  689. next += temp;
  690. temp = scnprintf (next, size, "complete %ld unlink %ld\n",
  691. fusbh200->stats.complete, fusbh200->stats.unlink);
  692. size -= temp;
  693. next += temp;
  694. #endif
  695. done:
  696. spin_unlock_irqrestore (&fusbh200->lock, flags);
  697. return buf->alloc_size - size;
  698. }
  699. static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
  700. ssize_t (*fill_func)(struct debug_buffer *))
  701. {
  702. struct debug_buffer *buf;
  703. buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
  704. if (buf) {
  705. buf->bus = bus;
  706. buf->fill_func = fill_func;
  707. mutex_init(&buf->mutex);
  708. buf->alloc_size = PAGE_SIZE;
  709. }
  710. return buf;
  711. }
  712. static int fill_buffer(struct debug_buffer *buf)
  713. {
  714. int ret = 0;
  715. if (!buf->output_buf)
  716. buf->output_buf = vmalloc(buf->alloc_size);
  717. if (!buf->output_buf) {
  718. ret = -ENOMEM;
  719. goto out;
  720. }
  721. ret = buf->fill_func(buf);
  722. if (ret >= 0) {
  723. buf->count = ret;
  724. ret = 0;
  725. }
  726. out:
  727. return ret;
  728. }
  729. static ssize_t debug_output(struct file *file, char __user *user_buf,
  730. size_t len, loff_t *offset)
  731. {
  732. struct debug_buffer *buf = file->private_data;
  733. int ret = 0;
  734. mutex_lock(&buf->mutex);
  735. if (buf->count == 0) {
  736. ret = fill_buffer(buf);
  737. if (ret != 0) {
  738. mutex_unlock(&buf->mutex);
  739. goto out;
  740. }
  741. }
  742. mutex_unlock(&buf->mutex);
  743. ret = simple_read_from_buffer(user_buf, len, offset,
  744. buf->output_buf, buf->count);
  745. out:
  746. return ret;
  747. }
  748. static int debug_close(struct inode *inode, struct file *file)
  749. {
  750. struct debug_buffer *buf = file->private_data;
  751. if (buf) {
  752. vfree(buf->output_buf);
  753. kfree(buf);
  754. }
  755. return 0;
  756. }
  757. static int debug_async_open(struct inode *inode, struct file *file)
  758. {
  759. file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
  760. return file->private_data ? 0 : -ENOMEM;
  761. }
  762. static int debug_periodic_open(struct inode *inode, struct file *file)
  763. {
  764. struct debug_buffer *buf;
  765. buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
  766. if (!buf)
  767. return -ENOMEM;
  768. buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8)*PAGE_SIZE;
  769. file->private_data = buf;
  770. return 0;
  771. }
  772. static int debug_registers_open(struct inode *inode, struct file *file)
  773. {
  774. file->private_data = alloc_buffer(inode->i_private,
  775. fill_registers_buffer);
  776. return file->private_data ? 0 : -ENOMEM;
  777. }
  778. static inline void create_debug_files (struct fusbh200_hcd *fusbh200)
  779. {
  780. struct usb_bus *bus = &fusbh200_to_hcd(fusbh200)->self;
  781. fusbh200->debug_dir = debugfs_create_dir(bus->bus_name, fusbh200_debug_root);
  782. if (!fusbh200->debug_dir)
  783. return;
  784. if (!debugfs_create_file("async", S_IRUGO, fusbh200->debug_dir, bus,
  785. &debug_async_fops))
  786. goto file_error;
  787. if (!debugfs_create_file("periodic", S_IRUGO, fusbh200->debug_dir, bus,
  788. &debug_periodic_fops))
  789. goto file_error;
  790. if (!debugfs_create_file("registers", S_IRUGO, fusbh200->debug_dir, bus,
  791. &debug_registers_fops))
  792. goto file_error;
  793. return;
  794. file_error:
  795. debugfs_remove_recursive(fusbh200->debug_dir);
  796. }
  797. static inline void remove_debug_files (struct fusbh200_hcd *fusbh200)
  798. {
  799. debugfs_remove_recursive(fusbh200->debug_dir);
  800. }
  801. #endif /* STUB_DEBUG_FILES */
  802. /*-------------------------------------------------------------------------*/
  803. /*
  804. * handshake - spin reading hc until handshake completes or fails
  805. * @ptr: address of hc register to be read
  806. * @mask: bits to look at in result of read
  807. * @done: value of those bits when handshake succeeds
  808. * @usec: timeout in microseconds
  809. *
  810. * Returns negative errno, or zero on success
  811. *
  812. * Success happens when the "mask" bits have the specified value (hardware
  813. * handshake done). There are two failure modes: "usec" have passed (major
  814. * hardware flakeout), or the register reads as all-ones (hardware removed).
  815. *
  816. * That last failure should_only happen in cases like physical cardbus eject
  817. * before driver shutdown. But it also seems to be caused by bugs in cardbus
  818. * bridge shutdown: shutting down the bridge before the devices using it.
  819. */
  820. static int handshake (struct fusbh200_hcd *fusbh200, void __iomem *ptr,
  821. u32 mask, u32 done, int usec)
  822. {
  823. u32 result;
  824. do {
  825. result = fusbh200_readl(fusbh200, ptr);
  826. if (result == ~(u32)0) /* card removed */
  827. return -ENODEV;
  828. result &= mask;
  829. if (result == done)
  830. return 0;
  831. udelay (1);
  832. usec--;
  833. } while (usec > 0);
  834. return -ETIMEDOUT;
  835. }
  836. /*
  837. * Force HC to halt state from unknown (EHCI spec section 2.3).
  838. * Must be called with interrupts enabled and the lock not held.
  839. */
  840. static int fusbh200_halt (struct fusbh200_hcd *fusbh200)
  841. {
  842. u32 temp;
  843. spin_lock_irq(&fusbh200->lock);
  844. /* disable any irqs left enabled by previous code */
  845. fusbh200_writel(fusbh200, 0, &fusbh200->regs->intr_enable);
  846. /*
  847. * This routine gets called during probe before fusbh200->command
  848. * has been initialized, so we can't rely on its value.
  849. */
  850. fusbh200->command &= ~CMD_RUN;
  851. temp = fusbh200_readl(fusbh200, &fusbh200->regs->command);
  852. temp &= ~(CMD_RUN | CMD_IAAD);
  853. fusbh200_writel(fusbh200, temp, &fusbh200->regs->command);
  854. spin_unlock_irq(&fusbh200->lock);
  855. synchronize_irq(fusbh200_to_hcd(fusbh200)->irq);
  856. return handshake(fusbh200, &fusbh200->regs->status,
  857. STS_HALT, STS_HALT, 16 * 125);
  858. }
  859. /*
  860. * Reset a non-running (STS_HALT == 1) controller.
  861. * Must be called with interrupts enabled and the lock not held.
  862. */
  863. static int fusbh200_reset (struct fusbh200_hcd *fusbh200)
  864. {
  865. int retval;
  866. u32 command = fusbh200_readl(fusbh200, &fusbh200->regs->command);
  867. /* If the EHCI debug controller is active, special care must be
  868. * taken before and after a host controller reset */
  869. if (fusbh200->debug && !dbgp_reset_prep(fusbh200_to_hcd(fusbh200)))
  870. fusbh200->debug = NULL;
  871. command |= CMD_RESET;
  872. dbg_cmd (fusbh200, "reset", command);
  873. fusbh200_writel(fusbh200, command, &fusbh200->regs->command);
  874. fusbh200->rh_state = FUSBH200_RH_HALTED;
  875. fusbh200->next_statechange = jiffies;
  876. retval = handshake (fusbh200, &fusbh200->regs->command,
  877. CMD_RESET, 0, 250 * 1000);
  878. if (retval)
  879. return retval;
  880. if (fusbh200->debug)
  881. dbgp_external_startup(fusbh200_to_hcd(fusbh200));
  882. fusbh200->port_c_suspend = fusbh200->suspended_ports =
  883. fusbh200->resuming_ports = 0;
  884. return retval;
  885. }
  886. /*
  887. * Idle the controller (turn off the schedules).
  888. * Must be called with interrupts enabled and the lock not held.
  889. */
  890. static void fusbh200_quiesce (struct fusbh200_hcd *fusbh200)
  891. {
  892. u32 temp;
  893. if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
  894. return;
  895. /* wait for any schedule enables/disables to take effect */
  896. temp = (fusbh200->command << 10) & (STS_ASS | STS_PSS);
  897. handshake(fusbh200, &fusbh200->regs->status, STS_ASS | STS_PSS, temp, 16 * 125);
  898. /* then disable anything that's still active */
  899. spin_lock_irq(&fusbh200->lock);
  900. fusbh200->command &= ~(CMD_ASE | CMD_PSE);
  901. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  902. spin_unlock_irq(&fusbh200->lock);
  903. /* hardware can take 16 microframes to turn off ... */
  904. handshake(fusbh200, &fusbh200->regs->status, STS_ASS | STS_PSS, 0, 16 * 125);
  905. }
  906. /*-------------------------------------------------------------------------*/
  907. static void end_unlink_async(struct fusbh200_hcd *fusbh200);
  908. static void unlink_empty_async(struct fusbh200_hcd *fusbh200);
  909. static void fusbh200_work(struct fusbh200_hcd *fusbh200);
  910. static void start_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
  911. static void end_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
  912. /*-------------------------------------------------------------------------*/
  913. /* Set a bit in the USBCMD register */
  914. static void fusbh200_set_command_bit(struct fusbh200_hcd *fusbh200, u32 bit)
  915. {
  916. fusbh200->command |= bit;
  917. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  918. /* unblock posted write */
  919. fusbh200_readl(fusbh200, &fusbh200->regs->command);
  920. }
  921. /* Clear a bit in the USBCMD register */
  922. static void fusbh200_clear_command_bit(struct fusbh200_hcd *fusbh200, u32 bit)
  923. {
  924. fusbh200->command &= ~bit;
  925. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  926. /* unblock posted write */
  927. fusbh200_readl(fusbh200, &fusbh200->regs->command);
  928. }
  929. /*-------------------------------------------------------------------------*/
  930. /*
  931. * EHCI timer support... Now using hrtimers.
  932. *
  933. * Lots of different events are triggered from fusbh200->hrtimer. Whenever
  934. * the timer routine runs, it checks each possible event; events that are
  935. * currently enabled and whose expiration time has passed get handled.
  936. * The set of enabled events is stored as a collection of bitflags in
  937. * fusbh200->enabled_hrtimer_events, and they are numbered in order of
  938. * increasing delay values (ranging between 1 ms and 100 ms).
  939. *
  940. * Rather than implementing a sorted list or tree of all pending events,
  941. * we keep track only of the lowest-numbered pending event, in
  942. * fusbh200->next_hrtimer_event. Whenever fusbh200->hrtimer gets restarted, its
  943. * expiration time is set to the timeout value for this event.
  944. *
  945. * As a result, events might not get handled right away; the actual delay
  946. * could be anywhere up to twice the requested delay. This doesn't
  947. * matter, because none of the events are especially time-critical. The
  948. * ones that matter most all have a delay of 1 ms, so they will be
  949. * handled after 2 ms at most, which is okay. In addition to this, we
  950. * allow for an expiration range of 1 ms.
  951. */
  952. /*
  953. * Delay lengths for the hrtimer event types.
  954. * Keep this list sorted by delay length, in the same order as
  955. * the event types indexed by enum fusbh200_hrtimer_event in fusbh200.h.
  956. */
  957. static unsigned event_delays_ns[] = {
  958. 1 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_POLL_ASS */
  959. 1 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_POLL_PSS */
  960. 1 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_POLL_DEAD */
  961. 1125 * NSEC_PER_USEC, /* FUSBH200_HRTIMER_UNLINK_INTR */
  962. 2 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_FREE_ITDS */
  963. 6 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_ASYNC_UNLINKS */
  964. 10 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_IAA_WATCHDOG */
  965. 10 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_DISABLE_PERIODIC */
  966. 15 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_DISABLE_ASYNC */
  967. 100 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_IO_WATCHDOG */
  968. };
  969. /* Enable a pending hrtimer event */
  970. static void fusbh200_enable_event(struct fusbh200_hcd *fusbh200, unsigned event,
  971. bool resched)
  972. {
  973. ktime_t *timeout = &fusbh200->hr_timeouts[event];
  974. if (resched)
  975. *timeout = ktime_add(ktime_get(),
  976. ktime_set(0, event_delays_ns[event]));
  977. fusbh200->enabled_hrtimer_events |= (1 << event);
  978. /* Track only the lowest-numbered pending event */
  979. if (event < fusbh200->next_hrtimer_event) {
  980. fusbh200->next_hrtimer_event = event;
  981. hrtimer_start_range_ns(&fusbh200->hrtimer, *timeout,
  982. NSEC_PER_MSEC, HRTIMER_MODE_ABS);
  983. }
  984. }
  985. /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
  986. static void fusbh200_poll_ASS(struct fusbh200_hcd *fusbh200)
  987. {
  988. unsigned actual, want;
  989. /* Don't enable anything if the controller isn't running (e.g., died) */
  990. if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
  991. return;
  992. want = (fusbh200->command & CMD_ASE) ? STS_ASS : 0;
  993. actual = fusbh200_readl(fusbh200, &fusbh200->regs->status) & STS_ASS;
  994. if (want != actual) {
  995. /* Poll again later, but give up after about 20 ms */
  996. if (fusbh200->ASS_poll_count++ < 20) {
  997. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_POLL_ASS, true);
  998. return;
  999. }
  1000. fusbh200_dbg(fusbh200, "Waited too long for the async schedule status (%x/%x), giving up\n",
  1001. want, actual);
  1002. }
  1003. fusbh200->ASS_poll_count = 0;
  1004. /* The status is up-to-date; restart or stop the schedule as needed */
  1005. if (want == 0) { /* Stopped */
  1006. if (fusbh200->async_count > 0)
  1007. fusbh200_set_command_bit(fusbh200, CMD_ASE);
  1008. } else { /* Running */
  1009. if (fusbh200->async_count == 0) {
  1010. /* Turn off the schedule after a while */
  1011. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_DISABLE_ASYNC,
  1012. true);
  1013. }
  1014. }
  1015. }
  1016. /* Turn off the async schedule after a brief delay */
  1017. static void fusbh200_disable_ASE(struct fusbh200_hcd *fusbh200)
  1018. {
  1019. fusbh200_clear_command_bit(fusbh200, CMD_ASE);
  1020. }
  1021. /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
  1022. static void fusbh200_poll_PSS(struct fusbh200_hcd *fusbh200)
  1023. {
  1024. unsigned actual, want;
  1025. /* Don't do anything if the controller isn't running (e.g., died) */
  1026. if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
  1027. return;
  1028. want = (fusbh200->command & CMD_PSE) ? STS_PSS : 0;
  1029. actual = fusbh200_readl(fusbh200, &fusbh200->regs->status) & STS_PSS;
  1030. if (want != actual) {
  1031. /* Poll again later, but give up after about 20 ms */
  1032. if (fusbh200->PSS_poll_count++ < 20) {
  1033. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_POLL_PSS, true);
  1034. return;
  1035. }
  1036. fusbh200_dbg(fusbh200, "Waited too long for the periodic schedule status (%x/%x), giving up\n",
  1037. want, actual);
  1038. }
  1039. fusbh200->PSS_poll_count = 0;
  1040. /* The status is up-to-date; restart or stop the schedule as needed */
  1041. if (want == 0) { /* Stopped */
  1042. if (fusbh200->periodic_count > 0)
  1043. fusbh200_set_command_bit(fusbh200, CMD_PSE);
  1044. } else { /* Running */
  1045. if (fusbh200->periodic_count == 0) {
  1046. /* Turn off the schedule after a while */
  1047. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_DISABLE_PERIODIC,
  1048. true);
  1049. }
  1050. }
  1051. }
  1052. /* Turn off the periodic schedule after a brief delay */
  1053. static void fusbh200_disable_PSE(struct fusbh200_hcd *fusbh200)
  1054. {
  1055. fusbh200_clear_command_bit(fusbh200, CMD_PSE);
  1056. }
  1057. /* Poll the STS_HALT status bit; see when a dead controller stops */
  1058. static void fusbh200_handle_controller_death(struct fusbh200_hcd *fusbh200)
  1059. {
  1060. if (!(fusbh200_readl(fusbh200, &fusbh200->regs->status) & STS_HALT)) {
  1061. /* Give up after a few milliseconds */
  1062. if (fusbh200->died_poll_count++ < 5) {
  1063. /* Try again later */
  1064. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_POLL_DEAD, true);
  1065. return;
  1066. }
  1067. fusbh200_warn(fusbh200, "Waited too long for the controller to stop, giving up\n");
  1068. }
  1069. /* Clean up the mess */
  1070. fusbh200->rh_state = FUSBH200_RH_HALTED;
  1071. fusbh200_writel(fusbh200, 0, &fusbh200->regs->intr_enable);
  1072. fusbh200_work(fusbh200);
  1073. end_unlink_async(fusbh200);
  1074. /* Not in process context, so don't try to reset the controller */
  1075. }
  1076. /* Handle unlinked interrupt QHs once they are gone from the hardware */
  1077. static void fusbh200_handle_intr_unlinks(struct fusbh200_hcd *fusbh200)
  1078. {
  1079. bool stopped = (fusbh200->rh_state < FUSBH200_RH_RUNNING);
  1080. /*
  1081. * Process all the QHs on the intr_unlink list that were added
  1082. * before the current unlink cycle began. The list is in
  1083. * temporal order, so stop when we reach the first entry in the
  1084. * current cycle. But if the root hub isn't running then
  1085. * process all the QHs on the list.
  1086. */
  1087. fusbh200->intr_unlinking = true;
  1088. while (fusbh200->intr_unlink) {
  1089. struct fusbh200_qh *qh = fusbh200->intr_unlink;
  1090. if (!stopped && qh->unlink_cycle == fusbh200->intr_unlink_cycle)
  1091. break;
  1092. fusbh200->intr_unlink = qh->unlink_next;
  1093. qh->unlink_next = NULL;
  1094. end_unlink_intr(fusbh200, qh);
  1095. }
  1096. /* Handle remaining entries later */
  1097. if (fusbh200->intr_unlink) {
  1098. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_UNLINK_INTR, true);
  1099. ++fusbh200->intr_unlink_cycle;
  1100. }
  1101. fusbh200->intr_unlinking = false;
  1102. }
  1103. /* Start another free-iTDs/siTDs cycle */
  1104. static void start_free_itds(struct fusbh200_hcd *fusbh200)
  1105. {
  1106. if (!(fusbh200->enabled_hrtimer_events & BIT(FUSBH200_HRTIMER_FREE_ITDS))) {
  1107. fusbh200->last_itd_to_free = list_entry(
  1108. fusbh200->cached_itd_list.prev,
  1109. struct fusbh200_itd, itd_list);
  1110. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_FREE_ITDS, true);
  1111. }
  1112. }
  1113. /* Wait for controller to stop using old iTDs and siTDs */
  1114. static void end_free_itds(struct fusbh200_hcd *fusbh200)
  1115. {
  1116. struct fusbh200_itd *itd, *n;
  1117. if (fusbh200->rh_state < FUSBH200_RH_RUNNING) {
  1118. fusbh200->last_itd_to_free = NULL;
  1119. }
  1120. list_for_each_entry_safe(itd, n, &fusbh200->cached_itd_list, itd_list) {
  1121. list_del(&itd->itd_list);
  1122. dma_pool_free(fusbh200->itd_pool, itd, itd->itd_dma);
  1123. if (itd == fusbh200->last_itd_to_free)
  1124. break;
  1125. }
  1126. if (!list_empty(&fusbh200->cached_itd_list))
  1127. start_free_itds(fusbh200);
  1128. }
  1129. /* Handle lost (or very late) IAA interrupts */
  1130. static void fusbh200_iaa_watchdog(struct fusbh200_hcd *fusbh200)
  1131. {
  1132. if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
  1133. return;
  1134. /*
  1135. * Lost IAA irqs wedge things badly; seen first with a vt8235.
  1136. * So we need this watchdog, but must protect it against both
  1137. * (a) SMP races against real IAA firing and retriggering, and
  1138. * (b) clean HC shutdown, when IAA watchdog was pending.
  1139. */
  1140. if (fusbh200->async_iaa) {
  1141. u32 cmd, status;
  1142. /* If we get here, IAA is *REALLY* late. It's barely
  1143. * conceivable that the system is so busy that CMD_IAAD
  1144. * is still legitimately set, so let's be sure it's
  1145. * clear before we read STS_IAA. (The HC should clear
  1146. * CMD_IAAD when it sets STS_IAA.)
  1147. */
  1148. cmd = fusbh200_readl(fusbh200, &fusbh200->regs->command);
  1149. /*
  1150. * If IAA is set here it either legitimately triggered
  1151. * after the watchdog timer expired (_way_ late, so we'll
  1152. * still count it as lost) ... or a silicon erratum:
  1153. * - VIA seems to set IAA without triggering the IRQ;
  1154. * - IAAD potentially cleared without setting IAA.
  1155. */
  1156. status = fusbh200_readl(fusbh200, &fusbh200->regs->status);
  1157. if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
  1158. COUNT(fusbh200->stats.lost_iaa);
  1159. fusbh200_writel(fusbh200, STS_IAA, &fusbh200->regs->status);
  1160. }
  1161. fusbh200_vdbg(fusbh200, "IAA watchdog: status %x cmd %x\n",
  1162. status, cmd);
  1163. end_unlink_async(fusbh200);
  1164. }
  1165. }
  1166. /* Enable the I/O watchdog, if appropriate */
  1167. static void turn_on_io_watchdog(struct fusbh200_hcd *fusbh200)
  1168. {
  1169. /* Not needed if the controller isn't running or it's already enabled */
  1170. if (fusbh200->rh_state != FUSBH200_RH_RUNNING ||
  1171. (fusbh200->enabled_hrtimer_events &
  1172. BIT(FUSBH200_HRTIMER_IO_WATCHDOG)))
  1173. return;
  1174. /*
  1175. * Isochronous transfers always need the watchdog.
  1176. * For other sorts we use it only if the flag is set.
  1177. */
  1178. if (fusbh200->isoc_count > 0 || (fusbh200->need_io_watchdog &&
  1179. fusbh200->async_count + fusbh200->intr_count > 0))
  1180. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_IO_WATCHDOG, true);
  1181. }
  1182. /*
  1183. * Handler functions for the hrtimer event types.
  1184. * Keep this array in the same order as the event types indexed by
  1185. * enum fusbh200_hrtimer_event in fusbh200.h.
  1186. */
  1187. static void (*event_handlers[])(struct fusbh200_hcd *) = {
  1188. fusbh200_poll_ASS, /* FUSBH200_HRTIMER_POLL_ASS */
  1189. fusbh200_poll_PSS, /* FUSBH200_HRTIMER_POLL_PSS */
  1190. fusbh200_handle_controller_death, /* FUSBH200_HRTIMER_POLL_DEAD */
  1191. fusbh200_handle_intr_unlinks, /* FUSBH200_HRTIMER_UNLINK_INTR */
  1192. end_free_itds, /* FUSBH200_HRTIMER_FREE_ITDS */
  1193. unlink_empty_async, /* FUSBH200_HRTIMER_ASYNC_UNLINKS */
  1194. fusbh200_iaa_watchdog, /* FUSBH200_HRTIMER_IAA_WATCHDOG */
  1195. fusbh200_disable_PSE, /* FUSBH200_HRTIMER_DISABLE_PERIODIC */
  1196. fusbh200_disable_ASE, /* FUSBH200_HRTIMER_DISABLE_ASYNC */
  1197. fusbh200_work, /* FUSBH200_HRTIMER_IO_WATCHDOG */
  1198. };
  1199. static enum hrtimer_restart fusbh200_hrtimer_func(struct hrtimer *t)
  1200. {
  1201. struct fusbh200_hcd *fusbh200 = container_of(t, struct fusbh200_hcd, hrtimer);
  1202. ktime_t now;
  1203. unsigned long events;
  1204. unsigned long flags;
  1205. unsigned e;
  1206. spin_lock_irqsave(&fusbh200->lock, flags);
  1207. events = fusbh200->enabled_hrtimer_events;
  1208. fusbh200->enabled_hrtimer_events = 0;
  1209. fusbh200->next_hrtimer_event = FUSBH200_HRTIMER_NO_EVENT;
  1210. /*
  1211. * Check each pending event. If its time has expired, handle
  1212. * the event; otherwise re-enable it.
  1213. */
  1214. now = ktime_get();
  1215. for_each_set_bit(e, &events, FUSBH200_HRTIMER_NUM_EVENTS) {
  1216. if (now.tv64 >= fusbh200->hr_timeouts[e].tv64)
  1217. event_handlers[e](fusbh200);
  1218. else
  1219. fusbh200_enable_event(fusbh200, e, false);
  1220. }
  1221. spin_unlock_irqrestore(&fusbh200->lock, flags);
  1222. return HRTIMER_NORESTART;
  1223. }
  1224. /*-------------------------------------------------------------------------*/
  1225. #define fusbh200_bus_suspend NULL
  1226. #define fusbh200_bus_resume NULL
  1227. /*-------------------------------------------------------------------------*/
  1228. static int check_reset_complete (
  1229. struct fusbh200_hcd *fusbh200,
  1230. int index,
  1231. u32 __iomem *status_reg,
  1232. int port_status
  1233. ) {
  1234. if (!(port_status & PORT_CONNECT))
  1235. return port_status;
  1236. /* if reset finished and it's still not enabled -- handoff */
  1237. if (!(port_status & PORT_PE)) {
  1238. /* with integrated TT, there's nobody to hand it to! */
  1239. fusbh200_dbg (fusbh200,
  1240. "Failed to enable port %d on root hub TT\n",
  1241. index+1);
  1242. return port_status;
  1243. } else {
  1244. fusbh200_dbg(fusbh200, "port %d reset complete, port enabled\n",
  1245. index + 1);
  1246. }
  1247. return port_status;
  1248. }
  1249. /*-------------------------------------------------------------------------*/
  1250. /* build "status change" packet (one or two bytes) from HC registers */
  1251. static int
  1252. fusbh200_hub_status_data (struct usb_hcd *hcd, char *buf)
  1253. {
  1254. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  1255. u32 temp, status;
  1256. u32 mask;
  1257. int retval = 1;
  1258. unsigned long flags;
  1259. /* init status to no-changes */
  1260. buf [0] = 0;
  1261. /* Inform the core about resumes-in-progress by returning
  1262. * a non-zero value even if there are no status changes.
  1263. */
  1264. status = fusbh200->resuming_ports;
  1265. mask = PORT_CSC | PORT_PEC;
  1266. // PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND
  1267. /* no hub change reports (bit 0) for now (power, ...) */
  1268. /* port N changes (bit N)? */
  1269. spin_lock_irqsave (&fusbh200->lock, flags);
  1270. temp = fusbh200_readl(fusbh200, &fusbh200->regs->port_status);
  1271. /*
  1272. * Return status information even for ports with OWNER set.
  1273. * Otherwise khubd wouldn't see the disconnect event when a
  1274. * high-speed device is switched over to the companion
  1275. * controller by the user.
  1276. */
  1277. if ((temp & mask) != 0 || test_bit(0, &fusbh200->port_c_suspend)
  1278. || (fusbh200->reset_done[0] && time_after_eq(
  1279. jiffies, fusbh200->reset_done[0]))) {
  1280. buf [0] |= 1 << 1;
  1281. status = STS_PCD;
  1282. }
  1283. /* FIXME autosuspend idle root hubs */
  1284. spin_unlock_irqrestore (&fusbh200->lock, flags);
  1285. return status ? retval : 0;
  1286. }
  1287. /*-------------------------------------------------------------------------*/
  1288. static void
  1289. fusbh200_hub_descriptor (
  1290. struct fusbh200_hcd *fusbh200,
  1291. struct usb_hub_descriptor *desc
  1292. ) {
  1293. int ports = HCS_N_PORTS (fusbh200->hcs_params);
  1294. u16 temp;
  1295. desc->bDescriptorType = 0x29;
  1296. desc->bPwrOn2PwrGood = 10; /* fusbh200 1.0, 2.3.9 says 20ms max */
  1297. desc->bHubContrCurrent = 0;
  1298. desc->bNbrPorts = ports;
  1299. temp = 1 + (ports / 8);
  1300. desc->bDescLength = 7 + 2 * temp;
  1301. /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
  1302. memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
  1303. memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
  1304. temp = 0x0008; /* per-port overcurrent reporting */
  1305. temp |= 0x0002; /* no power switching */
  1306. desc->wHubCharacteristics = cpu_to_le16(temp);
  1307. }
  1308. /*-------------------------------------------------------------------------*/
  1309. static int fusbh200_hub_control (
  1310. struct usb_hcd *hcd,
  1311. u16 typeReq,
  1312. u16 wValue,
  1313. u16 wIndex,
  1314. char *buf,
  1315. u16 wLength
  1316. ) {
  1317. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  1318. int ports = HCS_N_PORTS (fusbh200->hcs_params);
  1319. u32 __iomem *status_reg = &fusbh200->regs->port_status;
  1320. u32 temp, temp1, status;
  1321. unsigned long flags;
  1322. int retval = 0;
  1323. unsigned selector;
  1324. /*
  1325. * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
  1326. * HCS_INDICATOR may say we can change LEDs to off/amber/green.
  1327. * (track current state ourselves) ... blink for diagnostics,
  1328. * power, "this is the one", etc. EHCI spec supports this.
  1329. */
  1330. spin_lock_irqsave (&fusbh200->lock, flags);
  1331. switch (typeReq) {
  1332. case ClearHubFeature:
  1333. switch (wValue) {
  1334. case C_HUB_LOCAL_POWER:
  1335. case C_HUB_OVER_CURRENT:
  1336. /* no hub-wide feature/status flags */
  1337. break;
  1338. default:
  1339. goto error;
  1340. }
  1341. break;
  1342. case ClearPortFeature:
  1343. if (!wIndex || wIndex > ports)
  1344. goto error;
  1345. wIndex--;
  1346. temp = fusbh200_readl(fusbh200, status_reg);
  1347. temp &= ~PORT_RWC_BITS;
  1348. /*
  1349. * Even if OWNER is set, so the port is owned by the
  1350. * companion controller, khubd needs to be able to clear
  1351. * the port-change status bits (especially
  1352. * USB_PORT_STAT_C_CONNECTION).
  1353. */
  1354. switch (wValue) {
  1355. case USB_PORT_FEAT_ENABLE:
  1356. fusbh200_writel(fusbh200, temp & ~PORT_PE, status_reg);
  1357. break;
  1358. case USB_PORT_FEAT_C_ENABLE:
  1359. fusbh200_writel(fusbh200, temp | PORT_PEC, status_reg);
  1360. break;
  1361. case USB_PORT_FEAT_SUSPEND:
  1362. if (temp & PORT_RESET)
  1363. goto error;
  1364. if (!(temp & PORT_SUSPEND))
  1365. break;
  1366. if ((temp & PORT_PE) == 0)
  1367. goto error;
  1368. /* resume signaling for 20 msec */
  1369. fusbh200_writel(fusbh200, temp | PORT_RESUME, status_reg);
  1370. fusbh200->reset_done[wIndex] = jiffies
  1371. + msecs_to_jiffies(20);
  1372. break;
  1373. case USB_PORT_FEAT_C_SUSPEND:
  1374. clear_bit(wIndex, &fusbh200->port_c_suspend);
  1375. break;
  1376. case USB_PORT_FEAT_C_CONNECTION:
  1377. fusbh200_writel(fusbh200, temp | PORT_CSC, status_reg);
  1378. break;
  1379. case USB_PORT_FEAT_C_OVER_CURRENT:
  1380. fusbh200_writel(fusbh200, temp | BMISR_OVC, &fusbh200->regs->bmisr);
  1381. break;
  1382. case USB_PORT_FEAT_C_RESET:
  1383. /* GetPortStatus clears reset */
  1384. break;
  1385. default:
  1386. goto error;
  1387. }
  1388. fusbh200_readl(fusbh200, &fusbh200->regs->command); /* unblock posted write */
  1389. break;
  1390. case GetHubDescriptor:
  1391. fusbh200_hub_descriptor (fusbh200, (struct usb_hub_descriptor *)
  1392. buf);
  1393. break;
  1394. case GetHubStatus:
  1395. /* no hub-wide feature/status flags */
  1396. memset (buf, 0, 4);
  1397. //cpu_to_le32s ((u32 *) buf);
  1398. break;
  1399. case GetPortStatus:
  1400. if (!wIndex || wIndex > ports)
  1401. goto error;
  1402. wIndex--;
  1403. status = 0;
  1404. temp = fusbh200_readl(fusbh200, status_reg);
  1405. // wPortChange bits
  1406. if (temp & PORT_CSC)
  1407. status |= USB_PORT_STAT_C_CONNECTION << 16;
  1408. if (temp & PORT_PEC)
  1409. status |= USB_PORT_STAT_C_ENABLE << 16;
  1410. temp1 = fusbh200_readl(fusbh200, &fusbh200->regs->bmisr);
  1411. if (temp1 & BMISR_OVC)
  1412. status |= USB_PORT_STAT_C_OVERCURRENT << 16;
  1413. /* whoever resumes must GetPortStatus to complete it!! */
  1414. if (temp & PORT_RESUME) {
  1415. /* Remote Wakeup received? */
  1416. if (!fusbh200->reset_done[wIndex]) {
  1417. /* resume signaling for 20 msec */
  1418. fusbh200->reset_done[wIndex] = jiffies
  1419. + msecs_to_jiffies(20);
  1420. /* check the port again */
  1421. mod_timer(&fusbh200_to_hcd(fusbh200)->rh_timer,
  1422. fusbh200->reset_done[wIndex]);
  1423. }
  1424. /* resume completed? */
  1425. else if (time_after_eq(jiffies,
  1426. fusbh200->reset_done[wIndex])) {
  1427. clear_bit(wIndex, &fusbh200->suspended_ports);
  1428. set_bit(wIndex, &fusbh200->port_c_suspend);
  1429. fusbh200->reset_done[wIndex] = 0;
  1430. /* stop resume signaling */
  1431. temp = fusbh200_readl(fusbh200, status_reg);
  1432. fusbh200_writel(fusbh200,
  1433. temp & ~(PORT_RWC_BITS | PORT_RESUME),
  1434. status_reg);
  1435. clear_bit(wIndex, &fusbh200->resuming_ports);
  1436. retval = handshake(fusbh200, status_reg,
  1437. PORT_RESUME, 0, 2000 /* 2msec */);
  1438. if (retval != 0) {
  1439. fusbh200_err(fusbh200,
  1440. "port %d resume error %d\n",
  1441. wIndex + 1, retval);
  1442. goto error;
  1443. }
  1444. temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
  1445. }
  1446. }
  1447. /* whoever resets must GetPortStatus to complete it!! */
  1448. if ((temp & PORT_RESET)
  1449. && time_after_eq(jiffies,
  1450. fusbh200->reset_done[wIndex])) {
  1451. status |= USB_PORT_STAT_C_RESET << 16;
  1452. fusbh200->reset_done [wIndex] = 0;
  1453. clear_bit(wIndex, &fusbh200->resuming_ports);
  1454. /* force reset to complete */
  1455. fusbh200_writel(fusbh200, temp & ~(PORT_RWC_BITS | PORT_RESET),
  1456. status_reg);
  1457. /* REVISIT: some hardware needs 550+ usec to clear
  1458. * this bit; seems too long to spin routinely...
  1459. */
  1460. retval = handshake(fusbh200, status_reg,
  1461. PORT_RESET, 0, 1000);
  1462. if (retval != 0) {
  1463. fusbh200_err (fusbh200, "port %d reset error %d\n",
  1464. wIndex + 1, retval);
  1465. goto error;
  1466. }
  1467. /* see what we found out */
  1468. temp = check_reset_complete (fusbh200, wIndex, status_reg,
  1469. fusbh200_readl(fusbh200, status_reg));
  1470. }
  1471. if (!(temp & (PORT_RESUME|PORT_RESET))) {
  1472. fusbh200->reset_done[wIndex] = 0;
  1473. clear_bit(wIndex, &fusbh200->resuming_ports);
  1474. }
  1475. /* transfer dedicated ports to the companion hc */
  1476. if ((temp & PORT_CONNECT) &&
  1477. test_bit(wIndex, &fusbh200->companion_ports)) {
  1478. temp &= ~PORT_RWC_BITS;
  1479. fusbh200_writel(fusbh200, temp, status_reg);
  1480. fusbh200_dbg(fusbh200, "port %d --> companion\n", wIndex + 1);
  1481. temp = fusbh200_readl(fusbh200, status_reg);
  1482. }
  1483. /*
  1484. * Even if OWNER is set, there's no harm letting khubd
  1485. * see the wPortStatus values (they should all be 0 except
  1486. * for PORT_POWER anyway).
  1487. */
  1488. if (temp & PORT_CONNECT) {
  1489. status |= USB_PORT_STAT_CONNECTION;
  1490. status |= fusbh200_port_speed(fusbh200, temp);
  1491. }
  1492. if (temp & PORT_PE)
  1493. status |= USB_PORT_STAT_ENABLE;
  1494. /* maybe the port was unsuspended without our knowledge */
  1495. if (temp & (PORT_SUSPEND|PORT_RESUME)) {
  1496. status |= USB_PORT_STAT_SUSPEND;
  1497. } else if (test_bit(wIndex, &fusbh200->suspended_ports)) {
  1498. clear_bit(wIndex, &fusbh200->suspended_ports);
  1499. clear_bit(wIndex, &fusbh200->resuming_ports);
  1500. fusbh200->reset_done[wIndex] = 0;
  1501. if (temp & PORT_PE)
  1502. set_bit(wIndex, &fusbh200->port_c_suspend);
  1503. }
  1504. temp1 = fusbh200_readl(fusbh200, &fusbh200->regs->bmisr);
  1505. if (temp1 & BMISR_OVC)
  1506. status |= USB_PORT_STAT_OVERCURRENT;
  1507. if (temp & PORT_RESET)
  1508. status |= USB_PORT_STAT_RESET;
  1509. if (test_bit(wIndex, &fusbh200->port_c_suspend))
  1510. status |= USB_PORT_STAT_C_SUSPEND << 16;
  1511. #ifndef VERBOSE_DEBUG
  1512. if (status & ~0xffff) /* only if wPortChange is interesting */
  1513. #endif
  1514. dbg_port (fusbh200, "GetStatus", wIndex + 1, temp);
  1515. put_unaligned_le32(status, buf);
  1516. break;
  1517. case SetHubFeature:
  1518. switch (wValue) {
  1519. case C_HUB_LOCAL_POWER:
  1520. case C_HUB_OVER_CURRENT:
  1521. /* no hub-wide feature/status flags */
  1522. break;
  1523. default:
  1524. goto error;
  1525. }
  1526. break;
  1527. case SetPortFeature:
  1528. selector = wIndex >> 8;
  1529. wIndex &= 0xff;
  1530. if (!wIndex || wIndex > ports)
  1531. goto error;
  1532. wIndex--;
  1533. temp = fusbh200_readl(fusbh200, status_reg);
  1534. temp &= ~PORT_RWC_BITS;
  1535. switch (wValue) {
  1536. case USB_PORT_FEAT_SUSPEND:
  1537. if ((temp & PORT_PE) == 0
  1538. || (temp & PORT_RESET) != 0)
  1539. goto error;
  1540. /* After above check the port must be connected.
  1541. * Set appropriate bit thus could put phy into low power
  1542. * mode if we have hostpc feature
  1543. */
  1544. fusbh200_writel(fusbh200, temp | PORT_SUSPEND, status_reg);
  1545. set_bit(wIndex, &fusbh200->suspended_ports);
  1546. break;
  1547. case USB_PORT_FEAT_RESET:
  1548. if (temp & PORT_RESUME)
  1549. goto error;
  1550. /* line status bits may report this as low speed,
  1551. * which can be fine if this root hub has a
  1552. * transaction translator built in.
  1553. */
  1554. fusbh200_vdbg (fusbh200, "port %d reset\n", wIndex + 1);
  1555. temp |= PORT_RESET;
  1556. temp &= ~PORT_PE;
  1557. /*
  1558. * caller must wait, then call GetPortStatus
  1559. * usb 2.0 spec says 50 ms resets on root
  1560. */
  1561. fusbh200->reset_done [wIndex] = jiffies
  1562. + msecs_to_jiffies (50);
  1563. fusbh200_writel(fusbh200, temp, status_reg);
  1564. break;
  1565. /* For downstream facing ports (these): one hub port is put
  1566. * into test mode according to USB2 11.24.2.13, then the hub
  1567. * must be reset (which for root hub now means rmmod+modprobe,
  1568. * or else system reboot). See EHCI 2.3.9 and 4.14 for info
  1569. * about the EHCI-specific stuff.
  1570. */
  1571. case USB_PORT_FEAT_TEST:
  1572. if (!selector || selector > 5)
  1573. goto error;
  1574. spin_unlock_irqrestore(&fusbh200->lock, flags);
  1575. fusbh200_quiesce(fusbh200);
  1576. spin_lock_irqsave(&fusbh200->lock, flags);
  1577. /* Put all enabled ports into suspend */
  1578. temp = fusbh200_readl(fusbh200, status_reg) & ~PORT_RWC_BITS;
  1579. if (temp & PORT_PE)
  1580. fusbh200_writel(fusbh200, temp | PORT_SUSPEND,
  1581. status_reg);
  1582. spin_unlock_irqrestore(&fusbh200->lock, flags);
  1583. fusbh200_halt(fusbh200);
  1584. spin_lock_irqsave(&fusbh200->lock, flags);
  1585. temp = fusbh200_readl(fusbh200, status_reg);
  1586. temp |= selector << 16;
  1587. fusbh200_writel(fusbh200, temp, status_reg);
  1588. break;
  1589. default:
  1590. goto error;
  1591. }
  1592. fusbh200_readl(fusbh200, &fusbh200->regs->command); /* unblock posted writes */
  1593. break;
  1594. default:
  1595. error:
  1596. /* "stall" on error */
  1597. retval = -EPIPE;
  1598. }
  1599. spin_unlock_irqrestore (&fusbh200->lock, flags);
  1600. return retval;
  1601. }
  1602. static void __maybe_unused fusbh200_relinquish_port(struct usb_hcd *hcd,
  1603. int portnum)
  1604. {
  1605. return;
  1606. }
  1607. static int __maybe_unused fusbh200_port_handed_over(struct usb_hcd *hcd,
  1608. int portnum)
  1609. {
  1610. return 0;
  1611. }
  1612. /*-------------------------------------------------------------------------*/
  1613. /*
  1614. * There's basically three types of memory:
  1615. * - data used only by the HCD ... kmalloc is fine
  1616. * - async and periodic schedules, shared by HC and HCD ... these
  1617. * need to use dma_pool or dma_alloc_coherent
  1618. * - driver buffers, read/written by HC ... single shot DMA mapped
  1619. *
  1620. * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
  1621. * No memory seen by this driver is pageable.
  1622. */
  1623. /*-------------------------------------------------------------------------*/
  1624. /* Allocate the key transfer structures from the previously allocated pool */
  1625. static inline void fusbh200_qtd_init(struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd,
  1626. dma_addr_t dma)
  1627. {
  1628. memset (qtd, 0, sizeof *qtd);
  1629. qtd->qtd_dma = dma;
  1630. qtd->hw_token = cpu_to_hc32(fusbh200, QTD_STS_HALT);
  1631. qtd->hw_next = FUSBH200_LIST_END(fusbh200);
  1632. qtd->hw_alt_next = FUSBH200_LIST_END(fusbh200);
  1633. INIT_LIST_HEAD (&qtd->qtd_list);
  1634. }
  1635. static struct fusbh200_qtd *fusbh200_qtd_alloc (struct fusbh200_hcd *fusbh200, gfp_t flags)
  1636. {
  1637. struct fusbh200_qtd *qtd;
  1638. dma_addr_t dma;
  1639. qtd = dma_pool_alloc (fusbh200->qtd_pool, flags, &dma);
  1640. if (qtd != NULL) {
  1641. fusbh200_qtd_init(fusbh200, qtd, dma);
  1642. }
  1643. return qtd;
  1644. }
  1645. static inline void fusbh200_qtd_free (struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd)
  1646. {
  1647. dma_pool_free (fusbh200->qtd_pool, qtd, qtd->qtd_dma);
  1648. }
  1649. static void qh_destroy(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  1650. {
  1651. /* clean qtds first, and know this is not linked */
  1652. if (!list_empty (&qh->qtd_list) || qh->qh_next.ptr) {
  1653. fusbh200_dbg (fusbh200, "unused qh not empty!\n");
  1654. BUG ();
  1655. }
  1656. if (qh->dummy)
  1657. fusbh200_qtd_free (fusbh200, qh->dummy);
  1658. dma_pool_free(fusbh200->qh_pool, qh->hw, qh->qh_dma);
  1659. kfree(qh);
  1660. }
  1661. static struct fusbh200_qh *fusbh200_qh_alloc (struct fusbh200_hcd *fusbh200, gfp_t flags)
  1662. {
  1663. struct fusbh200_qh *qh;
  1664. dma_addr_t dma;
  1665. qh = kzalloc(sizeof *qh, GFP_ATOMIC);
  1666. if (!qh)
  1667. goto done;
  1668. qh->hw = (struct fusbh200_qh_hw *)
  1669. dma_pool_alloc(fusbh200->qh_pool, flags, &dma);
  1670. if (!qh->hw)
  1671. goto fail;
  1672. memset(qh->hw, 0, sizeof *qh->hw);
  1673. qh->qh_dma = dma;
  1674. // INIT_LIST_HEAD (&qh->qh_list);
  1675. INIT_LIST_HEAD (&qh->qtd_list);
  1676. /* dummy td enables safe urb queuing */
  1677. qh->dummy = fusbh200_qtd_alloc (fusbh200, flags);
  1678. if (qh->dummy == NULL) {
  1679. fusbh200_dbg (fusbh200, "no dummy td\n");
  1680. goto fail1;
  1681. }
  1682. done:
  1683. return qh;
  1684. fail1:
  1685. dma_pool_free(fusbh200->qh_pool, qh->hw, qh->qh_dma);
  1686. fail:
  1687. kfree(qh);
  1688. return NULL;
  1689. }
  1690. /*-------------------------------------------------------------------------*/
  1691. /* The queue heads and transfer descriptors are managed from pools tied
  1692. * to each of the "per device" structures.
  1693. * This is the initialisation and cleanup code.
  1694. */
  1695. static void fusbh200_mem_cleanup (struct fusbh200_hcd *fusbh200)
  1696. {
  1697. if (fusbh200->async)
  1698. qh_destroy(fusbh200, fusbh200->async);
  1699. fusbh200->async = NULL;
  1700. if (fusbh200->dummy)
  1701. qh_destroy(fusbh200, fusbh200->dummy);
  1702. fusbh200->dummy = NULL;
  1703. /* DMA consistent memory and pools */
  1704. if (fusbh200->qtd_pool)
  1705. dma_pool_destroy (fusbh200->qtd_pool);
  1706. fusbh200->qtd_pool = NULL;
  1707. if (fusbh200->qh_pool) {
  1708. dma_pool_destroy (fusbh200->qh_pool);
  1709. fusbh200->qh_pool = NULL;
  1710. }
  1711. if (fusbh200->itd_pool)
  1712. dma_pool_destroy (fusbh200->itd_pool);
  1713. fusbh200->itd_pool = NULL;
  1714. if (fusbh200->periodic)
  1715. dma_free_coherent (fusbh200_to_hcd(fusbh200)->self.controller,
  1716. fusbh200->periodic_size * sizeof (u32),
  1717. fusbh200->periodic, fusbh200->periodic_dma);
  1718. fusbh200->periodic = NULL;
  1719. /* shadow periodic table */
  1720. kfree(fusbh200->pshadow);
  1721. fusbh200->pshadow = NULL;
  1722. }
  1723. /* remember to add cleanup code (above) if you add anything here */
  1724. static int fusbh200_mem_init (struct fusbh200_hcd *fusbh200, gfp_t flags)
  1725. {
  1726. int i;
  1727. /* QTDs for control/bulk/intr transfers */
  1728. fusbh200->qtd_pool = dma_pool_create ("fusbh200_qtd",
  1729. fusbh200_to_hcd(fusbh200)->self.controller,
  1730. sizeof (struct fusbh200_qtd),
  1731. 32 /* byte alignment (for hw parts) */,
  1732. 4096 /* can't cross 4K */);
  1733. if (!fusbh200->qtd_pool) {
  1734. goto fail;
  1735. }
  1736. /* QHs for control/bulk/intr transfers */
  1737. fusbh200->qh_pool = dma_pool_create ("fusbh200_qh",
  1738. fusbh200_to_hcd(fusbh200)->self.controller,
  1739. sizeof(struct fusbh200_qh_hw),
  1740. 32 /* byte alignment (for hw parts) */,
  1741. 4096 /* can't cross 4K */);
  1742. if (!fusbh200->qh_pool) {
  1743. goto fail;
  1744. }
  1745. fusbh200->async = fusbh200_qh_alloc (fusbh200, flags);
  1746. if (!fusbh200->async) {
  1747. goto fail;
  1748. }
  1749. /* ITD for high speed ISO transfers */
  1750. fusbh200->itd_pool = dma_pool_create ("fusbh200_itd",
  1751. fusbh200_to_hcd(fusbh200)->self.controller,
  1752. sizeof (struct fusbh200_itd),
  1753. 64 /* byte alignment (for hw parts) */,
  1754. 4096 /* can't cross 4K */);
  1755. if (!fusbh200->itd_pool) {
  1756. goto fail;
  1757. }
  1758. /* Hardware periodic table */
  1759. fusbh200->periodic = (__le32 *)
  1760. dma_alloc_coherent (fusbh200_to_hcd(fusbh200)->self.controller,
  1761. fusbh200->periodic_size * sizeof(__le32),
  1762. &fusbh200->periodic_dma, 0);
  1763. if (fusbh200->periodic == NULL) {
  1764. goto fail;
  1765. }
  1766. for (i = 0; i < fusbh200->periodic_size; i++)
  1767. fusbh200->periodic[i] = FUSBH200_LIST_END(fusbh200);
  1768. /* software shadow of hardware table */
  1769. fusbh200->pshadow = kcalloc(fusbh200->periodic_size, sizeof(void *), flags);
  1770. if (fusbh200->pshadow != NULL)
  1771. return 0;
  1772. fail:
  1773. fusbh200_dbg (fusbh200, "couldn't init memory\n");
  1774. fusbh200_mem_cleanup (fusbh200);
  1775. return -ENOMEM;
  1776. }
  1777. /*-------------------------------------------------------------------------*/
  1778. /*
  1779. * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
  1780. *
  1781. * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
  1782. * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  1783. * buffers needed for the larger number). We use one QH per endpoint, queue
  1784. * multiple urbs (all three types) per endpoint. URBs may need several qtds.
  1785. *
  1786. * ISO traffic uses "ISO TD" (itd) records, and (along with
  1787. * interrupts) needs careful scheduling. Performance improvements can be
  1788. * an ongoing challenge. That's in "ehci-sched.c".
  1789. *
  1790. * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  1791. * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  1792. * (b) special fields in qh entries or (c) split iso entries. TTs will
  1793. * buffer low/full speed data so the host collects it at high speed.
  1794. */
  1795. /*-------------------------------------------------------------------------*/
  1796. /* fill a qtd, returning how much of the buffer we were able to queue up */
  1797. static int
  1798. qtd_fill(struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd, dma_addr_t buf,
  1799. size_t len, int token, int maxpacket)
  1800. {
  1801. int i, count;
  1802. u64 addr = buf;
  1803. /* one buffer entry per 4K ... first might be short or unaligned */
  1804. qtd->hw_buf[0] = cpu_to_hc32(fusbh200, (u32)addr);
  1805. qtd->hw_buf_hi[0] = cpu_to_hc32(fusbh200, (u32)(addr >> 32));
  1806. count = 0x1000 - (buf & 0x0fff); /* rest of that page */
  1807. if (likely (len < count)) /* ... iff needed */
  1808. count = len;
  1809. else {
  1810. buf += 0x1000;
  1811. buf &= ~0x0fff;
  1812. /* per-qtd limit: from 16K to 20K (best alignment) */
  1813. for (i = 1; count < len && i < 5; i++) {
  1814. addr = buf;
  1815. qtd->hw_buf[i] = cpu_to_hc32(fusbh200, (u32)addr);
  1816. qtd->hw_buf_hi[i] = cpu_to_hc32(fusbh200,
  1817. (u32)(addr >> 32));
  1818. buf += 0x1000;
  1819. if ((count + 0x1000) < len)
  1820. count += 0x1000;
  1821. else
  1822. count = len;
  1823. }
  1824. /* short packets may only terminate transfers */
  1825. if (count != len)
  1826. count -= (count % maxpacket);
  1827. }
  1828. qtd->hw_token = cpu_to_hc32(fusbh200, (count << 16) | token);
  1829. qtd->length = count;
  1830. return count;
  1831. }
  1832. /*-------------------------------------------------------------------------*/
  1833. static inline void
  1834. qh_update (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh, struct fusbh200_qtd *qtd)
  1835. {
  1836. struct fusbh200_qh_hw *hw = qh->hw;
  1837. /* writes to an active overlay are unsafe */
  1838. BUG_ON(qh->qh_state != QH_STATE_IDLE);
  1839. hw->hw_qtd_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
  1840. hw->hw_alt_next = FUSBH200_LIST_END(fusbh200);
  1841. /* Except for control endpoints, we make hardware maintain data
  1842. * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
  1843. * and set the pseudo-toggle in udev. Only usb_clear_halt() will
  1844. * ever clear it.
  1845. */
  1846. if (!(hw->hw_info1 & cpu_to_hc32(fusbh200, QH_TOGGLE_CTL))) {
  1847. unsigned is_out, epnum;
  1848. is_out = qh->is_out;
  1849. epnum = (hc32_to_cpup(fusbh200, &hw->hw_info1) >> 8) & 0x0f;
  1850. if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
  1851. hw->hw_token &= ~cpu_to_hc32(fusbh200, QTD_TOGGLE);
  1852. usb_settoggle (qh->dev, epnum, is_out, 1);
  1853. }
  1854. }
  1855. hw->hw_token &= cpu_to_hc32(fusbh200, QTD_TOGGLE | QTD_STS_PING);
  1856. }
  1857. /* if it weren't for a common silicon quirk (writing the dummy into the qh
  1858. * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
  1859. * recovery (including urb dequeue) would need software changes to a QH...
  1860. */
  1861. static void
  1862. qh_refresh (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  1863. {
  1864. struct fusbh200_qtd *qtd;
  1865. if (list_empty (&qh->qtd_list))
  1866. qtd = qh->dummy;
  1867. else {
  1868. qtd = list_entry (qh->qtd_list.next,
  1869. struct fusbh200_qtd, qtd_list);
  1870. /*
  1871. * first qtd may already be partially processed.
  1872. * If we come here during unlink, the QH overlay region
  1873. * might have reference to the just unlinked qtd. The
  1874. * qtd is updated in qh_completions(). Update the QH
  1875. * overlay here.
  1876. */
  1877. if (cpu_to_hc32(fusbh200, qtd->qtd_dma) == qh->hw->hw_current) {
  1878. qh->hw->hw_qtd_next = qtd->hw_next;
  1879. qtd = NULL;
  1880. }
  1881. }
  1882. if (qtd)
  1883. qh_update (fusbh200, qh, qtd);
  1884. }
  1885. /*-------------------------------------------------------------------------*/
  1886. static void qh_link_async(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
  1887. static void fusbh200_clear_tt_buffer_complete(struct usb_hcd *hcd,
  1888. struct usb_host_endpoint *ep)
  1889. {
  1890. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  1891. struct fusbh200_qh *qh = ep->hcpriv;
  1892. unsigned long flags;
  1893. spin_lock_irqsave(&fusbh200->lock, flags);
  1894. qh->clearing_tt = 0;
  1895. if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
  1896. && fusbh200->rh_state == FUSBH200_RH_RUNNING)
  1897. qh_link_async(fusbh200, qh);
  1898. spin_unlock_irqrestore(&fusbh200->lock, flags);
  1899. }
  1900. static void fusbh200_clear_tt_buffer(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh,
  1901. struct urb *urb, u32 token)
  1902. {
  1903. /* If an async split transaction gets an error or is unlinked,
  1904. * the TT buffer may be left in an indeterminate state. We
  1905. * have to clear the TT buffer.
  1906. *
  1907. * Note: this routine is never called for Isochronous transfers.
  1908. */
  1909. if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
  1910. #ifdef DEBUG
  1911. struct usb_device *tt = urb->dev->tt->hub;
  1912. dev_dbg(&tt->dev,
  1913. "clear tt buffer port %d, a%d ep%d t%08x\n",
  1914. urb->dev->ttport, urb->dev->devnum,
  1915. usb_pipeendpoint(urb->pipe), token);
  1916. #endif /* DEBUG */
  1917. if (urb->dev->tt->hub !=
  1918. fusbh200_to_hcd(fusbh200)->self.root_hub) {
  1919. if (usb_hub_clear_tt_buffer(urb) == 0)
  1920. qh->clearing_tt = 1;
  1921. }
  1922. }
  1923. }
  1924. static int qtd_copy_status (
  1925. struct fusbh200_hcd *fusbh200,
  1926. struct urb *urb,
  1927. size_t length,
  1928. u32 token
  1929. )
  1930. {
  1931. int status = -EINPROGRESS;
  1932. /* count IN/OUT bytes, not SETUP (even short packets) */
  1933. if (likely (QTD_PID (token) != 2))
  1934. urb->actual_length += length - QTD_LENGTH (token);
  1935. /* don't modify error codes */
  1936. if (unlikely(urb->unlinked))
  1937. return status;
  1938. /* force cleanup after short read; not always an error */
  1939. if (unlikely (IS_SHORT_READ (token)))
  1940. status = -EREMOTEIO;
  1941. /* serious "can't proceed" faults reported by the hardware */
  1942. if (token & QTD_STS_HALT) {
  1943. if (token & QTD_STS_BABBLE) {
  1944. /* FIXME "must" disable babbling device's port too */
  1945. status = -EOVERFLOW;
  1946. /* CERR nonzero + halt --> stall */
  1947. } else if (QTD_CERR(token)) {
  1948. status = -EPIPE;
  1949. /* In theory, more than one of the following bits can be set
  1950. * since they are sticky and the transaction is retried.
  1951. * Which to test first is rather arbitrary.
  1952. */
  1953. } else if (token & QTD_STS_MMF) {
  1954. /* fs/ls interrupt xfer missed the complete-split */
  1955. status = -EPROTO;
  1956. } else if (token & QTD_STS_DBE) {
  1957. status = (QTD_PID (token) == 1) /* IN ? */
  1958. ? -ENOSR /* hc couldn't read data */
  1959. : -ECOMM; /* hc couldn't write data */
  1960. } else if (token & QTD_STS_XACT) {
  1961. /* timeout, bad CRC, wrong PID, etc */
  1962. fusbh200_dbg(fusbh200, "devpath %s ep%d%s 3strikes\n",
  1963. urb->dev->devpath,
  1964. usb_pipeendpoint(urb->pipe),
  1965. usb_pipein(urb->pipe) ? "in" : "out");
  1966. status = -EPROTO;
  1967. } else { /* unknown */
  1968. status = -EPROTO;
  1969. }
  1970. fusbh200_vdbg (fusbh200,
  1971. "dev%d ep%d%s qtd token %08x --> status %d\n",
  1972. usb_pipedevice (urb->pipe),
  1973. usb_pipeendpoint (urb->pipe),
  1974. usb_pipein (urb->pipe) ? "in" : "out",
  1975. token, status);
  1976. }
  1977. return status;
  1978. }
  1979. static void
  1980. fusbh200_urb_done(struct fusbh200_hcd *fusbh200, struct urb *urb, int status)
  1981. __releases(fusbh200->lock)
  1982. __acquires(fusbh200->lock)
  1983. {
  1984. if (likely (urb->hcpriv != NULL)) {
  1985. struct fusbh200_qh *qh = (struct fusbh200_qh *) urb->hcpriv;
  1986. /* S-mask in a QH means it's an interrupt urb */
  1987. if ((qh->hw->hw_info2 & cpu_to_hc32(fusbh200, QH_SMASK)) != 0) {
  1988. /* ... update hc-wide periodic stats (for usbfs) */
  1989. fusbh200_to_hcd(fusbh200)->self.bandwidth_int_reqs--;
  1990. }
  1991. }
  1992. if (unlikely(urb->unlinked)) {
  1993. COUNT(fusbh200->stats.unlink);
  1994. } else {
  1995. /* report non-error and short read status as zero */
  1996. if (status == -EINPROGRESS || status == -EREMOTEIO)
  1997. status = 0;
  1998. COUNT(fusbh200->stats.complete);
  1999. }
  2000. #ifdef FUSBH200_URB_TRACE
  2001. fusbh200_dbg (fusbh200,
  2002. "%s %s urb %p ep%d%s status %d len %d/%d\n",
  2003. __func__, urb->dev->devpath, urb,
  2004. usb_pipeendpoint (urb->pipe),
  2005. usb_pipein (urb->pipe) ? "in" : "out",
  2006. status,
  2007. urb->actual_length, urb->transfer_buffer_length);
  2008. #endif
  2009. /* complete() can reenter this HCD */
  2010. usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
  2011. spin_unlock (&fusbh200->lock);
  2012. usb_hcd_giveback_urb(fusbh200_to_hcd(fusbh200), urb, status);
  2013. spin_lock (&fusbh200->lock);
  2014. }
  2015. static int qh_schedule (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
  2016. /*
  2017. * Process and free completed qtds for a qh, returning URBs to drivers.
  2018. * Chases up to qh->hw_current. Returns number of completions called,
  2019. * indicating how much "real" work we did.
  2020. */
  2021. static unsigned
  2022. qh_completions (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  2023. {
  2024. struct fusbh200_qtd *last, *end = qh->dummy;
  2025. struct list_head *entry, *tmp;
  2026. int last_status;
  2027. int stopped;
  2028. unsigned count = 0;
  2029. u8 state;
  2030. struct fusbh200_qh_hw *hw = qh->hw;
  2031. if (unlikely (list_empty (&qh->qtd_list)))
  2032. return count;
  2033. /* completions (or tasks on other cpus) must never clobber HALT
  2034. * till we've gone through and cleaned everything up, even when
  2035. * they add urbs to this qh's queue or mark them for unlinking.
  2036. *
  2037. * NOTE: unlinking expects to be done in queue order.
  2038. *
  2039. * It's a bug for qh->qh_state to be anything other than
  2040. * QH_STATE_IDLE, unless our caller is scan_async() or
  2041. * scan_intr().
  2042. */
  2043. state = qh->qh_state;
  2044. qh->qh_state = QH_STATE_COMPLETING;
  2045. stopped = (state == QH_STATE_IDLE);
  2046. rescan:
  2047. last = NULL;
  2048. last_status = -EINPROGRESS;
  2049. qh->needs_rescan = 0;
  2050. /* remove de-activated QTDs from front of queue.
  2051. * after faults (including short reads), cleanup this urb
  2052. * then let the queue advance.
  2053. * if queue is stopped, handles unlinks.
  2054. */
  2055. list_for_each_safe (entry, tmp, &qh->qtd_list) {
  2056. struct fusbh200_qtd *qtd;
  2057. struct urb *urb;
  2058. u32 token = 0;
  2059. qtd = list_entry (entry, struct fusbh200_qtd, qtd_list);
  2060. urb = qtd->urb;
  2061. /* clean up any state from previous QTD ...*/
  2062. if (last) {
  2063. if (likely (last->urb != urb)) {
  2064. fusbh200_urb_done(fusbh200, last->urb, last_status);
  2065. count++;
  2066. last_status = -EINPROGRESS;
  2067. }
  2068. fusbh200_qtd_free (fusbh200, last);
  2069. last = NULL;
  2070. }
  2071. /* ignore urbs submitted during completions we reported */
  2072. if (qtd == end)
  2073. break;
  2074. /* hardware copies qtd out of qh overlay */
  2075. rmb ();
  2076. token = hc32_to_cpu(fusbh200, qtd->hw_token);
  2077. /* always clean up qtds the hc de-activated */
  2078. retry_xacterr:
  2079. if ((token & QTD_STS_ACTIVE) == 0) {
  2080. /* Report Data Buffer Error: non-fatal but useful */
  2081. if (token & QTD_STS_DBE)
  2082. fusbh200_dbg(fusbh200,
  2083. "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  2084. urb,
  2085. usb_endpoint_num(&urb->ep->desc),
  2086. usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
  2087. urb->transfer_buffer_length,
  2088. qtd,
  2089. qh);
  2090. /* on STALL, error, and short reads this urb must
  2091. * complete and all its qtds must be recycled.
  2092. */
  2093. if ((token & QTD_STS_HALT) != 0) {
  2094. /* retry transaction errors until we
  2095. * reach the software xacterr limit
  2096. */
  2097. if ((token & QTD_STS_XACT) &&
  2098. QTD_CERR(token) == 0 &&
  2099. ++qh->xacterrs < QH_XACTERR_MAX &&
  2100. !urb->unlinked) {
  2101. fusbh200_dbg(fusbh200,
  2102. "detected XactErr len %zu/%zu retry %d\n",
  2103. qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
  2104. /* reset the token in the qtd and the
  2105. * qh overlay (which still contains
  2106. * the qtd) so that we pick up from
  2107. * where we left off
  2108. */
  2109. token &= ~QTD_STS_HALT;
  2110. token |= QTD_STS_ACTIVE |
  2111. (FUSBH200_TUNE_CERR << 10);
  2112. qtd->hw_token = cpu_to_hc32(fusbh200,
  2113. token);
  2114. wmb();
  2115. hw->hw_token = cpu_to_hc32(fusbh200,
  2116. token);
  2117. goto retry_xacterr;
  2118. }
  2119. stopped = 1;
  2120. /* magic dummy for some short reads; qh won't advance.
  2121. * that silicon quirk can kick in with this dummy too.
  2122. *
  2123. * other short reads won't stop the queue, including
  2124. * control transfers (status stage handles that) or
  2125. * most other single-qtd reads ... the queue stops if
  2126. * URB_SHORT_NOT_OK was set so the driver submitting
  2127. * the urbs could clean it up.
  2128. */
  2129. } else if (IS_SHORT_READ (token)
  2130. && !(qtd->hw_alt_next
  2131. & FUSBH200_LIST_END(fusbh200))) {
  2132. stopped = 1;
  2133. }
  2134. /* stop scanning when we reach qtds the hc is using */
  2135. } else if (likely (!stopped
  2136. && fusbh200->rh_state >= FUSBH200_RH_RUNNING)) {
  2137. break;
  2138. /* scan the whole queue for unlinks whenever it stops */
  2139. } else {
  2140. stopped = 1;
  2141. /* cancel everything if we halt, suspend, etc */
  2142. if (fusbh200->rh_state < FUSBH200_RH_RUNNING)
  2143. last_status = -ESHUTDOWN;
  2144. /* this qtd is active; skip it unless a previous qtd
  2145. * for its urb faulted, or its urb was canceled.
  2146. */
  2147. else if (last_status == -EINPROGRESS && !urb->unlinked)
  2148. continue;
  2149. /* qh unlinked; token in overlay may be most current */
  2150. if (state == QH_STATE_IDLE
  2151. && cpu_to_hc32(fusbh200, qtd->qtd_dma)
  2152. == hw->hw_current) {
  2153. token = hc32_to_cpu(fusbh200, hw->hw_token);
  2154. /* An unlink may leave an incomplete
  2155. * async transaction in the TT buffer.
  2156. * We have to clear it.
  2157. */
  2158. fusbh200_clear_tt_buffer(fusbh200, qh, urb, token);
  2159. }
  2160. }
  2161. /* unless we already know the urb's status, collect qtd status
  2162. * and update count of bytes transferred. in common short read
  2163. * cases with only one data qtd (including control transfers),
  2164. * queue processing won't halt. but with two or more qtds (for
  2165. * example, with a 32 KB transfer), when the first qtd gets a
  2166. * short read the second must be removed by hand.
  2167. */
  2168. if (last_status == -EINPROGRESS) {
  2169. last_status = qtd_copy_status(fusbh200, urb,
  2170. qtd->length, token);
  2171. if (last_status == -EREMOTEIO
  2172. && (qtd->hw_alt_next
  2173. & FUSBH200_LIST_END(fusbh200)))
  2174. last_status = -EINPROGRESS;
  2175. /* As part of low/full-speed endpoint-halt processing
  2176. * we must clear the TT buffer (11.17.5).
  2177. */
  2178. if (unlikely(last_status != -EINPROGRESS &&
  2179. last_status != -EREMOTEIO)) {
  2180. /* The TT's in some hubs malfunction when they
  2181. * receive this request following a STALL (they
  2182. * stop sending isochronous packets). Since a
  2183. * STALL can't leave the TT buffer in a busy
  2184. * state (if you believe Figures 11-48 - 11-51
  2185. * in the USB 2.0 spec), we won't clear the TT
  2186. * buffer in this case. Strictly speaking this
  2187. * is a violation of the spec.
  2188. */
  2189. if (last_status != -EPIPE)
  2190. fusbh200_clear_tt_buffer(fusbh200, qh, urb,
  2191. token);
  2192. }
  2193. }
  2194. /* if we're removing something not at the queue head,
  2195. * patch the hardware queue pointer.
  2196. */
  2197. if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
  2198. last = list_entry (qtd->qtd_list.prev,
  2199. struct fusbh200_qtd, qtd_list);
  2200. last->hw_next = qtd->hw_next;
  2201. }
  2202. /* remove qtd; it's recycled after possible urb completion */
  2203. list_del (&qtd->qtd_list);
  2204. last = qtd;
  2205. /* reinit the xacterr counter for the next qtd */
  2206. qh->xacterrs = 0;
  2207. }
  2208. /* last urb's completion might still need calling */
  2209. if (likely (last != NULL)) {
  2210. fusbh200_urb_done(fusbh200, last->urb, last_status);
  2211. count++;
  2212. fusbh200_qtd_free (fusbh200, last);
  2213. }
  2214. /* Do we need to rescan for URBs dequeued during a giveback? */
  2215. if (unlikely(qh->needs_rescan)) {
  2216. /* If the QH is already unlinked, do the rescan now. */
  2217. if (state == QH_STATE_IDLE)
  2218. goto rescan;
  2219. /* Otherwise we have to wait until the QH is fully unlinked.
  2220. * Our caller will start an unlink if qh->needs_rescan is
  2221. * set. But if an unlink has already started, nothing needs
  2222. * to be done.
  2223. */
  2224. if (state != QH_STATE_LINKED)
  2225. qh->needs_rescan = 0;
  2226. }
  2227. /* restore original state; caller must unlink or relink */
  2228. qh->qh_state = state;
  2229. /* be sure the hardware's done with the qh before refreshing
  2230. * it after fault cleanup, or recovering from silicon wrongly
  2231. * overlaying the dummy qtd (which reduces DMA chatter).
  2232. */
  2233. if (stopped != 0 || hw->hw_qtd_next == FUSBH200_LIST_END(fusbh200)) {
  2234. switch (state) {
  2235. case QH_STATE_IDLE:
  2236. qh_refresh(fusbh200, qh);
  2237. break;
  2238. case QH_STATE_LINKED:
  2239. /* We won't refresh a QH that's linked (after the HC
  2240. * stopped the queue). That avoids a race:
  2241. * - HC reads first part of QH;
  2242. * - CPU updates that first part and the token;
  2243. * - HC reads rest of that QH, including token
  2244. * Result: HC gets an inconsistent image, and then
  2245. * DMAs to/from the wrong memory (corrupting it).
  2246. *
  2247. * That should be rare for interrupt transfers,
  2248. * except maybe high bandwidth ...
  2249. */
  2250. /* Tell the caller to start an unlink */
  2251. qh->needs_rescan = 1;
  2252. break;
  2253. /* otherwise, unlink already started */
  2254. }
  2255. }
  2256. return count;
  2257. }
  2258. /*-------------------------------------------------------------------------*/
  2259. // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
  2260. #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
  2261. // ... and packet size, for any kind of endpoint descriptor
  2262. #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
  2263. /*
  2264. * reverse of qh_urb_transaction: free a list of TDs.
  2265. * used for cleanup after errors, before HC sees an URB's TDs.
  2266. */
  2267. static void qtd_list_free (
  2268. struct fusbh200_hcd *fusbh200,
  2269. struct urb *urb,
  2270. struct list_head *qtd_list
  2271. ) {
  2272. struct list_head *entry, *temp;
  2273. list_for_each_safe (entry, temp, qtd_list) {
  2274. struct fusbh200_qtd *qtd;
  2275. qtd = list_entry (entry, struct fusbh200_qtd, qtd_list);
  2276. list_del (&qtd->qtd_list);
  2277. fusbh200_qtd_free (fusbh200, qtd);
  2278. }
  2279. }
  2280. /*
  2281. * create a list of filled qtds for this URB; won't link into qh.
  2282. */
  2283. static struct list_head *
  2284. qh_urb_transaction (
  2285. struct fusbh200_hcd *fusbh200,
  2286. struct urb *urb,
  2287. struct list_head *head,
  2288. gfp_t flags
  2289. ) {
  2290. struct fusbh200_qtd *qtd, *qtd_prev;
  2291. dma_addr_t buf;
  2292. int len, this_sg_len, maxpacket;
  2293. int is_input;
  2294. u32 token;
  2295. int i;
  2296. struct scatterlist *sg;
  2297. /*
  2298. * URBs map to sequences of QTDs: one logical transaction
  2299. */
  2300. qtd = fusbh200_qtd_alloc (fusbh200, flags);
  2301. if (unlikely (!qtd))
  2302. return NULL;
  2303. list_add_tail (&qtd->qtd_list, head);
  2304. qtd->urb = urb;
  2305. token = QTD_STS_ACTIVE;
  2306. token |= (FUSBH200_TUNE_CERR << 10);
  2307. /* for split transactions, SplitXState initialized to zero */
  2308. len = urb->transfer_buffer_length;
  2309. is_input = usb_pipein (urb->pipe);
  2310. if (usb_pipecontrol (urb->pipe)) {
  2311. /* SETUP pid */
  2312. qtd_fill(fusbh200, qtd, urb->setup_dma,
  2313. sizeof (struct usb_ctrlrequest),
  2314. token | (2 /* "setup" */ << 8), 8);
  2315. /* ... and always at least one more pid */
  2316. token ^= QTD_TOGGLE;
  2317. qtd_prev = qtd;
  2318. qtd = fusbh200_qtd_alloc (fusbh200, flags);
  2319. if (unlikely (!qtd))
  2320. goto cleanup;
  2321. qtd->urb = urb;
  2322. qtd_prev->hw_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
  2323. list_add_tail (&qtd->qtd_list, head);
  2324. /* for zero length DATA stages, STATUS is always IN */
  2325. if (len == 0)
  2326. token |= (1 /* "in" */ << 8);
  2327. }
  2328. /*
  2329. * data transfer stage: buffer setup
  2330. */
  2331. i = urb->num_mapped_sgs;
  2332. if (len > 0 && i > 0) {
  2333. sg = urb->sg;
  2334. buf = sg_dma_address(sg);
  2335. /* urb->transfer_buffer_length may be smaller than the
  2336. * size of the scatterlist (or vice versa)
  2337. */
  2338. this_sg_len = min_t(int, sg_dma_len(sg), len);
  2339. } else {
  2340. sg = NULL;
  2341. buf = urb->transfer_dma;
  2342. this_sg_len = len;
  2343. }
  2344. if (is_input)
  2345. token |= (1 /* "in" */ << 8);
  2346. /* else it's already initted to "out" pid (0 << 8) */
  2347. maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
  2348. /*
  2349. * buffer gets wrapped in one or more qtds;
  2350. * last one may be "short" (including zero len)
  2351. * and may serve as a control status ack
  2352. */
  2353. for (;;) {
  2354. int this_qtd_len;
  2355. this_qtd_len = qtd_fill(fusbh200, qtd, buf, this_sg_len, token,
  2356. maxpacket);
  2357. this_sg_len -= this_qtd_len;
  2358. len -= this_qtd_len;
  2359. buf += this_qtd_len;
  2360. /*
  2361. * short reads advance to a "magic" dummy instead of the next
  2362. * qtd ... that forces the queue to stop, for manual cleanup.
  2363. * (this will usually be overridden later.)
  2364. */
  2365. if (is_input)
  2366. qtd->hw_alt_next = fusbh200->async->hw->hw_alt_next;
  2367. /* qh makes control packets use qtd toggle; maybe switch it */
  2368. if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
  2369. token ^= QTD_TOGGLE;
  2370. if (likely(this_sg_len <= 0)) {
  2371. if (--i <= 0 || len <= 0)
  2372. break;
  2373. sg = sg_next(sg);
  2374. buf = sg_dma_address(sg);
  2375. this_sg_len = min_t(int, sg_dma_len(sg), len);
  2376. }
  2377. qtd_prev = qtd;
  2378. qtd = fusbh200_qtd_alloc (fusbh200, flags);
  2379. if (unlikely (!qtd))
  2380. goto cleanup;
  2381. qtd->urb = urb;
  2382. qtd_prev->hw_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
  2383. list_add_tail (&qtd->qtd_list, head);
  2384. }
  2385. /*
  2386. * unless the caller requires manual cleanup after short reads,
  2387. * have the alt_next mechanism keep the queue running after the
  2388. * last data qtd (the only one, for control and most other cases).
  2389. */
  2390. if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
  2391. || usb_pipecontrol (urb->pipe)))
  2392. qtd->hw_alt_next = FUSBH200_LIST_END(fusbh200);
  2393. /*
  2394. * control requests may need a terminating data "status" ack;
  2395. * other OUT ones may need a terminating short packet
  2396. * (zero length).
  2397. */
  2398. if (likely (urb->transfer_buffer_length != 0)) {
  2399. int one_more = 0;
  2400. if (usb_pipecontrol (urb->pipe)) {
  2401. one_more = 1;
  2402. token ^= 0x0100; /* "in" <--> "out" */
  2403. token |= QTD_TOGGLE; /* force DATA1 */
  2404. } else if (usb_pipeout(urb->pipe)
  2405. && (urb->transfer_flags & URB_ZERO_PACKET)
  2406. && !(urb->transfer_buffer_length % maxpacket)) {
  2407. one_more = 1;
  2408. }
  2409. if (one_more) {
  2410. qtd_prev = qtd;
  2411. qtd = fusbh200_qtd_alloc (fusbh200, flags);
  2412. if (unlikely (!qtd))
  2413. goto cleanup;
  2414. qtd->urb = urb;
  2415. qtd_prev->hw_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
  2416. list_add_tail (&qtd->qtd_list, head);
  2417. /* never any data in such packets */
  2418. qtd_fill(fusbh200, qtd, 0, 0, token, 0);
  2419. }
  2420. }
  2421. /* by default, enable interrupt on urb completion */
  2422. if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
  2423. qtd->hw_token |= cpu_to_hc32(fusbh200, QTD_IOC);
  2424. return head;
  2425. cleanup:
  2426. qtd_list_free (fusbh200, urb, head);
  2427. return NULL;
  2428. }
  2429. /*-------------------------------------------------------------------------*/
  2430. // Would be best to create all qh's from config descriptors,
  2431. // when each interface/altsetting is established. Unlink
  2432. // any previous qh and cancel its urbs first; endpoints are
  2433. // implicitly reset then (data toggle too).
  2434. // That'd mean updating how usbcore talks to HCDs. (2.7?)
  2435. /*
  2436. * Each QH holds a qtd list; a QH is used for everything except iso.
  2437. *
  2438. * For interrupt urbs, the scheduler must set the microframe scheduling
  2439. * mask(s) each time the QH gets scheduled. For highspeed, that's
  2440. * just one microframe in the s-mask. For split interrupt transactions
  2441. * there are additional complications: c-mask, maybe FSTNs.
  2442. */
  2443. static struct fusbh200_qh *
  2444. qh_make (
  2445. struct fusbh200_hcd *fusbh200,
  2446. struct urb *urb,
  2447. gfp_t flags
  2448. ) {
  2449. struct fusbh200_qh *qh = fusbh200_qh_alloc (fusbh200, flags);
  2450. u32 info1 = 0, info2 = 0;
  2451. int is_input, type;
  2452. int maxp = 0;
  2453. struct usb_tt *tt = urb->dev->tt;
  2454. struct fusbh200_qh_hw *hw;
  2455. if (!qh)
  2456. return qh;
  2457. /*
  2458. * init endpoint/device data for this QH
  2459. */
  2460. info1 |= usb_pipeendpoint (urb->pipe) << 8;
  2461. info1 |= usb_pipedevice (urb->pipe) << 0;
  2462. is_input = usb_pipein (urb->pipe);
  2463. type = usb_pipetype (urb->pipe);
  2464. maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
  2465. /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
  2466. * acts like up to 3KB, but is built from smaller packets.
  2467. */
  2468. if (max_packet(maxp) > 1024) {
  2469. fusbh200_dbg(fusbh200, "bogus qh maxpacket %d\n", max_packet(maxp));
  2470. goto done;
  2471. }
  2472. /* Compute interrupt scheduling parameters just once, and save.
  2473. * - allowing for high bandwidth, how many nsec/uframe are used?
  2474. * - split transactions need a second CSPLIT uframe; same question
  2475. * - splits also need a schedule gap (for full/low speed I/O)
  2476. * - qh has a polling interval
  2477. *
  2478. * For control/bulk requests, the HC or TT handles these.
  2479. */
  2480. if (type == PIPE_INTERRUPT) {
  2481. qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
  2482. is_input, 0,
  2483. hb_mult(maxp) * max_packet(maxp)));
  2484. qh->start = NO_FRAME;
  2485. if (urb->dev->speed == USB_SPEED_HIGH) {
  2486. qh->c_usecs = 0;
  2487. qh->gap_uf = 0;
  2488. qh->period = urb->interval >> 3;
  2489. if (qh->period == 0 && urb->interval != 1) {
  2490. /* NOTE interval 2 or 4 uframes could work.
  2491. * But interval 1 scheduling is simpler, and
  2492. * includes high bandwidth.
  2493. */
  2494. urb->interval = 1;
  2495. } else if (qh->period > fusbh200->periodic_size) {
  2496. qh->period = fusbh200->periodic_size;
  2497. urb->interval = qh->period << 3;
  2498. }
  2499. } else {
  2500. int think_time;
  2501. /* gap is f(FS/LS transfer times) */
  2502. qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
  2503. is_input, 0, maxp) / (125 * 1000);
  2504. /* FIXME this just approximates SPLIT/CSPLIT times */
  2505. if (is_input) { // SPLIT, gap, CSPLIT+DATA
  2506. qh->c_usecs = qh->usecs + HS_USECS (0);
  2507. qh->usecs = HS_USECS (1);
  2508. } else { // SPLIT+DATA, gap, CSPLIT
  2509. qh->usecs += HS_USECS (1);
  2510. qh->c_usecs = HS_USECS (0);
  2511. }
  2512. think_time = tt ? tt->think_time : 0;
  2513. qh->tt_usecs = NS_TO_US (think_time +
  2514. usb_calc_bus_time (urb->dev->speed,
  2515. is_input, 0, max_packet (maxp)));
  2516. qh->period = urb->interval;
  2517. if (qh->period > fusbh200->periodic_size) {
  2518. qh->period = fusbh200->periodic_size;
  2519. urb->interval = qh->period;
  2520. }
  2521. }
  2522. }
  2523. /* support for tt scheduling, and access to toggles */
  2524. qh->dev = urb->dev;
  2525. /* using TT? */
  2526. switch (urb->dev->speed) {
  2527. case USB_SPEED_LOW:
  2528. info1 |= QH_LOW_SPEED;
  2529. /* FALL THROUGH */
  2530. case USB_SPEED_FULL:
  2531. /* EPS 0 means "full" */
  2532. if (type != PIPE_INTERRUPT)
  2533. info1 |= (FUSBH200_TUNE_RL_TT << 28);
  2534. if (type == PIPE_CONTROL) {
  2535. info1 |= QH_CONTROL_EP; /* for TT */
  2536. info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
  2537. }
  2538. info1 |= maxp << 16;
  2539. info2 |= (FUSBH200_TUNE_MULT_TT << 30);
  2540. /* Some Freescale processors have an erratum in which the
  2541. * port number in the queue head was 0..N-1 instead of 1..N.
  2542. */
  2543. if (fusbh200_has_fsl_portno_bug(fusbh200))
  2544. info2 |= (urb->dev->ttport-1) << 23;
  2545. else
  2546. info2 |= urb->dev->ttport << 23;
  2547. /* set the address of the TT; for TDI's integrated
  2548. * root hub tt, leave it zeroed.
  2549. */
  2550. if (tt && tt->hub != fusbh200_to_hcd(fusbh200)->self.root_hub)
  2551. info2 |= tt->hub->devnum << 16;
  2552. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
  2553. break;
  2554. case USB_SPEED_HIGH: /* no TT involved */
  2555. info1 |= QH_HIGH_SPEED;
  2556. if (type == PIPE_CONTROL) {
  2557. info1 |= (FUSBH200_TUNE_RL_HS << 28);
  2558. info1 |= 64 << 16; /* usb2 fixed maxpacket */
  2559. info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
  2560. info2 |= (FUSBH200_TUNE_MULT_HS << 30);
  2561. } else if (type == PIPE_BULK) {
  2562. info1 |= (FUSBH200_TUNE_RL_HS << 28);
  2563. /* The USB spec says that high speed bulk endpoints
  2564. * always use 512 byte maxpacket. But some device
  2565. * vendors decided to ignore that, and MSFT is happy
  2566. * to help them do so. So now people expect to use
  2567. * such nonconformant devices with Linux too; sigh.
  2568. */
  2569. info1 |= max_packet(maxp) << 16;
  2570. info2 |= (FUSBH200_TUNE_MULT_HS << 30);
  2571. } else { /* PIPE_INTERRUPT */
  2572. info1 |= max_packet (maxp) << 16;
  2573. info2 |= hb_mult (maxp) << 30;
  2574. }
  2575. break;
  2576. default:
  2577. fusbh200_dbg(fusbh200, "bogus dev %p speed %d\n", urb->dev,
  2578. urb->dev->speed);
  2579. done:
  2580. qh_destroy(fusbh200, qh);
  2581. return NULL;
  2582. }
  2583. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
  2584. /* init as live, toggle clear, advance to dummy */
  2585. qh->qh_state = QH_STATE_IDLE;
  2586. hw = qh->hw;
  2587. hw->hw_info1 = cpu_to_hc32(fusbh200, info1);
  2588. hw->hw_info2 = cpu_to_hc32(fusbh200, info2);
  2589. qh->is_out = !is_input;
  2590. usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
  2591. qh_refresh (fusbh200, qh);
  2592. return qh;
  2593. }
  2594. /*-------------------------------------------------------------------------*/
  2595. static void enable_async(struct fusbh200_hcd *fusbh200)
  2596. {
  2597. if (fusbh200->async_count++)
  2598. return;
  2599. /* Stop waiting to turn off the async schedule */
  2600. fusbh200->enabled_hrtimer_events &= ~BIT(FUSBH200_HRTIMER_DISABLE_ASYNC);
  2601. /* Don't start the schedule until ASS is 0 */
  2602. fusbh200_poll_ASS(fusbh200);
  2603. turn_on_io_watchdog(fusbh200);
  2604. }
  2605. static void disable_async(struct fusbh200_hcd *fusbh200)
  2606. {
  2607. if (--fusbh200->async_count)
  2608. return;
  2609. /* The async schedule and async_unlink list are supposed to be empty */
  2610. WARN_ON(fusbh200->async->qh_next.qh || fusbh200->async_unlink);
  2611. /* Don't turn off the schedule until ASS is 1 */
  2612. fusbh200_poll_ASS(fusbh200);
  2613. }
  2614. /* move qh (and its qtds) onto async queue; maybe enable queue. */
  2615. static void qh_link_async (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  2616. {
  2617. __hc32 dma = QH_NEXT(fusbh200, qh->qh_dma);
  2618. struct fusbh200_qh *head;
  2619. /* Don't link a QH if there's a Clear-TT-Buffer pending */
  2620. if (unlikely(qh->clearing_tt))
  2621. return;
  2622. WARN_ON(qh->qh_state != QH_STATE_IDLE);
  2623. /* clear halt and/or toggle; and maybe recover from silicon quirk */
  2624. qh_refresh(fusbh200, qh);
  2625. /* splice right after start */
  2626. head = fusbh200->async;
  2627. qh->qh_next = head->qh_next;
  2628. qh->hw->hw_next = head->hw->hw_next;
  2629. wmb ();
  2630. head->qh_next.qh = qh;
  2631. head->hw->hw_next = dma;
  2632. qh->xacterrs = 0;
  2633. qh->qh_state = QH_STATE_LINKED;
  2634. /* qtd completions reported later by interrupt */
  2635. enable_async(fusbh200);
  2636. }
  2637. /*-------------------------------------------------------------------------*/
  2638. /*
  2639. * For control/bulk/interrupt, return QH with these TDs appended.
  2640. * Allocates and initializes the QH if necessary.
  2641. * Returns null if it can't allocate a QH it needs to.
  2642. * If the QH has TDs (urbs) already, that's great.
  2643. */
  2644. static struct fusbh200_qh *qh_append_tds (
  2645. struct fusbh200_hcd *fusbh200,
  2646. struct urb *urb,
  2647. struct list_head *qtd_list,
  2648. int epnum,
  2649. void **ptr
  2650. )
  2651. {
  2652. struct fusbh200_qh *qh = NULL;
  2653. __hc32 qh_addr_mask = cpu_to_hc32(fusbh200, 0x7f);
  2654. qh = (struct fusbh200_qh *) *ptr;
  2655. if (unlikely (qh == NULL)) {
  2656. /* can't sleep here, we have fusbh200->lock... */
  2657. qh = qh_make (fusbh200, urb, GFP_ATOMIC);
  2658. *ptr = qh;
  2659. }
  2660. if (likely (qh != NULL)) {
  2661. struct fusbh200_qtd *qtd;
  2662. if (unlikely (list_empty (qtd_list)))
  2663. qtd = NULL;
  2664. else
  2665. qtd = list_entry (qtd_list->next, struct fusbh200_qtd,
  2666. qtd_list);
  2667. /* control qh may need patching ... */
  2668. if (unlikely (epnum == 0)) {
  2669. /* usb_reset_device() briefly reverts to address 0 */
  2670. if (usb_pipedevice (urb->pipe) == 0)
  2671. qh->hw->hw_info1 &= ~qh_addr_mask;
  2672. }
  2673. /* just one way to queue requests: swap with the dummy qtd.
  2674. * only hc or qh_refresh() ever modify the overlay.
  2675. */
  2676. if (likely (qtd != NULL)) {
  2677. struct fusbh200_qtd *dummy;
  2678. dma_addr_t dma;
  2679. __hc32 token;
  2680. /* to avoid racing the HC, use the dummy td instead of
  2681. * the first td of our list (becomes new dummy). both
  2682. * tds stay deactivated until we're done, when the
  2683. * HC is allowed to fetch the old dummy (4.10.2).
  2684. */
  2685. token = qtd->hw_token;
  2686. qtd->hw_token = HALT_BIT(fusbh200);
  2687. dummy = qh->dummy;
  2688. dma = dummy->qtd_dma;
  2689. *dummy = *qtd;
  2690. dummy->qtd_dma = dma;
  2691. list_del (&qtd->qtd_list);
  2692. list_add (&dummy->qtd_list, qtd_list);
  2693. list_splice_tail(qtd_list, &qh->qtd_list);
  2694. fusbh200_qtd_init(fusbh200, qtd, qtd->qtd_dma);
  2695. qh->dummy = qtd;
  2696. /* hc must see the new dummy at list end */
  2697. dma = qtd->qtd_dma;
  2698. qtd = list_entry (qh->qtd_list.prev,
  2699. struct fusbh200_qtd, qtd_list);
  2700. qtd->hw_next = QTD_NEXT(fusbh200, dma);
  2701. /* let the hc process these next qtds */
  2702. wmb ();
  2703. dummy->hw_token = token;
  2704. urb->hcpriv = qh;
  2705. }
  2706. }
  2707. return qh;
  2708. }
  2709. /*-------------------------------------------------------------------------*/
  2710. static int
  2711. submit_async (
  2712. struct fusbh200_hcd *fusbh200,
  2713. struct urb *urb,
  2714. struct list_head *qtd_list,
  2715. gfp_t mem_flags
  2716. ) {
  2717. int epnum;
  2718. unsigned long flags;
  2719. struct fusbh200_qh *qh = NULL;
  2720. int rc;
  2721. epnum = urb->ep->desc.bEndpointAddress;
  2722. #ifdef FUSBH200_URB_TRACE
  2723. {
  2724. struct fusbh200_qtd *qtd;
  2725. qtd = list_entry(qtd_list->next, struct fusbh200_qtd, qtd_list);
  2726. fusbh200_dbg(fusbh200,
  2727. "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  2728. __func__, urb->dev->devpath, urb,
  2729. epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
  2730. urb->transfer_buffer_length,
  2731. qtd, urb->ep->hcpriv);
  2732. }
  2733. #endif
  2734. spin_lock_irqsave (&fusbh200->lock, flags);
  2735. if (unlikely(!HCD_HW_ACCESSIBLE(fusbh200_to_hcd(fusbh200)))) {
  2736. rc = -ESHUTDOWN;
  2737. goto done;
  2738. }
  2739. rc = usb_hcd_link_urb_to_ep(fusbh200_to_hcd(fusbh200), urb);
  2740. if (unlikely(rc))
  2741. goto done;
  2742. qh = qh_append_tds(fusbh200, urb, qtd_list, epnum, &urb->ep->hcpriv);
  2743. if (unlikely(qh == NULL)) {
  2744. usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
  2745. rc = -ENOMEM;
  2746. goto done;
  2747. }
  2748. /* Control/bulk operations through TTs don't need scheduling,
  2749. * the HC and TT handle it when the TT has a buffer ready.
  2750. */
  2751. if (likely (qh->qh_state == QH_STATE_IDLE))
  2752. qh_link_async(fusbh200, qh);
  2753. done:
  2754. spin_unlock_irqrestore (&fusbh200->lock, flags);
  2755. if (unlikely (qh == NULL))
  2756. qtd_list_free (fusbh200, urb, qtd_list);
  2757. return rc;
  2758. }
  2759. /*-------------------------------------------------------------------------*/
  2760. static void single_unlink_async(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  2761. {
  2762. struct fusbh200_qh *prev;
  2763. /* Add to the end of the list of QHs waiting for the next IAAD */
  2764. qh->qh_state = QH_STATE_UNLINK;
  2765. if (fusbh200->async_unlink)
  2766. fusbh200->async_unlink_last->unlink_next = qh;
  2767. else
  2768. fusbh200->async_unlink = qh;
  2769. fusbh200->async_unlink_last = qh;
  2770. /* Unlink it from the schedule */
  2771. prev = fusbh200->async;
  2772. while (prev->qh_next.qh != qh)
  2773. prev = prev->qh_next.qh;
  2774. prev->hw->hw_next = qh->hw->hw_next;
  2775. prev->qh_next = qh->qh_next;
  2776. if (fusbh200->qh_scan_next == qh)
  2777. fusbh200->qh_scan_next = qh->qh_next.qh;
  2778. }
  2779. static void start_iaa_cycle(struct fusbh200_hcd *fusbh200, bool nested)
  2780. {
  2781. /*
  2782. * Do nothing if an IAA cycle is already running or
  2783. * if one will be started shortly.
  2784. */
  2785. if (fusbh200->async_iaa || fusbh200->async_unlinking)
  2786. return;
  2787. /* Do all the waiting QHs at once */
  2788. fusbh200->async_iaa = fusbh200->async_unlink;
  2789. fusbh200->async_unlink = NULL;
  2790. /* If the controller isn't running, we don't have to wait for it */
  2791. if (unlikely(fusbh200->rh_state < FUSBH200_RH_RUNNING)) {
  2792. if (!nested) /* Avoid recursion */
  2793. end_unlink_async(fusbh200);
  2794. /* Otherwise start a new IAA cycle */
  2795. } else if (likely(fusbh200->rh_state == FUSBH200_RH_RUNNING)) {
  2796. /* Make sure the unlinks are all visible to the hardware */
  2797. wmb();
  2798. fusbh200_writel(fusbh200, fusbh200->command | CMD_IAAD,
  2799. &fusbh200->regs->command);
  2800. fusbh200_readl(fusbh200, &fusbh200->regs->command);
  2801. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_IAA_WATCHDOG, true);
  2802. }
  2803. }
  2804. /* the async qh for the qtds being unlinked are now gone from the HC */
  2805. static void end_unlink_async(struct fusbh200_hcd *fusbh200)
  2806. {
  2807. struct fusbh200_qh *qh;
  2808. /* Process the idle QHs */
  2809. restart:
  2810. fusbh200->async_unlinking = true;
  2811. while (fusbh200->async_iaa) {
  2812. qh = fusbh200->async_iaa;
  2813. fusbh200->async_iaa = qh->unlink_next;
  2814. qh->unlink_next = NULL;
  2815. qh->qh_state = QH_STATE_IDLE;
  2816. qh->qh_next.qh = NULL;
  2817. qh_completions(fusbh200, qh);
  2818. if (!list_empty(&qh->qtd_list) &&
  2819. fusbh200->rh_state == FUSBH200_RH_RUNNING)
  2820. qh_link_async(fusbh200, qh);
  2821. disable_async(fusbh200);
  2822. }
  2823. fusbh200->async_unlinking = false;
  2824. /* Start a new IAA cycle if any QHs are waiting for it */
  2825. if (fusbh200->async_unlink) {
  2826. start_iaa_cycle(fusbh200, true);
  2827. if (unlikely(fusbh200->rh_state < FUSBH200_RH_RUNNING))
  2828. goto restart;
  2829. }
  2830. }
  2831. static void unlink_empty_async(struct fusbh200_hcd *fusbh200)
  2832. {
  2833. struct fusbh200_qh *qh, *next;
  2834. bool stopped = (fusbh200->rh_state < FUSBH200_RH_RUNNING);
  2835. bool check_unlinks_later = false;
  2836. /* Unlink all the async QHs that have been empty for a timer cycle */
  2837. next = fusbh200->async->qh_next.qh;
  2838. while (next) {
  2839. qh = next;
  2840. next = qh->qh_next.qh;
  2841. if (list_empty(&qh->qtd_list) &&
  2842. qh->qh_state == QH_STATE_LINKED) {
  2843. if (!stopped && qh->unlink_cycle ==
  2844. fusbh200->async_unlink_cycle)
  2845. check_unlinks_later = true;
  2846. else
  2847. single_unlink_async(fusbh200, qh);
  2848. }
  2849. }
  2850. /* Start a new IAA cycle if any QHs are waiting for it */
  2851. if (fusbh200->async_unlink)
  2852. start_iaa_cycle(fusbh200, false);
  2853. /* QHs that haven't been empty for long enough will be handled later */
  2854. if (check_unlinks_later) {
  2855. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_ASYNC_UNLINKS, true);
  2856. ++fusbh200->async_unlink_cycle;
  2857. }
  2858. }
  2859. /* makes sure the async qh will become idle */
  2860. /* caller must own fusbh200->lock */
  2861. static void start_unlink_async(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  2862. {
  2863. /*
  2864. * If the QH isn't linked then there's nothing we can do
  2865. * unless we were called during a giveback, in which case
  2866. * qh_completions() has to deal with it.
  2867. */
  2868. if (qh->qh_state != QH_STATE_LINKED) {
  2869. if (qh->qh_state == QH_STATE_COMPLETING)
  2870. qh->needs_rescan = 1;
  2871. return;
  2872. }
  2873. single_unlink_async(fusbh200, qh);
  2874. start_iaa_cycle(fusbh200, false);
  2875. }
  2876. /*-------------------------------------------------------------------------*/
  2877. static void scan_async (struct fusbh200_hcd *fusbh200)
  2878. {
  2879. struct fusbh200_qh *qh;
  2880. bool check_unlinks_later = false;
  2881. fusbh200->qh_scan_next = fusbh200->async->qh_next.qh;
  2882. while (fusbh200->qh_scan_next) {
  2883. qh = fusbh200->qh_scan_next;
  2884. fusbh200->qh_scan_next = qh->qh_next.qh;
  2885. rescan:
  2886. /* clean any finished work for this qh */
  2887. if (!list_empty(&qh->qtd_list)) {
  2888. int temp;
  2889. /*
  2890. * Unlinks could happen here; completion reporting
  2891. * drops the lock. That's why fusbh200->qh_scan_next
  2892. * always holds the next qh to scan; if the next qh
  2893. * gets unlinked then fusbh200->qh_scan_next is adjusted
  2894. * in single_unlink_async().
  2895. */
  2896. temp = qh_completions(fusbh200, qh);
  2897. if (qh->needs_rescan) {
  2898. start_unlink_async(fusbh200, qh);
  2899. } else if (list_empty(&qh->qtd_list)
  2900. && qh->qh_state == QH_STATE_LINKED) {
  2901. qh->unlink_cycle = fusbh200->async_unlink_cycle;
  2902. check_unlinks_later = true;
  2903. } else if (temp != 0)
  2904. goto rescan;
  2905. }
  2906. }
  2907. /*
  2908. * Unlink empty entries, reducing DMA usage as well
  2909. * as HCD schedule-scanning costs. Delay for any qh
  2910. * we just scanned, there's a not-unusual case that it
  2911. * doesn't stay idle for long.
  2912. */
  2913. if (check_unlinks_later && fusbh200->rh_state == FUSBH200_RH_RUNNING &&
  2914. !(fusbh200->enabled_hrtimer_events &
  2915. BIT(FUSBH200_HRTIMER_ASYNC_UNLINKS))) {
  2916. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_ASYNC_UNLINKS, true);
  2917. ++fusbh200->async_unlink_cycle;
  2918. }
  2919. }
  2920. /*-------------------------------------------------------------------------*/
  2921. /*
  2922. * EHCI scheduled transaction support: interrupt, iso, split iso
  2923. * These are called "periodic" transactions in the EHCI spec.
  2924. *
  2925. * Note that for interrupt transfers, the QH/QTD manipulation is shared
  2926. * with the "asynchronous" transaction support (control/bulk transfers).
  2927. * The only real difference is in how interrupt transfers are scheduled.
  2928. *
  2929. * For ISO, we make an "iso_stream" head to serve the same role as a QH.
  2930. * It keeps track of every ITD (or SITD) that's linked, and holds enough
  2931. * pre-calculated schedule data to make appending to the queue be quick.
  2932. */
  2933. static int fusbh200_get_frame (struct usb_hcd *hcd);
  2934. /*-------------------------------------------------------------------------*/
  2935. /*
  2936. * periodic_next_shadow - return "next" pointer on shadow list
  2937. * @periodic: host pointer to qh/itd
  2938. * @tag: hardware tag for type of this record
  2939. */
  2940. static union fusbh200_shadow *
  2941. periodic_next_shadow(struct fusbh200_hcd *fusbh200, union fusbh200_shadow *periodic,
  2942. __hc32 tag)
  2943. {
  2944. switch (hc32_to_cpu(fusbh200, tag)) {
  2945. case Q_TYPE_QH:
  2946. return &periodic->qh->qh_next;
  2947. case Q_TYPE_FSTN:
  2948. return &periodic->fstn->fstn_next;
  2949. default:
  2950. return &periodic->itd->itd_next;
  2951. }
  2952. }
  2953. static __hc32 *
  2954. shadow_next_periodic(struct fusbh200_hcd *fusbh200, union fusbh200_shadow *periodic,
  2955. __hc32 tag)
  2956. {
  2957. switch (hc32_to_cpu(fusbh200, tag)) {
  2958. /* our fusbh200_shadow.qh is actually software part */
  2959. case Q_TYPE_QH:
  2960. return &periodic->qh->hw->hw_next;
  2961. /* others are hw parts */
  2962. default:
  2963. return periodic->hw_next;
  2964. }
  2965. }
  2966. /* caller must hold fusbh200->lock */
  2967. static void periodic_unlink (struct fusbh200_hcd *fusbh200, unsigned frame, void *ptr)
  2968. {
  2969. union fusbh200_shadow *prev_p = &fusbh200->pshadow[frame];
  2970. __hc32 *hw_p = &fusbh200->periodic[frame];
  2971. union fusbh200_shadow here = *prev_p;
  2972. /* find predecessor of "ptr"; hw and shadow lists are in sync */
  2973. while (here.ptr && here.ptr != ptr) {
  2974. prev_p = periodic_next_shadow(fusbh200, prev_p,
  2975. Q_NEXT_TYPE(fusbh200, *hw_p));
  2976. hw_p = shadow_next_periodic(fusbh200, &here,
  2977. Q_NEXT_TYPE(fusbh200, *hw_p));
  2978. here = *prev_p;
  2979. }
  2980. /* an interrupt entry (at list end) could have been shared */
  2981. if (!here.ptr)
  2982. return;
  2983. /* update shadow and hardware lists ... the old "next" pointers
  2984. * from ptr may still be in use, the caller updates them.
  2985. */
  2986. *prev_p = *periodic_next_shadow(fusbh200, &here,
  2987. Q_NEXT_TYPE(fusbh200, *hw_p));
  2988. *hw_p = *shadow_next_periodic(fusbh200, &here,
  2989. Q_NEXT_TYPE(fusbh200, *hw_p));
  2990. }
  2991. /* how many of the uframe's 125 usecs are allocated? */
  2992. static unsigned short
  2993. periodic_usecs (struct fusbh200_hcd *fusbh200, unsigned frame, unsigned uframe)
  2994. {
  2995. __hc32 *hw_p = &fusbh200->periodic [frame];
  2996. union fusbh200_shadow *q = &fusbh200->pshadow [frame];
  2997. unsigned usecs = 0;
  2998. struct fusbh200_qh_hw *hw;
  2999. while (q->ptr) {
  3000. switch (hc32_to_cpu(fusbh200, Q_NEXT_TYPE(fusbh200, *hw_p))) {
  3001. case Q_TYPE_QH:
  3002. hw = q->qh->hw;
  3003. /* is it in the S-mask? */
  3004. if (hw->hw_info2 & cpu_to_hc32(fusbh200, 1 << uframe))
  3005. usecs += q->qh->usecs;
  3006. /* ... or C-mask? */
  3007. if (hw->hw_info2 & cpu_to_hc32(fusbh200,
  3008. 1 << (8 + uframe)))
  3009. usecs += q->qh->c_usecs;
  3010. hw_p = &hw->hw_next;
  3011. q = &q->qh->qh_next;
  3012. break;
  3013. // case Q_TYPE_FSTN:
  3014. default:
  3015. /* for "save place" FSTNs, count the relevant INTR
  3016. * bandwidth from the previous frame
  3017. */
  3018. if (q->fstn->hw_prev != FUSBH200_LIST_END(fusbh200)) {
  3019. fusbh200_dbg (fusbh200, "ignoring FSTN cost ...\n");
  3020. }
  3021. hw_p = &q->fstn->hw_next;
  3022. q = &q->fstn->fstn_next;
  3023. break;
  3024. case Q_TYPE_ITD:
  3025. if (q->itd->hw_transaction[uframe])
  3026. usecs += q->itd->stream->usecs;
  3027. hw_p = &q->itd->hw_next;
  3028. q = &q->itd->itd_next;
  3029. break;
  3030. }
  3031. }
  3032. #ifdef DEBUG
  3033. if (usecs > fusbh200->uframe_periodic_max)
  3034. fusbh200_err (fusbh200, "uframe %d sched overrun: %d usecs\n",
  3035. frame * 8 + uframe, usecs);
  3036. #endif
  3037. return usecs;
  3038. }
  3039. /*-------------------------------------------------------------------------*/
  3040. static int same_tt (struct usb_device *dev1, struct usb_device *dev2)
  3041. {
  3042. if (!dev1->tt || !dev2->tt)
  3043. return 0;
  3044. if (dev1->tt != dev2->tt)
  3045. return 0;
  3046. if (dev1->tt->multi)
  3047. return dev1->ttport == dev2->ttport;
  3048. else
  3049. return 1;
  3050. }
  3051. /* return true iff the device's transaction translator is available
  3052. * for a periodic transfer starting at the specified frame, using
  3053. * all the uframes in the mask.
  3054. */
  3055. static int tt_no_collision (
  3056. struct fusbh200_hcd *fusbh200,
  3057. unsigned period,
  3058. struct usb_device *dev,
  3059. unsigned frame,
  3060. u32 uf_mask
  3061. )
  3062. {
  3063. if (period == 0) /* error */
  3064. return 0;
  3065. /* note bandwidth wastage: split never follows csplit
  3066. * (different dev or endpoint) until the next uframe.
  3067. * calling convention doesn't make that distinction.
  3068. */
  3069. for (; frame < fusbh200->periodic_size; frame += period) {
  3070. union fusbh200_shadow here;
  3071. __hc32 type;
  3072. struct fusbh200_qh_hw *hw;
  3073. here = fusbh200->pshadow [frame];
  3074. type = Q_NEXT_TYPE(fusbh200, fusbh200->periodic [frame]);
  3075. while (here.ptr) {
  3076. switch (hc32_to_cpu(fusbh200, type)) {
  3077. case Q_TYPE_ITD:
  3078. type = Q_NEXT_TYPE(fusbh200, here.itd->hw_next);
  3079. here = here.itd->itd_next;
  3080. continue;
  3081. case Q_TYPE_QH:
  3082. hw = here.qh->hw;
  3083. if (same_tt (dev, here.qh->dev)) {
  3084. u32 mask;
  3085. mask = hc32_to_cpu(fusbh200,
  3086. hw->hw_info2);
  3087. /* "knows" no gap is needed */
  3088. mask |= mask >> 8;
  3089. if (mask & uf_mask)
  3090. break;
  3091. }
  3092. type = Q_NEXT_TYPE(fusbh200, hw->hw_next);
  3093. here = here.qh->qh_next;
  3094. continue;
  3095. // case Q_TYPE_FSTN:
  3096. default:
  3097. fusbh200_dbg (fusbh200,
  3098. "periodic frame %d bogus type %d\n",
  3099. frame, type);
  3100. }
  3101. /* collision or error */
  3102. return 0;
  3103. }
  3104. }
  3105. /* no collision */
  3106. return 1;
  3107. }
  3108. /*-------------------------------------------------------------------------*/
  3109. static void enable_periodic(struct fusbh200_hcd *fusbh200)
  3110. {
  3111. if (fusbh200->periodic_count++)
  3112. return;
  3113. /* Stop waiting to turn off the periodic schedule */
  3114. fusbh200->enabled_hrtimer_events &= ~BIT(FUSBH200_HRTIMER_DISABLE_PERIODIC);
  3115. /* Don't start the schedule until PSS is 0 */
  3116. fusbh200_poll_PSS(fusbh200);
  3117. turn_on_io_watchdog(fusbh200);
  3118. }
  3119. static void disable_periodic(struct fusbh200_hcd *fusbh200)
  3120. {
  3121. if (--fusbh200->periodic_count)
  3122. return;
  3123. /* Don't turn off the schedule until PSS is 1 */
  3124. fusbh200_poll_PSS(fusbh200);
  3125. }
  3126. /*-------------------------------------------------------------------------*/
  3127. /* periodic schedule slots have iso tds (normal or split) first, then a
  3128. * sparse tree for active interrupt transfers.
  3129. *
  3130. * this just links in a qh; caller guarantees uframe masks are set right.
  3131. * no FSTN support (yet; fusbh200 0.96+)
  3132. */
  3133. static void qh_link_periodic(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3134. {
  3135. unsigned i;
  3136. unsigned period = qh->period;
  3137. dev_dbg (&qh->dev->dev,
  3138. "link qh%d-%04x/%p start %d [%d/%d us]\n",
  3139. period, hc32_to_cpup(fusbh200, &qh->hw->hw_info2)
  3140. & (QH_CMASK | QH_SMASK),
  3141. qh, qh->start, qh->usecs, qh->c_usecs);
  3142. /* high bandwidth, or otherwise every microframe */
  3143. if (period == 0)
  3144. period = 1;
  3145. for (i = qh->start; i < fusbh200->periodic_size; i += period) {
  3146. union fusbh200_shadow *prev = &fusbh200->pshadow[i];
  3147. __hc32 *hw_p = &fusbh200->periodic[i];
  3148. union fusbh200_shadow here = *prev;
  3149. __hc32 type = 0;
  3150. /* skip the iso nodes at list head */
  3151. while (here.ptr) {
  3152. type = Q_NEXT_TYPE(fusbh200, *hw_p);
  3153. if (type == cpu_to_hc32(fusbh200, Q_TYPE_QH))
  3154. break;
  3155. prev = periodic_next_shadow(fusbh200, prev, type);
  3156. hw_p = shadow_next_periodic(fusbh200, &here, type);
  3157. here = *prev;
  3158. }
  3159. /* sorting each branch by period (slow-->fast)
  3160. * enables sharing interior tree nodes
  3161. */
  3162. while (here.ptr && qh != here.qh) {
  3163. if (qh->period > here.qh->period)
  3164. break;
  3165. prev = &here.qh->qh_next;
  3166. hw_p = &here.qh->hw->hw_next;
  3167. here = *prev;
  3168. }
  3169. /* link in this qh, unless some earlier pass did that */
  3170. if (qh != here.qh) {
  3171. qh->qh_next = here;
  3172. if (here.qh)
  3173. qh->hw->hw_next = *hw_p;
  3174. wmb ();
  3175. prev->qh = qh;
  3176. *hw_p = QH_NEXT (fusbh200, qh->qh_dma);
  3177. }
  3178. }
  3179. qh->qh_state = QH_STATE_LINKED;
  3180. qh->xacterrs = 0;
  3181. /* update per-qh bandwidth for usbfs */
  3182. fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated += qh->period
  3183. ? ((qh->usecs + qh->c_usecs) / qh->period)
  3184. : (qh->usecs * 8);
  3185. list_add(&qh->intr_node, &fusbh200->intr_qh_list);
  3186. /* maybe enable periodic schedule processing */
  3187. ++fusbh200->intr_count;
  3188. enable_periodic(fusbh200);
  3189. }
  3190. static void qh_unlink_periodic(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3191. {
  3192. unsigned i;
  3193. unsigned period;
  3194. /*
  3195. * If qh is for a low/full-speed device, simply unlinking it
  3196. * could interfere with an ongoing split transaction. To unlink
  3197. * it safely would require setting the QH_INACTIVATE bit and
  3198. * waiting at least one frame, as described in EHCI 4.12.2.5.
  3199. *
  3200. * We won't bother with any of this. Instead, we assume that the
  3201. * only reason for unlinking an interrupt QH while the current URB
  3202. * is still active is to dequeue all the URBs (flush the whole
  3203. * endpoint queue).
  3204. *
  3205. * If rebalancing the periodic schedule is ever implemented, this
  3206. * approach will no longer be valid.
  3207. */
  3208. /* high bandwidth, or otherwise part of every microframe */
  3209. if ((period = qh->period) == 0)
  3210. period = 1;
  3211. for (i = qh->start; i < fusbh200->periodic_size; i += period)
  3212. periodic_unlink (fusbh200, i, qh);
  3213. /* update per-qh bandwidth for usbfs */
  3214. fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated -= qh->period
  3215. ? ((qh->usecs + qh->c_usecs) / qh->period)
  3216. : (qh->usecs * 8);
  3217. dev_dbg (&qh->dev->dev,
  3218. "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
  3219. qh->period,
  3220. hc32_to_cpup(fusbh200, &qh->hw->hw_info2) & (QH_CMASK | QH_SMASK),
  3221. qh, qh->start, qh->usecs, qh->c_usecs);
  3222. /* qh->qh_next still "live" to HC */
  3223. qh->qh_state = QH_STATE_UNLINK;
  3224. qh->qh_next.ptr = NULL;
  3225. if (fusbh200->qh_scan_next == qh)
  3226. fusbh200->qh_scan_next = list_entry(qh->intr_node.next,
  3227. struct fusbh200_qh, intr_node);
  3228. list_del(&qh->intr_node);
  3229. }
  3230. static void start_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3231. {
  3232. /* If the QH isn't linked then there's nothing we can do
  3233. * unless we were called during a giveback, in which case
  3234. * qh_completions() has to deal with it.
  3235. */
  3236. if (qh->qh_state != QH_STATE_LINKED) {
  3237. if (qh->qh_state == QH_STATE_COMPLETING)
  3238. qh->needs_rescan = 1;
  3239. return;
  3240. }
  3241. qh_unlink_periodic (fusbh200, qh);
  3242. /* Make sure the unlinks are visible before starting the timer */
  3243. wmb();
  3244. /*
  3245. * The EHCI spec doesn't say how long it takes the controller to
  3246. * stop accessing an unlinked interrupt QH. The timer delay is
  3247. * 9 uframes; presumably that will be long enough.
  3248. */
  3249. qh->unlink_cycle = fusbh200->intr_unlink_cycle;
  3250. /* New entries go at the end of the intr_unlink list */
  3251. if (fusbh200->intr_unlink)
  3252. fusbh200->intr_unlink_last->unlink_next = qh;
  3253. else
  3254. fusbh200->intr_unlink = qh;
  3255. fusbh200->intr_unlink_last = qh;
  3256. if (fusbh200->intr_unlinking)
  3257. ; /* Avoid recursive calls */
  3258. else if (fusbh200->rh_state < FUSBH200_RH_RUNNING)
  3259. fusbh200_handle_intr_unlinks(fusbh200);
  3260. else if (fusbh200->intr_unlink == qh) {
  3261. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_UNLINK_INTR, true);
  3262. ++fusbh200->intr_unlink_cycle;
  3263. }
  3264. }
  3265. static void end_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3266. {
  3267. struct fusbh200_qh_hw *hw = qh->hw;
  3268. int rc;
  3269. qh->qh_state = QH_STATE_IDLE;
  3270. hw->hw_next = FUSBH200_LIST_END(fusbh200);
  3271. qh_completions(fusbh200, qh);
  3272. /* reschedule QH iff another request is queued */
  3273. if (!list_empty(&qh->qtd_list) && fusbh200->rh_state == FUSBH200_RH_RUNNING) {
  3274. rc = qh_schedule(fusbh200, qh);
  3275. /* An error here likely indicates handshake failure
  3276. * or no space left in the schedule. Neither fault
  3277. * should happen often ...
  3278. *
  3279. * FIXME kill the now-dysfunctional queued urbs
  3280. */
  3281. if (rc != 0)
  3282. fusbh200_err(fusbh200, "can't reschedule qh %p, err %d\n",
  3283. qh, rc);
  3284. }
  3285. /* maybe turn off periodic schedule */
  3286. --fusbh200->intr_count;
  3287. disable_periodic(fusbh200);
  3288. }
  3289. /*-------------------------------------------------------------------------*/
  3290. static int check_period (
  3291. struct fusbh200_hcd *fusbh200,
  3292. unsigned frame,
  3293. unsigned uframe,
  3294. unsigned period,
  3295. unsigned usecs
  3296. ) {
  3297. int claimed;
  3298. /* complete split running into next frame?
  3299. * given FSTN support, we could sometimes check...
  3300. */
  3301. if (uframe >= 8)
  3302. return 0;
  3303. /* convert "usecs we need" to "max already claimed" */
  3304. usecs = fusbh200->uframe_periodic_max - usecs;
  3305. /* we "know" 2 and 4 uframe intervals were rejected; so
  3306. * for period 0, check _every_ microframe in the schedule.
  3307. */
  3308. if (unlikely (period == 0)) {
  3309. do {
  3310. for (uframe = 0; uframe < 7; uframe++) {
  3311. claimed = periodic_usecs (fusbh200, frame, uframe);
  3312. if (claimed > usecs)
  3313. return 0;
  3314. }
  3315. } while ((frame += 1) < fusbh200->periodic_size);
  3316. /* just check the specified uframe, at that period */
  3317. } else {
  3318. do {
  3319. claimed = periodic_usecs (fusbh200, frame, uframe);
  3320. if (claimed > usecs)
  3321. return 0;
  3322. } while ((frame += period) < fusbh200->periodic_size);
  3323. }
  3324. // success!
  3325. return 1;
  3326. }
  3327. static int check_intr_schedule (
  3328. struct fusbh200_hcd *fusbh200,
  3329. unsigned frame,
  3330. unsigned uframe,
  3331. const struct fusbh200_qh *qh,
  3332. __hc32 *c_maskp
  3333. )
  3334. {
  3335. int retval = -ENOSPC;
  3336. u8 mask = 0;
  3337. if (qh->c_usecs && uframe >= 6) /* FSTN territory? */
  3338. goto done;
  3339. if (!check_period (fusbh200, frame, uframe, qh->period, qh->usecs))
  3340. goto done;
  3341. if (!qh->c_usecs) {
  3342. retval = 0;
  3343. *c_maskp = 0;
  3344. goto done;
  3345. }
  3346. /* Make sure this tt's buffer is also available for CSPLITs.
  3347. * We pessimize a bit; probably the typical full speed case
  3348. * doesn't need the second CSPLIT.
  3349. *
  3350. * NOTE: both SPLIT and CSPLIT could be checked in just
  3351. * one smart pass...
  3352. */
  3353. mask = 0x03 << (uframe + qh->gap_uf);
  3354. *c_maskp = cpu_to_hc32(fusbh200, mask << 8);
  3355. mask |= 1 << uframe;
  3356. if (tt_no_collision (fusbh200, qh->period, qh->dev, frame, mask)) {
  3357. if (!check_period (fusbh200, frame, uframe + qh->gap_uf + 1,
  3358. qh->period, qh->c_usecs))
  3359. goto done;
  3360. if (!check_period (fusbh200, frame, uframe + qh->gap_uf,
  3361. qh->period, qh->c_usecs))
  3362. goto done;
  3363. retval = 0;
  3364. }
  3365. done:
  3366. return retval;
  3367. }
  3368. /* "first fit" scheduling policy used the first time through,
  3369. * or when the previous schedule slot can't be re-used.
  3370. */
  3371. static int qh_schedule(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3372. {
  3373. int status;
  3374. unsigned uframe;
  3375. __hc32 c_mask;
  3376. unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
  3377. struct fusbh200_qh_hw *hw = qh->hw;
  3378. qh_refresh(fusbh200, qh);
  3379. hw->hw_next = FUSBH200_LIST_END(fusbh200);
  3380. frame = qh->start;
  3381. /* reuse the previous schedule slots, if we can */
  3382. if (frame < qh->period) {
  3383. uframe = ffs(hc32_to_cpup(fusbh200, &hw->hw_info2) & QH_SMASK);
  3384. status = check_intr_schedule (fusbh200, frame, --uframe,
  3385. qh, &c_mask);
  3386. } else {
  3387. uframe = 0;
  3388. c_mask = 0;
  3389. status = -ENOSPC;
  3390. }
  3391. /* else scan the schedule to find a group of slots such that all
  3392. * uframes have enough periodic bandwidth available.
  3393. */
  3394. if (status) {
  3395. /* "normal" case, uframing flexible except with splits */
  3396. if (qh->period) {
  3397. int i;
  3398. for (i = qh->period; status && i > 0; --i) {
  3399. frame = ++fusbh200->random_frame % qh->period;
  3400. for (uframe = 0; uframe < 8; uframe++) {
  3401. status = check_intr_schedule (fusbh200,
  3402. frame, uframe, qh,
  3403. &c_mask);
  3404. if (status == 0)
  3405. break;
  3406. }
  3407. }
  3408. /* qh->period == 0 means every uframe */
  3409. } else {
  3410. frame = 0;
  3411. status = check_intr_schedule (fusbh200, 0, 0, qh, &c_mask);
  3412. }
  3413. if (status)
  3414. goto done;
  3415. qh->start = frame;
  3416. /* reset S-frame and (maybe) C-frame masks */
  3417. hw->hw_info2 &= cpu_to_hc32(fusbh200, ~(QH_CMASK | QH_SMASK));
  3418. hw->hw_info2 |= qh->period
  3419. ? cpu_to_hc32(fusbh200, 1 << uframe)
  3420. : cpu_to_hc32(fusbh200, QH_SMASK);
  3421. hw->hw_info2 |= c_mask;
  3422. } else
  3423. fusbh200_dbg (fusbh200, "reused qh %p schedule\n", qh);
  3424. /* stuff into the periodic schedule */
  3425. qh_link_periodic(fusbh200, qh);
  3426. done:
  3427. return status;
  3428. }
  3429. static int intr_submit (
  3430. struct fusbh200_hcd *fusbh200,
  3431. struct urb *urb,
  3432. struct list_head *qtd_list,
  3433. gfp_t mem_flags
  3434. ) {
  3435. unsigned epnum;
  3436. unsigned long flags;
  3437. struct fusbh200_qh *qh;
  3438. int status;
  3439. struct list_head empty;
  3440. /* get endpoint and transfer/schedule data */
  3441. epnum = urb->ep->desc.bEndpointAddress;
  3442. spin_lock_irqsave (&fusbh200->lock, flags);
  3443. if (unlikely(!HCD_HW_ACCESSIBLE(fusbh200_to_hcd(fusbh200)))) {
  3444. status = -ESHUTDOWN;
  3445. goto done_not_linked;
  3446. }
  3447. status = usb_hcd_link_urb_to_ep(fusbh200_to_hcd(fusbh200), urb);
  3448. if (unlikely(status))
  3449. goto done_not_linked;
  3450. /* get qh and force any scheduling errors */
  3451. INIT_LIST_HEAD (&empty);
  3452. qh = qh_append_tds(fusbh200, urb, &empty, epnum, &urb->ep->hcpriv);
  3453. if (qh == NULL) {
  3454. status = -ENOMEM;
  3455. goto done;
  3456. }
  3457. if (qh->qh_state == QH_STATE_IDLE) {
  3458. if ((status = qh_schedule (fusbh200, qh)) != 0)
  3459. goto done;
  3460. }
  3461. /* then queue the urb's tds to the qh */
  3462. qh = qh_append_tds(fusbh200, urb, qtd_list, epnum, &urb->ep->hcpriv);
  3463. BUG_ON (qh == NULL);
  3464. /* ... update usbfs periodic stats */
  3465. fusbh200_to_hcd(fusbh200)->self.bandwidth_int_reqs++;
  3466. done:
  3467. if (unlikely(status))
  3468. usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
  3469. done_not_linked:
  3470. spin_unlock_irqrestore (&fusbh200->lock, flags);
  3471. if (status)
  3472. qtd_list_free (fusbh200, urb, qtd_list);
  3473. return status;
  3474. }
  3475. static void scan_intr(struct fusbh200_hcd *fusbh200)
  3476. {
  3477. struct fusbh200_qh *qh;
  3478. list_for_each_entry_safe(qh, fusbh200->qh_scan_next, &fusbh200->intr_qh_list,
  3479. intr_node) {
  3480. rescan:
  3481. /* clean any finished work for this qh */
  3482. if (!list_empty(&qh->qtd_list)) {
  3483. int temp;
  3484. /*
  3485. * Unlinks could happen here; completion reporting
  3486. * drops the lock. That's why fusbh200->qh_scan_next
  3487. * always holds the next qh to scan; if the next qh
  3488. * gets unlinked then fusbh200->qh_scan_next is adjusted
  3489. * in qh_unlink_periodic().
  3490. */
  3491. temp = qh_completions(fusbh200, qh);
  3492. if (unlikely(qh->needs_rescan ||
  3493. (list_empty(&qh->qtd_list) &&
  3494. qh->qh_state == QH_STATE_LINKED)))
  3495. start_unlink_intr(fusbh200, qh);
  3496. else if (temp != 0)
  3497. goto rescan;
  3498. }
  3499. }
  3500. }
  3501. /*-------------------------------------------------------------------------*/
  3502. /* fusbh200_iso_stream ops work with both ITD and SITD */
  3503. static struct fusbh200_iso_stream *
  3504. iso_stream_alloc (gfp_t mem_flags)
  3505. {
  3506. struct fusbh200_iso_stream *stream;
  3507. stream = kzalloc(sizeof *stream, mem_flags);
  3508. if (likely (stream != NULL)) {
  3509. INIT_LIST_HEAD(&stream->td_list);
  3510. INIT_LIST_HEAD(&stream->free_list);
  3511. stream->next_uframe = -1;
  3512. }
  3513. return stream;
  3514. }
  3515. static void
  3516. iso_stream_init (
  3517. struct fusbh200_hcd *fusbh200,
  3518. struct fusbh200_iso_stream *stream,
  3519. struct usb_device *dev,
  3520. int pipe,
  3521. unsigned interval
  3522. )
  3523. {
  3524. u32 buf1;
  3525. unsigned epnum, maxp;
  3526. int is_input;
  3527. long bandwidth;
  3528. unsigned multi;
  3529. /*
  3530. * this might be a "high bandwidth" highspeed endpoint,
  3531. * as encoded in the ep descriptor's wMaxPacket field
  3532. */
  3533. epnum = usb_pipeendpoint (pipe);
  3534. is_input = usb_pipein (pipe) ? USB_DIR_IN : 0;
  3535. maxp = usb_maxpacket(dev, pipe, !is_input);
  3536. if (is_input) {
  3537. buf1 = (1 << 11);
  3538. } else {
  3539. buf1 = 0;
  3540. }
  3541. maxp = max_packet(maxp);
  3542. multi = hb_mult(maxp);
  3543. buf1 |= maxp;
  3544. maxp *= multi;
  3545. stream->buf0 = cpu_to_hc32(fusbh200, (epnum << 8) | dev->devnum);
  3546. stream->buf1 = cpu_to_hc32(fusbh200, buf1);
  3547. stream->buf2 = cpu_to_hc32(fusbh200, multi);
  3548. /* usbfs wants to report the average usecs per frame tied up
  3549. * when transfers on this endpoint are scheduled ...
  3550. */
  3551. if (dev->speed == USB_SPEED_FULL) {
  3552. interval <<= 3;
  3553. stream->usecs = NS_TO_US(usb_calc_bus_time(dev->speed,
  3554. is_input, 1, maxp));
  3555. stream->usecs /= 8;
  3556. } else {
  3557. stream->highspeed = 1;
  3558. stream->usecs = HS_USECS_ISO (maxp);
  3559. }
  3560. bandwidth = stream->usecs * 8;
  3561. bandwidth /= interval;
  3562. stream->bandwidth = bandwidth;
  3563. stream->udev = dev;
  3564. stream->bEndpointAddress = is_input | epnum;
  3565. stream->interval = interval;
  3566. stream->maxp = maxp;
  3567. }
  3568. static struct fusbh200_iso_stream *
  3569. iso_stream_find (struct fusbh200_hcd *fusbh200, struct urb *urb)
  3570. {
  3571. unsigned epnum;
  3572. struct fusbh200_iso_stream *stream;
  3573. struct usb_host_endpoint *ep;
  3574. unsigned long flags;
  3575. epnum = usb_pipeendpoint (urb->pipe);
  3576. if (usb_pipein(urb->pipe))
  3577. ep = urb->dev->ep_in[epnum];
  3578. else
  3579. ep = urb->dev->ep_out[epnum];
  3580. spin_lock_irqsave (&fusbh200->lock, flags);
  3581. stream = ep->hcpriv;
  3582. if (unlikely (stream == NULL)) {
  3583. stream = iso_stream_alloc(GFP_ATOMIC);
  3584. if (likely (stream != NULL)) {
  3585. ep->hcpriv = stream;
  3586. stream->ep = ep;
  3587. iso_stream_init(fusbh200, stream, urb->dev, urb->pipe,
  3588. urb->interval);
  3589. }
  3590. /* if dev->ep [epnum] is a QH, hw is set */
  3591. } else if (unlikely (stream->hw != NULL)) {
  3592. fusbh200_dbg (fusbh200, "dev %s ep%d%s, not iso??\n",
  3593. urb->dev->devpath, epnum,
  3594. usb_pipein(urb->pipe) ? "in" : "out");
  3595. stream = NULL;
  3596. }
  3597. spin_unlock_irqrestore (&fusbh200->lock, flags);
  3598. return stream;
  3599. }
  3600. /*-------------------------------------------------------------------------*/
  3601. /* fusbh200_iso_sched ops can be ITD-only or SITD-only */
  3602. static struct fusbh200_iso_sched *
  3603. iso_sched_alloc (unsigned packets, gfp_t mem_flags)
  3604. {
  3605. struct fusbh200_iso_sched *iso_sched;
  3606. int size = sizeof *iso_sched;
  3607. size += packets * sizeof (struct fusbh200_iso_packet);
  3608. iso_sched = kzalloc(size, mem_flags);
  3609. if (likely (iso_sched != NULL)) {
  3610. INIT_LIST_HEAD (&iso_sched->td_list);
  3611. }
  3612. return iso_sched;
  3613. }
  3614. static inline void
  3615. itd_sched_init(
  3616. struct fusbh200_hcd *fusbh200,
  3617. struct fusbh200_iso_sched *iso_sched,
  3618. struct fusbh200_iso_stream *stream,
  3619. struct urb *urb
  3620. )
  3621. {
  3622. unsigned i;
  3623. dma_addr_t dma = urb->transfer_dma;
  3624. /* how many uframes are needed for these transfers */
  3625. iso_sched->span = urb->number_of_packets * stream->interval;
  3626. /* figure out per-uframe itd fields that we'll need later
  3627. * when we fit new itds into the schedule.
  3628. */
  3629. for (i = 0; i < urb->number_of_packets; i++) {
  3630. struct fusbh200_iso_packet *uframe = &iso_sched->packet [i];
  3631. unsigned length;
  3632. dma_addr_t buf;
  3633. u32 trans;
  3634. length = urb->iso_frame_desc [i].length;
  3635. buf = dma + urb->iso_frame_desc [i].offset;
  3636. trans = FUSBH200_ISOC_ACTIVE;
  3637. trans |= buf & 0x0fff;
  3638. if (unlikely (((i + 1) == urb->number_of_packets))
  3639. && !(urb->transfer_flags & URB_NO_INTERRUPT))
  3640. trans |= FUSBH200_ITD_IOC;
  3641. trans |= length << 16;
  3642. uframe->transaction = cpu_to_hc32(fusbh200, trans);
  3643. /* might need to cross a buffer page within a uframe */
  3644. uframe->bufp = (buf & ~(u64)0x0fff);
  3645. buf += length;
  3646. if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff))))
  3647. uframe->cross = 1;
  3648. }
  3649. }
  3650. static void
  3651. iso_sched_free (
  3652. struct fusbh200_iso_stream *stream,
  3653. struct fusbh200_iso_sched *iso_sched
  3654. )
  3655. {
  3656. if (!iso_sched)
  3657. return;
  3658. // caller must hold fusbh200->lock!
  3659. list_splice (&iso_sched->td_list, &stream->free_list);
  3660. kfree (iso_sched);
  3661. }
  3662. static int
  3663. itd_urb_transaction (
  3664. struct fusbh200_iso_stream *stream,
  3665. struct fusbh200_hcd *fusbh200,
  3666. struct urb *urb,
  3667. gfp_t mem_flags
  3668. )
  3669. {
  3670. struct fusbh200_itd *itd;
  3671. dma_addr_t itd_dma;
  3672. int i;
  3673. unsigned num_itds;
  3674. struct fusbh200_iso_sched *sched;
  3675. unsigned long flags;
  3676. sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
  3677. if (unlikely (sched == NULL))
  3678. return -ENOMEM;
  3679. itd_sched_init(fusbh200, sched, stream, urb);
  3680. if (urb->interval < 8)
  3681. num_itds = 1 + (sched->span + 7) / 8;
  3682. else
  3683. num_itds = urb->number_of_packets;
  3684. /* allocate/init ITDs */
  3685. spin_lock_irqsave (&fusbh200->lock, flags);
  3686. for (i = 0; i < num_itds; i++) {
  3687. /*
  3688. * Use iTDs from the free list, but not iTDs that may
  3689. * still be in use by the hardware.
  3690. */
  3691. if (likely(!list_empty(&stream->free_list))) {
  3692. itd = list_first_entry(&stream->free_list,
  3693. struct fusbh200_itd, itd_list);
  3694. if (itd->frame == fusbh200->now_frame)
  3695. goto alloc_itd;
  3696. list_del (&itd->itd_list);
  3697. itd_dma = itd->itd_dma;
  3698. } else {
  3699. alloc_itd:
  3700. spin_unlock_irqrestore (&fusbh200->lock, flags);
  3701. itd = dma_pool_alloc (fusbh200->itd_pool, mem_flags,
  3702. &itd_dma);
  3703. spin_lock_irqsave (&fusbh200->lock, flags);
  3704. if (!itd) {
  3705. iso_sched_free(stream, sched);
  3706. spin_unlock_irqrestore(&fusbh200->lock, flags);
  3707. return -ENOMEM;
  3708. }
  3709. }
  3710. memset (itd, 0, sizeof *itd);
  3711. itd->itd_dma = itd_dma;
  3712. list_add (&itd->itd_list, &sched->td_list);
  3713. }
  3714. spin_unlock_irqrestore (&fusbh200->lock, flags);
  3715. /* temporarily store schedule info in hcpriv */
  3716. urb->hcpriv = sched;
  3717. urb->error_count = 0;
  3718. return 0;
  3719. }
  3720. /*-------------------------------------------------------------------------*/
  3721. static inline int
  3722. itd_slot_ok (
  3723. struct fusbh200_hcd *fusbh200,
  3724. u32 mod,
  3725. u32 uframe,
  3726. u8 usecs,
  3727. u32 period
  3728. )
  3729. {
  3730. uframe %= period;
  3731. do {
  3732. /* can't commit more than uframe_periodic_max usec */
  3733. if (periodic_usecs (fusbh200, uframe >> 3, uframe & 0x7)
  3734. > (fusbh200->uframe_periodic_max - usecs))
  3735. return 0;
  3736. /* we know urb->interval is 2^N uframes */
  3737. uframe += period;
  3738. } while (uframe < mod);
  3739. return 1;
  3740. }
  3741. /*
  3742. * This scheduler plans almost as far into the future as it has actual
  3743. * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
  3744. * "as small as possible" to be cache-friendlier.) That limits the size
  3745. * transfers you can stream reliably; avoid more than 64 msec per urb.
  3746. * Also avoid queue depths of less than fusbh200's worst irq latency (affected
  3747. * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
  3748. * and other factors); or more than about 230 msec total (for portability,
  3749. * given FUSBH200_TUNE_FLS and the slop). Or, write a smarter scheduler!
  3750. */
  3751. #define SCHEDULE_SLOP 80 /* microframes */
  3752. static int
  3753. iso_stream_schedule (
  3754. struct fusbh200_hcd *fusbh200,
  3755. struct urb *urb,
  3756. struct fusbh200_iso_stream *stream
  3757. )
  3758. {
  3759. u32 now, next, start, period, span;
  3760. int status;
  3761. unsigned mod = fusbh200->periodic_size << 3;
  3762. struct fusbh200_iso_sched *sched = urb->hcpriv;
  3763. period = urb->interval;
  3764. span = sched->span;
  3765. if (span > mod - SCHEDULE_SLOP) {
  3766. fusbh200_dbg (fusbh200, "iso request %p too long\n", urb);
  3767. status = -EFBIG;
  3768. goto fail;
  3769. }
  3770. now = fusbh200_read_frame_index(fusbh200) & (mod - 1);
  3771. /* Typical case: reuse current schedule, stream is still active.
  3772. * Hopefully there are no gaps from the host falling behind
  3773. * (irq delays etc), but if there are we'll take the next
  3774. * slot in the schedule, implicitly assuming URB_ISO_ASAP.
  3775. */
  3776. if (likely (!list_empty (&stream->td_list))) {
  3777. u32 excess;
  3778. /* For high speed devices, allow scheduling within the
  3779. * isochronous scheduling threshold. For full speed devices
  3780. * and Intel PCI-based controllers, don't (work around for
  3781. * Intel ICH9 bug).
  3782. */
  3783. if (!stream->highspeed && fusbh200->fs_i_thresh)
  3784. next = now + fusbh200->i_thresh;
  3785. else
  3786. next = now;
  3787. /* Fell behind (by up to twice the slop amount)?
  3788. * We decide based on the time of the last currently-scheduled
  3789. * slot, not the time of the next available slot.
  3790. */
  3791. excess = (stream->next_uframe - period - next) & (mod - 1);
  3792. if (excess >= mod - 2 * SCHEDULE_SLOP)
  3793. start = next + excess - mod + period *
  3794. DIV_ROUND_UP(mod - excess, period);
  3795. else
  3796. start = next + excess + period;
  3797. if (start - now >= mod) {
  3798. fusbh200_dbg(fusbh200, "request %p would overflow (%d+%d >= %d)\n",
  3799. urb, start - now - period, period,
  3800. mod);
  3801. status = -EFBIG;
  3802. goto fail;
  3803. }
  3804. }
  3805. /* need to schedule; when's the next (u)frame we could start?
  3806. * this is bigger than fusbh200->i_thresh allows; scheduling itself
  3807. * isn't free, the slop should handle reasonably slow cpus. it
  3808. * can also help high bandwidth if the dma and irq loads don't
  3809. * jump until after the queue is primed.
  3810. */
  3811. else {
  3812. int done = 0;
  3813. start = SCHEDULE_SLOP + (now & ~0x07);
  3814. /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
  3815. /* find a uframe slot with enough bandwidth.
  3816. * Early uframes are more precious because full-speed
  3817. * iso IN transfers can't use late uframes,
  3818. * and therefore they should be allocated last.
  3819. */
  3820. next = start;
  3821. start += period;
  3822. do {
  3823. start--;
  3824. /* check schedule: enough space? */
  3825. if (itd_slot_ok(fusbh200, mod, start,
  3826. stream->usecs, period))
  3827. done = 1;
  3828. } while (start > next && !done);
  3829. /* no room in the schedule */
  3830. if (!done) {
  3831. fusbh200_dbg(fusbh200, "iso resched full %p (now %d max %d)\n",
  3832. urb, now, now + mod);
  3833. status = -ENOSPC;
  3834. goto fail;
  3835. }
  3836. }
  3837. /* Tried to schedule too far into the future? */
  3838. if (unlikely(start - now + span - period
  3839. >= mod - 2 * SCHEDULE_SLOP)) {
  3840. fusbh200_dbg(fusbh200, "request %p would overflow (%d+%d >= %d)\n",
  3841. urb, start - now, span - period,
  3842. mod - 2 * SCHEDULE_SLOP);
  3843. status = -EFBIG;
  3844. goto fail;
  3845. }
  3846. stream->next_uframe = start & (mod - 1);
  3847. /* report high speed start in uframes; full speed, in frames */
  3848. urb->start_frame = stream->next_uframe;
  3849. if (!stream->highspeed)
  3850. urb->start_frame >>= 3;
  3851. /* Make sure scan_isoc() sees these */
  3852. if (fusbh200->isoc_count == 0)
  3853. fusbh200->next_frame = now >> 3;
  3854. return 0;
  3855. fail:
  3856. iso_sched_free(stream, sched);
  3857. urb->hcpriv = NULL;
  3858. return status;
  3859. }
  3860. /*-------------------------------------------------------------------------*/
  3861. static inline void
  3862. itd_init(struct fusbh200_hcd *fusbh200, struct fusbh200_iso_stream *stream,
  3863. struct fusbh200_itd *itd)
  3864. {
  3865. int i;
  3866. /* it's been recently zeroed */
  3867. itd->hw_next = FUSBH200_LIST_END(fusbh200);
  3868. itd->hw_bufp [0] = stream->buf0;
  3869. itd->hw_bufp [1] = stream->buf1;
  3870. itd->hw_bufp [2] = stream->buf2;
  3871. for (i = 0; i < 8; i++)
  3872. itd->index[i] = -1;
  3873. /* All other fields are filled when scheduling */
  3874. }
  3875. static inline void
  3876. itd_patch(
  3877. struct fusbh200_hcd *fusbh200,
  3878. struct fusbh200_itd *itd,
  3879. struct fusbh200_iso_sched *iso_sched,
  3880. unsigned index,
  3881. u16 uframe
  3882. )
  3883. {
  3884. struct fusbh200_iso_packet *uf = &iso_sched->packet [index];
  3885. unsigned pg = itd->pg;
  3886. // BUG_ON (pg == 6 && uf->cross);
  3887. uframe &= 0x07;
  3888. itd->index [uframe] = index;
  3889. itd->hw_transaction[uframe] = uf->transaction;
  3890. itd->hw_transaction[uframe] |= cpu_to_hc32(fusbh200, pg << 12);
  3891. itd->hw_bufp[pg] |= cpu_to_hc32(fusbh200, uf->bufp & ~(u32)0);
  3892. itd->hw_bufp_hi[pg] |= cpu_to_hc32(fusbh200, (u32)(uf->bufp >> 32));
  3893. /* iso_frame_desc[].offset must be strictly increasing */
  3894. if (unlikely (uf->cross)) {
  3895. u64 bufp = uf->bufp + 4096;
  3896. itd->pg = ++pg;
  3897. itd->hw_bufp[pg] |= cpu_to_hc32(fusbh200, bufp & ~(u32)0);
  3898. itd->hw_bufp_hi[pg] |= cpu_to_hc32(fusbh200, (u32)(bufp >> 32));
  3899. }
  3900. }
  3901. static inline void
  3902. itd_link (struct fusbh200_hcd *fusbh200, unsigned frame, struct fusbh200_itd *itd)
  3903. {
  3904. union fusbh200_shadow *prev = &fusbh200->pshadow[frame];
  3905. __hc32 *hw_p = &fusbh200->periodic[frame];
  3906. union fusbh200_shadow here = *prev;
  3907. __hc32 type = 0;
  3908. /* skip any iso nodes which might belong to previous microframes */
  3909. while (here.ptr) {
  3910. type = Q_NEXT_TYPE(fusbh200, *hw_p);
  3911. if (type == cpu_to_hc32(fusbh200, Q_TYPE_QH))
  3912. break;
  3913. prev = periodic_next_shadow(fusbh200, prev, type);
  3914. hw_p = shadow_next_periodic(fusbh200, &here, type);
  3915. here = *prev;
  3916. }
  3917. itd->itd_next = here;
  3918. itd->hw_next = *hw_p;
  3919. prev->itd = itd;
  3920. itd->frame = frame;
  3921. wmb ();
  3922. *hw_p = cpu_to_hc32(fusbh200, itd->itd_dma | Q_TYPE_ITD);
  3923. }
  3924. /* fit urb's itds into the selected schedule slot; activate as needed */
  3925. static void itd_link_urb(
  3926. struct fusbh200_hcd *fusbh200,
  3927. struct urb *urb,
  3928. unsigned mod,
  3929. struct fusbh200_iso_stream *stream
  3930. )
  3931. {
  3932. int packet;
  3933. unsigned next_uframe, uframe, frame;
  3934. struct fusbh200_iso_sched *iso_sched = urb->hcpriv;
  3935. struct fusbh200_itd *itd;
  3936. next_uframe = stream->next_uframe & (mod - 1);
  3937. if (unlikely (list_empty(&stream->td_list))) {
  3938. fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated
  3939. += stream->bandwidth;
  3940. fusbh200_vdbg (fusbh200,
  3941. "schedule devp %s ep%d%s-iso period %d start %d.%d\n",
  3942. urb->dev->devpath, stream->bEndpointAddress & 0x0f,
  3943. (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
  3944. urb->interval,
  3945. next_uframe >> 3, next_uframe & 0x7);
  3946. }
  3947. /* fill iTDs uframe by uframe */
  3948. for (packet = 0, itd = NULL; packet < urb->number_of_packets; ) {
  3949. if (itd == NULL) {
  3950. /* ASSERT: we have all necessary itds */
  3951. // BUG_ON (list_empty (&iso_sched->td_list));
  3952. /* ASSERT: no itds for this endpoint in this uframe */
  3953. itd = list_entry (iso_sched->td_list.next,
  3954. struct fusbh200_itd, itd_list);
  3955. list_move_tail (&itd->itd_list, &stream->td_list);
  3956. itd->stream = stream;
  3957. itd->urb = urb;
  3958. itd_init (fusbh200, stream, itd);
  3959. }
  3960. uframe = next_uframe & 0x07;
  3961. frame = next_uframe >> 3;
  3962. itd_patch(fusbh200, itd, iso_sched, packet, uframe);
  3963. next_uframe += stream->interval;
  3964. next_uframe &= mod - 1;
  3965. packet++;
  3966. /* link completed itds into the schedule */
  3967. if (((next_uframe >> 3) != frame)
  3968. || packet == urb->number_of_packets) {
  3969. itd_link(fusbh200, frame & (fusbh200->periodic_size - 1), itd);
  3970. itd = NULL;
  3971. }
  3972. }
  3973. stream->next_uframe = next_uframe;
  3974. /* don't need that schedule data any more */
  3975. iso_sched_free (stream, iso_sched);
  3976. urb->hcpriv = NULL;
  3977. ++fusbh200->isoc_count;
  3978. enable_periodic(fusbh200);
  3979. }
  3980. #define ISO_ERRS (FUSBH200_ISOC_BUF_ERR | FUSBH200_ISOC_BABBLE | FUSBH200_ISOC_XACTERR)
  3981. /* Process and recycle a completed ITD. Return true iff its urb completed,
  3982. * and hence its completion callback probably added things to the hardware
  3983. * schedule.
  3984. *
  3985. * Note that we carefully avoid recycling this descriptor until after any
  3986. * completion callback runs, so that it won't be reused quickly. That is,
  3987. * assuming (a) no more than two urbs per frame on this endpoint, and also
  3988. * (b) only this endpoint's completions submit URBs. It seems some silicon
  3989. * corrupts things if you reuse completed descriptors very quickly...
  3990. */
  3991. static bool itd_complete(struct fusbh200_hcd *fusbh200, struct fusbh200_itd *itd)
  3992. {
  3993. struct urb *urb = itd->urb;
  3994. struct usb_iso_packet_descriptor *desc;
  3995. u32 t;
  3996. unsigned uframe;
  3997. int urb_index = -1;
  3998. struct fusbh200_iso_stream *stream = itd->stream;
  3999. struct usb_device *dev;
  4000. bool retval = false;
  4001. /* for each uframe with a packet */
  4002. for (uframe = 0; uframe < 8; uframe++) {
  4003. if (likely (itd->index[uframe] == -1))
  4004. continue;
  4005. urb_index = itd->index[uframe];
  4006. desc = &urb->iso_frame_desc [urb_index];
  4007. t = hc32_to_cpup(fusbh200, &itd->hw_transaction [uframe]);
  4008. itd->hw_transaction [uframe] = 0;
  4009. /* report transfer status */
  4010. if (unlikely (t & ISO_ERRS)) {
  4011. urb->error_count++;
  4012. if (t & FUSBH200_ISOC_BUF_ERR)
  4013. desc->status = usb_pipein (urb->pipe)
  4014. ? -ENOSR /* hc couldn't read */
  4015. : -ECOMM; /* hc couldn't write */
  4016. else if (t & FUSBH200_ISOC_BABBLE)
  4017. desc->status = -EOVERFLOW;
  4018. else /* (t & FUSBH200_ISOC_XACTERR) */
  4019. desc->status = -EPROTO;
  4020. /* HC need not update length with this error */
  4021. if (!(t & FUSBH200_ISOC_BABBLE)) {
  4022. desc->actual_length = fusbh200_itdlen(urb, desc, t);
  4023. urb->actual_length += desc->actual_length;
  4024. }
  4025. } else if (likely ((t & FUSBH200_ISOC_ACTIVE) == 0)) {
  4026. desc->status = 0;
  4027. desc->actual_length = fusbh200_itdlen(urb, desc, t);
  4028. urb->actual_length += desc->actual_length;
  4029. } else {
  4030. /* URB was too late */
  4031. desc->status = -EXDEV;
  4032. }
  4033. }
  4034. /* handle completion now? */
  4035. if (likely ((urb_index + 1) != urb->number_of_packets))
  4036. goto done;
  4037. /* ASSERT: it's really the last itd for this urb
  4038. list_for_each_entry (itd, &stream->td_list, itd_list)
  4039. BUG_ON (itd->urb == urb);
  4040. */
  4041. /* give urb back to the driver; completion often (re)submits */
  4042. dev = urb->dev;
  4043. fusbh200_urb_done(fusbh200, urb, 0);
  4044. retval = true;
  4045. urb = NULL;
  4046. --fusbh200->isoc_count;
  4047. disable_periodic(fusbh200);
  4048. if (unlikely(list_is_singular(&stream->td_list))) {
  4049. fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated
  4050. -= stream->bandwidth;
  4051. fusbh200_vdbg (fusbh200,
  4052. "deschedule devp %s ep%d%s-iso\n",
  4053. dev->devpath, stream->bEndpointAddress & 0x0f,
  4054. (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
  4055. }
  4056. done:
  4057. itd->urb = NULL;
  4058. /* Add to the end of the free list for later reuse */
  4059. list_move_tail(&itd->itd_list, &stream->free_list);
  4060. /* Recycle the iTDs when the pipeline is empty (ep no longer in use) */
  4061. if (list_empty(&stream->td_list)) {
  4062. list_splice_tail_init(&stream->free_list,
  4063. &fusbh200->cached_itd_list);
  4064. start_free_itds(fusbh200);
  4065. }
  4066. return retval;
  4067. }
  4068. /*-------------------------------------------------------------------------*/
  4069. static int itd_submit (struct fusbh200_hcd *fusbh200, struct urb *urb,
  4070. gfp_t mem_flags)
  4071. {
  4072. int status = -EINVAL;
  4073. unsigned long flags;
  4074. struct fusbh200_iso_stream *stream;
  4075. /* Get iso_stream head */
  4076. stream = iso_stream_find (fusbh200, urb);
  4077. if (unlikely (stream == NULL)) {
  4078. fusbh200_dbg (fusbh200, "can't get iso stream\n");
  4079. return -ENOMEM;
  4080. }
  4081. if (unlikely (urb->interval != stream->interval &&
  4082. fusbh200_port_speed(fusbh200, 0) == USB_PORT_STAT_HIGH_SPEED)) {
  4083. fusbh200_dbg (fusbh200, "can't change iso interval %d --> %d\n",
  4084. stream->interval, urb->interval);
  4085. goto done;
  4086. }
  4087. #ifdef FUSBH200_URB_TRACE
  4088. fusbh200_dbg (fusbh200,
  4089. "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
  4090. __func__, urb->dev->devpath, urb,
  4091. usb_pipeendpoint (urb->pipe),
  4092. usb_pipein (urb->pipe) ? "in" : "out",
  4093. urb->transfer_buffer_length,
  4094. urb->number_of_packets, urb->interval,
  4095. stream);
  4096. #endif
  4097. /* allocate ITDs w/o locking anything */
  4098. status = itd_urb_transaction (stream, fusbh200, urb, mem_flags);
  4099. if (unlikely (status < 0)) {
  4100. fusbh200_dbg (fusbh200, "can't init itds\n");
  4101. goto done;
  4102. }
  4103. /* schedule ... need to lock */
  4104. spin_lock_irqsave (&fusbh200->lock, flags);
  4105. if (unlikely(!HCD_HW_ACCESSIBLE(fusbh200_to_hcd(fusbh200)))) {
  4106. status = -ESHUTDOWN;
  4107. goto done_not_linked;
  4108. }
  4109. status = usb_hcd_link_urb_to_ep(fusbh200_to_hcd(fusbh200), urb);
  4110. if (unlikely(status))
  4111. goto done_not_linked;
  4112. status = iso_stream_schedule(fusbh200, urb, stream);
  4113. if (likely (status == 0))
  4114. itd_link_urb (fusbh200, urb, fusbh200->periodic_size << 3, stream);
  4115. else
  4116. usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
  4117. done_not_linked:
  4118. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4119. done:
  4120. return status;
  4121. }
  4122. /*-------------------------------------------------------------------------*/
  4123. static void scan_isoc(struct fusbh200_hcd *fusbh200)
  4124. {
  4125. unsigned uf, now_frame, frame;
  4126. unsigned fmask = fusbh200->periodic_size - 1;
  4127. bool modified, live;
  4128. /*
  4129. * When running, scan from last scan point up to "now"
  4130. * else clean up by scanning everything that's left.
  4131. * Touches as few pages as possible: cache-friendly.
  4132. */
  4133. if (fusbh200->rh_state >= FUSBH200_RH_RUNNING) {
  4134. uf = fusbh200_read_frame_index(fusbh200);
  4135. now_frame = (uf >> 3) & fmask;
  4136. live = true;
  4137. } else {
  4138. now_frame = (fusbh200->next_frame - 1) & fmask;
  4139. live = false;
  4140. }
  4141. fusbh200->now_frame = now_frame;
  4142. frame = fusbh200->next_frame;
  4143. for (;;) {
  4144. union fusbh200_shadow q, *q_p;
  4145. __hc32 type, *hw_p;
  4146. restart:
  4147. /* scan each element in frame's queue for completions */
  4148. q_p = &fusbh200->pshadow [frame];
  4149. hw_p = &fusbh200->periodic [frame];
  4150. q.ptr = q_p->ptr;
  4151. type = Q_NEXT_TYPE(fusbh200, *hw_p);
  4152. modified = false;
  4153. while (q.ptr != NULL) {
  4154. switch (hc32_to_cpu(fusbh200, type)) {
  4155. case Q_TYPE_ITD:
  4156. /* If this ITD is still active, leave it for
  4157. * later processing ... check the next entry.
  4158. * No need to check for activity unless the
  4159. * frame is current.
  4160. */
  4161. if (frame == now_frame && live) {
  4162. rmb();
  4163. for (uf = 0; uf < 8; uf++) {
  4164. if (q.itd->hw_transaction[uf] &
  4165. ITD_ACTIVE(fusbh200))
  4166. break;
  4167. }
  4168. if (uf < 8) {
  4169. q_p = &q.itd->itd_next;
  4170. hw_p = &q.itd->hw_next;
  4171. type = Q_NEXT_TYPE(fusbh200,
  4172. q.itd->hw_next);
  4173. q = *q_p;
  4174. break;
  4175. }
  4176. }
  4177. /* Take finished ITDs out of the schedule
  4178. * and process them: recycle, maybe report
  4179. * URB completion. HC won't cache the
  4180. * pointer for much longer, if at all.
  4181. */
  4182. *q_p = q.itd->itd_next;
  4183. *hw_p = q.itd->hw_next;
  4184. type = Q_NEXT_TYPE(fusbh200, q.itd->hw_next);
  4185. wmb();
  4186. modified = itd_complete (fusbh200, q.itd);
  4187. q = *q_p;
  4188. break;
  4189. default:
  4190. fusbh200_dbg(fusbh200, "corrupt type %d frame %d shadow %p\n",
  4191. type, frame, q.ptr);
  4192. // BUG ();
  4193. /* FALL THROUGH */
  4194. case Q_TYPE_QH:
  4195. case Q_TYPE_FSTN:
  4196. /* End of the iTDs and siTDs */
  4197. q.ptr = NULL;
  4198. break;
  4199. }
  4200. /* assume completion callbacks modify the queue */
  4201. if (unlikely(modified && fusbh200->isoc_count > 0))
  4202. goto restart;
  4203. }
  4204. /* Stop when we have reached the current frame */
  4205. if (frame == now_frame)
  4206. break;
  4207. frame = (frame + 1) & fmask;
  4208. }
  4209. fusbh200->next_frame = now_frame;
  4210. }
  4211. /*-------------------------------------------------------------------------*/
  4212. /*
  4213. * Display / Set uframe_periodic_max
  4214. */
  4215. static ssize_t show_uframe_periodic_max(struct device *dev,
  4216. struct device_attribute *attr,
  4217. char *buf)
  4218. {
  4219. struct fusbh200_hcd *fusbh200;
  4220. int n;
  4221. fusbh200 = hcd_to_fusbh200(bus_to_hcd(dev_get_drvdata(dev)));
  4222. n = scnprintf(buf, PAGE_SIZE, "%d\n", fusbh200->uframe_periodic_max);
  4223. return n;
  4224. }
  4225. static ssize_t store_uframe_periodic_max(struct device *dev,
  4226. struct device_attribute *attr,
  4227. const char *buf, size_t count)
  4228. {
  4229. struct fusbh200_hcd *fusbh200;
  4230. unsigned uframe_periodic_max;
  4231. unsigned frame, uframe;
  4232. unsigned short allocated_max;
  4233. unsigned long flags;
  4234. ssize_t ret;
  4235. fusbh200 = hcd_to_fusbh200(bus_to_hcd(dev_get_drvdata(dev)));
  4236. if (kstrtouint(buf, 0, &uframe_periodic_max) < 0)
  4237. return -EINVAL;
  4238. if (uframe_periodic_max < 100 || uframe_periodic_max >= 125) {
  4239. fusbh200_info(fusbh200, "rejecting invalid request for "
  4240. "uframe_periodic_max=%u\n", uframe_periodic_max);
  4241. return -EINVAL;
  4242. }
  4243. ret = -EINVAL;
  4244. /*
  4245. * lock, so that our checking does not race with possible periodic
  4246. * bandwidth allocation through submitting new urbs.
  4247. */
  4248. spin_lock_irqsave (&fusbh200->lock, flags);
  4249. /*
  4250. * for request to decrease max periodic bandwidth, we have to check
  4251. * every microframe in the schedule to see whether the decrease is
  4252. * possible.
  4253. */
  4254. if (uframe_periodic_max < fusbh200->uframe_periodic_max) {
  4255. allocated_max = 0;
  4256. for (frame = 0; frame < fusbh200->periodic_size; ++frame)
  4257. for (uframe = 0; uframe < 7; ++uframe)
  4258. allocated_max = max(allocated_max,
  4259. periodic_usecs (fusbh200, frame, uframe));
  4260. if (allocated_max > uframe_periodic_max) {
  4261. fusbh200_info(fusbh200,
  4262. "cannot decrease uframe_periodic_max becase "
  4263. "periodic bandwidth is already allocated "
  4264. "(%u > %u)\n",
  4265. allocated_max, uframe_periodic_max);
  4266. goto out_unlock;
  4267. }
  4268. }
  4269. /* increasing is always ok */
  4270. fusbh200_info(fusbh200, "setting max periodic bandwidth to %u%% "
  4271. "(== %u usec/uframe)\n",
  4272. 100*uframe_periodic_max/125, uframe_periodic_max);
  4273. if (uframe_periodic_max != 100)
  4274. fusbh200_warn(fusbh200, "max periodic bandwidth set is non-standard\n");
  4275. fusbh200->uframe_periodic_max = uframe_periodic_max;
  4276. ret = count;
  4277. out_unlock:
  4278. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4279. return ret;
  4280. }
  4281. static DEVICE_ATTR(uframe_periodic_max, 0644, show_uframe_periodic_max, store_uframe_periodic_max);
  4282. static inline int create_sysfs_files(struct fusbh200_hcd *fusbh200)
  4283. {
  4284. struct device *controller = fusbh200_to_hcd(fusbh200)->self.controller;
  4285. int i = 0;
  4286. if (i)
  4287. goto out;
  4288. i = device_create_file(controller, &dev_attr_uframe_periodic_max);
  4289. out:
  4290. return i;
  4291. }
  4292. static inline void remove_sysfs_files(struct fusbh200_hcd *fusbh200)
  4293. {
  4294. struct device *controller = fusbh200_to_hcd(fusbh200)->self.controller;
  4295. device_remove_file(controller, &dev_attr_uframe_periodic_max);
  4296. }
  4297. /*-------------------------------------------------------------------------*/
  4298. /* On some systems, leaving remote wakeup enabled prevents system shutdown.
  4299. * The firmware seems to think that powering off is a wakeup event!
  4300. * This routine turns off remote wakeup and everything else, on all ports.
  4301. */
  4302. static void fusbh200_turn_off_all_ports(struct fusbh200_hcd *fusbh200)
  4303. {
  4304. u32 __iomem *status_reg = &fusbh200->regs->port_status;
  4305. fusbh200_writel(fusbh200, PORT_RWC_BITS, status_reg);
  4306. }
  4307. /*
  4308. * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
  4309. * Must be called with interrupts enabled and the lock not held.
  4310. */
  4311. static void fusbh200_silence_controller(struct fusbh200_hcd *fusbh200)
  4312. {
  4313. fusbh200_halt(fusbh200);
  4314. spin_lock_irq(&fusbh200->lock);
  4315. fusbh200->rh_state = FUSBH200_RH_HALTED;
  4316. fusbh200_turn_off_all_ports(fusbh200);
  4317. spin_unlock_irq(&fusbh200->lock);
  4318. }
  4319. /* fusbh200_shutdown kick in for silicon on any bus (not just pci, etc).
  4320. * This forcibly disables dma and IRQs, helping kexec and other cases
  4321. * where the next system software may expect clean state.
  4322. */
  4323. static void fusbh200_shutdown(struct usb_hcd *hcd)
  4324. {
  4325. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  4326. spin_lock_irq(&fusbh200->lock);
  4327. fusbh200->shutdown = true;
  4328. fusbh200->rh_state = FUSBH200_RH_STOPPING;
  4329. fusbh200->enabled_hrtimer_events = 0;
  4330. spin_unlock_irq(&fusbh200->lock);
  4331. fusbh200_silence_controller(fusbh200);
  4332. hrtimer_cancel(&fusbh200->hrtimer);
  4333. }
  4334. /*-------------------------------------------------------------------------*/
  4335. /*
  4336. * fusbh200_work is called from some interrupts, timers, and so on.
  4337. * it calls driver completion functions, after dropping fusbh200->lock.
  4338. */
  4339. static void fusbh200_work (struct fusbh200_hcd *fusbh200)
  4340. {
  4341. /* another CPU may drop fusbh200->lock during a schedule scan while
  4342. * it reports urb completions. this flag guards against bogus
  4343. * attempts at re-entrant schedule scanning.
  4344. */
  4345. if (fusbh200->scanning) {
  4346. fusbh200->need_rescan = true;
  4347. return;
  4348. }
  4349. fusbh200->scanning = true;
  4350. rescan:
  4351. fusbh200->need_rescan = false;
  4352. if (fusbh200->async_count)
  4353. scan_async(fusbh200);
  4354. if (fusbh200->intr_count > 0)
  4355. scan_intr(fusbh200);
  4356. if (fusbh200->isoc_count > 0)
  4357. scan_isoc(fusbh200);
  4358. if (fusbh200->need_rescan)
  4359. goto rescan;
  4360. fusbh200->scanning = false;
  4361. /* the IO watchdog guards against hardware or driver bugs that
  4362. * misplace IRQs, and should let us run completely without IRQs.
  4363. * such lossage has been observed on both VT6202 and VT8235.
  4364. */
  4365. turn_on_io_watchdog(fusbh200);
  4366. }
  4367. /*
  4368. * Called when the fusbh200_hcd module is removed.
  4369. */
  4370. static void fusbh200_stop (struct usb_hcd *hcd)
  4371. {
  4372. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4373. fusbh200_dbg (fusbh200, "stop\n");
  4374. /* no more interrupts ... */
  4375. spin_lock_irq(&fusbh200->lock);
  4376. fusbh200->enabled_hrtimer_events = 0;
  4377. spin_unlock_irq(&fusbh200->lock);
  4378. fusbh200_quiesce(fusbh200);
  4379. fusbh200_silence_controller(fusbh200);
  4380. fusbh200_reset (fusbh200);
  4381. hrtimer_cancel(&fusbh200->hrtimer);
  4382. remove_sysfs_files(fusbh200);
  4383. remove_debug_files (fusbh200);
  4384. /* root hub is shut down separately (first, when possible) */
  4385. spin_lock_irq (&fusbh200->lock);
  4386. end_free_itds(fusbh200);
  4387. spin_unlock_irq (&fusbh200->lock);
  4388. fusbh200_mem_cleanup (fusbh200);
  4389. #ifdef FUSBH200_STATS
  4390. fusbh200_dbg(fusbh200, "irq normal %ld err %ld iaa %ld (lost %ld)\n",
  4391. fusbh200->stats.normal, fusbh200->stats.error, fusbh200->stats.iaa,
  4392. fusbh200->stats.lost_iaa);
  4393. fusbh200_dbg (fusbh200, "complete %ld unlink %ld\n",
  4394. fusbh200->stats.complete, fusbh200->stats.unlink);
  4395. #endif
  4396. dbg_status (fusbh200, "fusbh200_stop completed",
  4397. fusbh200_readl(fusbh200, &fusbh200->regs->status));
  4398. }
  4399. /* one-time init, only for memory state */
  4400. static int hcd_fusbh200_init(struct usb_hcd *hcd)
  4401. {
  4402. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  4403. u32 temp;
  4404. int retval;
  4405. u32 hcc_params;
  4406. struct fusbh200_qh_hw *hw;
  4407. spin_lock_init(&fusbh200->lock);
  4408. /*
  4409. * keep io watchdog by default, those good HCDs could turn off it later
  4410. */
  4411. fusbh200->need_io_watchdog = 1;
  4412. hrtimer_init(&fusbh200->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
  4413. fusbh200->hrtimer.function = fusbh200_hrtimer_func;
  4414. fusbh200->next_hrtimer_event = FUSBH200_HRTIMER_NO_EVENT;
  4415. hcc_params = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
  4416. /*
  4417. * by default set standard 80% (== 100 usec/uframe) max periodic
  4418. * bandwidth as required by USB 2.0
  4419. */
  4420. fusbh200->uframe_periodic_max = 100;
  4421. /*
  4422. * hw default: 1K periodic list heads, one per frame.
  4423. * periodic_size can shrink by USBCMD update if hcc_params allows.
  4424. */
  4425. fusbh200->periodic_size = DEFAULT_I_TDPS;
  4426. INIT_LIST_HEAD(&fusbh200->intr_qh_list);
  4427. INIT_LIST_HEAD(&fusbh200->cached_itd_list);
  4428. if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
  4429. /* periodic schedule size can be smaller than default */
  4430. switch (FUSBH200_TUNE_FLS) {
  4431. case 0: fusbh200->periodic_size = 1024; break;
  4432. case 1: fusbh200->periodic_size = 512; break;
  4433. case 2: fusbh200->periodic_size = 256; break;
  4434. default: BUG();
  4435. }
  4436. }
  4437. if ((retval = fusbh200_mem_init(fusbh200, GFP_KERNEL)) < 0)
  4438. return retval;
  4439. /* controllers may cache some of the periodic schedule ... */
  4440. fusbh200->i_thresh = 2;
  4441. /*
  4442. * dedicate a qh for the async ring head, since we couldn't unlink
  4443. * a 'real' qh without stopping the async schedule [4.8]. use it
  4444. * as the 'reclamation list head' too.
  4445. * its dummy is used in hw_alt_next of many tds, to prevent the qh
  4446. * from automatically advancing to the next td after short reads.
  4447. */
  4448. fusbh200->async->qh_next.qh = NULL;
  4449. hw = fusbh200->async->hw;
  4450. hw->hw_next = QH_NEXT(fusbh200, fusbh200->async->qh_dma);
  4451. hw->hw_info1 = cpu_to_hc32(fusbh200, QH_HEAD);
  4452. hw->hw_token = cpu_to_hc32(fusbh200, QTD_STS_HALT);
  4453. hw->hw_qtd_next = FUSBH200_LIST_END(fusbh200);
  4454. fusbh200->async->qh_state = QH_STATE_LINKED;
  4455. hw->hw_alt_next = QTD_NEXT(fusbh200, fusbh200->async->dummy->qtd_dma);
  4456. /* clear interrupt enables, set irq latency */
  4457. if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
  4458. log2_irq_thresh = 0;
  4459. temp = 1 << (16 + log2_irq_thresh);
  4460. if (HCC_CANPARK(hcc_params)) {
  4461. /* HW default park == 3, on hardware that supports it (like
  4462. * NVidia and ALI silicon), maximizes throughput on the async
  4463. * schedule by avoiding QH fetches between transfers.
  4464. *
  4465. * With fast usb storage devices and NForce2, "park" seems to
  4466. * make problems: throughput reduction (!), data errors...
  4467. */
  4468. if (park) {
  4469. park = min(park, (unsigned) 3);
  4470. temp |= CMD_PARK;
  4471. temp |= park << 8;
  4472. }
  4473. fusbh200_dbg(fusbh200, "park %d\n", park);
  4474. }
  4475. if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
  4476. /* periodic schedule size can be smaller than default */
  4477. temp &= ~(3 << 2);
  4478. temp |= (FUSBH200_TUNE_FLS << 2);
  4479. }
  4480. fusbh200->command = temp;
  4481. /* Accept arbitrarily long scatter-gather lists */
  4482. if (!(hcd->driver->flags & HCD_LOCAL_MEM))
  4483. hcd->self.sg_tablesize = ~0;
  4484. return 0;
  4485. }
  4486. /* start HC running; it's halted, hcd_fusbh200_init() has been run (once) */
  4487. static int fusbh200_run (struct usb_hcd *hcd)
  4488. {
  4489. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4490. u32 temp;
  4491. u32 hcc_params;
  4492. hcd->uses_new_polling = 1;
  4493. /* EHCI spec section 4.1 */
  4494. fusbh200_writel(fusbh200, fusbh200->periodic_dma, &fusbh200->regs->frame_list);
  4495. fusbh200_writel(fusbh200, (u32)fusbh200->async->qh_dma, &fusbh200->regs->async_next);
  4496. /*
  4497. * hcc_params controls whether fusbh200->regs->segment must (!!!)
  4498. * be used; it constrains QH/ITD/SITD and QTD locations.
  4499. * pci_pool consistent memory always uses segment zero.
  4500. * streaming mappings for I/O buffers, like pci_map_single(),
  4501. * can return segments above 4GB, if the device allows.
  4502. *
  4503. * NOTE: the dma mask is visible through dma_supported(), so
  4504. * drivers can pass this info along ... like NETIF_F_HIGHDMA,
  4505. * Scsi_Host.highmem_io, and so forth. It's readonly to all
  4506. * host side drivers though.
  4507. */
  4508. hcc_params = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
  4509. // Philips, Intel, and maybe others need CMD_RUN before the
  4510. // root hub will detect new devices (why?); NEC doesn't
  4511. fusbh200->command &= ~(CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
  4512. fusbh200->command |= CMD_RUN;
  4513. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  4514. dbg_cmd (fusbh200, "init", fusbh200->command);
  4515. /*
  4516. * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
  4517. * are explicitly handed to companion controller(s), so no TT is
  4518. * involved with the root hub. (Except where one is integrated,
  4519. * and there's no companion controller unless maybe for USB OTG.)
  4520. *
  4521. * Turning on the CF flag will transfer ownership of all ports
  4522. * from the companions to the EHCI controller. If any of the
  4523. * companions are in the middle of a port reset at the time, it
  4524. * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
  4525. * guarantees that no resets are in progress. After we set CF,
  4526. * a short delay lets the hardware catch up; new resets shouldn't
  4527. * be started before the port switching actions could complete.
  4528. */
  4529. down_write(&ehci_cf_port_reset_rwsem);
  4530. fusbh200->rh_state = FUSBH200_RH_RUNNING;
  4531. fusbh200_readl(fusbh200, &fusbh200->regs->command); /* unblock posted writes */
  4532. msleep(5);
  4533. up_write(&ehci_cf_port_reset_rwsem);
  4534. fusbh200->last_periodic_enable = ktime_get_real();
  4535. temp = HC_VERSION(fusbh200, fusbh200_readl(fusbh200, &fusbh200->caps->hc_capbase));
  4536. fusbh200_info (fusbh200,
  4537. "USB %x.%x started, EHCI %x.%02x\n",
  4538. ((fusbh200->sbrn & 0xf0)>>4), (fusbh200->sbrn & 0x0f),
  4539. temp >> 8, temp & 0xff);
  4540. fusbh200_writel(fusbh200, INTR_MASK,
  4541. &fusbh200->regs->intr_enable); /* Turn On Interrupts */
  4542. /* GRR this is run-once init(), being done every time the HC starts.
  4543. * So long as they're part of class devices, we can't do it init()
  4544. * since the class device isn't created that early.
  4545. */
  4546. create_debug_files(fusbh200);
  4547. create_sysfs_files(fusbh200);
  4548. return 0;
  4549. }
  4550. static int fusbh200_setup(struct usb_hcd *hcd)
  4551. {
  4552. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  4553. int retval;
  4554. fusbh200->regs = (void __iomem *)fusbh200->caps +
  4555. HC_LENGTH(fusbh200, fusbh200_readl(fusbh200, &fusbh200->caps->hc_capbase));
  4556. dbg_hcs_params(fusbh200, "reset");
  4557. dbg_hcc_params(fusbh200, "reset");
  4558. /* cache this readonly data; minimize chip reads */
  4559. fusbh200->hcs_params = fusbh200_readl(fusbh200, &fusbh200->caps->hcs_params);
  4560. fusbh200->sbrn = HCD_USB2;
  4561. /* data structure init */
  4562. retval = hcd_fusbh200_init(hcd);
  4563. if (retval)
  4564. return retval;
  4565. retval = fusbh200_halt(fusbh200);
  4566. if (retval)
  4567. return retval;
  4568. fusbh200_reset(fusbh200);
  4569. return 0;
  4570. }
  4571. /*-------------------------------------------------------------------------*/
  4572. static irqreturn_t fusbh200_irq (struct usb_hcd *hcd)
  4573. {
  4574. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4575. u32 status, masked_status, pcd_status = 0, cmd;
  4576. int bh;
  4577. spin_lock (&fusbh200->lock);
  4578. status = fusbh200_readl(fusbh200, &fusbh200->regs->status);
  4579. /* e.g. cardbus physical eject */
  4580. if (status == ~(u32) 0) {
  4581. fusbh200_dbg (fusbh200, "device removed\n");
  4582. goto dead;
  4583. }
  4584. /*
  4585. * We don't use STS_FLR, but some controllers don't like it to
  4586. * remain on, so mask it out along with the other status bits.
  4587. */
  4588. masked_status = status & (INTR_MASK | STS_FLR);
  4589. /* Shared IRQ? */
  4590. if (!masked_status || unlikely(fusbh200->rh_state == FUSBH200_RH_HALTED)) {
  4591. spin_unlock(&fusbh200->lock);
  4592. return IRQ_NONE;
  4593. }
  4594. /* clear (just) interrupts */
  4595. fusbh200_writel(fusbh200, masked_status, &fusbh200->regs->status);
  4596. cmd = fusbh200_readl(fusbh200, &fusbh200->regs->command);
  4597. bh = 0;
  4598. #ifdef VERBOSE_DEBUG
  4599. /* unrequested/ignored: Frame List Rollover */
  4600. dbg_status (fusbh200, "irq", status);
  4601. #endif
  4602. /* INT, ERR, and IAA interrupt rates can be throttled */
  4603. /* normal [4.15.1.2] or error [4.15.1.1] completion */
  4604. if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
  4605. if (likely ((status & STS_ERR) == 0))
  4606. COUNT (fusbh200->stats.normal);
  4607. else
  4608. COUNT (fusbh200->stats.error);
  4609. bh = 1;
  4610. }
  4611. /* complete the unlinking of some qh [4.15.2.3] */
  4612. if (status & STS_IAA) {
  4613. /* Turn off the IAA watchdog */
  4614. fusbh200->enabled_hrtimer_events &= ~BIT(FUSBH200_HRTIMER_IAA_WATCHDOG);
  4615. /*
  4616. * Mild optimization: Allow another IAAD to reset the
  4617. * hrtimer, if one occurs before the next expiration.
  4618. * In theory we could always cancel the hrtimer, but
  4619. * tests show that about half the time it will be reset
  4620. * for some other event anyway.
  4621. */
  4622. if (fusbh200->next_hrtimer_event == FUSBH200_HRTIMER_IAA_WATCHDOG)
  4623. ++fusbh200->next_hrtimer_event;
  4624. /* guard against (alleged) silicon errata */
  4625. if (cmd & CMD_IAAD)
  4626. fusbh200_dbg(fusbh200, "IAA with IAAD still set?\n");
  4627. if (fusbh200->async_iaa) {
  4628. COUNT(fusbh200->stats.iaa);
  4629. end_unlink_async(fusbh200);
  4630. } else
  4631. fusbh200_dbg(fusbh200, "IAA with nothing unlinked?\n");
  4632. }
  4633. /* remote wakeup [4.3.1] */
  4634. if (status & STS_PCD) {
  4635. int pstatus;
  4636. u32 __iomem *status_reg = &fusbh200->regs->port_status;
  4637. /* kick root hub later */
  4638. pcd_status = status;
  4639. /* resume root hub? */
  4640. if (fusbh200->rh_state == FUSBH200_RH_SUSPENDED)
  4641. usb_hcd_resume_root_hub(hcd);
  4642. pstatus = fusbh200_readl(fusbh200, status_reg);
  4643. if (test_bit(0, &fusbh200->suspended_ports) &&
  4644. ((pstatus & PORT_RESUME) ||
  4645. !(pstatus & PORT_SUSPEND)) &&
  4646. (pstatus & PORT_PE) &&
  4647. fusbh200->reset_done[0] == 0) {
  4648. /* start 20 msec resume signaling from this port,
  4649. * and make khubd collect PORT_STAT_C_SUSPEND to
  4650. * stop that signaling. Use 5 ms extra for safety,
  4651. * like usb_port_resume() does.
  4652. */
  4653. fusbh200->reset_done[0] = jiffies + msecs_to_jiffies(25);
  4654. set_bit(0, &fusbh200->resuming_ports);
  4655. fusbh200_dbg (fusbh200, "port 1 remote wakeup\n");
  4656. mod_timer(&hcd->rh_timer, fusbh200->reset_done[0]);
  4657. }
  4658. }
  4659. /* PCI errors [4.15.2.4] */
  4660. if (unlikely ((status & STS_FATAL) != 0)) {
  4661. fusbh200_err(fusbh200, "fatal error\n");
  4662. dbg_cmd(fusbh200, "fatal", cmd);
  4663. dbg_status(fusbh200, "fatal", status);
  4664. dead:
  4665. usb_hc_died(hcd);
  4666. /* Don't let the controller do anything more */
  4667. fusbh200->shutdown = true;
  4668. fusbh200->rh_state = FUSBH200_RH_STOPPING;
  4669. fusbh200->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
  4670. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  4671. fusbh200_writel(fusbh200, 0, &fusbh200->regs->intr_enable);
  4672. fusbh200_handle_controller_death(fusbh200);
  4673. /* Handle completions when the controller stops */
  4674. bh = 0;
  4675. }
  4676. if (bh)
  4677. fusbh200_work (fusbh200);
  4678. spin_unlock (&fusbh200->lock);
  4679. if (pcd_status)
  4680. usb_hcd_poll_rh_status(hcd);
  4681. return IRQ_HANDLED;
  4682. }
  4683. /*-------------------------------------------------------------------------*/
  4684. /*
  4685. * non-error returns are a promise to giveback() the urb later
  4686. * we drop ownership so next owner (or urb unlink) can get it
  4687. *
  4688. * urb + dev is in hcd.self.controller.urb_list
  4689. * we're queueing TDs onto software and hardware lists
  4690. *
  4691. * hcd-specific init for hcpriv hasn't been done yet
  4692. *
  4693. * NOTE: control, bulk, and interrupt share the same code to append TDs
  4694. * to a (possibly active) QH, and the same QH scanning code.
  4695. */
  4696. static int fusbh200_urb_enqueue (
  4697. struct usb_hcd *hcd,
  4698. struct urb *urb,
  4699. gfp_t mem_flags
  4700. ) {
  4701. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4702. struct list_head qtd_list;
  4703. INIT_LIST_HEAD (&qtd_list);
  4704. switch (usb_pipetype (urb->pipe)) {
  4705. case PIPE_CONTROL:
  4706. /* qh_completions() code doesn't handle all the fault cases
  4707. * in multi-TD control transfers. Even 1KB is rare anyway.
  4708. */
  4709. if (urb->transfer_buffer_length > (16 * 1024))
  4710. return -EMSGSIZE;
  4711. /* FALLTHROUGH */
  4712. /* case PIPE_BULK: */
  4713. default:
  4714. if (!qh_urb_transaction (fusbh200, urb, &qtd_list, mem_flags))
  4715. return -ENOMEM;
  4716. return submit_async(fusbh200, urb, &qtd_list, mem_flags);
  4717. case PIPE_INTERRUPT:
  4718. if (!qh_urb_transaction (fusbh200, urb, &qtd_list, mem_flags))
  4719. return -ENOMEM;
  4720. return intr_submit(fusbh200, urb, &qtd_list, mem_flags);
  4721. case PIPE_ISOCHRONOUS:
  4722. return itd_submit (fusbh200, urb, mem_flags);
  4723. }
  4724. }
  4725. /* remove from hardware lists
  4726. * completions normally happen asynchronously
  4727. */
  4728. static int fusbh200_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  4729. {
  4730. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4731. struct fusbh200_qh *qh;
  4732. unsigned long flags;
  4733. int rc;
  4734. spin_lock_irqsave (&fusbh200->lock, flags);
  4735. rc = usb_hcd_check_unlink_urb(hcd, urb, status);
  4736. if (rc)
  4737. goto done;
  4738. switch (usb_pipetype (urb->pipe)) {
  4739. // case PIPE_CONTROL:
  4740. // case PIPE_BULK:
  4741. default:
  4742. qh = (struct fusbh200_qh *) urb->hcpriv;
  4743. if (!qh)
  4744. break;
  4745. switch (qh->qh_state) {
  4746. case QH_STATE_LINKED:
  4747. case QH_STATE_COMPLETING:
  4748. start_unlink_async(fusbh200, qh);
  4749. break;
  4750. case QH_STATE_UNLINK:
  4751. case QH_STATE_UNLINK_WAIT:
  4752. /* already started */
  4753. break;
  4754. case QH_STATE_IDLE:
  4755. /* QH might be waiting for a Clear-TT-Buffer */
  4756. qh_completions(fusbh200, qh);
  4757. break;
  4758. }
  4759. break;
  4760. case PIPE_INTERRUPT:
  4761. qh = (struct fusbh200_qh *) urb->hcpriv;
  4762. if (!qh)
  4763. break;
  4764. switch (qh->qh_state) {
  4765. case QH_STATE_LINKED:
  4766. case QH_STATE_COMPLETING:
  4767. start_unlink_intr(fusbh200, qh);
  4768. break;
  4769. case QH_STATE_IDLE:
  4770. qh_completions (fusbh200, qh);
  4771. break;
  4772. default:
  4773. fusbh200_dbg (fusbh200, "bogus qh %p state %d\n",
  4774. qh, qh->qh_state);
  4775. goto done;
  4776. }
  4777. break;
  4778. case PIPE_ISOCHRONOUS:
  4779. // itd...
  4780. // wait till next completion, do it then.
  4781. // completion irqs can wait up to 1024 msec,
  4782. break;
  4783. }
  4784. done:
  4785. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4786. return rc;
  4787. }
  4788. /*-------------------------------------------------------------------------*/
  4789. // bulk qh holds the data toggle
  4790. static void
  4791. fusbh200_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  4792. {
  4793. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4794. unsigned long flags;
  4795. struct fusbh200_qh *qh, *tmp;
  4796. /* ASSERT: any requests/urbs are being unlinked */
  4797. /* ASSERT: nobody can be submitting urbs for this any more */
  4798. rescan:
  4799. spin_lock_irqsave (&fusbh200->lock, flags);
  4800. qh = ep->hcpriv;
  4801. if (!qh)
  4802. goto done;
  4803. /* endpoints can be iso streams. for now, we don't
  4804. * accelerate iso completions ... so spin a while.
  4805. */
  4806. if (qh->hw == NULL) {
  4807. struct fusbh200_iso_stream *stream = ep->hcpriv;
  4808. if (!list_empty(&stream->td_list))
  4809. goto idle_timeout;
  4810. /* BUG_ON(!list_empty(&stream->free_list)); */
  4811. kfree(stream);
  4812. goto done;
  4813. }
  4814. if (fusbh200->rh_state < FUSBH200_RH_RUNNING)
  4815. qh->qh_state = QH_STATE_IDLE;
  4816. switch (qh->qh_state) {
  4817. case QH_STATE_LINKED:
  4818. case QH_STATE_COMPLETING:
  4819. for (tmp = fusbh200->async->qh_next.qh;
  4820. tmp && tmp != qh;
  4821. tmp = tmp->qh_next.qh)
  4822. continue;
  4823. /* periodic qh self-unlinks on empty, and a COMPLETING qh
  4824. * may already be unlinked.
  4825. */
  4826. if (tmp)
  4827. start_unlink_async(fusbh200, qh);
  4828. /* FALL THROUGH */
  4829. case QH_STATE_UNLINK: /* wait for hw to finish? */
  4830. case QH_STATE_UNLINK_WAIT:
  4831. idle_timeout:
  4832. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4833. schedule_timeout_uninterruptible(1);
  4834. goto rescan;
  4835. case QH_STATE_IDLE: /* fully unlinked */
  4836. if (qh->clearing_tt)
  4837. goto idle_timeout;
  4838. if (list_empty (&qh->qtd_list)) {
  4839. qh_destroy(fusbh200, qh);
  4840. break;
  4841. }
  4842. /* else FALL THROUGH */
  4843. default:
  4844. /* caller was supposed to have unlinked any requests;
  4845. * that's not our job. just leak this memory.
  4846. */
  4847. fusbh200_err (fusbh200, "qh %p (#%02x) state %d%s\n",
  4848. qh, ep->desc.bEndpointAddress, qh->qh_state,
  4849. list_empty (&qh->qtd_list) ? "" : "(has tds)");
  4850. break;
  4851. }
  4852. done:
  4853. ep->hcpriv = NULL;
  4854. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4855. }
  4856. static void
  4857. fusbh200_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  4858. {
  4859. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  4860. struct fusbh200_qh *qh;
  4861. int eptype = usb_endpoint_type(&ep->desc);
  4862. int epnum = usb_endpoint_num(&ep->desc);
  4863. int is_out = usb_endpoint_dir_out(&ep->desc);
  4864. unsigned long flags;
  4865. if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
  4866. return;
  4867. spin_lock_irqsave(&fusbh200->lock, flags);
  4868. qh = ep->hcpriv;
  4869. /* For Bulk and Interrupt endpoints we maintain the toggle state
  4870. * in the hardware; the toggle bits in udev aren't used at all.
  4871. * When an endpoint is reset by usb_clear_halt() we must reset
  4872. * the toggle bit in the QH.
  4873. */
  4874. if (qh) {
  4875. usb_settoggle(qh->dev, epnum, is_out, 0);
  4876. if (!list_empty(&qh->qtd_list)) {
  4877. WARN_ONCE(1, "clear_halt for a busy endpoint\n");
  4878. } else if (qh->qh_state == QH_STATE_LINKED ||
  4879. qh->qh_state == QH_STATE_COMPLETING) {
  4880. /* The toggle value in the QH can't be updated
  4881. * while the QH is active. Unlink it now;
  4882. * re-linking will call qh_refresh().
  4883. */
  4884. if (eptype == USB_ENDPOINT_XFER_BULK)
  4885. start_unlink_async(fusbh200, qh);
  4886. else
  4887. start_unlink_intr(fusbh200, qh);
  4888. }
  4889. }
  4890. spin_unlock_irqrestore(&fusbh200->lock, flags);
  4891. }
  4892. static int fusbh200_get_frame (struct usb_hcd *hcd)
  4893. {
  4894. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4895. return (fusbh200_read_frame_index(fusbh200) >> 3) % fusbh200->periodic_size;
  4896. }
  4897. /*-------------------------------------------------------------------------*/
  4898. /*
  4899. * The EHCI in ChipIdea HDRC cannot be a separate module or device,
  4900. * because its registers (and irq) are shared between host/gadget/otg
  4901. * functions and in order to facilitate role switching we cannot
  4902. * give the fusbh200 driver exclusive access to those.
  4903. */
  4904. MODULE_DESCRIPTION(DRIVER_DESC);
  4905. MODULE_AUTHOR (DRIVER_AUTHOR);
  4906. MODULE_LICENSE ("GPL");
  4907. static const struct hc_driver fusbh200_fusbh200_hc_driver = {
  4908. .description = hcd_name,
  4909. .product_desc = "Faraday USB2.0 Host Controller",
  4910. .hcd_priv_size = sizeof(struct fusbh200_hcd),
  4911. /*
  4912. * generic hardware linkage
  4913. */
  4914. .irq = fusbh200_irq,
  4915. .flags = HCD_MEMORY | HCD_USB2,
  4916. /*
  4917. * basic lifecycle operations
  4918. */
  4919. .reset = hcd_fusbh200_init,
  4920. .start = fusbh200_run,
  4921. .stop = fusbh200_stop,
  4922. .shutdown = fusbh200_shutdown,
  4923. /*
  4924. * managing i/o requests and associated device resources
  4925. */
  4926. .urb_enqueue = fusbh200_urb_enqueue,
  4927. .urb_dequeue = fusbh200_urb_dequeue,
  4928. .endpoint_disable = fusbh200_endpoint_disable,
  4929. .endpoint_reset = fusbh200_endpoint_reset,
  4930. /*
  4931. * scheduling support
  4932. */
  4933. .get_frame_number = fusbh200_get_frame,
  4934. /*
  4935. * root hub support
  4936. */
  4937. .hub_status_data = fusbh200_hub_status_data,
  4938. .hub_control = fusbh200_hub_control,
  4939. .bus_suspend = fusbh200_bus_suspend,
  4940. .bus_resume = fusbh200_bus_resume,
  4941. .relinquish_port = fusbh200_relinquish_port,
  4942. .port_handed_over = fusbh200_port_handed_over,
  4943. .clear_tt_buffer_complete = fusbh200_clear_tt_buffer_complete,
  4944. };
  4945. void fusbh200_init(struct fusbh200_hcd *fusbh200)
  4946. {
  4947. u32 reg;
  4948. reg = fusbh200_readl(fusbh200, &fusbh200->regs->bmcsr);
  4949. reg |= BMCSR_INT_POLARITY;
  4950. reg &= ~BMCSR_VBUS_OFF;
  4951. fusbh200_writel(fusbh200, reg, &fusbh200->regs->bmcsr);
  4952. reg = fusbh200_readl(fusbh200, &fusbh200->regs->bmier);
  4953. fusbh200_writel(fusbh200, reg | BMIER_OVC_EN | BMIER_VBUS_ERR_EN,
  4954. &fusbh200->regs->bmier);
  4955. }
  4956. /**
  4957. * fusbh200_hcd_fusbh200_probe - initialize faraday FUSBH200 HCDs
  4958. *
  4959. * Allocates basic resources for this USB host controller, and
  4960. * then invokes the start() method for the HCD associated with it
  4961. * through the hotplug entry's driver_data.
  4962. */
  4963. static int fusbh200_hcd_fusbh200_probe(struct platform_device *pdev)
  4964. {
  4965. struct device *dev = &pdev->dev;
  4966. struct usb_hcd *hcd;
  4967. struct resource *res;
  4968. int irq;
  4969. int retval = -ENODEV;
  4970. struct fusbh200_hcd *fusbh200;
  4971. if (usb_disabled())
  4972. return -ENODEV;
  4973. pdev->dev.power.power_state = PMSG_ON;
  4974. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  4975. if (!res) {
  4976. dev_err(dev,
  4977. "Found HC with no IRQ. Check %s setup!\n",
  4978. dev_name(dev));
  4979. return -ENODEV;
  4980. }
  4981. irq = res->start;
  4982. hcd = usb_create_hcd(&fusbh200_fusbh200_hc_driver, dev,
  4983. dev_name(dev));
  4984. if (!hcd) {
  4985. dev_err(dev, "failed to create hcd with err %d\n", retval);
  4986. retval = -ENOMEM;
  4987. goto fail_create_hcd;
  4988. }
  4989. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  4990. if (!res) {
  4991. dev_err(dev,
  4992. "Found HC with no register addr. Check %s setup!\n",
  4993. dev_name(dev));
  4994. retval = -ENODEV;
  4995. goto fail_request_resource;
  4996. }
  4997. hcd->rsrc_start = res->start;
  4998. hcd->rsrc_len = resource_size(res);
  4999. hcd->has_tt = 1;
  5000. if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
  5001. fusbh200_fusbh200_hc_driver.description)) {
  5002. dev_dbg(dev, "controller already in use\n");
  5003. retval = -EBUSY;
  5004. goto fail_request_resource;
  5005. }
  5006. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  5007. if (!res) {
  5008. dev_err(dev,
  5009. "Found HC with no register addr. Check %s setup!\n",
  5010. dev_name(dev));
  5011. retval = -ENODEV;
  5012. goto fail_request_resource;
  5013. }
  5014. hcd->regs = ioremap_nocache(res->start, resource_size(res));
  5015. if (hcd->regs == NULL) {
  5016. dev_dbg(dev, "error mapping memory\n");
  5017. retval = -EFAULT;
  5018. goto fail_ioremap;
  5019. }
  5020. fusbh200 = hcd_to_fusbh200(hcd);
  5021. fusbh200->caps = hcd->regs;
  5022. retval = fusbh200_setup(hcd);
  5023. if (retval)
  5024. return retval;
  5025. fusbh200_init(fusbh200);
  5026. retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
  5027. if (retval) {
  5028. dev_err(dev, "failed to add hcd with err %d\n", retval);
  5029. goto fail_add_hcd;
  5030. }
  5031. return retval;
  5032. fail_add_hcd:
  5033. iounmap(hcd->regs);
  5034. fail_ioremap:
  5035. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  5036. fail_request_resource:
  5037. usb_put_hcd(hcd);
  5038. fail_create_hcd:
  5039. dev_err(dev, "init %s fail, %d\n", dev_name(dev), retval);
  5040. return retval;
  5041. }
  5042. /**
  5043. * fusbh200_hcd_fusbh200_remove - shutdown processing for EHCI HCDs
  5044. * @dev: USB Host Controller being removed
  5045. *
  5046. * Reverses the effect of fotg2xx_usb_hcd_probe(), first invoking
  5047. * the HCD's stop() method. It is always called from a thread
  5048. * context, normally "rmmod", "apmd", or something similar.
  5049. */
  5050. int fusbh200_hcd_fusbh200_remove(struct platform_device *pdev)
  5051. {
  5052. struct device *dev = &pdev->dev;
  5053. struct usb_hcd *hcd = dev_get_drvdata(dev);
  5054. if (!hcd)
  5055. return 0;
  5056. usb_remove_hcd(hcd);
  5057. iounmap(hcd->regs);
  5058. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  5059. usb_put_hcd(hcd);
  5060. platform_set_drvdata(pdev, NULL);
  5061. return 0;
  5062. }
  5063. struct platform_driver fusbh200_hcd_fusbh200_driver = {
  5064. .driver = {
  5065. .name = "fusbh200",
  5066. },
  5067. .probe = fusbh200_hcd_fusbh200_probe,
  5068. .remove = fusbh200_hcd_fusbh200_remove,
  5069. };
  5070. static int __init fusbh200_hcd_init(void)
  5071. {
  5072. int retval = 0;
  5073. if (usb_disabled())
  5074. return -ENODEV;
  5075. printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
  5076. set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
  5077. if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
  5078. test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
  5079. printk(KERN_WARNING "Warning! fusbh200_hcd should always be loaded"
  5080. " before uhci_hcd and ohci_hcd, not after\n");
  5081. pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd\n",
  5082. hcd_name,
  5083. sizeof(struct fusbh200_qh), sizeof(struct fusbh200_qtd),
  5084. sizeof(struct fusbh200_itd));
  5085. #ifdef DEBUG
  5086. fusbh200_debug_root = debugfs_create_dir("fusbh200", usb_debug_root);
  5087. if (!fusbh200_debug_root) {
  5088. retval = -ENOENT;
  5089. goto err_debug;
  5090. }
  5091. #endif
  5092. retval = platform_driver_register(&fusbh200_hcd_fusbh200_driver);
  5093. if (retval < 0)
  5094. goto clean;
  5095. return retval;
  5096. platform_driver_unregister(&fusbh200_hcd_fusbh200_driver);
  5097. clean:
  5098. #ifdef DEBUG
  5099. debugfs_remove(fusbh200_debug_root);
  5100. fusbh200_debug_root = NULL;
  5101. err_debug:
  5102. #endif
  5103. clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
  5104. return retval;
  5105. }
  5106. module_init(fusbh200_hcd_init);
  5107. static void __exit fusbh200_hcd_cleanup(void)
  5108. {
  5109. platform_driver_unregister(&fusbh200_hcd_fusbh200_driver);
  5110. #ifdef DEBUG
  5111. debugfs_remove(fusbh200_debug_root);
  5112. #endif
  5113. clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
  5114. }
  5115. module_exit(fusbh200_hcd_cleanup);