init.c 40 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/moduleparam.h>
  17. #include <linux/of.h>
  18. #include <linux/mmc/sdio_func.h>
  19. #include "core.h"
  20. #include "cfg80211.h"
  21. #include "target.h"
  22. #include "debug.h"
  23. #include "hif-ops.h"
  24. unsigned int debug_mask;
  25. static unsigned int testmode;
  26. module_param(debug_mask, uint, 0644);
  27. module_param(testmode, uint, 0644);
  28. /*
  29. * Include definitions here that can be used to tune the WLAN module
  30. * behavior. Different customers can tune the behavior as per their needs,
  31. * here.
  32. */
  33. /*
  34. * This configuration item enable/disable keepalive support.
  35. * Keepalive support: In the absence of any data traffic to AP, null
  36. * frames will be sent to the AP at periodic interval, to keep the association
  37. * active. This configuration item defines the periodic interval.
  38. * Use value of zero to disable keepalive support
  39. * Default: 60 seconds
  40. */
  41. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  42. /*
  43. * This configuration item sets the value of disconnect timeout
  44. * Firmware delays sending the disconnec event to the host for this
  45. * timeout after is gets disconnected from the current AP.
  46. * If the firmware successly roams within the disconnect timeout
  47. * it sends a new connect event
  48. */
  49. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  50. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  51. #define ATH6KL_DATA_OFFSET 64
  52. struct sk_buff *ath6kl_buf_alloc(int size)
  53. {
  54. struct sk_buff *skb;
  55. u16 reserved;
  56. /* Add chacheline space at front and back of buffer */
  57. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  58. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  59. skb = dev_alloc_skb(size + reserved);
  60. if (skb)
  61. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  62. return skb;
  63. }
  64. void ath6kl_init_profile_info(struct ath6kl *ar)
  65. {
  66. /* TODO: Findout vif */
  67. struct ath6kl_vif *vif = ar->vif;
  68. vif->ssid_len = 0;
  69. memset(vif->ssid, 0, sizeof(vif->ssid));
  70. vif->dot11_auth_mode = OPEN_AUTH;
  71. vif->auth_mode = NONE_AUTH;
  72. vif->prwise_crypto = NONE_CRYPT;
  73. vif->prwise_crypto_len = 0;
  74. vif->grp_crypto = NONE_CRYPT;
  75. vif->grp_crypto_len = 0;
  76. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  77. memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
  78. memset(vif->bssid, 0, sizeof(vif->bssid));
  79. ar->bss_ch = 0;
  80. vif->nw_type = vif->next_mode = INFRA_NETWORK;
  81. }
  82. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  83. {
  84. u32 address, data;
  85. struct host_app_area host_app_area;
  86. /* Fetch the address of the host_app_area_s
  87. * instance in the host interest area */
  88. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  89. address = TARG_VTOP(ar->target_type, address);
  90. if (ath6kl_diag_read32(ar, address, &data))
  91. return -EIO;
  92. address = TARG_VTOP(ar->target_type, data);
  93. host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
  94. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  95. sizeof(struct host_app_area)))
  96. return -EIO;
  97. return 0;
  98. }
  99. static inline void set_ac2_ep_map(struct ath6kl *ar,
  100. u8 ac,
  101. enum htc_endpoint_id ep)
  102. {
  103. ar->ac2ep_map[ac] = ep;
  104. ar->ep2ac_map[ep] = ac;
  105. }
  106. /* connect to a service */
  107. static int ath6kl_connectservice(struct ath6kl *ar,
  108. struct htc_service_connect_req *con_req,
  109. char *desc)
  110. {
  111. int status;
  112. struct htc_service_connect_resp response;
  113. memset(&response, 0, sizeof(response));
  114. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  115. if (status) {
  116. ath6kl_err("failed to connect to %s service status:%d\n",
  117. desc, status);
  118. return status;
  119. }
  120. switch (con_req->svc_id) {
  121. case WMI_CONTROL_SVC:
  122. if (test_bit(WMI_ENABLED, &ar->flag))
  123. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  124. ar->ctrl_ep = response.endpoint;
  125. break;
  126. case WMI_DATA_BE_SVC:
  127. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  128. break;
  129. case WMI_DATA_BK_SVC:
  130. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  131. break;
  132. case WMI_DATA_VI_SVC:
  133. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  134. break;
  135. case WMI_DATA_VO_SVC:
  136. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  137. break;
  138. default:
  139. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  140. return -EINVAL;
  141. }
  142. return 0;
  143. }
  144. static int ath6kl_init_service_ep(struct ath6kl *ar)
  145. {
  146. struct htc_service_connect_req connect;
  147. memset(&connect, 0, sizeof(connect));
  148. /* these fields are the same for all service endpoints */
  149. connect.ep_cb.rx = ath6kl_rx;
  150. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  151. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  152. /*
  153. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  154. * gets called.
  155. */
  156. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  157. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  158. if (!connect.ep_cb.rx_refill_thresh)
  159. connect.ep_cb.rx_refill_thresh++;
  160. /* connect to control service */
  161. connect.svc_id = WMI_CONTROL_SVC;
  162. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  163. return -EIO;
  164. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  165. /*
  166. * Limit the HTC message size on the send path, although e can
  167. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  168. * (802.3) frames on the send path.
  169. */
  170. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  171. /*
  172. * To reduce the amount of committed memory for larger A_MSDU
  173. * frames, use the recv-alloc threshold mechanism for larger
  174. * packets.
  175. */
  176. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  177. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  178. /*
  179. * For the remaining data services set the connection flag to
  180. * reduce dribbling, if configured to do so.
  181. */
  182. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  183. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  184. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  185. connect.svc_id = WMI_DATA_BE_SVC;
  186. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  187. return -EIO;
  188. /* connect to back-ground map this to WMI LOW_PRI */
  189. connect.svc_id = WMI_DATA_BK_SVC;
  190. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  191. return -EIO;
  192. /* connect to Video service, map this to to HI PRI */
  193. connect.svc_id = WMI_DATA_VI_SVC;
  194. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  195. return -EIO;
  196. /*
  197. * Connect to VO service, this is currently not mapped to a WMI
  198. * priority stream due to historical reasons. WMI originally
  199. * defined 3 priorities over 3 mailboxes We can change this when
  200. * WMI is reworked so that priorities are not dependent on
  201. * mailboxes.
  202. */
  203. connect.svc_id = WMI_DATA_VO_SVC;
  204. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  205. return -EIO;
  206. return 0;
  207. }
  208. void ath6kl_init_control_info(struct ath6kl *ar)
  209. {
  210. struct ath6kl_vif *vif = ar->vif;
  211. ath6kl_init_profile_info(ar);
  212. vif->def_txkey_index = 0;
  213. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  214. ar->ch_hint = 0;
  215. }
  216. /*
  217. * Set HTC/Mbox operational parameters, this can only be called when the
  218. * target is in the BMI phase.
  219. */
  220. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  221. u8 htc_ctrl_buf)
  222. {
  223. int status;
  224. u32 blk_size;
  225. blk_size = ar->mbox_info.block_size;
  226. if (htc_ctrl_buf)
  227. blk_size |= ((u32)htc_ctrl_buf) << 16;
  228. /* set the host interest area for the block size */
  229. status = ath6kl_bmi_write(ar,
  230. ath6kl_get_hi_item_addr(ar,
  231. HI_ITEM(hi_mbox_io_block_sz)),
  232. (u8 *)&blk_size,
  233. 4);
  234. if (status) {
  235. ath6kl_err("bmi_write_memory for IO block size failed\n");
  236. goto out;
  237. }
  238. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  239. blk_size,
  240. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  241. if (mbox_isr_yield_val) {
  242. /* set the host interest area for the mbox ISR yield limit */
  243. status = ath6kl_bmi_write(ar,
  244. ath6kl_get_hi_item_addr(ar,
  245. HI_ITEM(hi_mbox_isr_yield_limit)),
  246. (u8 *)&mbox_isr_yield_val,
  247. 4);
  248. if (status) {
  249. ath6kl_err("bmi_write_memory for yield limit failed\n");
  250. goto out;
  251. }
  252. }
  253. out:
  254. return status;
  255. }
  256. #define REG_DUMP_COUNT_AR6003 60
  257. #define REGISTER_DUMP_LEN_MAX 60
  258. static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
  259. {
  260. u32 address;
  261. u32 regdump_loc = 0;
  262. int status;
  263. u32 regdump_val[REGISTER_DUMP_LEN_MAX];
  264. u32 i;
  265. if (ar->target_type != TARGET_TYPE_AR6003)
  266. return;
  267. /* the reg dump pointer is copied to the host interest area */
  268. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
  269. address = TARG_VTOP(ar->target_type, address);
  270. /* read RAM location through diagnostic window */
  271. status = ath6kl_diag_read32(ar, address, &regdump_loc);
  272. if (status || !regdump_loc) {
  273. ath6kl_err("failed to get ptr to register dump area\n");
  274. return;
  275. }
  276. ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
  277. regdump_loc);
  278. regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
  279. /* fetch register dump data */
  280. status = ath6kl_diag_read(ar, regdump_loc, (u8 *)&regdump_val[0],
  281. REG_DUMP_COUNT_AR6003 * (sizeof(u32)));
  282. if (status) {
  283. ath6kl_err("failed to get register dump\n");
  284. return;
  285. }
  286. ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
  287. for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
  288. ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
  289. i, regdump_val[i]);
  290. }
  291. void ath6kl_target_failure(struct ath6kl *ar)
  292. {
  293. ath6kl_err("target asserted\n");
  294. /* try dumping target assertion information (if any) */
  295. ath6kl_dump_target_assert_info(ar);
  296. }
  297. static int ath6kl_target_config_wlan_params(struct ath6kl *ar)
  298. {
  299. int status = 0;
  300. int ret;
  301. /*
  302. * Configure the device for rx dot11 header rules. "0,0" are the
  303. * default values. Required if checksum offload is needed. Set
  304. * RxMetaVersion to 2.
  305. */
  306. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi,
  307. ar->rx_meta_ver, 0, 0)) {
  308. ath6kl_err("unable to set the rx frame format\n");
  309. status = -EIO;
  310. }
  311. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  312. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1,
  313. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  314. ath6kl_err("unable to set power save fail event policy\n");
  315. status = -EIO;
  316. }
  317. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  318. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0,
  319. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  320. ath6kl_err("unable to set barker preamble policy\n");
  321. status = -EIO;
  322. }
  323. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi,
  324. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  325. ath6kl_err("unable to set keep alive interval\n");
  326. status = -EIO;
  327. }
  328. if (ath6kl_wmi_disctimeout_cmd(ar->wmi,
  329. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  330. ath6kl_err("unable to set disconnect timeout\n");
  331. status = -EIO;
  332. }
  333. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  334. if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) {
  335. ath6kl_err("unable to set txop bursting\n");
  336. status = -EIO;
  337. }
  338. if (ar->p2p) {
  339. ret = ath6kl_wmi_info_req_cmd(ar->wmi,
  340. P2P_FLAG_CAPABILITIES_REQ |
  341. P2P_FLAG_MACADDR_REQ |
  342. P2P_FLAG_HMODEL_REQ);
  343. if (ret) {
  344. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  345. "capabilities (%d) - assuming P2P not "
  346. "supported\n", ret);
  347. ar->p2p = 0;
  348. }
  349. }
  350. if (ar->p2p) {
  351. /* Enable Probe Request reporting for P2P */
  352. ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, true);
  353. if (ret) {
  354. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
  355. "Request reporting (%d)\n", ret);
  356. }
  357. }
  358. return status;
  359. }
  360. int ath6kl_configure_target(struct ath6kl *ar)
  361. {
  362. u32 param, ram_reserved_size;
  363. u8 fw_iftype;
  364. fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
  365. /* Tell target which HTC version it is used*/
  366. param = HTC_PROTOCOL_VERSION;
  367. if (ath6kl_bmi_write(ar,
  368. ath6kl_get_hi_item_addr(ar,
  369. HI_ITEM(hi_app_host_interest)),
  370. (u8 *)&param, 4) != 0) {
  371. ath6kl_err("bmi_write_memory for htc version failed\n");
  372. return -EIO;
  373. }
  374. /* set the firmware mode to STA/IBSS/AP */
  375. param = 0;
  376. if (ath6kl_bmi_read(ar,
  377. ath6kl_get_hi_item_addr(ar,
  378. HI_ITEM(hi_option_flag)),
  379. (u8 *)&param, 4) != 0) {
  380. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  381. return -EIO;
  382. }
  383. param |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  384. param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT);
  385. if (ar->p2p && fw_iftype == HI_OPTION_FW_MODE_BSS_STA) {
  386. param |= HI_OPTION_FW_SUBMODE_P2PDEV <<
  387. HI_OPTION_FW_SUBMODE_SHIFT;
  388. }
  389. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  390. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  391. if (ath6kl_bmi_write(ar,
  392. ath6kl_get_hi_item_addr(ar,
  393. HI_ITEM(hi_option_flag)),
  394. (u8 *)&param,
  395. 4) != 0) {
  396. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  397. return -EIO;
  398. }
  399. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  400. /*
  401. * Hardcode the address use for the extended board data
  402. * Ideally this should be pre-allocate by the OS at boot time
  403. * But since it is a new feature and board data is loaded
  404. * at init time, we have to workaround this from host.
  405. * It is difficult to patch the firmware boot code,
  406. * but possible in theory.
  407. */
  408. param = ar->hw.board_ext_data_addr;
  409. ram_reserved_size = ar->hw.reserved_ram_size;
  410. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  411. HI_ITEM(hi_board_ext_data)),
  412. (u8 *)&param, 4) != 0) {
  413. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  414. return -EIO;
  415. }
  416. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  417. HI_ITEM(hi_end_ram_reserve_sz)),
  418. (u8 *)&ram_reserved_size, 4) != 0) {
  419. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  420. return -EIO;
  421. }
  422. /* set the block size for the target */
  423. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  424. /* use default number of control buffers */
  425. return -EIO;
  426. return 0;
  427. }
  428. void ath6kl_core_free(struct ath6kl *ar)
  429. {
  430. wiphy_free(ar->wiphy);
  431. }
  432. int ath6kl_unavail_ev(struct ath6kl *ar)
  433. {
  434. ath6kl_destroy(ar->net_dev, 1);
  435. return 0;
  436. }
  437. /* firmware upload */
  438. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  439. u8 **fw, size_t *fw_len)
  440. {
  441. const struct firmware *fw_entry;
  442. int ret;
  443. ret = request_firmware(&fw_entry, filename, ar->dev);
  444. if (ret)
  445. return ret;
  446. *fw_len = fw_entry->size;
  447. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  448. if (*fw == NULL)
  449. ret = -ENOMEM;
  450. release_firmware(fw_entry);
  451. return ret;
  452. }
  453. #ifdef CONFIG_OF
  454. static const char *get_target_ver_dir(const struct ath6kl *ar)
  455. {
  456. switch (ar->version.target_ver) {
  457. case AR6003_REV1_VERSION:
  458. return "ath6k/AR6003/hw1.0";
  459. case AR6003_REV2_VERSION:
  460. return "ath6k/AR6003/hw2.0";
  461. case AR6003_REV3_VERSION:
  462. return "ath6k/AR6003/hw2.1.1";
  463. }
  464. ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
  465. ar->version.target_ver);
  466. return NULL;
  467. }
  468. /*
  469. * Check the device tree for a board-id and use it to construct
  470. * the pathname to the firmware file. Used (for now) to find a
  471. * fallback to the "bdata.bin" file--typically a symlink to the
  472. * appropriate board-specific file.
  473. */
  474. static bool check_device_tree(struct ath6kl *ar)
  475. {
  476. static const char *board_id_prop = "atheros,board-id";
  477. struct device_node *node;
  478. char board_filename[64];
  479. const char *board_id;
  480. int ret;
  481. for_each_compatible_node(node, NULL, "atheros,ath6kl") {
  482. board_id = of_get_property(node, board_id_prop, NULL);
  483. if (board_id == NULL) {
  484. ath6kl_warn("No \"%s\" property on %s node.\n",
  485. board_id_prop, node->name);
  486. continue;
  487. }
  488. snprintf(board_filename, sizeof(board_filename),
  489. "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
  490. ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
  491. &ar->fw_board_len);
  492. if (ret) {
  493. ath6kl_err("Failed to get DT board file %s: %d\n",
  494. board_filename, ret);
  495. continue;
  496. }
  497. return true;
  498. }
  499. return false;
  500. }
  501. #else
  502. static bool check_device_tree(struct ath6kl *ar)
  503. {
  504. return false;
  505. }
  506. #endif /* CONFIG_OF */
  507. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  508. {
  509. const char *filename;
  510. int ret;
  511. if (ar->fw_board != NULL)
  512. return 0;
  513. switch (ar->version.target_ver) {
  514. case AR6003_REV2_VERSION:
  515. filename = AR6003_REV2_BOARD_DATA_FILE;
  516. break;
  517. case AR6004_REV1_VERSION:
  518. filename = AR6004_REV1_BOARD_DATA_FILE;
  519. break;
  520. default:
  521. filename = AR6003_REV3_BOARD_DATA_FILE;
  522. break;
  523. }
  524. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  525. &ar->fw_board_len);
  526. if (ret == 0) {
  527. /* managed to get proper board file */
  528. return 0;
  529. }
  530. if (check_device_tree(ar)) {
  531. /* got board file from device tree */
  532. return 0;
  533. }
  534. /* there was no proper board file, try to use default instead */
  535. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  536. filename, ret);
  537. switch (ar->version.target_ver) {
  538. case AR6003_REV2_VERSION:
  539. filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
  540. break;
  541. case AR6004_REV1_VERSION:
  542. filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
  543. break;
  544. default:
  545. filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
  546. break;
  547. }
  548. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  549. &ar->fw_board_len);
  550. if (ret) {
  551. ath6kl_err("Failed to get default board file %s: %d\n",
  552. filename, ret);
  553. return ret;
  554. }
  555. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  556. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  557. return 0;
  558. }
  559. static int ath6kl_fetch_otp_file(struct ath6kl *ar)
  560. {
  561. const char *filename;
  562. int ret;
  563. if (ar->fw_otp != NULL)
  564. return 0;
  565. switch (ar->version.target_ver) {
  566. case AR6003_REV2_VERSION:
  567. filename = AR6003_REV2_OTP_FILE;
  568. break;
  569. case AR6004_REV1_VERSION:
  570. ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
  571. return 0;
  572. break;
  573. default:
  574. filename = AR6003_REV3_OTP_FILE;
  575. break;
  576. }
  577. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  578. &ar->fw_otp_len);
  579. if (ret) {
  580. ath6kl_err("Failed to get OTP file %s: %d\n",
  581. filename, ret);
  582. return ret;
  583. }
  584. return 0;
  585. }
  586. static int ath6kl_fetch_fw_file(struct ath6kl *ar)
  587. {
  588. const char *filename;
  589. int ret;
  590. if (ar->fw != NULL)
  591. return 0;
  592. if (testmode) {
  593. switch (ar->version.target_ver) {
  594. case AR6003_REV2_VERSION:
  595. filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
  596. break;
  597. case AR6003_REV3_VERSION:
  598. filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
  599. break;
  600. case AR6004_REV1_VERSION:
  601. ath6kl_warn("testmode not supported with ar6004\n");
  602. return -EOPNOTSUPP;
  603. default:
  604. ath6kl_warn("unknown target version: 0x%x\n",
  605. ar->version.target_ver);
  606. return -EINVAL;
  607. }
  608. set_bit(TESTMODE, &ar->flag);
  609. goto get_fw;
  610. }
  611. switch (ar->version.target_ver) {
  612. case AR6003_REV2_VERSION:
  613. filename = AR6003_REV2_FIRMWARE_FILE;
  614. break;
  615. case AR6004_REV1_VERSION:
  616. filename = AR6004_REV1_FIRMWARE_FILE;
  617. break;
  618. default:
  619. filename = AR6003_REV3_FIRMWARE_FILE;
  620. break;
  621. }
  622. get_fw:
  623. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  624. if (ret) {
  625. ath6kl_err("Failed to get firmware file %s: %d\n",
  626. filename, ret);
  627. return ret;
  628. }
  629. return 0;
  630. }
  631. static int ath6kl_fetch_patch_file(struct ath6kl *ar)
  632. {
  633. const char *filename;
  634. int ret;
  635. switch (ar->version.target_ver) {
  636. case AR6003_REV2_VERSION:
  637. filename = AR6003_REV2_PATCH_FILE;
  638. break;
  639. case AR6004_REV1_VERSION:
  640. /* FIXME: implement for AR6004 */
  641. return 0;
  642. break;
  643. default:
  644. filename = AR6003_REV3_PATCH_FILE;
  645. break;
  646. }
  647. if (ar->fw_patch == NULL) {
  648. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  649. &ar->fw_patch_len);
  650. if (ret) {
  651. ath6kl_err("Failed to get patch file %s: %d\n",
  652. filename, ret);
  653. return ret;
  654. }
  655. }
  656. return 0;
  657. }
  658. static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
  659. {
  660. int ret;
  661. ret = ath6kl_fetch_otp_file(ar);
  662. if (ret)
  663. return ret;
  664. ret = ath6kl_fetch_fw_file(ar);
  665. if (ret)
  666. return ret;
  667. ret = ath6kl_fetch_patch_file(ar);
  668. if (ret)
  669. return ret;
  670. return 0;
  671. }
  672. static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
  673. {
  674. size_t magic_len, len, ie_len;
  675. const struct firmware *fw;
  676. struct ath6kl_fw_ie *hdr;
  677. const char *filename;
  678. const u8 *data;
  679. int ret, ie_id, i, index, bit;
  680. __le32 *val;
  681. switch (ar->version.target_ver) {
  682. case AR6003_REV2_VERSION:
  683. filename = AR6003_REV2_FIRMWARE_2_FILE;
  684. break;
  685. case AR6003_REV3_VERSION:
  686. filename = AR6003_REV3_FIRMWARE_2_FILE;
  687. break;
  688. case AR6004_REV1_VERSION:
  689. filename = AR6004_REV1_FIRMWARE_2_FILE;
  690. break;
  691. default:
  692. return -EOPNOTSUPP;
  693. }
  694. ret = request_firmware(&fw, filename, ar->dev);
  695. if (ret)
  696. return ret;
  697. data = fw->data;
  698. len = fw->size;
  699. /* magic also includes the null byte, check that as well */
  700. magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
  701. if (len < magic_len) {
  702. ret = -EINVAL;
  703. goto out;
  704. }
  705. if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
  706. ret = -EINVAL;
  707. goto out;
  708. }
  709. len -= magic_len;
  710. data += magic_len;
  711. /* loop elements */
  712. while (len > sizeof(struct ath6kl_fw_ie)) {
  713. /* hdr is unaligned! */
  714. hdr = (struct ath6kl_fw_ie *) data;
  715. ie_id = le32_to_cpup(&hdr->id);
  716. ie_len = le32_to_cpup(&hdr->len);
  717. len -= sizeof(*hdr);
  718. data += sizeof(*hdr);
  719. if (len < ie_len) {
  720. ret = -EINVAL;
  721. goto out;
  722. }
  723. switch (ie_id) {
  724. case ATH6KL_FW_IE_OTP_IMAGE:
  725. ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
  726. ie_len);
  727. ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
  728. if (ar->fw_otp == NULL) {
  729. ret = -ENOMEM;
  730. goto out;
  731. }
  732. ar->fw_otp_len = ie_len;
  733. break;
  734. case ATH6KL_FW_IE_FW_IMAGE:
  735. ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
  736. ie_len);
  737. ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
  738. if (ar->fw == NULL) {
  739. ret = -ENOMEM;
  740. goto out;
  741. }
  742. ar->fw_len = ie_len;
  743. break;
  744. case ATH6KL_FW_IE_PATCH_IMAGE:
  745. ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
  746. ie_len);
  747. ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
  748. if (ar->fw_patch == NULL) {
  749. ret = -ENOMEM;
  750. goto out;
  751. }
  752. ar->fw_patch_len = ie_len;
  753. break;
  754. case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
  755. val = (__le32 *) data;
  756. ar->hw.reserved_ram_size = le32_to_cpup(val);
  757. ath6kl_dbg(ATH6KL_DBG_BOOT,
  758. "found reserved ram size ie 0x%d\n",
  759. ar->hw.reserved_ram_size);
  760. break;
  761. case ATH6KL_FW_IE_CAPABILITIES:
  762. ath6kl_dbg(ATH6KL_DBG_BOOT,
  763. "found firmware capabilities ie (%zd B)\n",
  764. ie_len);
  765. for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
  766. index = ALIGN(i, 8) / 8;
  767. bit = i % 8;
  768. if (data[index] & (1 << bit))
  769. __set_bit(i, ar->fw_capabilities);
  770. }
  771. ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
  772. ar->fw_capabilities,
  773. sizeof(ar->fw_capabilities));
  774. break;
  775. case ATH6KL_FW_IE_PATCH_ADDR:
  776. if (ie_len != sizeof(*val))
  777. break;
  778. val = (__le32 *) data;
  779. ar->hw.dataset_patch_addr = le32_to_cpup(val);
  780. ath6kl_dbg(ATH6KL_DBG_BOOT,
  781. "found patch address ie 0x%d\n",
  782. ar->hw.dataset_patch_addr);
  783. break;
  784. default:
  785. ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
  786. le32_to_cpup(&hdr->id));
  787. break;
  788. }
  789. len -= ie_len;
  790. data += ie_len;
  791. };
  792. ret = 0;
  793. out:
  794. release_firmware(fw);
  795. return ret;
  796. }
  797. static int ath6kl_fetch_firmwares(struct ath6kl *ar)
  798. {
  799. int ret;
  800. ret = ath6kl_fetch_board_file(ar);
  801. if (ret)
  802. return ret;
  803. ret = ath6kl_fetch_fw_api2(ar);
  804. if (ret == 0) {
  805. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
  806. return 0;
  807. }
  808. ret = ath6kl_fetch_fw_api1(ar);
  809. if (ret)
  810. return ret;
  811. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
  812. return 0;
  813. }
  814. static int ath6kl_upload_board_file(struct ath6kl *ar)
  815. {
  816. u32 board_address, board_ext_address, param;
  817. u32 board_data_size, board_ext_data_size;
  818. int ret;
  819. if (WARN_ON(ar->fw_board == NULL))
  820. return -ENOENT;
  821. /*
  822. * Determine where in Target RAM to write Board Data.
  823. * For AR6004, host determine Target RAM address for
  824. * writing board data.
  825. */
  826. if (ar->target_type == TARGET_TYPE_AR6004) {
  827. board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
  828. ath6kl_bmi_write(ar,
  829. ath6kl_get_hi_item_addr(ar,
  830. HI_ITEM(hi_board_data)),
  831. (u8 *) &board_address, 4);
  832. } else {
  833. ath6kl_bmi_read(ar,
  834. ath6kl_get_hi_item_addr(ar,
  835. HI_ITEM(hi_board_data)),
  836. (u8 *) &board_address, 4);
  837. }
  838. /* determine where in target ram to write extended board data */
  839. ath6kl_bmi_read(ar,
  840. ath6kl_get_hi_item_addr(ar,
  841. HI_ITEM(hi_board_ext_data)),
  842. (u8 *) &board_ext_address, 4);
  843. if (board_ext_address == 0) {
  844. ath6kl_err("Failed to get board file target address.\n");
  845. return -EINVAL;
  846. }
  847. switch (ar->target_type) {
  848. case TARGET_TYPE_AR6003:
  849. board_data_size = AR6003_BOARD_DATA_SZ;
  850. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  851. break;
  852. case TARGET_TYPE_AR6004:
  853. board_data_size = AR6004_BOARD_DATA_SZ;
  854. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  855. break;
  856. default:
  857. WARN_ON(1);
  858. return -EINVAL;
  859. break;
  860. }
  861. if (ar->fw_board_len == (board_data_size +
  862. board_ext_data_size)) {
  863. /* write extended board data */
  864. ath6kl_dbg(ATH6KL_DBG_BOOT,
  865. "writing extended board data to 0x%x (%d B)\n",
  866. board_ext_address, board_ext_data_size);
  867. ret = ath6kl_bmi_write(ar, board_ext_address,
  868. ar->fw_board + board_data_size,
  869. board_ext_data_size);
  870. if (ret) {
  871. ath6kl_err("Failed to write extended board data: %d\n",
  872. ret);
  873. return ret;
  874. }
  875. /* record that extended board data is initialized */
  876. param = (board_ext_data_size << 16) | 1;
  877. ath6kl_bmi_write(ar,
  878. ath6kl_get_hi_item_addr(ar,
  879. HI_ITEM(hi_board_ext_data_config)),
  880. (unsigned char *) &param, 4);
  881. }
  882. if (ar->fw_board_len < board_data_size) {
  883. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  884. ret = -EINVAL;
  885. return ret;
  886. }
  887. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
  888. board_address, board_data_size);
  889. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  890. board_data_size);
  891. if (ret) {
  892. ath6kl_err("Board file bmi write failed: %d\n", ret);
  893. return ret;
  894. }
  895. /* record the fact that Board Data IS initialized */
  896. param = 1;
  897. ath6kl_bmi_write(ar,
  898. ath6kl_get_hi_item_addr(ar,
  899. HI_ITEM(hi_board_data_initialized)),
  900. (u8 *)&param, 4);
  901. return ret;
  902. }
  903. static int ath6kl_upload_otp(struct ath6kl *ar)
  904. {
  905. u32 address, param;
  906. bool from_hw = false;
  907. int ret;
  908. if (WARN_ON(ar->fw_otp == NULL))
  909. return -ENOENT;
  910. address = ar->hw.app_load_addr;
  911. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
  912. ar->fw_otp_len);
  913. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  914. ar->fw_otp_len);
  915. if (ret) {
  916. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  917. return ret;
  918. }
  919. /* read firmware start address */
  920. ret = ath6kl_bmi_read(ar,
  921. ath6kl_get_hi_item_addr(ar,
  922. HI_ITEM(hi_app_start)),
  923. (u8 *) &address, sizeof(address));
  924. if (ret) {
  925. ath6kl_err("Failed to read hi_app_start: %d\n", ret);
  926. return ret;
  927. }
  928. if (ar->hw.app_start_override_addr == 0) {
  929. ar->hw.app_start_override_addr = address;
  930. from_hw = true;
  931. }
  932. ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
  933. from_hw ? " (from hw)" : "",
  934. ar->hw.app_start_override_addr);
  935. /* execute the OTP code */
  936. ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
  937. ar->hw.app_start_override_addr);
  938. param = 0;
  939. ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
  940. return ret;
  941. }
  942. static int ath6kl_upload_firmware(struct ath6kl *ar)
  943. {
  944. u32 address;
  945. int ret;
  946. if (WARN_ON(ar->fw == NULL))
  947. return -ENOENT;
  948. address = ar->hw.app_load_addr;
  949. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
  950. address, ar->fw_len);
  951. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  952. if (ret) {
  953. ath6kl_err("Failed to write firmware: %d\n", ret);
  954. return ret;
  955. }
  956. /*
  957. * Set starting address for firmware
  958. * Don't need to setup app_start override addr on AR6004
  959. */
  960. if (ar->target_type != TARGET_TYPE_AR6004) {
  961. address = ar->hw.app_start_override_addr;
  962. ath6kl_bmi_set_app_start(ar, address);
  963. }
  964. return ret;
  965. }
  966. static int ath6kl_upload_patch(struct ath6kl *ar)
  967. {
  968. u32 address, param;
  969. int ret;
  970. if (WARN_ON(ar->fw_patch == NULL))
  971. return -ENOENT;
  972. address = ar->hw.dataset_patch_addr;
  973. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
  974. address, ar->fw_patch_len);
  975. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  976. if (ret) {
  977. ath6kl_err("Failed to write patch file: %d\n", ret);
  978. return ret;
  979. }
  980. param = address;
  981. ath6kl_bmi_write(ar,
  982. ath6kl_get_hi_item_addr(ar,
  983. HI_ITEM(hi_dset_list_head)),
  984. (unsigned char *) &param, 4);
  985. return 0;
  986. }
  987. static int ath6kl_init_upload(struct ath6kl *ar)
  988. {
  989. u32 param, options, sleep, address;
  990. int status = 0;
  991. if (ar->target_type != TARGET_TYPE_AR6003 &&
  992. ar->target_type != TARGET_TYPE_AR6004)
  993. return -EINVAL;
  994. /* temporarily disable system sleep */
  995. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  996. status = ath6kl_bmi_reg_read(ar, address, &param);
  997. if (status)
  998. return status;
  999. options = param;
  1000. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  1001. status = ath6kl_bmi_reg_write(ar, address, param);
  1002. if (status)
  1003. return status;
  1004. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1005. status = ath6kl_bmi_reg_read(ar, address, &param);
  1006. if (status)
  1007. return status;
  1008. sleep = param;
  1009. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  1010. status = ath6kl_bmi_reg_write(ar, address, param);
  1011. if (status)
  1012. return status;
  1013. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  1014. options, sleep);
  1015. /* program analog PLL register */
  1016. /* no need to control 40/44MHz clock on AR6004 */
  1017. if (ar->target_type != TARGET_TYPE_AR6004) {
  1018. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  1019. 0xF9104001);
  1020. if (status)
  1021. return status;
  1022. /* Run at 80/88MHz by default */
  1023. param = SM(CPU_CLOCK_STANDARD, 1);
  1024. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  1025. status = ath6kl_bmi_reg_write(ar, address, param);
  1026. if (status)
  1027. return status;
  1028. }
  1029. param = 0;
  1030. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  1031. param = SM(LPO_CAL_ENABLE, 1);
  1032. status = ath6kl_bmi_reg_write(ar, address, param);
  1033. if (status)
  1034. return status;
  1035. /* WAR to avoid SDIO CRC err */
  1036. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  1037. ath6kl_err("temporary war to avoid sdio crc error\n");
  1038. param = 0x20;
  1039. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  1040. status = ath6kl_bmi_reg_write(ar, address, param);
  1041. if (status)
  1042. return status;
  1043. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  1044. status = ath6kl_bmi_reg_write(ar, address, param);
  1045. if (status)
  1046. return status;
  1047. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  1048. status = ath6kl_bmi_reg_write(ar, address, param);
  1049. if (status)
  1050. return status;
  1051. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  1052. status = ath6kl_bmi_reg_write(ar, address, param);
  1053. if (status)
  1054. return status;
  1055. }
  1056. /* write EEPROM data to Target RAM */
  1057. status = ath6kl_upload_board_file(ar);
  1058. if (status)
  1059. return status;
  1060. /* transfer One time Programmable data */
  1061. status = ath6kl_upload_otp(ar);
  1062. if (status)
  1063. return status;
  1064. /* Download Target firmware */
  1065. status = ath6kl_upload_firmware(ar);
  1066. if (status)
  1067. return status;
  1068. status = ath6kl_upload_patch(ar);
  1069. if (status)
  1070. return status;
  1071. /* Restore system sleep */
  1072. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1073. status = ath6kl_bmi_reg_write(ar, address, sleep);
  1074. if (status)
  1075. return status;
  1076. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1077. param = options | 0x20;
  1078. status = ath6kl_bmi_reg_write(ar, address, param);
  1079. if (status)
  1080. return status;
  1081. /* Configure GPIO AR6003 UART */
  1082. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  1083. status = ath6kl_bmi_write(ar,
  1084. ath6kl_get_hi_item_addr(ar,
  1085. HI_ITEM(hi_dbg_uart_txpin)),
  1086. (u8 *)&param, 4);
  1087. return status;
  1088. }
  1089. static int ath6kl_init_hw_params(struct ath6kl *ar)
  1090. {
  1091. switch (ar->version.target_ver) {
  1092. case AR6003_REV2_VERSION:
  1093. ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
  1094. ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS;
  1095. ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
  1096. ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE;
  1097. /* hw2.0 needs override address hardcoded */
  1098. ar->hw.app_start_override_addr = 0x944C00;
  1099. break;
  1100. case AR6003_REV3_VERSION:
  1101. ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS;
  1102. ar->hw.app_load_addr = 0x1234;
  1103. ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
  1104. ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE;
  1105. break;
  1106. case AR6004_REV1_VERSION:
  1107. ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
  1108. ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS;
  1109. ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
  1110. ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE;
  1111. break;
  1112. default:
  1113. ath6kl_err("Unsupported hardware version: 0x%x\n",
  1114. ar->version.target_ver);
  1115. return -EINVAL;
  1116. }
  1117. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1118. "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
  1119. ar->version.target_ver, ar->target_type,
  1120. ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
  1121. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1122. "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
  1123. ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
  1124. ar->hw.reserved_ram_size);
  1125. return 0;
  1126. }
  1127. static int ath6kl_init(struct ath6kl *ar)
  1128. {
  1129. int status = 0;
  1130. s32 timeleft;
  1131. struct net_device *ndev;
  1132. if (!ar)
  1133. return -EIO;
  1134. /* Do we need to finish the BMI phase */
  1135. if (ath6kl_bmi_done(ar)) {
  1136. status = -EIO;
  1137. goto ath6kl_init_done;
  1138. }
  1139. /* Indicate that WMI is enabled (although not ready yet) */
  1140. set_bit(WMI_ENABLED, &ar->flag);
  1141. ar->wmi = ath6kl_wmi_init(ar);
  1142. if (!ar->wmi) {
  1143. ath6kl_err("failed to initialize wmi\n");
  1144. status = -EIO;
  1145. goto ath6kl_init_done;
  1146. }
  1147. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  1148. status = ath6kl_register_ieee80211_hw(ar);
  1149. if (status)
  1150. goto err_node_cleanup;
  1151. status = ath6kl_debug_init(ar);
  1152. if (status) {
  1153. wiphy_unregister(ar->wiphy);
  1154. goto err_node_cleanup;
  1155. }
  1156. /* Add an initial station interface */
  1157. ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION);
  1158. if (!ndev) {
  1159. ath6kl_err("Failed to instantiate a network device\n");
  1160. status = -ENOMEM;
  1161. wiphy_unregister(ar->wiphy);
  1162. goto err_debug_init;
  1163. }
  1164. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1165. __func__, ar->net_dev->name, ar->net_dev, ar);
  1166. /*
  1167. * The reason we have to wait for the target here is that the
  1168. * driver layer has to init BMI in order to set the host block
  1169. * size.
  1170. */
  1171. if (ath6kl_htc_wait_target(ar->htc_target)) {
  1172. status = -EIO;
  1173. goto err_if_deinit;
  1174. }
  1175. if (ath6kl_init_service_ep(ar)) {
  1176. status = -EIO;
  1177. goto err_cleanup_scatter;
  1178. }
  1179. /* setup access class priority mappings */
  1180. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  1181. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  1182. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  1183. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  1184. /* give our connected endpoints some buffers */
  1185. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  1186. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  1187. /* allocate some buffers that handle larger AMSDU frames */
  1188. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  1189. /* setup credit distribution */
  1190. ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info);
  1191. ath6kl_cookie_init(ar);
  1192. /* start HTC */
  1193. status = ath6kl_htc_start(ar->htc_target);
  1194. if (status) {
  1195. ath6kl_cookie_cleanup(ar);
  1196. goto err_rxbuf_cleanup;
  1197. }
  1198. /* Wait for Wmi event to be ready */
  1199. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  1200. test_bit(WMI_READY,
  1201. &ar->flag),
  1202. WMI_TIMEOUT);
  1203. ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
  1204. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1205. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1206. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1207. status = -EIO;
  1208. goto err_htc_stop;
  1209. }
  1210. if (!timeleft || signal_pending(current)) {
  1211. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1212. status = -EIO;
  1213. goto err_htc_stop;
  1214. }
  1215. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1216. /* communicate the wmi protocol verision to the target */
  1217. if ((ath6kl_set_host_app_area(ar)) != 0)
  1218. ath6kl_err("unable to set the host app area\n");
  1219. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1220. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1221. ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
  1222. WIPHY_FLAG_HAVE_AP_SME;
  1223. status = ath6kl_target_config_wlan_params(ar);
  1224. if (!status)
  1225. goto ath6kl_init_done;
  1226. err_htc_stop:
  1227. ath6kl_htc_stop(ar->htc_target);
  1228. err_rxbuf_cleanup:
  1229. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1230. ath6kl_cleanup_amsdu_rxbufs(ar);
  1231. err_cleanup_scatter:
  1232. ath6kl_hif_cleanup_scatter(ar);
  1233. err_if_deinit:
  1234. ath6kl_deinit_if_data(netdev_priv(ndev));
  1235. wiphy_unregister(ar->wiphy);
  1236. err_debug_init:
  1237. ath6kl_debug_cleanup(ar);
  1238. err_node_cleanup:
  1239. ath6kl_wmi_shutdown(ar->wmi);
  1240. clear_bit(WMI_ENABLED, &ar->flag);
  1241. ar->wmi = NULL;
  1242. ath6kl_init_done:
  1243. return status;
  1244. }
  1245. int ath6kl_core_init(struct ath6kl *ar)
  1246. {
  1247. int ret = 0;
  1248. struct ath6kl_bmi_target_info targ_info;
  1249. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1250. if (!ar->ath6kl_wq)
  1251. return -ENOMEM;
  1252. ret = ath6kl_bmi_init(ar);
  1253. if (ret)
  1254. goto err_wq;
  1255. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1256. if (ret)
  1257. goto err_bmi_cleanup;
  1258. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1259. ar->target_type = le32_to_cpu(targ_info.type);
  1260. ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1261. ret = ath6kl_init_hw_params(ar);
  1262. if (ret)
  1263. goto err_bmi_cleanup;
  1264. ret = ath6kl_configure_target(ar);
  1265. if (ret)
  1266. goto err_bmi_cleanup;
  1267. ar->htc_target = ath6kl_htc_create(ar);
  1268. if (!ar->htc_target) {
  1269. ret = -ENOMEM;
  1270. goto err_bmi_cleanup;
  1271. }
  1272. ret = ath6kl_fetch_firmwares(ar);
  1273. if (ret)
  1274. goto err_htc_cleanup;
  1275. ret = ath6kl_init_upload(ar);
  1276. if (ret)
  1277. goto err_htc_cleanup;
  1278. ret = ath6kl_init(ar);
  1279. if (ret)
  1280. goto err_htc_cleanup;
  1281. return ret;
  1282. err_htc_cleanup:
  1283. ath6kl_htc_cleanup(ar->htc_target);
  1284. err_bmi_cleanup:
  1285. ath6kl_bmi_cleanup(ar);
  1286. err_wq:
  1287. destroy_workqueue(ar->ath6kl_wq);
  1288. return ret;
  1289. }
  1290. void ath6kl_stop_txrx(struct ath6kl *ar)
  1291. {
  1292. struct net_device *ndev = ar->net_dev;
  1293. struct ath6kl_vif *vif = ar->vif;
  1294. if (!ndev)
  1295. return;
  1296. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1297. if (down_interruptible(&ar->sem)) {
  1298. ath6kl_err("down_interruptible failed\n");
  1299. return;
  1300. }
  1301. if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR)
  1302. ath6kl_stop_endpoint(ndev, false, true);
  1303. clear_bit(WLAN_ENABLED, &vif->flags);
  1304. }
  1305. /*
  1306. * We need to differentiate between the surprise and planned removal of the
  1307. * device because of the following consideration:
  1308. *
  1309. * - In case of surprise removal, the hcd already frees up the pending
  1310. * for the device and hence there is no need to unregister the function
  1311. * driver inorder to get these requests. For planned removal, the function
  1312. * driver has to explicitly unregister itself to have the hcd return all the
  1313. * pending requests before the data structures for the devices are freed up.
  1314. * Note that as per the current implementation, the function driver will
  1315. * end up releasing all the devices since there is no API to selectively
  1316. * release a particular device.
  1317. *
  1318. * - Certain commands issued to the target can be skipped for surprise
  1319. * removal since they will anyway not go through.
  1320. */
  1321. void ath6kl_destroy(struct net_device *dev, unsigned int unregister)
  1322. {
  1323. struct ath6kl *ar;
  1324. if (!dev || !ath6kl_priv(dev)) {
  1325. ath6kl_err("failed to get device structure\n");
  1326. return;
  1327. }
  1328. ar = ath6kl_priv(dev);
  1329. destroy_workqueue(ar->ath6kl_wq);
  1330. if (ar->htc_target)
  1331. ath6kl_htc_cleanup(ar->htc_target);
  1332. ath6kl_cookie_cleanup(ar);
  1333. ath6kl_cleanup_amsdu_rxbufs(ar);
  1334. ath6kl_bmi_cleanup(ar);
  1335. ath6kl_debug_cleanup(ar);
  1336. ath6kl_deinit_if_data(netdev_priv(dev));
  1337. kfree(ar->fw_board);
  1338. kfree(ar->fw_otp);
  1339. kfree(ar->fw);
  1340. kfree(ar->fw_patch);
  1341. ath6kl_deinit_ieee80211_hw(ar);
  1342. }