hpsa.c 124 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/compat.h>
  34. #include <linux/blktrace_api.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/io.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/completion.h>
  39. #include <linux/moduleparam.h>
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_tcq.h>
  45. #include <linux/cciss_ioctl.h>
  46. #include <linux/string.h>
  47. #include <linux/bitmap.h>
  48. #include <linux/atomic.h>
  49. #include <linux/kthread.h>
  50. #include "hpsa_cmd.h"
  51. #include "hpsa.h"
  52. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  53. #define HPSA_DRIVER_VERSION "2.0.2-1"
  54. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  55. /* How long to wait (in milliseconds) for board to go into simple mode */
  56. #define MAX_CONFIG_WAIT 30000
  57. #define MAX_IOCTL_CONFIG_WAIT 1000
  58. /*define how many times we will try a command because of bus resets */
  59. #define MAX_CMD_RETRIES 3
  60. /* Embedded module documentation macros - see modules.h */
  61. MODULE_AUTHOR("Hewlett-Packard Company");
  62. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  63. HPSA_DRIVER_VERSION);
  64. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  65. MODULE_VERSION(HPSA_DRIVER_VERSION);
  66. MODULE_LICENSE("GPL");
  67. static int hpsa_allow_any;
  68. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  69. MODULE_PARM_DESC(hpsa_allow_any,
  70. "Allow hpsa driver to access unknown HP Smart Array hardware");
  71. static int hpsa_simple_mode;
  72. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  73. MODULE_PARM_DESC(hpsa_simple_mode,
  74. "Use 'simple mode' rather than 'performant mode'");
  75. /* define the PCI info for the cards we can control */
  76. static const struct pci_device_id hpsa_pci_device_id[] = {
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  92. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  93. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  94. {0,}
  95. };
  96. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  97. /* board_id = Subsystem Device ID & Vendor ID
  98. * product = Marketing Name for the board
  99. * access = Address of the struct of function pointers
  100. */
  101. static struct board_type products[] = {
  102. {0x3241103C, "Smart Array P212", &SA5_access},
  103. {0x3243103C, "Smart Array P410", &SA5_access},
  104. {0x3245103C, "Smart Array P410i", &SA5_access},
  105. {0x3247103C, "Smart Array P411", &SA5_access},
  106. {0x3249103C, "Smart Array P812", &SA5_access},
  107. {0x324a103C, "Smart Array P712m", &SA5_access},
  108. {0x324b103C, "Smart Array P711m", &SA5_access},
  109. {0x3350103C, "Smart Array", &SA5_access},
  110. {0x3351103C, "Smart Array", &SA5_access},
  111. {0x3352103C, "Smart Array", &SA5_access},
  112. {0x3353103C, "Smart Array", &SA5_access},
  113. {0x3354103C, "Smart Array", &SA5_access},
  114. {0x3355103C, "Smart Array", &SA5_access},
  115. {0x3356103C, "Smart Array", &SA5_access},
  116. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  117. };
  118. static int number_of_controllers;
  119. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  120. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  121. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  122. static void start_io(struct ctlr_info *h);
  123. #ifdef CONFIG_COMPAT
  124. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  125. #endif
  126. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  127. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  128. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  129. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  130. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  131. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  132. int cmd_type);
  133. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  134. static void hpsa_scan_start(struct Scsi_Host *);
  135. static int hpsa_scan_finished(struct Scsi_Host *sh,
  136. unsigned long elapsed_time);
  137. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  138. int qdepth, int reason);
  139. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  140. static int hpsa_slave_alloc(struct scsi_device *sdev);
  141. static void hpsa_slave_destroy(struct scsi_device *sdev);
  142. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  143. static int check_for_unit_attention(struct ctlr_info *h,
  144. struct CommandList *c);
  145. static void check_ioctl_unit_attention(struct ctlr_info *h,
  146. struct CommandList *c);
  147. /* performant mode helper functions */
  148. static void calc_bucket_map(int *bucket, int num_buckets,
  149. int nsgs, int *bucket_map);
  150. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  151. static inline u32 next_command(struct ctlr_info *h);
  152. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  153. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  154. u64 *cfg_offset);
  155. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  156. unsigned long *memory_bar);
  157. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  158. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  159. void __iomem *vaddr, int wait_for_ready);
  160. #define BOARD_NOT_READY 0
  161. #define BOARD_READY 1
  162. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  163. {
  164. unsigned long *priv = shost_priv(sdev->host);
  165. return (struct ctlr_info *) *priv;
  166. }
  167. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  168. {
  169. unsigned long *priv = shost_priv(sh);
  170. return (struct ctlr_info *) *priv;
  171. }
  172. static int check_for_unit_attention(struct ctlr_info *h,
  173. struct CommandList *c)
  174. {
  175. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  176. return 0;
  177. switch (c->err_info->SenseInfo[12]) {
  178. case STATE_CHANGED:
  179. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  180. "detected, command retried\n", h->ctlr);
  181. break;
  182. case LUN_FAILED:
  183. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  184. "detected, action required\n", h->ctlr);
  185. break;
  186. case REPORT_LUNS_CHANGED:
  187. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  188. "changed, action required\n", h->ctlr);
  189. /*
  190. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  191. */
  192. break;
  193. case POWER_OR_RESET:
  194. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  195. "or device reset detected\n", h->ctlr);
  196. break;
  197. case UNIT_ATTENTION_CLEARED:
  198. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  199. "cleared by another initiator\n", h->ctlr);
  200. break;
  201. default:
  202. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  203. "unit attention detected\n", h->ctlr);
  204. break;
  205. }
  206. return 1;
  207. }
  208. static ssize_t host_store_rescan(struct device *dev,
  209. struct device_attribute *attr,
  210. const char *buf, size_t count)
  211. {
  212. struct ctlr_info *h;
  213. struct Scsi_Host *shost = class_to_shost(dev);
  214. h = shost_to_hba(shost);
  215. hpsa_scan_start(h->scsi_host);
  216. return count;
  217. }
  218. static ssize_t host_show_firmware_revision(struct device *dev,
  219. struct device_attribute *attr, char *buf)
  220. {
  221. struct ctlr_info *h;
  222. struct Scsi_Host *shost = class_to_shost(dev);
  223. unsigned char *fwrev;
  224. h = shost_to_hba(shost);
  225. if (!h->hba_inquiry_data)
  226. return 0;
  227. fwrev = &h->hba_inquiry_data[32];
  228. return snprintf(buf, 20, "%c%c%c%c\n",
  229. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  230. }
  231. static ssize_t host_show_commands_outstanding(struct device *dev,
  232. struct device_attribute *attr, char *buf)
  233. {
  234. struct Scsi_Host *shost = class_to_shost(dev);
  235. struct ctlr_info *h = shost_to_hba(shost);
  236. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  237. }
  238. static ssize_t host_show_transport_mode(struct device *dev,
  239. struct device_attribute *attr, char *buf)
  240. {
  241. struct ctlr_info *h;
  242. struct Scsi_Host *shost = class_to_shost(dev);
  243. h = shost_to_hba(shost);
  244. return snprintf(buf, 20, "%s\n",
  245. h->transMethod & CFGTBL_Trans_Performant ?
  246. "performant" : "simple");
  247. }
  248. /* List of controllers which cannot be hard reset on kexec with reset_devices */
  249. static u32 unresettable_controller[] = {
  250. 0x324a103C, /* Smart Array P712m */
  251. 0x324b103C, /* SmartArray P711m */
  252. 0x3223103C, /* Smart Array P800 */
  253. 0x3234103C, /* Smart Array P400 */
  254. 0x3235103C, /* Smart Array P400i */
  255. 0x3211103C, /* Smart Array E200i */
  256. 0x3212103C, /* Smart Array E200 */
  257. 0x3213103C, /* Smart Array E200i */
  258. 0x3214103C, /* Smart Array E200i */
  259. 0x3215103C, /* Smart Array E200i */
  260. 0x3237103C, /* Smart Array E500 */
  261. 0x323D103C, /* Smart Array P700m */
  262. 0x409C0E11, /* Smart Array 6400 */
  263. 0x409D0E11, /* Smart Array 6400 EM */
  264. };
  265. /* List of controllers which cannot even be soft reset */
  266. static u32 soft_unresettable_controller[] = {
  267. /* Exclude 640x boards. These are two pci devices in one slot
  268. * which share a battery backed cache module. One controls the
  269. * cache, the other accesses the cache through the one that controls
  270. * it. If we reset the one controlling the cache, the other will
  271. * likely not be happy. Just forbid resetting this conjoined mess.
  272. * The 640x isn't really supported by hpsa anyway.
  273. */
  274. 0x409C0E11, /* Smart Array 6400 */
  275. 0x409D0E11, /* Smart Array 6400 EM */
  276. };
  277. static int ctlr_is_hard_resettable(u32 board_id)
  278. {
  279. int i;
  280. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  281. if (unresettable_controller[i] == board_id)
  282. return 0;
  283. return 1;
  284. }
  285. static int ctlr_is_soft_resettable(u32 board_id)
  286. {
  287. int i;
  288. for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
  289. if (soft_unresettable_controller[i] == board_id)
  290. return 0;
  291. return 1;
  292. }
  293. static int ctlr_is_resettable(u32 board_id)
  294. {
  295. return ctlr_is_hard_resettable(board_id) ||
  296. ctlr_is_soft_resettable(board_id);
  297. }
  298. static ssize_t host_show_resettable(struct device *dev,
  299. struct device_attribute *attr, char *buf)
  300. {
  301. struct ctlr_info *h;
  302. struct Scsi_Host *shost = class_to_shost(dev);
  303. h = shost_to_hba(shost);
  304. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
  305. }
  306. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  307. {
  308. return (scsi3addr[3] & 0xC0) == 0x40;
  309. }
  310. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  311. "UNKNOWN"
  312. };
  313. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  314. static ssize_t raid_level_show(struct device *dev,
  315. struct device_attribute *attr, char *buf)
  316. {
  317. ssize_t l = 0;
  318. unsigned char rlevel;
  319. struct ctlr_info *h;
  320. struct scsi_device *sdev;
  321. struct hpsa_scsi_dev_t *hdev;
  322. unsigned long flags;
  323. sdev = to_scsi_device(dev);
  324. h = sdev_to_hba(sdev);
  325. spin_lock_irqsave(&h->lock, flags);
  326. hdev = sdev->hostdata;
  327. if (!hdev) {
  328. spin_unlock_irqrestore(&h->lock, flags);
  329. return -ENODEV;
  330. }
  331. /* Is this even a logical drive? */
  332. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  333. spin_unlock_irqrestore(&h->lock, flags);
  334. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  335. return l;
  336. }
  337. rlevel = hdev->raid_level;
  338. spin_unlock_irqrestore(&h->lock, flags);
  339. if (rlevel > RAID_UNKNOWN)
  340. rlevel = RAID_UNKNOWN;
  341. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  342. return l;
  343. }
  344. static ssize_t lunid_show(struct device *dev,
  345. struct device_attribute *attr, char *buf)
  346. {
  347. struct ctlr_info *h;
  348. struct scsi_device *sdev;
  349. struct hpsa_scsi_dev_t *hdev;
  350. unsigned long flags;
  351. unsigned char lunid[8];
  352. sdev = to_scsi_device(dev);
  353. h = sdev_to_hba(sdev);
  354. spin_lock_irqsave(&h->lock, flags);
  355. hdev = sdev->hostdata;
  356. if (!hdev) {
  357. spin_unlock_irqrestore(&h->lock, flags);
  358. return -ENODEV;
  359. }
  360. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  361. spin_unlock_irqrestore(&h->lock, flags);
  362. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  363. lunid[0], lunid[1], lunid[2], lunid[3],
  364. lunid[4], lunid[5], lunid[6], lunid[7]);
  365. }
  366. static ssize_t unique_id_show(struct device *dev,
  367. struct device_attribute *attr, char *buf)
  368. {
  369. struct ctlr_info *h;
  370. struct scsi_device *sdev;
  371. struct hpsa_scsi_dev_t *hdev;
  372. unsigned long flags;
  373. unsigned char sn[16];
  374. sdev = to_scsi_device(dev);
  375. h = sdev_to_hba(sdev);
  376. spin_lock_irqsave(&h->lock, flags);
  377. hdev = sdev->hostdata;
  378. if (!hdev) {
  379. spin_unlock_irqrestore(&h->lock, flags);
  380. return -ENODEV;
  381. }
  382. memcpy(sn, hdev->device_id, sizeof(sn));
  383. spin_unlock_irqrestore(&h->lock, flags);
  384. return snprintf(buf, 16 * 2 + 2,
  385. "%02X%02X%02X%02X%02X%02X%02X%02X"
  386. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  387. sn[0], sn[1], sn[2], sn[3],
  388. sn[4], sn[5], sn[6], sn[7],
  389. sn[8], sn[9], sn[10], sn[11],
  390. sn[12], sn[13], sn[14], sn[15]);
  391. }
  392. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  393. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  394. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  395. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  396. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  397. host_show_firmware_revision, NULL);
  398. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  399. host_show_commands_outstanding, NULL);
  400. static DEVICE_ATTR(transport_mode, S_IRUGO,
  401. host_show_transport_mode, NULL);
  402. static DEVICE_ATTR(resettable, S_IRUGO,
  403. host_show_resettable, NULL);
  404. static struct device_attribute *hpsa_sdev_attrs[] = {
  405. &dev_attr_raid_level,
  406. &dev_attr_lunid,
  407. &dev_attr_unique_id,
  408. NULL,
  409. };
  410. static struct device_attribute *hpsa_shost_attrs[] = {
  411. &dev_attr_rescan,
  412. &dev_attr_firmware_revision,
  413. &dev_attr_commands_outstanding,
  414. &dev_attr_transport_mode,
  415. &dev_attr_resettable,
  416. NULL,
  417. };
  418. static struct scsi_host_template hpsa_driver_template = {
  419. .module = THIS_MODULE,
  420. .name = "hpsa",
  421. .proc_name = "hpsa",
  422. .queuecommand = hpsa_scsi_queue_command,
  423. .scan_start = hpsa_scan_start,
  424. .scan_finished = hpsa_scan_finished,
  425. .change_queue_depth = hpsa_change_queue_depth,
  426. .this_id = -1,
  427. .use_clustering = ENABLE_CLUSTERING,
  428. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  429. .ioctl = hpsa_ioctl,
  430. .slave_alloc = hpsa_slave_alloc,
  431. .slave_destroy = hpsa_slave_destroy,
  432. #ifdef CONFIG_COMPAT
  433. .compat_ioctl = hpsa_compat_ioctl,
  434. #endif
  435. .sdev_attrs = hpsa_sdev_attrs,
  436. .shost_attrs = hpsa_shost_attrs,
  437. };
  438. /* Enqueuing and dequeuing functions for cmdlists. */
  439. static inline void addQ(struct list_head *list, struct CommandList *c)
  440. {
  441. list_add_tail(&c->list, list);
  442. }
  443. static inline u32 next_command(struct ctlr_info *h)
  444. {
  445. u32 a;
  446. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  447. return h->access.command_completed(h);
  448. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  449. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  450. (h->reply_pool_head)++;
  451. h->commands_outstanding--;
  452. } else {
  453. a = FIFO_EMPTY;
  454. }
  455. /* Check for wraparound */
  456. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  457. h->reply_pool_head = h->reply_pool;
  458. h->reply_pool_wraparound ^= 1;
  459. }
  460. return a;
  461. }
  462. /* set_performant_mode: Modify the tag for cciss performant
  463. * set bit 0 for pull model, bits 3-1 for block fetch
  464. * register number
  465. */
  466. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  467. {
  468. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  469. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  470. }
  471. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  472. struct CommandList *c)
  473. {
  474. unsigned long flags;
  475. set_performant_mode(h, c);
  476. spin_lock_irqsave(&h->lock, flags);
  477. addQ(&h->reqQ, c);
  478. h->Qdepth++;
  479. start_io(h);
  480. spin_unlock_irqrestore(&h->lock, flags);
  481. }
  482. static inline void removeQ(struct CommandList *c)
  483. {
  484. if (WARN_ON(list_empty(&c->list)))
  485. return;
  486. list_del_init(&c->list);
  487. }
  488. static inline int is_hba_lunid(unsigned char scsi3addr[])
  489. {
  490. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  491. }
  492. static inline int is_scsi_rev_5(struct ctlr_info *h)
  493. {
  494. if (!h->hba_inquiry_data)
  495. return 0;
  496. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  497. return 1;
  498. return 0;
  499. }
  500. static int hpsa_find_target_lun(struct ctlr_info *h,
  501. unsigned char scsi3addr[], int bus, int *target, int *lun)
  502. {
  503. /* finds an unused bus, target, lun for a new physical device
  504. * assumes h->devlock is held
  505. */
  506. int i, found = 0;
  507. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  508. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  509. for (i = 0; i < h->ndevices; i++) {
  510. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  511. set_bit(h->dev[i]->target, lun_taken);
  512. }
  513. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  514. if (!test_bit(i, lun_taken)) {
  515. /* *bus = 1; */
  516. *target = i;
  517. *lun = 0;
  518. found = 1;
  519. break;
  520. }
  521. }
  522. return !found;
  523. }
  524. /* Add an entry into h->dev[] array. */
  525. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  526. struct hpsa_scsi_dev_t *device,
  527. struct hpsa_scsi_dev_t *added[], int *nadded)
  528. {
  529. /* assumes h->devlock is held */
  530. int n = h->ndevices;
  531. int i;
  532. unsigned char addr1[8], addr2[8];
  533. struct hpsa_scsi_dev_t *sd;
  534. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  535. dev_err(&h->pdev->dev, "too many devices, some will be "
  536. "inaccessible.\n");
  537. return -1;
  538. }
  539. /* physical devices do not have lun or target assigned until now. */
  540. if (device->lun != -1)
  541. /* Logical device, lun is already assigned. */
  542. goto lun_assigned;
  543. /* If this device a non-zero lun of a multi-lun device
  544. * byte 4 of the 8-byte LUN addr will contain the logical
  545. * unit no, zero otherise.
  546. */
  547. if (device->scsi3addr[4] == 0) {
  548. /* This is not a non-zero lun of a multi-lun device */
  549. if (hpsa_find_target_lun(h, device->scsi3addr,
  550. device->bus, &device->target, &device->lun) != 0)
  551. return -1;
  552. goto lun_assigned;
  553. }
  554. /* This is a non-zero lun of a multi-lun device.
  555. * Search through our list and find the device which
  556. * has the same 8 byte LUN address, excepting byte 4.
  557. * Assign the same bus and target for this new LUN.
  558. * Use the logical unit number from the firmware.
  559. */
  560. memcpy(addr1, device->scsi3addr, 8);
  561. addr1[4] = 0;
  562. for (i = 0; i < n; i++) {
  563. sd = h->dev[i];
  564. memcpy(addr2, sd->scsi3addr, 8);
  565. addr2[4] = 0;
  566. /* differ only in byte 4? */
  567. if (memcmp(addr1, addr2, 8) == 0) {
  568. device->bus = sd->bus;
  569. device->target = sd->target;
  570. device->lun = device->scsi3addr[4];
  571. break;
  572. }
  573. }
  574. if (device->lun == -1) {
  575. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  576. " suspect firmware bug or unsupported hardware "
  577. "configuration.\n");
  578. return -1;
  579. }
  580. lun_assigned:
  581. h->dev[n] = device;
  582. h->ndevices++;
  583. added[*nadded] = device;
  584. (*nadded)++;
  585. /* initially, (before registering with scsi layer) we don't
  586. * know our hostno and we don't want to print anything first
  587. * time anyway (the scsi layer's inquiries will show that info)
  588. */
  589. /* if (hostno != -1) */
  590. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  591. scsi_device_type(device->devtype), hostno,
  592. device->bus, device->target, device->lun);
  593. return 0;
  594. }
  595. /* Replace an entry from h->dev[] array. */
  596. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  597. int entry, struct hpsa_scsi_dev_t *new_entry,
  598. struct hpsa_scsi_dev_t *added[], int *nadded,
  599. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  600. {
  601. /* assumes h->devlock is held */
  602. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  603. removed[*nremoved] = h->dev[entry];
  604. (*nremoved)++;
  605. /*
  606. * New physical devices won't have target/lun assigned yet
  607. * so we need to preserve the values in the slot we are replacing.
  608. */
  609. if (new_entry->target == -1) {
  610. new_entry->target = h->dev[entry]->target;
  611. new_entry->lun = h->dev[entry]->lun;
  612. }
  613. h->dev[entry] = new_entry;
  614. added[*nadded] = new_entry;
  615. (*nadded)++;
  616. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  617. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  618. new_entry->target, new_entry->lun);
  619. }
  620. /* Remove an entry from h->dev[] array. */
  621. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  622. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  623. {
  624. /* assumes h->devlock is held */
  625. int i;
  626. struct hpsa_scsi_dev_t *sd;
  627. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  628. sd = h->dev[entry];
  629. removed[*nremoved] = h->dev[entry];
  630. (*nremoved)++;
  631. for (i = entry; i < h->ndevices-1; i++)
  632. h->dev[i] = h->dev[i+1];
  633. h->ndevices--;
  634. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  635. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  636. sd->lun);
  637. }
  638. #define SCSI3ADDR_EQ(a, b) ( \
  639. (a)[7] == (b)[7] && \
  640. (a)[6] == (b)[6] && \
  641. (a)[5] == (b)[5] && \
  642. (a)[4] == (b)[4] && \
  643. (a)[3] == (b)[3] && \
  644. (a)[2] == (b)[2] && \
  645. (a)[1] == (b)[1] && \
  646. (a)[0] == (b)[0])
  647. static void fixup_botched_add(struct ctlr_info *h,
  648. struct hpsa_scsi_dev_t *added)
  649. {
  650. /* called when scsi_add_device fails in order to re-adjust
  651. * h->dev[] to match the mid layer's view.
  652. */
  653. unsigned long flags;
  654. int i, j;
  655. spin_lock_irqsave(&h->lock, flags);
  656. for (i = 0; i < h->ndevices; i++) {
  657. if (h->dev[i] == added) {
  658. for (j = i; j < h->ndevices-1; j++)
  659. h->dev[j] = h->dev[j+1];
  660. h->ndevices--;
  661. break;
  662. }
  663. }
  664. spin_unlock_irqrestore(&h->lock, flags);
  665. kfree(added);
  666. }
  667. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  668. struct hpsa_scsi_dev_t *dev2)
  669. {
  670. /* we compare everything except lun and target as these
  671. * are not yet assigned. Compare parts likely
  672. * to differ first
  673. */
  674. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  675. sizeof(dev1->scsi3addr)) != 0)
  676. return 0;
  677. if (memcmp(dev1->device_id, dev2->device_id,
  678. sizeof(dev1->device_id)) != 0)
  679. return 0;
  680. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  681. return 0;
  682. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  683. return 0;
  684. if (dev1->devtype != dev2->devtype)
  685. return 0;
  686. if (dev1->bus != dev2->bus)
  687. return 0;
  688. return 1;
  689. }
  690. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  691. * and return needle location in *index. If scsi3addr matches, but not
  692. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  693. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  694. */
  695. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  696. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  697. int *index)
  698. {
  699. int i;
  700. #define DEVICE_NOT_FOUND 0
  701. #define DEVICE_CHANGED 1
  702. #define DEVICE_SAME 2
  703. for (i = 0; i < haystack_size; i++) {
  704. if (haystack[i] == NULL) /* previously removed. */
  705. continue;
  706. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  707. *index = i;
  708. if (device_is_the_same(needle, haystack[i]))
  709. return DEVICE_SAME;
  710. else
  711. return DEVICE_CHANGED;
  712. }
  713. }
  714. *index = -1;
  715. return DEVICE_NOT_FOUND;
  716. }
  717. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  718. struct hpsa_scsi_dev_t *sd[], int nsds)
  719. {
  720. /* sd contains scsi3 addresses and devtypes, and inquiry
  721. * data. This function takes what's in sd to be the current
  722. * reality and updates h->dev[] to reflect that reality.
  723. */
  724. int i, entry, device_change, changes = 0;
  725. struct hpsa_scsi_dev_t *csd;
  726. unsigned long flags;
  727. struct hpsa_scsi_dev_t **added, **removed;
  728. int nadded, nremoved;
  729. struct Scsi_Host *sh = NULL;
  730. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  731. GFP_KERNEL);
  732. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  733. GFP_KERNEL);
  734. if (!added || !removed) {
  735. dev_warn(&h->pdev->dev, "out of memory in "
  736. "adjust_hpsa_scsi_table\n");
  737. goto free_and_out;
  738. }
  739. spin_lock_irqsave(&h->devlock, flags);
  740. /* find any devices in h->dev[] that are not in
  741. * sd[] and remove them from h->dev[], and for any
  742. * devices which have changed, remove the old device
  743. * info and add the new device info.
  744. */
  745. i = 0;
  746. nremoved = 0;
  747. nadded = 0;
  748. while (i < h->ndevices) {
  749. csd = h->dev[i];
  750. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  751. if (device_change == DEVICE_NOT_FOUND) {
  752. changes++;
  753. hpsa_scsi_remove_entry(h, hostno, i,
  754. removed, &nremoved);
  755. continue; /* remove ^^^, hence i not incremented */
  756. } else if (device_change == DEVICE_CHANGED) {
  757. changes++;
  758. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  759. added, &nadded, removed, &nremoved);
  760. /* Set it to NULL to prevent it from being freed
  761. * at the bottom of hpsa_update_scsi_devices()
  762. */
  763. sd[entry] = NULL;
  764. }
  765. i++;
  766. }
  767. /* Now, make sure every device listed in sd[] is also
  768. * listed in h->dev[], adding them if they aren't found
  769. */
  770. for (i = 0; i < nsds; i++) {
  771. if (!sd[i]) /* if already added above. */
  772. continue;
  773. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  774. h->ndevices, &entry);
  775. if (device_change == DEVICE_NOT_FOUND) {
  776. changes++;
  777. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  778. added, &nadded) != 0)
  779. break;
  780. sd[i] = NULL; /* prevent from being freed later. */
  781. } else if (device_change == DEVICE_CHANGED) {
  782. /* should never happen... */
  783. changes++;
  784. dev_warn(&h->pdev->dev,
  785. "device unexpectedly changed.\n");
  786. /* but if it does happen, we just ignore that device */
  787. }
  788. }
  789. spin_unlock_irqrestore(&h->devlock, flags);
  790. /* Don't notify scsi mid layer of any changes the first time through
  791. * (or if there are no changes) scsi_scan_host will do it later the
  792. * first time through.
  793. */
  794. if (hostno == -1 || !changes)
  795. goto free_and_out;
  796. sh = h->scsi_host;
  797. /* Notify scsi mid layer of any removed devices */
  798. for (i = 0; i < nremoved; i++) {
  799. struct scsi_device *sdev =
  800. scsi_device_lookup(sh, removed[i]->bus,
  801. removed[i]->target, removed[i]->lun);
  802. if (sdev != NULL) {
  803. scsi_remove_device(sdev);
  804. scsi_device_put(sdev);
  805. } else {
  806. /* We don't expect to get here.
  807. * future cmds to this device will get selection
  808. * timeout as if the device was gone.
  809. */
  810. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  811. " for removal.", hostno, removed[i]->bus,
  812. removed[i]->target, removed[i]->lun);
  813. }
  814. kfree(removed[i]);
  815. removed[i] = NULL;
  816. }
  817. /* Notify scsi mid layer of any added devices */
  818. for (i = 0; i < nadded; i++) {
  819. if (scsi_add_device(sh, added[i]->bus,
  820. added[i]->target, added[i]->lun) == 0)
  821. continue;
  822. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  823. "device not added.\n", hostno, added[i]->bus,
  824. added[i]->target, added[i]->lun);
  825. /* now we have to remove it from h->dev,
  826. * since it didn't get added to scsi mid layer
  827. */
  828. fixup_botched_add(h, added[i]);
  829. }
  830. free_and_out:
  831. kfree(added);
  832. kfree(removed);
  833. }
  834. /*
  835. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  836. * Assume's h->devlock is held.
  837. */
  838. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  839. int bus, int target, int lun)
  840. {
  841. int i;
  842. struct hpsa_scsi_dev_t *sd;
  843. for (i = 0; i < h->ndevices; i++) {
  844. sd = h->dev[i];
  845. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  846. return sd;
  847. }
  848. return NULL;
  849. }
  850. /* link sdev->hostdata to our per-device structure. */
  851. static int hpsa_slave_alloc(struct scsi_device *sdev)
  852. {
  853. struct hpsa_scsi_dev_t *sd;
  854. unsigned long flags;
  855. struct ctlr_info *h;
  856. h = sdev_to_hba(sdev);
  857. spin_lock_irqsave(&h->devlock, flags);
  858. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  859. sdev_id(sdev), sdev->lun);
  860. if (sd != NULL)
  861. sdev->hostdata = sd;
  862. spin_unlock_irqrestore(&h->devlock, flags);
  863. return 0;
  864. }
  865. static void hpsa_slave_destroy(struct scsi_device *sdev)
  866. {
  867. /* nothing to do. */
  868. }
  869. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  870. {
  871. int i;
  872. if (!h->cmd_sg_list)
  873. return;
  874. for (i = 0; i < h->nr_cmds; i++) {
  875. kfree(h->cmd_sg_list[i]);
  876. h->cmd_sg_list[i] = NULL;
  877. }
  878. kfree(h->cmd_sg_list);
  879. h->cmd_sg_list = NULL;
  880. }
  881. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  882. {
  883. int i;
  884. if (h->chainsize <= 0)
  885. return 0;
  886. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  887. GFP_KERNEL);
  888. if (!h->cmd_sg_list)
  889. return -ENOMEM;
  890. for (i = 0; i < h->nr_cmds; i++) {
  891. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  892. h->chainsize, GFP_KERNEL);
  893. if (!h->cmd_sg_list[i])
  894. goto clean;
  895. }
  896. return 0;
  897. clean:
  898. hpsa_free_sg_chain_blocks(h);
  899. return -ENOMEM;
  900. }
  901. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  902. struct CommandList *c)
  903. {
  904. struct SGDescriptor *chain_sg, *chain_block;
  905. u64 temp64;
  906. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  907. chain_block = h->cmd_sg_list[c->cmdindex];
  908. chain_sg->Ext = HPSA_SG_CHAIN;
  909. chain_sg->Len = sizeof(*chain_sg) *
  910. (c->Header.SGTotal - h->max_cmd_sg_entries);
  911. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  912. PCI_DMA_TODEVICE);
  913. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  914. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  915. }
  916. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  917. struct CommandList *c)
  918. {
  919. struct SGDescriptor *chain_sg;
  920. union u64bit temp64;
  921. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  922. return;
  923. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  924. temp64.val32.lower = chain_sg->Addr.lower;
  925. temp64.val32.upper = chain_sg->Addr.upper;
  926. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  927. }
  928. static void complete_scsi_command(struct CommandList *cp)
  929. {
  930. struct scsi_cmnd *cmd;
  931. struct ctlr_info *h;
  932. struct ErrorInfo *ei;
  933. unsigned char sense_key;
  934. unsigned char asc; /* additional sense code */
  935. unsigned char ascq; /* additional sense code qualifier */
  936. unsigned long sense_data_size;
  937. ei = cp->err_info;
  938. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  939. h = cp->h;
  940. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  941. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  942. hpsa_unmap_sg_chain_block(h, cp);
  943. cmd->result = (DID_OK << 16); /* host byte */
  944. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  945. cmd->result |= ei->ScsiStatus;
  946. /* copy the sense data whether we need to or not. */
  947. if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
  948. sense_data_size = SCSI_SENSE_BUFFERSIZE;
  949. else
  950. sense_data_size = sizeof(ei->SenseInfo);
  951. if (ei->SenseLen < sense_data_size)
  952. sense_data_size = ei->SenseLen;
  953. memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
  954. scsi_set_resid(cmd, ei->ResidualCnt);
  955. if (ei->CommandStatus == 0) {
  956. cmd->scsi_done(cmd);
  957. cmd_free(h, cp);
  958. return;
  959. }
  960. /* an error has occurred */
  961. switch (ei->CommandStatus) {
  962. case CMD_TARGET_STATUS:
  963. if (ei->ScsiStatus) {
  964. /* Get sense key */
  965. sense_key = 0xf & ei->SenseInfo[2];
  966. /* Get additional sense code */
  967. asc = ei->SenseInfo[12];
  968. /* Get addition sense code qualifier */
  969. ascq = ei->SenseInfo[13];
  970. }
  971. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  972. if (check_for_unit_attention(h, cp)) {
  973. cmd->result = DID_SOFT_ERROR << 16;
  974. break;
  975. }
  976. if (sense_key == ILLEGAL_REQUEST) {
  977. /*
  978. * SCSI REPORT_LUNS is commonly unsupported on
  979. * Smart Array. Suppress noisy complaint.
  980. */
  981. if (cp->Request.CDB[0] == REPORT_LUNS)
  982. break;
  983. /* If ASC/ASCQ indicate Logical Unit
  984. * Not Supported condition,
  985. */
  986. if ((asc == 0x25) && (ascq == 0x0)) {
  987. dev_warn(&h->pdev->dev, "cp %p "
  988. "has check condition\n", cp);
  989. break;
  990. }
  991. }
  992. if (sense_key == NOT_READY) {
  993. /* If Sense is Not Ready, Logical Unit
  994. * Not ready, Manual Intervention
  995. * required
  996. */
  997. if ((asc == 0x04) && (ascq == 0x03)) {
  998. dev_warn(&h->pdev->dev, "cp %p "
  999. "has check condition: unit "
  1000. "not ready, manual "
  1001. "intervention required\n", cp);
  1002. break;
  1003. }
  1004. }
  1005. if (sense_key == ABORTED_COMMAND) {
  1006. /* Aborted command is retryable */
  1007. dev_warn(&h->pdev->dev, "cp %p "
  1008. "has check condition: aborted command: "
  1009. "ASC: 0x%x, ASCQ: 0x%x\n",
  1010. cp, asc, ascq);
  1011. cmd->result = DID_SOFT_ERROR << 16;
  1012. break;
  1013. }
  1014. /* Must be some other type of check condition */
  1015. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  1016. "unknown type: "
  1017. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1018. "Returning result: 0x%x, "
  1019. "cmd=[%02x %02x %02x %02x %02x "
  1020. "%02x %02x %02x %02x %02x %02x "
  1021. "%02x %02x %02x %02x %02x]\n",
  1022. cp, sense_key, asc, ascq,
  1023. cmd->result,
  1024. cmd->cmnd[0], cmd->cmnd[1],
  1025. cmd->cmnd[2], cmd->cmnd[3],
  1026. cmd->cmnd[4], cmd->cmnd[5],
  1027. cmd->cmnd[6], cmd->cmnd[7],
  1028. cmd->cmnd[8], cmd->cmnd[9],
  1029. cmd->cmnd[10], cmd->cmnd[11],
  1030. cmd->cmnd[12], cmd->cmnd[13],
  1031. cmd->cmnd[14], cmd->cmnd[15]);
  1032. break;
  1033. }
  1034. /* Problem was not a check condition
  1035. * Pass it up to the upper layers...
  1036. */
  1037. if (ei->ScsiStatus) {
  1038. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1039. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1040. "Returning result: 0x%x\n",
  1041. cp, ei->ScsiStatus,
  1042. sense_key, asc, ascq,
  1043. cmd->result);
  1044. } else { /* scsi status is zero??? How??? */
  1045. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1046. "Returning no connection.\n", cp),
  1047. /* Ordinarily, this case should never happen,
  1048. * but there is a bug in some released firmware
  1049. * revisions that allows it to happen if, for
  1050. * example, a 4100 backplane loses power and
  1051. * the tape drive is in it. We assume that
  1052. * it's a fatal error of some kind because we
  1053. * can't show that it wasn't. We will make it
  1054. * look like selection timeout since that is
  1055. * the most common reason for this to occur,
  1056. * and it's severe enough.
  1057. */
  1058. cmd->result = DID_NO_CONNECT << 16;
  1059. }
  1060. break;
  1061. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1062. break;
  1063. case CMD_DATA_OVERRUN:
  1064. dev_warn(&h->pdev->dev, "cp %p has"
  1065. " completed with data overrun "
  1066. "reported\n", cp);
  1067. break;
  1068. case CMD_INVALID: {
  1069. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1070. print_cmd(cp); */
  1071. /* We get CMD_INVALID if you address a non-existent device
  1072. * instead of a selection timeout (no response). You will
  1073. * see this if you yank out a drive, then try to access it.
  1074. * This is kind of a shame because it means that any other
  1075. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1076. * missing target. */
  1077. cmd->result = DID_NO_CONNECT << 16;
  1078. }
  1079. break;
  1080. case CMD_PROTOCOL_ERR:
  1081. dev_warn(&h->pdev->dev, "cp %p has "
  1082. "protocol error \n", cp);
  1083. break;
  1084. case CMD_HARDWARE_ERR:
  1085. cmd->result = DID_ERROR << 16;
  1086. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1087. break;
  1088. case CMD_CONNECTION_LOST:
  1089. cmd->result = DID_ERROR << 16;
  1090. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1091. break;
  1092. case CMD_ABORTED:
  1093. cmd->result = DID_ABORT << 16;
  1094. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1095. cp, ei->ScsiStatus);
  1096. break;
  1097. case CMD_ABORT_FAILED:
  1098. cmd->result = DID_ERROR << 16;
  1099. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1100. break;
  1101. case CMD_UNSOLICITED_ABORT:
  1102. cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
  1103. dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
  1104. "abort\n", cp);
  1105. break;
  1106. case CMD_TIMEOUT:
  1107. cmd->result = DID_TIME_OUT << 16;
  1108. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1109. break;
  1110. case CMD_UNABORTABLE:
  1111. cmd->result = DID_ERROR << 16;
  1112. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1113. break;
  1114. default:
  1115. cmd->result = DID_ERROR << 16;
  1116. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1117. cp, ei->CommandStatus);
  1118. }
  1119. cmd->scsi_done(cmd);
  1120. cmd_free(h, cp);
  1121. }
  1122. static int hpsa_scsi_detect(struct ctlr_info *h)
  1123. {
  1124. struct Scsi_Host *sh;
  1125. int error;
  1126. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1127. if (sh == NULL)
  1128. goto fail;
  1129. sh->io_port = 0;
  1130. sh->n_io_port = 0;
  1131. sh->this_id = -1;
  1132. sh->max_channel = 3;
  1133. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1134. sh->max_lun = HPSA_MAX_LUN;
  1135. sh->max_id = HPSA_MAX_LUN;
  1136. sh->can_queue = h->nr_cmds;
  1137. sh->cmd_per_lun = h->nr_cmds;
  1138. sh->sg_tablesize = h->maxsgentries;
  1139. h->scsi_host = sh;
  1140. sh->hostdata[0] = (unsigned long) h;
  1141. sh->irq = h->intr[h->intr_mode];
  1142. sh->unique_id = sh->irq;
  1143. error = scsi_add_host(sh, &h->pdev->dev);
  1144. if (error)
  1145. goto fail_host_put;
  1146. scsi_scan_host(sh);
  1147. return 0;
  1148. fail_host_put:
  1149. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1150. " failed for controller %d\n", h->ctlr);
  1151. scsi_host_put(sh);
  1152. return error;
  1153. fail:
  1154. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1155. " failed for controller %d\n", h->ctlr);
  1156. return -ENOMEM;
  1157. }
  1158. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1159. struct CommandList *c, int sg_used, int data_direction)
  1160. {
  1161. int i;
  1162. union u64bit addr64;
  1163. for (i = 0; i < sg_used; i++) {
  1164. addr64.val32.lower = c->SG[i].Addr.lower;
  1165. addr64.val32.upper = c->SG[i].Addr.upper;
  1166. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1167. data_direction);
  1168. }
  1169. }
  1170. static void hpsa_map_one(struct pci_dev *pdev,
  1171. struct CommandList *cp,
  1172. unsigned char *buf,
  1173. size_t buflen,
  1174. int data_direction)
  1175. {
  1176. u64 addr64;
  1177. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1178. cp->Header.SGList = 0;
  1179. cp->Header.SGTotal = 0;
  1180. return;
  1181. }
  1182. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1183. cp->SG[0].Addr.lower =
  1184. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1185. cp->SG[0].Addr.upper =
  1186. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1187. cp->SG[0].Len = buflen;
  1188. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1189. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1190. }
  1191. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1192. struct CommandList *c)
  1193. {
  1194. DECLARE_COMPLETION_ONSTACK(wait);
  1195. c->waiting = &wait;
  1196. enqueue_cmd_and_start_io(h, c);
  1197. wait_for_completion(&wait);
  1198. }
  1199. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1200. struct CommandList *c, int data_direction)
  1201. {
  1202. int retry_count = 0;
  1203. do {
  1204. memset(c->err_info, 0, sizeof(*c->err_info));
  1205. hpsa_scsi_do_simple_cmd_core(h, c);
  1206. retry_count++;
  1207. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1208. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1209. }
  1210. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1211. {
  1212. struct ErrorInfo *ei;
  1213. struct device *d = &cp->h->pdev->dev;
  1214. ei = cp->err_info;
  1215. switch (ei->CommandStatus) {
  1216. case CMD_TARGET_STATUS:
  1217. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1218. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1219. ei->ScsiStatus);
  1220. if (ei->ScsiStatus == 0)
  1221. dev_warn(d, "SCSI status is abnormally zero. "
  1222. "(probably indicates selection timeout "
  1223. "reported incorrectly due to a known "
  1224. "firmware bug, circa July, 2001.)\n");
  1225. break;
  1226. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1227. dev_info(d, "UNDERRUN\n");
  1228. break;
  1229. case CMD_DATA_OVERRUN:
  1230. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1231. break;
  1232. case CMD_INVALID: {
  1233. /* controller unfortunately reports SCSI passthru's
  1234. * to non-existent targets as invalid commands.
  1235. */
  1236. dev_warn(d, "cp %p is reported invalid (probably means "
  1237. "target device no longer present)\n", cp);
  1238. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1239. print_cmd(cp); */
  1240. }
  1241. break;
  1242. case CMD_PROTOCOL_ERR:
  1243. dev_warn(d, "cp %p has protocol error \n", cp);
  1244. break;
  1245. case CMD_HARDWARE_ERR:
  1246. /* cmd->result = DID_ERROR << 16; */
  1247. dev_warn(d, "cp %p had hardware error\n", cp);
  1248. break;
  1249. case CMD_CONNECTION_LOST:
  1250. dev_warn(d, "cp %p had connection lost\n", cp);
  1251. break;
  1252. case CMD_ABORTED:
  1253. dev_warn(d, "cp %p was aborted\n", cp);
  1254. break;
  1255. case CMD_ABORT_FAILED:
  1256. dev_warn(d, "cp %p reports abort failed\n", cp);
  1257. break;
  1258. case CMD_UNSOLICITED_ABORT:
  1259. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1260. break;
  1261. case CMD_TIMEOUT:
  1262. dev_warn(d, "cp %p timed out\n", cp);
  1263. break;
  1264. case CMD_UNABORTABLE:
  1265. dev_warn(d, "Command unabortable\n");
  1266. break;
  1267. default:
  1268. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1269. ei->CommandStatus);
  1270. }
  1271. }
  1272. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1273. unsigned char page, unsigned char *buf,
  1274. unsigned char bufsize)
  1275. {
  1276. int rc = IO_OK;
  1277. struct CommandList *c;
  1278. struct ErrorInfo *ei;
  1279. c = cmd_special_alloc(h);
  1280. if (c == NULL) { /* trouble... */
  1281. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1282. return -ENOMEM;
  1283. }
  1284. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1285. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1286. ei = c->err_info;
  1287. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1288. hpsa_scsi_interpret_error(c);
  1289. rc = -1;
  1290. }
  1291. cmd_special_free(h, c);
  1292. return rc;
  1293. }
  1294. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1295. {
  1296. int rc = IO_OK;
  1297. struct CommandList *c;
  1298. struct ErrorInfo *ei;
  1299. c = cmd_special_alloc(h);
  1300. if (c == NULL) { /* trouble... */
  1301. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1302. return -ENOMEM;
  1303. }
  1304. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1305. hpsa_scsi_do_simple_cmd_core(h, c);
  1306. /* no unmap needed here because no data xfer. */
  1307. ei = c->err_info;
  1308. if (ei->CommandStatus != 0) {
  1309. hpsa_scsi_interpret_error(c);
  1310. rc = -1;
  1311. }
  1312. cmd_special_free(h, c);
  1313. return rc;
  1314. }
  1315. static void hpsa_get_raid_level(struct ctlr_info *h,
  1316. unsigned char *scsi3addr, unsigned char *raid_level)
  1317. {
  1318. int rc;
  1319. unsigned char *buf;
  1320. *raid_level = RAID_UNKNOWN;
  1321. buf = kzalloc(64, GFP_KERNEL);
  1322. if (!buf)
  1323. return;
  1324. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1325. if (rc == 0)
  1326. *raid_level = buf[8];
  1327. if (*raid_level > RAID_UNKNOWN)
  1328. *raid_level = RAID_UNKNOWN;
  1329. kfree(buf);
  1330. return;
  1331. }
  1332. /* Get the device id from inquiry page 0x83 */
  1333. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1334. unsigned char *device_id, int buflen)
  1335. {
  1336. int rc;
  1337. unsigned char *buf;
  1338. if (buflen > 16)
  1339. buflen = 16;
  1340. buf = kzalloc(64, GFP_KERNEL);
  1341. if (!buf)
  1342. return -1;
  1343. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1344. if (rc == 0)
  1345. memcpy(device_id, &buf[8], buflen);
  1346. kfree(buf);
  1347. return rc != 0;
  1348. }
  1349. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1350. struct ReportLUNdata *buf, int bufsize,
  1351. int extended_response)
  1352. {
  1353. int rc = IO_OK;
  1354. struct CommandList *c;
  1355. unsigned char scsi3addr[8];
  1356. struct ErrorInfo *ei;
  1357. c = cmd_special_alloc(h);
  1358. if (c == NULL) { /* trouble... */
  1359. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1360. return -1;
  1361. }
  1362. /* address the controller */
  1363. memset(scsi3addr, 0, sizeof(scsi3addr));
  1364. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1365. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1366. if (extended_response)
  1367. c->Request.CDB[1] = extended_response;
  1368. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1369. ei = c->err_info;
  1370. if (ei->CommandStatus != 0 &&
  1371. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1372. hpsa_scsi_interpret_error(c);
  1373. rc = -1;
  1374. }
  1375. cmd_special_free(h, c);
  1376. return rc;
  1377. }
  1378. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1379. struct ReportLUNdata *buf,
  1380. int bufsize, int extended_response)
  1381. {
  1382. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1383. }
  1384. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1385. struct ReportLUNdata *buf, int bufsize)
  1386. {
  1387. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1388. }
  1389. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1390. int bus, int target, int lun)
  1391. {
  1392. device->bus = bus;
  1393. device->target = target;
  1394. device->lun = lun;
  1395. }
  1396. static int hpsa_update_device_info(struct ctlr_info *h,
  1397. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
  1398. unsigned char *is_OBDR_device)
  1399. {
  1400. #define OBDR_SIG_OFFSET 43
  1401. #define OBDR_TAPE_SIG "$DR-10"
  1402. #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
  1403. #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
  1404. unsigned char *inq_buff;
  1405. unsigned char *obdr_sig;
  1406. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1407. if (!inq_buff)
  1408. goto bail_out;
  1409. /* Do an inquiry to the device to see what it is. */
  1410. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1411. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1412. /* Inquiry failed (msg printed already) */
  1413. dev_err(&h->pdev->dev,
  1414. "hpsa_update_device_info: inquiry failed\n");
  1415. goto bail_out;
  1416. }
  1417. this_device->devtype = (inq_buff[0] & 0x1f);
  1418. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1419. memcpy(this_device->vendor, &inq_buff[8],
  1420. sizeof(this_device->vendor));
  1421. memcpy(this_device->model, &inq_buff[16],
  1422. sizeof(this_device->model));
  1423. memset(this_device->device_id, 0,
  1424. sizeof(this_device->device_id));
  1425. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1426. sizeof(this_device->device_id));
  1427. if (this_device->devtype == TYPE_DISK &&
  1428. is_logical_dev_addr_mode(scsi3addr))
  1429. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1430. else
  1431. this_device->raid_level = RAID_UNKNOWN;
  1432. if (is_OBDR_device) {
  1433. /* See if this is a One-Button-Disaster-Recovery device
  1434. * by looking for "$DR-10" at offset 43 in inquiry data.
  1435. */
  1436. obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
  1437. *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
  1438. strncmp(obdr_sig, OBDR_TAPE_SIG,
  1439. OBDR_SIG_LEN) == 0);
  1440. }
  1441. kfree(inq_buff);
  1442. return 0;
  1443. bail_out:
  1444. kfree(inq_buff);
  1445. return 1;
  1446. }
  1447. static unsigned char *msa2xxx_model[] = {
  1448. "MSA2012",
  1449. "MSA2024",
  1450. "MSA2312",
  1451. "MSA2324",
  1452. "P2000 G3 SAS",
  1453. NULL,
  1454. };
  1455. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1456. {
  1457. int i;
  1458. for (i = 0; msa2xxx_model[i]; i++)
  1459. if (strncmp(device->model, msa2xxx_model[i],
  1460. strlen(msa2xxx_model[i])) == 0)
  1461. return 1;
  1462. return 0;
  1463. }
  1464. /* Helper function to assign bus, target, lun mapping of devices.
  1465. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1466. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1467. * Logical drive target and lun are assigned at this time, but
  1468. * physical device lun and target assignment are deferred (assigned
  1469. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1470. */
  1471. static void figure_bus_target_lun(struct ctlr_info *h,
  1472. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1473. struct hpsa_scsi_dev_t *device)
  1474. {
  1475. u32 lunid;
  1476. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1477. /* logical device */
  1478. if (unlikely(is_scsi_rev_5(h))) {
  1479. /* p1210m, logical drives lun assignments
  1480. * match SCSI REPORT LUNS data.
  1481. */
  1482. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1483. *bus = 0;
  1484. *target = 0;
  1485. *lun = (lunid & 0x3fff) + 1;
  1486. } else {
  1487. /* not p1210m... */
  1488. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1489. if (is_msa2xxx(h, device)) {
  1490. /* msa2xxx way, put logicals on bus 1
  1491. * and match target/lun numbers box
  1492. * reports.
  1493. */
  1494. *bus = 1;
  1495. *target = (lunid >> 16) & 0x3fff;
  1496. *lun = lunid & 0x00ff;
  1497. } else {
  1498. /* Traditional smart array way. */
  1499. *bus = 0;
  1500. *lun = 0;
  1501. *target = lunid & 0x3fff;
  1502. }
  1503. }
  1504. } else {
  1505. /* physical device */
  1506. if (is_hba_lunid(lunaddrbytes))
  1507. if (unlikely(is_scsi_rev_5(h))) {
  1508. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1509. *target = 0;
  1510. *lun = 0;
  1511. return;
  1512. } else
  1513. *bus = 3; /* traditional smartarray */
  1514. else
  1515. *bus = 2; /* physical disk */
  1516. *target = -1;
  1517. *lun = -1; /* we will fill these in later. */
  1518. }
  1519. }
  1520. /*
  1521. * If there is no lun 0 on a target, linux won't find any devices.
  1522. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1523. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1524. * it for some reason. *tmpdevice is the target we're adding,
  1525. * this_device is a pointer into the current element of currentsd[]
  1526. * that we're building up in update_scsi_devices(), below.
  1527. * lunzerobits is a bitmap that tracks which targets already have a
  1528. * lun 0 assigned.
  1529. * Returns 1 if an enclosure was added, 0 if not.
  1530. */
  1531. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1532. struct hpsa_scsi_dev_t *tmpdevice,
  1533. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1534. int bus, int target, int lun, unsigned long lunzerobits[],
  1535. int *nmsa2xxx_enclosures)
  1536. {
  1537. unsigned char scsi3addr[8];
  1538. if (test_bit(target, lunzerobits))
  1539. return 0; /* There is already a lun 0 on this target. */
  1540. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1541. return 0; /* It's the logical targets that may lack lun 0. */
  1542. if (!is_msa2xxx(h, tmpdevice))
  1543. return 0; /* It's only the MSA2xxx that have this problem. */
  1544. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1545. return 0;
  1546. memset(scsi3addr, 0, 8);
  1547. scsi3addr[3] = target;
  1548. if (is_hba_lunid(scsi3addr))
  1549. return 0; /* Don't add the RAID controller here. */
  1550. if (is_scsi_rev_5(h))
  1551. return 0; /* p1210m doesn't need to do this. */
  1552. #define MAX_MSA2XXX_ENCLOSURES 32
  1553. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1554. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1555. "enclosures exceeded. Check your hardware "
  1556. "configuration.");
  1557. return 0;
  1558. }
  1559. if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
  1560. return 0;
  1561. (*nmsa2xxx_enclosures)++;
  1562. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1563. set_bit(target, lunzerobits);
  1564. return 1;
  1565. }
  1566. /*
  1567. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1568. * logdev. The number of luns in physdev and logdev are returned in
  1569. * *nphysicals and *nlogicals, respectively.
  1570. * Returns 0 on success, -1 otherwise.
  1571. */
  1572. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1573. int reportlunsize,
  1574. struct ReportLUNdata *physdev, u32 *nphysicals,
  1575. struct ReportLUNdata *logdev, u32 *nlogicals)
  1576. {
  1577. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1578. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1579. return -1;
  1580. }
  1581. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1582. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1583. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1584. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1585. *nphysicals - HPSA_MAX_PHYS_LUN);
  1586. *nphysicals = HPSA_MAX_PHYS_LUN;
  1587. }
  1588. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1589. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1590. return -1;
  1591. }
  1592. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1593. /* Reject Logicals in excess of our max capability. */
  1594. if (*nlogicals > HPSA_MAX_LUN) {
  1595. dev_warn(&h->pdev->dev,
  1596. "maximum logical LUNs (%d) exceeded. "
  1597. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1598. *nlogicals - HPSA_MAX_LUN);
  1599. *nlogicals = HPSA_MAX_LUN;
  1600. }
  1601. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1602. dev_warn(&h->pdev->dev,
  1603. "maximum logical + physical LUNs (%d) exceeded. "
  1604. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1605. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1606. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1607. }
  1608. return 0;
  1609. }
  1610. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1611. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1612. struct ReportLUNdata *logdev_list)
  1613. {
  1614. /* Helper function, figure out where the LUN ID info is coming from
  1615. * given index i, lists of physical and logical devices, where in
  1616. * the list the raid controller is supposed to appear (first or last)
  1617. */
  1618. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1619. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1620. if (i == raid_ctlr_position)
  1621. return RAID_CTLR_LUNID;
  1622. if (i < logicals_start)
  1623. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1624. if (i < last_device)
  1625. return &logdev_list->LUN[i - nphysicals -
  1626. (raid_ctlr_position == 0)][0];
  1627. BUG();
  1628. return NULL;
  1629. }
  1630. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1631. {
  1632. /* the idea here is we could get notified
  1633. * that some devices have changed, so we do a report
  1634. * physical luns and report logical luns cmd, and adjust
  1635. * our list of devices accordingly.
  1636. *
  1637. * The scsi3addr's of devices won't change so long as the
  1638. * adapter is not reset. That means we can rescan and
  1639. * tell which devices we already know about, vs. new
  1640. * devices, vs. disappearing devices.
  1641. */
  1642. struct ReportLUNdata *physdev_list = NULL;
  1643. struct ReportLUNdata *logdev_list = NULL;
  1644. u32 nphysicals = 0;
  1645. u32 nlogicals = 0;
  1646. u32 ndev_allocated = 0;
  1647. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1648. int ncurrent = 0;
  1649. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1650. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1651. int bus, target, lun;
  1652. int raid_ctlr_position;
  1653. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1654. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1655. GFP_KERNEL);
  1656. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1657. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1658. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1659. if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
  1660. dev_err(&h->pdev->dev, "out of memory\n");
  1661. goto out;
  1662. }
  1663. memset(lunzerobits, 0, sizeof(lunzerobits));
  1664. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1665. logdev_list, &nlogicals))
  1666. goto out;
  1667. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1668. * but each of them 4 times through different paths. The plus 1
  1669. * is for the RAID controller.
  1670. */
  1671. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1672. /* Allocate the per device structures */
  1673. for (i = 0; i < ndevs_to_allocate; i++) {
  1674. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1675. if (!currentsd[i]) {
  1676. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1677. __FILE__, __LINE__);
  1678. goto out;
  1679. }
  1680. ndev_allocated++;
  1681. }
  1682. if (unlikely(is_scsi_rev_5(h)))
  1683. raid_ctlr_position = 0;
  1684. else
  1685. raid_ctlr_position = nphysicals + nlogicals;
  1686. /* adjust our table of devices */
  1687. nmsa2xxx_enclosures = 0;
  1688. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1689. u8 *lunaddrbytes, is_OBDR = 0;
  1690. /* Figure out where the LUN ID info is coming from */
  1691. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1692. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1693. /* skip masked physical devices. */
  1694. if (lunaddrbytes[3] & 0xC0 &&
  1695. i < nphysicals + (raid_ctlr_position == 0))
  1696. continue;
  1697. /* Get device type, vendor, model, device id */
  1698. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
  1699. &is_OBDR))
  1700. continue; /* skip it if we can't talk to it. */
  1701. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1702. tmpdevice);
  1703. this_device = currentsd[ncurrent];
  1704. /*
  1705. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1706. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1707. * is nonetheless an enclosure device there. We have to
  1708. * present that otherwise linux won't find anything if
  1709. * there is no lun 0.
  1710. */
  1711. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1712. lunaddrbytes, bus, target, lun, lunzerobits,
  1713. &nmsa2xxx_enclosures)) {
  1714. ncurrent++;
  1715. this_device = currentsd[ncurrent];
  1716. }
  1717. *this_device = *tmpdevice;
  1718. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1719. switch (this_device->devtype) {
  1720. case TYPE_ROM:
  1721. /* We don't *really* support actual CD-ROM devices,
  1722. * just "One Button Disaster Recovery" tape drive
  1723. * which temporarily pretends to be a CD-ROM drive.
  1724. * So we check that the device is really an OBDR tape
  1725. * device by checking for "$DR-10" in bytes 43-48 of
  1726. * the inquiry data.
  1727. */
  1728. if (is_OBDR)
  1729. ncurrent++;
  1730. break;
  1731. case TYPE_DISK:
  1732. if (i < nphysicals)
  1733. break;
  1734. ncurrent++;
  1735. break;
  1736. case TYPE_TAPE:
  1737. case TYPE_MEDIUM_CHANGER:
  1738. ncurrent++;
  1739. break;
  1740. case TYPE_RAID:
  1741. /* Only present the Smartarray HBA as a RAID controller.
  1742. * If it's a RAID controller other than the HBA itself
  1743. * (an external RAID controller, MSA500 or similar)
  1744. * don't present it.
  1745. */
  1746. if (!is_hba_lunid(lunaddrbytes))
  1747. break;
  1748. ncurrent++;
  1749. break;
  1750. default:
  1751. break;
  1752. }
  1753. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1754. break;
  1755. }
  1756. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1757. out:
  1758. kfree(tmpdevice);
  1759. for (i = 0; i < ndev_allocated; i++)
  1760. kfree(currentsd[i]);
  1761. kfree(currentsd);
  1762. kfree(physdev_list);
  1763. kfree(logdev_list);
  1764. }
  1765. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1766. * dma mapping and fills in the scatter gather entries of the
  1767. * hpsa command, cp.
  1768. */
  1769. static int hpsa_scatter_gather(struct ctlr_info *h,
  1770. struct CommandList *cp,
  1771. struct scsi_cmnd *cmd)
  1772. {
  1773. unsigned int len;
  1774. struct scatterlist *sg;
  1775. u64 addr64;
  1776. int use_sg, i, sg_index, chained;
  1777. struct SGDescriptor *curr_sg;
  1778. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1779. use_sg = scsi_dma_map(cmd);
  1780. if (use_sg < 0)
  1781. return use_sg;
  1782. if (!use_sg)
  1783. goto sglist_finished;
  1784. curr_sg = cp->SG;
  1785. chained = 0;
  1786. sg_index = 0;
  1787. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1788. if (i == h->max_cmd_sg_entries - 1 &&
  1789. use_sg > h->max_cmd_sg_entries) {
  1790. chained = 1;
  1791. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1792. sg_index = 0;
  1793. }
  1794. addr64 = (u64) sg_dma_address(sg);
  1795. len = sg_dma_len(sg);
  1796. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1797. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1798. curr_sg->Len = len;
  1799. curr_sg->Ext = 0; /* we are not chaining */
  1800. curr_sg++;
  1801. }
  1802. if (use_sg + chained > h->maxSG)
  1803. h->maxSG = use_sg + chained;
  1804. if (chained) {
  1805. cp->Header.SGList = h->max_cmd_sg_entries;
  1806. cp->Header.SGTotal = (u16) (use_sg + 1);
  1807. hpsa_map_sg_chain_block(h, cp);
  1808. return 0;
  1809. }
  1810. sglist_finished:
  1811. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1812. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1813. return 0;
  1814. }
  1815. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1816. void (*done)(struct scsi_cmnd *))
  1817. {
  1818. struct ctlr_info *h;
  1819. struct hpsa_scsi_dev_t *dev;
  1820. unsigned char scsi3addr[8];
  1821. struct CommandList *c;
  1822. unsigned long flags;
  1823. /* Get the ptr to our adapter structure out of cmd->host. */
  1824. h = sdev_to_hba(cmd->device);
  1825. dev = cmd->device->hostdata;
  1826. if (!dev) {
  1827. cmd->result = DID_NO_CONNECT << 16;
  1828. done(cmd);
  1829. return 0;
  1830. }
  1831. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1832. /* Need a lock as this is being allocated from the pool */
  1833. spin_lock_irqsave(&h->lock, flags);
  1834. c = cmd_alloc(h);
  1835. spin_unlock_irqrestore(&h->lock, flags);
  1836. if (c == NULL) { /* trouble... */
  1837. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1838. return SCSI_MLQUEUE_HOST_BUSY;
  1839. }
  1840. /* Fill in the command list header */
  1841. cmd->scsi_done = done; /* save this for use by completion code */
  1842. /* save c in case we have to abort it */
  1843. cmd->host_scribble = (unsigned char *) c;
  1844. c->cmd_type = CMD_SCSI;
  1845. c->scsi_cmd = cmd;
  1846. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1847. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1848. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1849. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1850. /* Fill in the request block... */
  1851. c->Request.Timeout = 0;
  1852. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1853. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1854. c->Request.CDBLen = cmd->cmd_len;
  1855. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1856. c->Request.Type.Type = TYPE_CMD;
  1857. c->Request.Type.Attribute = ATTR_SIMPLE;
  1858. switch (cmd->sc_data_direction) {
  1859. case DMA_TO_DEVICE:
  1860. c->Request.Type.Direction = XFER_WRITE;
  1861. break;
  1862. case DMA_FROM_DEVICE:
  1863. c->Request.Type.Direction = XFER_READ;
  1864. break;
  1865. case DMA_NONE:
  1866. c->Request.Type.Direction = XFER_NONE;
  1867. break;
  1868. case DMA_BIDIRECTIONAL:
  1869. /* This can happen if a buggy application does a scsi passthru
  1870. * and sets both inlen and outlen to non-zero. ( see
  1871. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1872. */
  1873. c->Request.Type.Direction = XFER_RSVD;
  1874. /* This is technically wrong, and hpsa controllers should
  1875. * reject it with CMD_INVALID, which is the most correct
  1876. * response, but non-fibre backends appear to let it
  1877. * slide by, and give the same results as if this field
  1878. * were set correctly. Either way is acceptable for
  1879. * our purposes here.
  1880. */
  1881. break;
  1882. default:
  1883. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1884. cmd->sc_data_direction);
  1885. BUG();
  1886. break;
  1887. }
  1888. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1889. cmd_free(h, c);
  1890. return SCSI_MLQUEUE_HOST_BUSY;
  1891. }
  1892. enqueue_cmd_and_start_io(h, c);
  1893. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1894. return 0;
  1895. }
  1896. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1897. static void hpsa_scan_start(struct Scsi_Host *sh)
  1898. {
  1899. struct ctlr_info *h = shost_to_hba(sh);
  1900. unsigned long flags;
  1901. /* wait until any scan already in progress is finished. */
  1902. while (1) {
  1903. spin_lock_irqsave(&h->scan_lock, flags);
  1904. if (h->scan_finished)
  1905. break;
  1906. spin_unlock_irqrestore(&h->scan_lock, flags);
  1907. wait_event(h->scan_wait_queue, h->scan_finished);
  1908. /* Note: We don't need to worry about a race between this
  1909. * thread and driver unload because the midlayer will
  1910. * have incremented the reference count, so unload won't
  1911. * happen if we're in here.
  1912. */
  1913. }
  1914. h->scan_finished = 0; /* mark scan as in progress */
  1915. spin_unlock_irqrestore(&h->scan_lock, flags);
  1916. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1917. spin_lock_irqsave(&h->scan_lock, flags);
  1918. h->scan_finished = 1; /* mark scan as finished. */
  1919. wake_up_all(&h->scan_wait_queue);
  1920. spin_unlock_irqrestore(&h->scan_lock, flags);
  1921. }
  1922. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1923. unsigned long elapsed_time)
  1924. {
  1925. struct ctlr_info *h = shost_to_hba(sh);
  1926. unsigned long flags;
  1927. int finished;
  1928. spin_lock_irqsave(&h->scan_lock, flags);
  1929. finished = h->scan_finished;
  1930. spin_unlock_irqrestore(&h->scan_lock, flags);
  1931. return finished;
  1932. }
  1933. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1934. int qdepth, int reason)
  1935. {
  1936. struct ctlr_info *h = sdev_to_hba(sdev);
  1937. if (reason != SCSI_QDEPTH_DEFAULT)
  1938. return -ENOTSUPP;
  1939. if (qdepth < 1)
  1940. qdepth = 1;
  1941. else
  1942. if (qdepth > h->nr_cmds)
  1943. qdepth = h->nr_cmds;
  1944. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1945. return sdev->queue_depth;
  1946. }
  1947. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1948. {
  1949. /* we are being forcibly unloaded, and may not refuse. */
  1950. scsi_remove_host(h->scsi_host);
  1951. scsi_host_put(h->scsi_host);
  1952. h->scsi_host = NULL;
  1953. }
  1954. static int hpsa_register_scsi(struct ctlr_info *h)
  1955. {
  1956. int rc;
  1957. rc = hpsa_scsi_detect(h);
  1958. if (rc != 0)
  1959. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1960. " hpsa_scsi_detect(), rc is %d\n", rc);
  1961. return rc;
  1962. }
  1963. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1964. unsigned char lunaddr[])
  1965. {
  1966. int rc = 0;
  1967. int count = 0;
  1968. int waittime = 1; /* seconds */
  1969. struct CommandList *c;
  1970. c = cmd_special_alloc(h);
  1971. if (!c) {
  1972. dev_warn(&h->pdev->dev, "out of memory in "
  1973. "wait_for_device_to_become_ready.\n");
  1974. return IO_ERROR;
  1975. }
  1976. /* Send test unit ready until device ready, or give up. */
  1977. while (count < HPSA_TUR_RETRY_LIMIT) {
  1978. /* Wait for a bit. do this first, because if we send
  1979. * the TUR right away, the reset will just abort it.
  1980. */
  1981. msleep(1000 * waittime);
  1982. count++;
  1983. /* Increase wait time with each try, up to a point. */
  1984. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1985. waittime = waittime * 2;
  1986. /* Send the Test Unit Ready */
  1987. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1988. hpsa_scsi_do_simple_cmd_core(h, c);
  1989. /* no unmap needed here because no data xfer. */
  1990. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1991. break;
  1992. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1993. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1994. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1995. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1996. break;
  1997. dev_warn(&h->pdev->dev, "waiting %d secs "
  1998. "for device to become ready.\n", waittime);
  1999. rc = 1; /* device not ready. */
  2000. }
  2001. if (rc)
  2002. dev_warn(&h->pdev->dev, "giving up on device.\n");
  2003. else
  2004. dev_warn(&h->pdev->dev, "device is ready.\n");
  2005. cmd_special_free(h, c);
  2006. return rc;
  2007. }
  2008. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  2009. * complaining. Doing a host- or bus-reset can't do anything good here.
  2010. */
  2011. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  2012. {
  2013. int rc;
  2014. struct ctlr_info *h;
  2015. struct hpsa_scsi_dev_t *dev;
  2016. /* find the controller to which the command to be aborted was sent */
  2017. h = sdev_to_hba(scsicmd->device);
  2018. if (h == NULL) /* paranoia */
  2019. return FAILED;
  2020. dev = scsicmd->device->hostdata;
  2021. if (!dev) {
  2022. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  2023. "device lookup failed.\n");
  2024. return FAILED;
  2025. }
  2026. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  2027. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2028. /* send a reset to the SCSI LUN which the command was sent to */
  2029. rc = hpsa_send_reset(h, dev->scsi3addr);
  2030. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  2031. return SUCCESS;
  2032. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  2033. return FAILED;
  2034. }
  2035. /*
  2036. * For operations that cannot sleep, a command block is allocated at init,
  2037. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2038. * which ones are free or in use. Lock must be held when calling this.
  2039. * cmd_free() is the complement.
  2040. */
  2041. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2042. {
  2043. struct CommandList *c;
  2044. int i;
  2045. union u64bit temp64;
  2046. dma_addr_t cmd_dma_handle, err_dma_handle;
  2047. do {
  2048. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2049. if (i == h->nr_cmds)
  2050. return NULL;
  2051. } while (test_and_set_bit
  2052. (i & (BITS_PER_LONG - 1),
  2053. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2054. c = h->cmd_pool + i;
  2055. memset(c, 0, sizeof(*c));
  2056. cmd_dma_handle = h->cmd_pool_dhandle
  2057. + i * sizeof(*c);
  2058. c->err_info = h->errinfo_pool + i;
  2059. memset(c->err_info, 0, sizeof(*c->err_info));
  2060. err_dma_handle = h->errinfo_pool_dhandle
  2061. + i * sizeof(*c->err_info);
  2062. h->nr_allocs++;
  2063. c->cmdindex = i;
  2064. INIT_LIST_HEAD(&c->list);
  2065. c->busaddr = (u32) cmd_dma_handle;
  2066. temp64.val = (u64) err_dma_handle;
  2067. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2068. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2069. c->ErrDesc.Len = sizeof(*c->err_info);
  2070. c->h = h;
  2071. return c;
  2072. }
  2073. /* For operations that can wait for kmalloc to possibly sleep,
  2074. * this routine can be called. Lock need not be held to call
  2075. * cmd_special_alloc. cmd_special_free() is the complement.
  2076. */
  2077. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2078. {
  2079. struct CommandList *c;
  2080. union u64bit temp64;
  2081. dma_addr_t cmd_dma_handle, err_dma_handle;
  2082. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2083. if (c == NULL)
  2084. return NULL;
  2085. memset(c, 0, sizeof(*c));
  2086. c->cmdindex = -1;
  2087. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2088. &err_dma_handle);
  2089. if (c->err_info == NULL) {
  2090. pci_free_consistent(h->pdev,
  2091. sizeof(*c), c, cmd_dma_handle);
  2092. return NULL;
  2093. }
  2094. memset(c->err_info, 0, sizeof(*c->err_info));
  2095. INIT_LIST_HEAD(&c->list);
  2096. c->busaddr = (u32) cmd_dma_handle;
  2097. temp64.val = (u64) err_dma_handle;
  2098. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2099. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2100. c->ErrDesc.Len = sizeof(*c->err_info);
  2101. c->h = h;
  2102. return c;
  2103. }
  2104. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2105. {
  2106. int i;
  2107. i = c - h->cmd_pool;
  2108. clear_bit(i & (BITS_PER_LONG - 1),
  2109. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2110. h->nr_frees++;
  2111. }
  2112. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2113. {
  2114. union u64bit temp64;
  2115. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2116. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2117. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2118. c->err_info, (dma_addr_t) temp64.val);
  2119. pci_free_consistent(h->pdev, sizeof(*c),
  2120. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2121. }
  2122. #ifdef CONFIG_COMPAT
  2123. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2124. {
  2125. IOCTL32_Command_struct __user *arg32 =
  2126. (IOCTL32_Command_struct __user *) arg;
  2127. IOCTL_Command_struct arg64;
  2128. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2129. int err;
  2130. u32 cp;
  2131. memset(&arg64, 0, sizeof(arg64));
  2132. err = 0;
  2133. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2134. sizeof(arg64.LUN_info));
  2135. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2136. sizeof(arg64.Request));
  2137. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2138. sizeof(arg64.error_info));
  2139. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2140. err |= get_user(cp, &arg32->buf);
  2141. arg64.buf = compat_ptr(cp);
  2142. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2143. if (err)
  2144. return -EFAULT;
  2145. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2146. if (err)
  2147. return err;
  2148. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2149. sizeof(arg32->error_info));
  2150. if (err)
  2151. return -EFAULT;
  2152. return err;
  2153. }
  2154. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2155. int cmd, void *arg)
  2156. {
  2157. BIG_IOCTL32_Command_struct __user *arg32 =
  2158. (BIG_IOCTL32_Command_struct __user *) arg;
  2159. BIG_IOCTL_Command_struct arg64;
  2160. BIG_IOCTL_Command_struct __user *p =
  2161. compat_alloc_user_space(sizeof(arg64));
  2162. int err;
  2163. u32 cp;
  2164. memset(&arg64, 0, sizeof(arg64));
  2165. err = 0;
  2166. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2167. sizeof(arg64.LUN_info));
  2168. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2169. sizeof(arg64.Request));
  2170. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2171. sizeof(arg64.error_info));
  2172. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2173. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2174. err |= get_user(cp, &arg32->buf);
  2175. arg64.buf = compat_ptr(cp);
  2176. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2177. if (err)
  2178. return -EFAULT;
  2179. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2180. if (err)
  2181. return err;
  2182. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2183. sizeof(arg32->error_info));
  2184. if (err)
  2185. return -EFAULT;
  2186. return err;
  2187. }
  2188. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2189. {
  2190. switch (cmd) {
  2191. case CCISS_GETPCIINFO:
  2192. case CCISS_GETINTINFO:
  2193. case CCISS_SETINTINFO:
  2194. case CCISS_GETNODENAME:
  2195. case CCISS_SETNODENAME:
  2196. case CCISS_GETHEARTBEAT:
  2197. case CCISS_GETBUSTYPES:
  2198. case CCISS_GETFIRMVER:
  2199. case CCISS_GETDRIVVER:
  2200. case CCISS_REVALIDVOLS:
  2201. case CCISS_DEREGDISK:
  2202. case CCISS_REGNEWDISK:
  2203. case CCISS_REGNEWD:
  2204. case CCISS_RESCANDISK:
  2205. case CCISS_GETLUNINFO:
  2206. return hpsa_ioctl(dev, cmd, arg);
  2207. case CCISS_PASSTHRU32:
  2208. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2209. case CCISS_BIG_PASSTHRU32:
  2210. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2211. default:
  2212. return -ENOIOCTLCMD;
  2213. }
  2214. }
  2215. #endif
  2216. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2217. {
  2218. struct hpsa_pci_info pciinfo;
  2219. if (!argp)
  2220. return -EINVAL;
  2221. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2222. pciinfo.bus = h->pdev->bus->number;
  2223. pciinfo.dev_fn = h->pdev->devfn;
  2224. pciinfo.board_id = h->board_id;
  2225. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2226. return -EFAULT;
  2227. return 0;
  2228. }
  2229. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2230. {
  2231. DriverVer_type DriverVer;
  2232. unsigned char vmaj, vmin, vsubmin;
  2233. int rc;
  2234. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2235. &vmaj, &vmin, &vsubmin);
  2236. if (rc != 3) {
  2237. dev_info(&h->pdev->dev, "driver version string '%s' "
  2238. "unrecognized.", HPSA_DRIVER_VERSION);
  2239. vmaj = 0;
  2240. vmin = 0;
  2241. vsubmin = 0;
  2242. }
  2243. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2244. if (!argp)
  2245. return -EINVAL;
  2246. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2247. return -EFAULT;
  2248. return 0;
  2249. }
  2250. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2251. {
  2252. IOCTL_Command_struct iocommand;
  2253. struct CommandList *c;
  2254. char *buff = NULL;
  2255. union u64bit temp64;
  2256. if (!argp)
  2257. return -EINVAL;
  2258. if (!capable(CAP_SYS_RAWIO))
  2259. return -EPERM;
  2260. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2261. return -EFAULT;
  2262. if ((iocommand.buf_size < 1) &&
  2263. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2264. return -EINVAL;
  2265. }
  2266. if (iocommand.buf_size > 0) {
  2267. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2268. if (buff == NULL)
  2269. return -EFAULT;
  2270. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2271. /* Copy the data into the buffer we created */
  2272. if (copy_from_user(buff, iocommand.buf,
  2273. iocommand.buf_size)) {
  2274. kfree(buff);
  2275. return -EFAULT;
  2276. }
  2277. } else {
  2278. memset(buff, 0, iocommand.buf_size);
  2279. }
  2280. }
  2281. c = cmd_special_alloc(h);
  2282. if (c == NULL) {
  2283. kfree(buff);
  2284. return -ENOMEM;
  2285. }
  2286. /* Fill in the command type */
  2287. c->cmd_type = CMD_IOCTL_PEND;
  2288. /* Fill in Command Header */
  2289. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2290. if (iocommand.buf_size > 0) { /* buffer to fill */
  2291. c->Header.SGList = 1;
  2292. c->Header.SGTotal = 1;
  2293. } else { /* no buffers to fill */
  2294. c->Header.SGList = 0;
  2295. c->Header.SGTotal = 0;
  2296. }
  2297. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2298. /* use the kernel address the cmd block for tag */
  2299. c->Header.Tag.lower = c->busaddr;
  2300. /* Fill in Request block */
  2301. memcpy(&c->Request, &iocommand.Request,
  2302. sizeof(c->Request));
  2303. /* Fill in the scatter gather information */
  2304. if (iocommand.buf_size > 0) {
  2305. temp64.val = pci_map_single(h->pdev, buff,
  2306. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2307. c->SG[0].Addr.lower = temp64.val32.lower;
  2308. c->SG[0].Addr.upper = temp64.val32.upper;
  2309. c->SG[0].Len = iocommand.buf_size;
  2310. c->SG[0].Ext = 0; /* we are not chaining*/
  2311. }
  2312. hpsa_scsi_do_simple_cmd_core(h, c);
  2313. if (iocommand.buf_size > 0)
  2314. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2315. check_ioctl_unit_attention(h, c);
  2316. /* Copy the error information out */
  2317. memcpy(&iocommand.error_info, c->err_info,
  2318. sizeof(iocommand.error_info));
  2319. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2320. kfree(buff);
  2321. cmd_special_free(h, c);
  2322. return -EFAULT;
  2323. }
  2324. if (iocommand.Request.Type.Direction == XFER_READ &&
  2325. iocommand.buf_size > 0) {
  2326. /* Copy the data out of the buffer we created */
  2327. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2328. kfree(buff);
  2329. cmd_special_free(h, c);
  2330. return -EFAULT;
  2331. }
  2332. }
  2333. kfree(buff);
  2334. cmd_special_free(h, c);
  2335. return 0;
  2336. }
  2337. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2338. {
  2339. BIG_IOCTL_Command_struct *ioc;
  2340. struct CommandList *c;
  2341. unsigned char **buff = NULL;
  2342. int *buff_size = NULL;
  2343. union u64bit temp64;
  2344. BYTE sg_used = 0;
  2345. int status = 0;
  2346. int i;
  2347. u32 left;
  2348. u32 sz;
  2349. BYTE __user *data_ptr;
  2350. if (!argp)
  2351. return -EINVAL;
  2352. if (!capable(CAP_SYS_RAWIO))
  2353. return -EPERM;
  2354. ioc = (BIG_IOCTL_Command_struct *)
  2355. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2356. if (!ioc) {
  2357. status = -ENOMEM;
  2358. goto cleanup1;
  2359. }
  2360. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2361. status = -EFAULT;
  2362. goto cleanup1;
  2363. }
  2364. if ((ioc->buf_size < 1) &&
  2365. (ioc->Request.Type.Direction != XFER_NONE)) {
  2366. status = -EINVAL;
  2367. goto cleanup1;
  2368. }
  2369. /* Check kmalloc limits using all SGs */
  2370. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2371. status = -EINVAL;
  2372. goto cleanup1;
  2373. }
  2374. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2375. status = -EINVAL;
  2376. goto cleanup1;
  2377. }
  2378. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2379. if (!buff) {
  2380. status = -ENOMEM;
  2381. goto cleanup1;
  2382. }
  2383. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2384. if (!buff_size) {
  2385. status = -ENOMEM;
  2386. goto cleanup1;
  2387. }
  2388. left = ioc->buf_size;
  2389. data_ptr = ioc->buf;
  2390. while (left) {
  2391. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2392. buff_size[sg_used] = sz;
  2393. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2394. if (buff[sg_used] == NULL) {
  2395. status = -ENOMEM;
  2396. goto cleanup1;
  2397. }
  2398. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2399. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2400. status = -ENOMEM;
  2401. goto cleanup1;
  2402. }
  2403. } else
  2404. memset(buff[sg_used], 0, sz);
  2405. left -= sz;
  2406. data_ptr += sz;
  2407. sg_used++;
  2408. }
  2409. c = cmd_special_alloc(h);
  2410. if (c == NULL) {
  2411. status = -ENOMEM;
  2412. goto cleanup1;
  2413. }
  2414. c->cmd_type = CMD_IOCTL_PEND;
  2415. c->Header.ReplyQueue = 0;
  2416. c->Header.SGList = c->Header.SGTotal = sg_used;
  2417. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2418. c->Header.Tag.lower = c->busaddr;
  2419. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2420. if (ioc->buf_size > 0) {
  2421. int i;
  2422. for (i = 0; i < sg_used; i++) {
  2423. temp64.val = pci_map_single(h->pdev, buff[i],
  2424. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2425. c->SG[i].Addr.lower = temp64.val32.lower;
  2426. c->SG[i].Addr.upper = temp64.val32.upper;
  2427. c->SG[i].Len = buff_size[i];
  2428. /* we are not chaining */
  2429. c->SG[i].Ext = 0;
  2430. }
  2431. }
  2432. hpsa_scsi_do_simple_cmd_core(h, c);
  2433. if (sg_used)
  2434. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2435. check_ioctl_unit_attention(h, c);
  2436. /* Copy the error information out */
  2437. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2438. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2439. cmd_special_free(h, c);
  2440. status = -EFAULT;
  2441. goto cleanup1;
  2442. }
  2443. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2444. /* Copy the data out of the buffer we created */
  2445. BYTE __user *ptr = ioc->buf;
  2446. for (i = 0; i < sg_used; i++) {
  2447. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2448. cmd_special_free(h, c);
  2449. status = -EFAULT;
  2450. goto cleanup1;
  2451. }
  2452. ptr += buff_size[i];
  2453. }
  2454. }
  2455. cmd_special_free(h, c);
  2456. status = 0;
  2457. cleanup1:
  2458. if (buff) {
  2459. for (i = 0; i < sg_used; i++)
  2460. kfree(buff[i]);
  2461. kfree(buff);
  2462. }
  2463. kfree(buff_size);
  2464. kfree(ioc);
  2465. return status;
  2466. }
  2467. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2468. struct CommandList *c)
  2469. {
  2470. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2471. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2472. (void) check_for_unit_attention(h, c);
  2473. }
  2474. /*
  2475. * ioctl
  2476. */
  2477. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2478. {
  2479. struct ctlr_info *h;
  2480. void __user *argp = (void __user *)arg;
  2481. h = sdev_to_hba(dev);
  2482. switch (cmd) {
  2483. case CCISS_DEREGDISK:
  2484. case CCISS_REGNEWDISK:
  2485. case CCISS_REGNEWD:
  2486. hpsa_scan_start(h->scsi_host);
  2487. return 0;
  2488. case CCISS_GETPCIINFO:
  2489. return hpsa_getpciinfo_ioctl(h, argp);
  2490. case CCISS_GETDRIVVER:
  2491. return hpsa_getdrivver_ioctl(h, argp);
  2492. case CCISS_PASSTHRU:
  2493. return hpsa_passthru_ioctl(h, argp);
  2494. case CCISS_BIG_PASSTHRU:
  2495. return hpsa_big_passthru_ioctl(h, argp);
  2496. default:
  2497. return -ENOTTY;
  2498. }
  2499. }
  2500. static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
  2501. unsigned char *scsi3addr, u8 reset_type)
  2502. {
  2503. struct CommandList *c;
  2504. c = cmd_alloc(h);
  2505. if (!c)
  2506. return -ENOMEM;
  2507. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
  2508. RAID_CTLR_LUNID, TYPE_MSG);
  2509. c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
  2510. c->waiting = NULL;
  2511. enqueue_cmd_and_start_io(h, c);
  2512. /* Don't wait for completion, the reset won't complete. Don't free
  2513. * the command either. This is the last command we will send before
  2514. * re-initializing everything, so it doesn't matter and won't leak.
  2515. */
  2516. return 0;
  2517. }
  2518. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2519. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2520. int cmd_type)
  2521. {
  2522. int pci_dir = XFER_NONE;
  2523. c->cmd_type = CMD_IOCTL_PEND;
  2524. c->Header.ReplyQueue = 0;
  2525. if (buff != NULL && size > 0) {
  2526. c->Header.SGList = 1;
  2527. c->Header.SGTotal = 1;
  2528. } else {
  2529. c->Header.SGList = 0;
  2530. c->Header.SGTotal = 0;
  2531. }
  2532. c->Header.Tag.lower = c->busaddr;
  2533. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2534. c->Request.Type.Type = cmd_type;
  2535. if (cmd_type == TYPE_CMD) {
  2536. switch (cmd) {
  2537. case HPSA_INQUIRY:
  2538. /* are we trying to read a vital product page */
  2539. if (page_code != 0) {
  2540. c->Request.CDB[1] = 0x01;
  2541. c->Request.CDB[2] = page_code;
  2542. }
  2543. c->Request.CDBLen = 6;
  2544. c->Request.Type.Attribute = ATTR_SIMPLE;
  2545. c->Request.Type.Direction = XFER_READ;
  2546. c->Request.Timeout = 0;
  2547. c->Request.CDB[0] = HPSA_INQUIRY;
  2548. c->Request.CDB[4] = size & 0xFF;
  2549. break;
  2550. case HPSA_REPORT_LOG:
  2551. case HPSA_REPORT_PHYS:
  2552. /* Talking to controller so It's a physical command
  2553. mode = 00 target = 0. Nothing to write.
  2554. */
  2555. c->Request.CDBLen = 12;
  2556. c->Request.Type.Attribute = ATTR_SIMPLE;
  2557. c->Request.Type.Direction = XFER_READ;
  2558. c->Request.Timeout = 0;
  2559. c->Request.CDB[0] = cmd;
  2560. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2561. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2562. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2563. c->Request.CDB[9] = size & 0xFF;
  2564. break;
  2565. case HPSA_CACHE_FLUSH:
  2566. c->Request.CDBLen = 12;
  2567. c->Request.Type.Attribute = ATTR_SIMPLE;
  2568. c->Request.Type.Direction = XFER_WRITE;
  2569. c->Request.Timeout = 0;
  2570. c->Request.CDB[0] = BMIC_WRITE;
  2571. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2572. break;
  2573. case TEST_UNIT_READY:
  2574. c->Request.CDBLen = 6;
  2575. c->Request.Type.Attribute = ATTR_SIMPLE;
  2576. c->Request.Type.Direction = XFER_NONE;
  2577. c->Request.Timeout = 0;
  2578. break;
  2579. default:
  2580. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2581. BUG();
  2582. return;
  2583. }
  2584. } else if (cmd_type == TYPE_MSG) {
  2585. switch (cmd) {
  2586. case HPSA_DEVICE_RESET_MSG:
  2587. c->Request.CDBLen = 16;
  2588. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2589. c->Request.Type.Attribute = ATTR_SIMPLE;
  2590. c->Request.Type.Direction = XFER_NONE;
  2591. c->Request.Timeout = 0; /* Don't time out */
  2592. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2593. c->Request.CDB[0] = cmd;
  2594. c->Request.CDB[1] = 0x03; /* Reset target above */
  2595. /* If bytes 4-7 are zero, it means reset the */
  2596. /* LunID device */
  2597. c->Request.CDB[4] = 0x00;
  2598. c->Request.CDB[5] = 0x00;
  2599. c->Request.CDB[6] = 0x00;
  2600. c->Request.CDB[7] = 0x00;
  2601. break;
  2602. default:
  2603. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2604. cmd);
  2605. BUG();
  2606. }
  2607. } else {
  2608. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2609. BUG();
  2610. }
  2611. switch (c->Request.Type.Direction) {
  2612. case XFER_READ:
  2613. pci_dir = PCI_DMA_FROMDEVICE;
  2614. break;
  2615. case XFER_WRITE:
  2616. pci_dir = PCI_DMA_TODEVICE;
  2617. break;
  2618. case XFER_NONE:
  2619. pci_dir = PCI_DMA_NONE;
  2620. break;
  2621. default:
  2622. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2623. }
  2624. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2625. return;
  2626. }
  2627. /*
  2628. * Map (physical) PCI mem into (virtual) kernel space
  2629. */
  2630. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2631. {
  2632. ulong page_base = ((ulong) base) & PAGE_MASK;
  2633. ulong page_offs = ((ulong) base) - page_base;
  2634. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2635. return page_remapped ? (page_remapped + page_offs) : NULL;
  2636. }
  2637. /* Takes cmds off the submission queue and sends them to the hardware,
  2638. * then puts them on the queue of cmds waiting for completion.
  2639. */
  2640. static void start_io(struct ctlr_info *h)
  2641. {
  2642. struct CommandList *c;
  2643. while (!list_empty(&h->reqQ)) {
  2644. c = list_entry(h->reqQ.next, struct CommandList, list);
  2645. /* can't do anything if fifo is full */
  2646. if ((h->access.fifo_full(h))) {
  2647. dev_warn(&h->pdev->dev, "fifo full\n");
  2648. break;
  2649. }
  2650. /* Get the first entry from the Request Q */
  2651. removeQ(c);
  2652. h->Qdepth--;
  2653. /* Tell the controller execute command */
  2654. h->access.submit_command(h, c);
  2655. /* Put job onto the completed Q */
  2656. addQ(&h->cmpQ, c);
  2657. }
  2658. }
  2659. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2660. {
  2661. return h->access.command_completed(h);
  2662. }
  2663. static inline bool interrupt_pending(struct ctlr_info *h)
  2664. {
  2665. return h->access.intr_pending(h);
  2666. }
  2667. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2668. {
  2669. return (h->access.intr_pending(h) == 0) ||
  2670. (h->interrupts_enabled == 0);
  2671. }
  2672. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2673. u32 raw_tag)
  2674. {
  2675. if (unlikely(tag_index >= h->nr_cmds)) {
  2676. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2677. return 1;
  2678. }
  2679. return 0;
  2680. }
  2681. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2682. {
  2683. removeQ(c);
  2684. if (likely(c->cmd_type == CMD_SCSI))
  2685. complete_scsi_command(c);
  2686. else if (c->cmd_type == CMD_IOCTL_PEND)
  2687. complete(c->waiting);
  2688. }
  2689. static inline u32 hpsa_tag_contains_index(u32 tag)
  2690. {
  2691. return tag & DIRECT_LOOKUP_BIT;
  2692. }
  2693. static inline u32 hpsa_tag_to_index(u32 tag)
  2694. {
  2695. return tag >> DIRECT_LOOKUP_SHIFT;
  2696. }
  2697. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  2698. {
  2699. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  2700. #define HPSA_SIMPLE_ERROR_BITS 0x03
  2701. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  2702. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  2703. return tag & ~HPSA_PERF_ERROR_BITS;
  2704. }
  2705. /* process completion of an indexed ("direct lookup") command */
  2706. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2707. u32 raw_tag)
  2708. {
  2709. u32 tag_index;
  2710. struct CommandList *c;
  2711. tag_index = hpsa_tag_to_index(raw_tag);
  2712. if (bad_tag(h, tag_index, raw_tag))
  2713. return next_command(h);
  2714. c = h->cmd_pool + tag_index;
  2715. finish_cmd(c, raw_tag);
  2716. return next_command(h);
  2717. }
  2718. /* process completion of a non-indexed command */
  2719. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2720. u32 raw_tag)
  2721. {
  2722. u32 tag;
  2723. struct CommandList *c = NULL;
  2724. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  2725. list_for_each_entry(c, &h->cmpQ, list) {
  2726. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2727. finish_cmd(c, raw_tag);
  2728. return next_command(h);
  2729. }
  2730. }
  2731. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2732. return next_command(h);
  2733. }
  2734. /* Some controllers, like p400, will give us one interrupt
  2735. * after a soft reset, even if we turned interrupts off.
  2736. * Only need to check for this in the hpsa_xxx_discard_completions
  2737. * functions.
  2738. */
  2739. static int ignore_bogus_interrupt(struct ctlr_info *h)
  2740. {
  2741. if (likely(!reset_devices))
  2742. return 0;
  2743. if (likely(h->interrupts_enabled))
  2744. return 0;
  2745. dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
  2746. "(known firmware bug.) Ignoring.\n");
  2747. return 1;
  2748. }
  2749. static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
  2750. {
  2751. struct ctlr_info *h = dev_id;
  2752. unsigned long flags;
  2753. u32 raw_tag;
  2754. if (ignore_bogus_interrupt(h))
  2755. return IRQ_NONE;
  2756. if (interrupt_not_for_us(h))
  2757. return IRQ_NONE;
  2758. spin_lock_irqsave(&h->lock, flags);
  2759. while (interrupt_pending(h)) {
  2760. raw_tag = get_next_completion(h);
  2761. while (raw_tag != FIFO_EMPTY)
  2762. raw_tag = next_command(h);
  2763. }
  2764. spin_unlock_irqrestore(&h->lock, flags);
  2765. return IRQ_HANDLED;
  2766. }
  2767. static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
  2768. {
  2769. struct ctlr_info *h = dev_id;
  2770. unsigned long flags;
  2771. u32 raw_tag;
  2772. if (ignore_bogus_interrupt(h))
  2773. return IRQ_NONE;
  2774. spin_lock_irqsave(&h->lock, flags);
  2775. raw_tag = get_next_completion(h);
  2776. while (raw_tag != FIFO_EMPTY)
  2777. raw_tag = next_command(h);
  2778. spin_unlock_irqrestore(&h->lock, flags);
  2779. return IRQ_HANDLED;
  2780. }
  2781. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2782. {
  2783. struct ctlr_info *h = dev_id;
  2784. unsigned long flags;
  2785. u32 raw_tag;
  2786. if (interrupt_not_for_us(h))
  2787. return IRQ_NONE;
  2788. spin_lock_irqsave(&h->lock, flags);
  2789. while (interrupt_pending(h)) {
  2790. raw_tag = get_next_completion(h);
  2791. while (raw_tag != FIFO_EMPTY) {
  2792. if (hpsa_tag_contains_index(raw_tag))
  2793. raw_tag = process_indexed_cmd(h, raw_tag);
  2794. else
  2795. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2796. }
  2797. }
  2798. spin_unlock_irqrestore(&h->lock, flags);
  2799. return IRQ_HANDLED;
  2800. }
  2801. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2802. {
  2803. struct ctlr_info *h = dev_id;
  2804. unsigned long flags;
  2805. u32 raw_tag;
  2806. spin_lock_irqsave(&h->lock, flags);
  2807. raw_tag = get_next_completion(h);
  2808. while (raw_tag != FIFO_EMPTY) {
  2809. if (hpsa_tag_contains_index(raw_tag))
  2810. raw_tag = process_indexed_cmd(h, raw_tag);
  2811. else
  2812. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2813. }
  2814. spin_unlock_irqrestore(&h->lock, flags);
  2815. return IRQ_HANDLED;
  2816. }
  2817. /* Send a message CDB to the firmware. Careful, this only works
  2818. * in simple mode, not performant mode due to the tag lookup.
  2819. * We only ever use this immediately after a controller reset.
  2820. */
  2821. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2822. unsigned char type)
  2823. {
  2824. struct Command {
  2825. struct CommandListHeader CommandHeader;
  2826. struct RequestBlock Request;
  2827. struct ErrDescriptor ErrorDescriptor;
  2828. };
  2829. struct Command *cmd;
  2830. static const size_t cmd_sz = sizeof(*cmd) +
  2831. sizeof(cmd->ErrorDescriptor);
  2832. dma_addr_t paddr64;
  2833. uint32_t paddr32, tag;
  2834. void __iomem *vaddr;
  2835. int i, err;
  2836. vaddr = pci_ioremap_bar(pdev, 0);
  2837. if (vaddr == NULL)
  2838. return -ENOMEM;
  2839. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2840. * CCISS commands, so they must be allocated from the lower 4GiB of
  2841. * memory.
  2842. */
  2843. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2844. if (err) {
  2845. iounmap(vaddr);
  2846. return -ENOMEM;
  2847. }
  2848. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2849. if (cmd == NULL) {
  2850. iounmap(vaddr);
  2851. return -ENOMEM;
  2852. }
  2853. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2854. * although there's no guarantee, we assume that the address is at
  2855. * least 4-byte aligned (most likely, it's page-aligned).
  2856. */
  2857. paddr32 = paddr64;
  2858. cmd->CommandHeader.ReplyQueue = 0;
  2859. cmd->CommandHeader.SGList = 0;
  2860. cmd->CommandHeader.SGTotal = 0;
  2861. cmd->CommandHeader.Tag.lower = paddr32;
  2862. cmd->CommandHeader.Tag.upper = 0;
  2863. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2864. cmd->Request.CDBLen = 16;
  2865. cmd->Request.Type.Type = TYPE_MSG;
  2866. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2867. cmd->Request.Type.Direction = XFER_NONE;
  2868. cmd->Request.Timeout = 0; /* Don't time out */
  2869. cmd->Request.CDB[0] = opcode;
  2870. cmd->Request.CDB[1] = type;
  2871. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2872. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2873. cmd->ErrorDescriptor.Addr.upper = 0;
  2874. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2875. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2876. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2877. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2878. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  2879. break;
  2880. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2881. }
  2882. iounmap(vaddr);
  2883. /* we leak the DMA buffer here ... no choice since the controller could
  2884. * still complete the command.
  2885. */
  2886. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2887. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2888. opcode, type);
  2889. return -ETIMEDOUT;
  2890. }
  2891. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2892. if (tag & HPSA_ERROR_BIT) {
  2893. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2894. opcode, type);
  2895. return -EIO;
  2896. }
  2897. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2898. opcode, type);
  2899. return 0;
  2900. }
  2901. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2902. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2903. void * __iomem vaddr, u32 use_doorbell)
  2904. {
  2905. u16 pmcsr;
  2906. int pos;
  2907. if (use_doorbell) {
  2908. /* For everything after the P600, the PCI power state method
  2909. * of resetting the controller doesn't work, so we have this
  2910. * other way using the doorbell register.
  2911. */
  2912. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2913. writel(use_doorbell, vaddr + SA5_DOORBELL);
  2914. } else { /* Try to do it the PCI power state way */
  2915. /* Quoting from the Open CISS Specification: "The Power
  2916. * Management Control/Status Register (CSR) controls the power
  2917. * state of the device. The normal operating state is D0,
  2918. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2919. * the controller, place the interface device in D3 then to D0,
  2920. * this causes a secondary PCI reset which will reset the
  2921. * controller." */
  2922. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2923. if (pos == 0) {
  2924. dev_err(&pdev->dev,
  2925. "hpsa_reset_controller: "
  2926. "PCI PM not supported\n");
  2927. return -ENODEV;
  2928. }
  2929. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2930. /* enter the D3hot power management state */
  2931. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2932. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2933. pmcsr |= PCI_D3hot;
  2934. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2935. msleep(500);
  2936. /* enter the D0 power management state */
  2937. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2938. pmcsr |= PCI_D0;
  2939. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2940. }
  2941. return 0;
  2942. }
  2943. static __devinit void init_driver_version(char *driver_version, int len)
  2944. {
  2945. memset(driver_version, 0, len);
  2946. strncpy(driver_version, "hpsa " HPSA_DRIVER_VERSION, len - 1);
  2947. }
  2948. static __devinit int write_driver_ver_to_cfgtable(
  2949. struct CfgTable __iomem *cfgtable)
  2950. {
  2951. char *driver_version;
  2952. int i, size = sizeof(cfgtable->driver_version);
  2953. driver_version = kmalloc(size, GFP_KERNEL);
  2954. if (!driver_version)
  2955. return -ENOMEM;
  2956. init_driver_version(driver_version, size);
  2957. for (i = 0; i < size; i++)
  2958. writeb(driver_version[i], &cfgtable->driver_version[i]);
  2959. kfree(driver_version);
  2960. return 0;
  2961. }
  2962. static __devinit void read_driver_ver_from_cfgtable(
  2963. struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
  2964. {
  2965. int i;
  2966. for (i = 0; i < sizeof(cfgtable->driver_version); i++)
  2967. driver_ver[i] = readb(&cfgtable->driver_version[i]);
  2968. }
  2969. static __devinit int controller_reset_failed(
  2970. struct CfgTable __iomem *cfgtable)
  2971. {
  2972. char *driver_ver, *old_driver_ver;
  2973. int rc, size = sizeof(cfgtable->driver_version);
  2974. old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
  2975. if (!old_driver_ver)
  2976. return -ENOMEM;
  2977. driver_ver = old_driver_ver + size;
  2978. /* After a reset, the 32 bytes of "driver version" in the cfgtable
  2979. * should have been changed, otherwise we know the reset failed.
  2980. */
  2981. init_driver_version(old_driver_ver, size);
  2982. read_driver_ver_from_cfgtable(cfgtable, driver_ver);
  2983. rc = !memcmp(driver_ver, old_driver_ver, size);
  2984. kfree(old_driver_ver);
  2985. return rc;
  2986. }
  2987. /* This does a hard reset of the controller using PCI power management
  2988. * states or the using the doorbell register.
  2989. */
  2990. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  2991. {
  2992. u64 cfg_offset;
  2993. u32 cfg_base_addr;
  2994. u64 cfg_base_addr_index;
  2995. void __iomem *vaddr;
  2996. unsigned long paddr;
  2997. u32 misc_fw_support;
  2998. int rc;
  2999. struct CfgTable __iomem *cfgtable;
  3000. u32 use_doorbell;
  3001. u32 board_id;
  3002. u16 command_register;
  3003. /* For controllers as old as the P600, this is very nearly
  3004. * the same thing as
  3005. *
  3006. * pci_save_state(pci_dev);
  3007. * pci_set_power_state(pci_dev, PCI_D3hot);
  3008. * pci_set_power_state(pci_dev, PCI_D0);
  3009. * pci_restore_state(pci_dev);
  3010. *
  3011. * For controllers newer than the P600, the pci power state
  3012. * method of resetting doesn't work so we have another way
  3013. * using the doorbell register.
  3014. */
  3015. rc = hpsa_lookup_board_id(pdev, &board_id);
  3016. if (rc < 0 || !ctlr_is_resettable(board_id)) {
  3017. dev_warn(&pdev->dev, "Not resetting device.\n");
  3018. return -ENODEV;
  3019. }
  3020. /* if controller is soft- but not hard resettable... */
  3021. if (!ctlr_is_hard_resettable(board_id))
  3022. return -ENOTSUPP; /* try soft reset later. */
  3023. /* Save the PCI command register */
  3024. pci_read_config_word(pdev, 4, &command_register);
  3025. /* Turn the board off. This is so that later pci_restore_state()
  3026. * won't turn the board on before the rest of config space is ready.
  3027. */
  3028. pci_disable_device(pdev);
  3029. pci_save_state(pdev);
  3030. /* find the first memory BAR, so we can find the cfg table */
  3031. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  3032. if (rc)
  3033. return rc;
  3034. vaddr = remap_pci_mem(paddr, 0x250);
  3035. if (!vaddr)
  3036. return -ENOMEM;
  3037. /* find cfgtable in order to check if reset via doorbell is supported */
  3038. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3039. &cfg_base_addr_index, &cfg_offset);
  3040. if (rc)
  3041. goto unmap_vaddr;
  3042. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3043. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3044. if (!cfgtable) {
  3045. rc = -ENOMEM;
  3046. goto unmap_vaddr;
  3047. }
  3048. rc = write_driver_ver_to_cfgtable(cfgtable);
  3049. if (rc)
  3050. goto unmap_vaddr;
  3051. /* If reset via doorbell register is supported, use that.
  3052. * There are two such methods. Favor the newest method.
  3053. */
  3054. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3055. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
  3056. if (use_doorbell) {
  3057. use_doorbell = DOORBELL_CTLR_RESET2;
  3058. } else {
  3059. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3060. if (use_doorbell) {
  3061. dev_warn(&pdev->dev, "Controller claims that "
  3062. "'Bit 2 doorbell reset' is "
  3063. "supported, but not 'bit 5 doorbell reset'. "
  3064. "Firmware update is recommended.\n");
  3065. rc = -ENOTSUPP; /* try soft reset */
  3066. goto unmap_cfgtable;
  3067. }
  3068. }
  3069. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  3070. if (rc)
  3071. goto unmap_cfgtable;
  3072. pci_restore_state(pdev);
  3073. rc = pci_enable_device(pdev);
  3074. if (rc) {
  3075. dev_warn(&pdev->dev, "failed to enable device.\n");
  3076. goto unmap_cfgtable;
  3077. }
  3078. pci_write_config_word(pdev, 4, command_register);
  3079. /* Some devices (notably the HP Smart Array 5i Controller)
  3080. need a little pause here */
  3081. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3082. /* Wait for board to become not ready, then ready. */
  3083. dev_info(&pdev->dev, "Waiting for board to reset.\n");
  3084. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3085. if (rc) {
  3086. dev_warn(&pdev->dev,
  3087. "failed waiting for board to reset."
  3088. " Will try soft reset.\n");
  3089. rc = -ENOTSUPP; /* Not expected, but try soft reset later */
  3090. goto unmap_cfgtable;
  3091. }
  3092. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3093. if (rc) {
  3094. dev_warn(&pdev->dev,
  3095. "failed waiting for board to become ready "
  3096. "after hard reset\n");
  3097. goto unmap_cfgtable;
  3098. }
  3099. rc = controller_reset_failed(vaddr);
  3100. if (rc < 0)
  3101. goto unmap_cfgtable;
  3102. if (rc) {
  3103. dev_warn(&pdev->dev, "Unable to successfully reset "
  3104. "controller. Will try soft reset.\n");
  3105. rc = -ENOTSUPP;
  3106. } else {
  3107. dev_info(&pdev->dev, "board ready after hard reset.\n");
  3108. }
  3109. unmap_cfgtable:
  3110. iounmap(cfgtable);
  3111. unmap_vaddr:
  3112. iounmap(vaddr);
  3113. return rc;
  3114. }
  3115. /*
  3116. * We cannot read the structure directly, for portability we must use
  3117. * the io functions.
  3118. * This is for debug only.
  3119. */
  3120. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  3121. {
  3122. #ifdef HPSA_DEBUG
  3123. int i;
  3124. char temp_name[17];
  3125. dev_info(dev, "Controller Configuration information\n");
  3126. dev_info(dev, "------------------------------------\n");
  3127. for (i = 0; i < 4; i++)
  3128. temp_name[i] = readb(&(tb->Signature[i]));
  3129. temp_name[4] = '\0';
  3130. dev_info(dev, " Signature = %s\n", temp_name);
  3131. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  3132. dev_info(dev, " Transport methods supported = 0x%x\n",
  3133. readl(&(tb->TransportSupport)));
  3134. dev_info(dev, " Transport methods active = 0x%x\n",
  3135. readl(&(tb->TransportActive)));
  3136. dev_info(dev, " Requested transport Method = 0x%x\n",
  3137. readl(&(tb->HostWrite.TransportRequest)));
  3138. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  3139. readl(&(tb->HostWrite.CoalIntDelay)));
  3140. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  3141. readl(&(tb->HostWrite.CoalIntCount)));
  3142. dev_info(dev, " Max outstanding commands = 0x%d\n",
  3143. readl(&(tb->CmdsOutMax)));
  3144. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  3145. for (i = 0; i < 16; i++)
  3146. temp_name[i] = readb(&(tb->ServerName[i]));
  3147. temp_name[16] = '\0';
  3148. dev_info(dev, " Server Name = %s\n", temp_name);
  3149. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  3150. readl(&(tb->HeartBeat)));
  3151. #endif /* HPSA_DEBUG */
  3152. }
  3153. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3154. {
  3155. int i, offset, mem_type, bar_type;
  3156. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3157. return 0;
  3158. offset = 0;
  3159. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3160. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3161. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3162. offset += 4;
  3163. else {
  3164. mem_type = pci_resource_flags(pdev, i) &
  3165. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3166. switch (mem_type) {
  3167. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3168. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3169. offset += 4; /* 32 bit */
  3170. break;
  3171. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3172. offset += 8;
  3173. break;
  3174. default: /* reserved in PCI 2.2 */
  3175. dev_warn(&pdev->dev,
  3176. "base address is invalid\n");
  3177. return -1;
  3178. break;
  3179. }
  3180. }
  3181. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3182. return i + 1;
  3183. }
  3184. return -1;
  3185. }
  3186. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3187. * controllers that are capable. If not, we use IO-APIC mode.
  3188. */
  3189. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3190. {
  3191. #ifdef CONFIG_PCI_MSI
  3192. int err;
  3193. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  3194. {0, 2}, {0, 3}
  3195. };
  3196. /* Some boards advertise MSI but don't really support it */
  3197. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3198. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3199. goto default_int_mode;
  3200. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3201. dev_info(&h->pdev->dev, "MSIX\n");
  3202. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3203. if (!err) {
  3204. h->intr[0] = hpsa_msix_entries[0].vector;
  3205. h->intr[1] = hpsa_msix_entries[1].vector;
  3206. h->intr[2] = hpsa_msix_entries[2].vector;
  3207. h->intr[3] = hpsa_msix_entries[3].vector;
  3208. h->msix_vector = 1;
  3209. return;
  3210. }
  3211. if (err > 0) {
  3212. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3213. "available\n", err);
  3214. goto default_int_mode;
  3215. } else {
  3216. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3217. err);
  3218. goto default_int_mode;
  3219. }
  3220. }
  3221. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3222. dev_info(&h->pdev->dev, "MSI\n");
  3223. if (!pci_enable_msi(h->pdev))
  3224. h->msi_vector = 1;
  3225. else
  3226. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3227. }
  3228. default_int_mode:
  3229. #endif /* CONFIG_PCI_MSI */
  3230. /* if we get here we're going to use the default interrupt mode */
  3231. h->intr[h->intr_mode] = h->pdev->irq;
  3232. }
  3233. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3234. {
  3235. int i;
  3236. u32 subsystem_vendor_id, subsystem_device_id;
  3237. subsystem_vendor_id = pdev->subsystem_vendor;
  3238. subsystem_device_id = pdev->subsystem_device;
  3239. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3240. subsystem_vendor_id;
  3241. for (i = 0; i < ARRAY_SIZE(products); i++)
  3242. if (*board_id == products[i].board_id)
  3243. return i;
  3244. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3245. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3246. !hpsa_allow_any) {
  3247. dev_warn(&pdev->dev, "unrecognized board ID: "
  3248. "0x%08x, ignoring.\n", *board_id);
  3249. return -ENODEV;
  3250. }
  3251. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3252. }
  3253. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3254. {
  3255. u16 command;
  3256. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3257. return ((command & PCI_COMMAND_MEMORY) == 0);
  3258. }
  3259. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3260. unsigned long *memory_bar)
  3261. {
  3262. int i;
  3263. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3264. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3265. /* addressing mode bits already removed */
  3266. *memory_bar = pci_resource_start(pdev, i);
  3267. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3268. *memory_bar);
  3269. return 0;
  3270. }
  3271. dev_warn(&pdev->dev, "no memory BAR found\n");
  3272. return -ENODEV;
  3273. }
  3274. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3275. void __iomem *vaddr, int wait_for_ready)
  3276. {
  3277. int i, iterations;
  3278. u32 scratchpad;
  3279. if (wait_for_ready)
  3280. iterations = HPSA_BOARD_READY_ITERATIONS;
  3281. else
  3282. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3283. for (i = 0; i < iterations; i++) {
  3284. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3285. if (wait_for_ready) {
  3286. if (scratchpad == HPSA_FIRMWARE_READY)
  3287. return 0;
  3288. } else {
  3289. if (scratchpad != HPSA_FIRMWARE_READY)
  3290. return 0;
  3291. }
  3292. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3293. }
  3294. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3295. return -ENODEV;
  3296. }
  3297. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3298. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3299. u64 *cfg_offset)
  3300. {
  3301. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3302. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3303. *cfg_base_addr &= (u32) 0x0000ffff;
  3304. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3305. if (*cfg_base_addr_index == -1) {
  3306. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3307. return -ENODEV;
  3308. }
  3309. return 0;
  3310. }
  3311. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3312. {
  3313. u64 cfg_offset;
  3314. u32 cfg_base_addr;
  3315. u64 cfg_base_addr_index;
  3316. u32 trans_offset;
  3317. int rc;
  3318. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3319. &cfg_base_addr_index, &cfg_offset);
  3320. if (rc)
  3321. return rc;
  3322. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3323. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3324. if (!h->cfgtable)
  3325. return -ENOMEM;
  3326. rc = write_driver_ver_to_cfgtable(h->cfgtable);
  3327. if (rc)
  3328. return rc;
  3329. /* Find performant mode table. */
  3330. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3331. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3332. cfg_base_addr_index)+cfg_offset+trans_offset,
  3333. sizeof(*h->transtable));
  3334. if (!h->transtable)
  3335. return -ENOMEM;
  3336. return 0;
  3337. }
  3338. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3339. {
  3340. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3341. /* Limit commands in memory limited kdump scenario. */
  3342. if (reset_devices && h->max_commands > 32)
  3343. h->max_commands = 32;
  3344. if (h->max_commands < 16) {
  3345. dev_warn(&h->pdev->dev, "Controller reports "
  3346. "max supported commands of %d, an obvious lie. "
  3347. "Using 16. Ensure that firmware is up to date.\n",
  3348. h->max_commands);
  3349. h->max_commands = 16;
  3350. }
  3351. }
  3352. /* Interrogate the hardware for some limits:
  3353. * max commands, max SG elements without chaining, and with chaining,
  3354. * SG chain block size, etc.
  3355. */
  3356. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3357. {
  3358. hpsa_get_max_perf_mode_cmds(h);
  3359. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3360. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3361. /*
  3362. * Limit in-command s/g elements to 32 save dma'able memory.
  3363. * Howvever spec says if 0, use 31
  3364. */
  3365. h->max_cmd_sg_entries = 31;
  3366. if (h->maxsgentries > 512) {
  3367. h->max_cmd_sg_entries = 32;
  3368. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3369. h->maxsgentries--; /* save one for chain pointer */
  3370. } else {
  3371. h->maxsgentries = 31; /* default to traditional values */
  3372. h->chainsize = 0;
  3373. }
  3374. }
  3375. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3376. {
  3377. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3378. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3379. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3380. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3381. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3382. return false;
  3383. }
  3384. return true;
  3385. }
  3386. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3387. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3388. {
  3389. #ifdef CONFIG_X86
  3390. u32 prefetch;
  3391. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3392. prefetch |= 0x100;
  3393. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3394. #endif
  3395. }
  3396. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3397. * in a prefetch beyond physical memory.
  3398. */
  3399. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3400. {
  3401. u32 dma_prefetch;
  3402. if (h->board_id != 0x3225103C)
  3403. return;
  3404. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3405. dma_prefetch |= 0x8000;
  3406. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3407. }
  3408. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3409. {
  3410. int i;
  3411. u32 doorbell_value;
  3412. unsigned long flags;
  3413. /* under certain very rare conditions, this can take awhile.
  3414. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3415. * as we enter this code.)
  3416. */
  3417. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3418. spin_lock_irqsave(&h->lock, flags);
  3419. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3420. spin_unlock_irqrestore(&h->lock, flags);
  3421. if (!(doorbell_value & CFGTBL_ChangeReq))
  3422. break;
  3423. /* delay and try again */
  3424. usleep_range(10000, 20000);
  3425. }
  3426. }
  3427. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3428. {
  3429. u32 trans_support;
  3430. trans_support = readl(&(h->cfgtable->TransportSupport));
  3431. if (!(trans_support & SIMPLE_MODE))
  3432. return -ENOTSUPP;
  3433. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3434. /* Update the field, and then ring the doorbell */
  3435. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3436. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3437. hpsa_wait_for_mode_change_ack(h);
  3438. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3439. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3440. dev_warn(&h->pdev->dev,
  3441. "unable to get board into simple mode\n");
  3442. return -ENODEV;
  3443. }
  3444. h->transMethod = CFGTBL_Trans_Simple;
  3445. return 0;
  3446. }
  3447. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3448. {
  3449. int prod_index, err;
  3450. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3451. if (prod_index < 0)
  3452. return -ENODEV;
  3453. h->product_name = products[prod_index].product_name;
  3454. h->access = *(products[prod_index].access);
  3455. if (hpsa_board_disabled(h->pdev)) {
  3456. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3457. return -ENODEV;
  3458. }
  3459. err = pci_enable_device(h->pdev);
  3460. if (err) {
  3461. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3462. return err;
  3463. }
  3464. err = pci_request_regions(h->pdev, "hpsa");
  3465. if (err) {
  3466. dev_err(&h->pdev->dev,
  3467. "cannot obtain PCI resources, aborting\n");
  3468. return err;
  3469. }
  3470. hpsa_interrupt_mode(h);
  3471. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3472. if (err)
  3473. goto err_out_free_res;
  3474. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3475. if (!h->vaddr) {
  3476. err = -ENOMEM;
  3477. goto err_out_free_res;
  3478. }
  3479. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3480. if (err)
  3481. goto err_out_free_res;
  3482. err = hpsa_find_cfgtables(h);
  3483. if (err)
  3484. goto err_out_free_res;
  3485. hpsa_find_board_params(h);
  3486. if (!hpsa_CISS_signature_present(h)) {
  3487. err = -ENODEV;
  3488. goto err_out_free_res;
  3489. }
  3490. hpsa_enable_scsi_prefetch(h);
  3491. hpsa_p600_dma_prefetch_quirk(h);
  3492. err = hpsa_enter_simple_mode(h);
  3493. if (err)
  3494. goto err_out_free_res;
  3495. return 0;
  3496. err_out_free_res:
  3497. if (h->transtable)
  3498. iounmap(h->transtable);
  3499. if (h->cfgtable)
  3500. iounmap(h->cfgtable);
  3501. if (h->vaddr)
  3502. iounmap(h->vaddr);
  3503. /*
  3504. * Deliberately omit pci_disable_device(): it does something nasty to
  3505. * Smart Array controllers that pci_enable_device does not undo
  3506. */
  3507. pci_release_regions(h->pdev);
  3508. return err;
  3509. }
  3510. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3511. {
  3512. int rc;
  3513. #define HBA_INQUIRY_BYTE_COUNT 64
  3514. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3515. if (!h->hba_inquiry_data)
  3516. return;
  3517. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3518. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3519. if (rc != 0) {
  3520. kfree(h->hba_inquiry_data);
  3521. h->hba_inquiry_data = NULL;
  3522. }
  3523. }
  3524. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3525. {
  3526. int rc, i;
  3527. if (!reset_devices)
  3528. return 0;
  3529. /* Reset the controller with a PCI power-cycle or via doorbell */
  3530. rc = hpsa_kdump_hard_reset_controller(pdev);
  3531. /* -ENOTSUPP here means we cannot reset the controller
  3532. * but it's already (and still) up and running in
  3533. * "performant mode". Or, it might be 640x, which can't reset
  3534. * due to concerns about shared bbwc between 6402/6404 pair.
  3535. */
  3536. if (rc == -ENOTSUPP)
  3537. return rc; /* just try to do the kdump anyhow. */
  3538. if (rc)
  3539. return -ENODEV;
  3540. /* Now try to get the controller to respond to a no-op */
  3541. dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
  3542. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3543. if (hpsa_noop(pdev) == 0)
  3544. break;
  3545. else
  3546. dev_warn(&pdev->dev, "no-op failed%s\n",
  3547. (i < 11 ? "; re-trying" : ""));
  3548. }
  3549. return 0;
  3550. }
  3551. static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
  3552. {
  3553. h->cmd_pool_bits = kzalloc(
  3554. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
  3555. sizeof(unsigned long), GFP_KERNEL);
  3556. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3557. h->nr_cmds * sizeof(*h->cmd_pool),
  3558. &(h->cmd_pool_dhandle));
  3559. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3560. h->nr_cmds * sizeof(*h->errinfo_pool),
  3561. &(h->errinfo_pool_dhandle));
  3562. if ((h->cmd_pool_bits == NULL)
  3563. || (h->cmd_pool == NULL)
  3564. || (h->errinfo_pool == NULL)) {
  3565. dev_err(&h->pdev->dev, "out of memory in %s", __func__);
  3566. return -ENOMEM;
  3567. }
  3568. return 0;
  3569. }
  3570. static void hpsa_free_cmd_pool(struct ctlr_info *h)
  3571. {
  3572. kfree(h->cmd_pool_bits);
  3573. if (h->cmd_pool)
  3574. pci_free_consistent(h->pdev,
  3575. h->nr_cmds * sizeof(struct CommandList),
  3576. h->cmd_pool, h->cmd_pool_dhandle);
  3577. if (h->errinfo_pool)
  3578. pci_free_consistent(h->pdev,
  3579. h->nr_cmds * sizeof(struct ErrorInfo),
  3580. h->errinfo_pool,
  3581. h->errinfo_pool_dhandle);
  3582. }
  3583. static int hpsa_request_irq(struct ctlr_info *h,
  3584. irqreturn_t (*msixhandler)(int, void *),
  3585. irqreturn_t (*intxhandler)(int, void *))
  3586. {
  3587. int rc;
  3588. if (h->msix_vector || h->msi_vector)
  3589. rc = request_irq(h->intr[h->intr_mode], msixhandler,
  3590. IRQF_DISABLED, h->devname, h);
  3591. else
  3592. rc = request_irq(h->intr[h->intr_mode], intxhandler,
  3593. IRQF_DISABLED, h->devname, h);
  3594. if (rc) {
  3595. dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
  3596. h->intr[h->intr_mode], h->devname);
  3597. return -ENODEV;
  3598. }
  3599. return 0;
  3600. }
  3601. static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
  3602. {
  3603. if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
  3604. HPSA_RESET_TYPE_CONTROLLER)) {
  3605. dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
  3606. return -EIO;
  3607. }
  3608. dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
  3609. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
  3610. dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
  3611. return -1;
  3612. }
  3613. dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
  3614. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
  3615. dev_warn(&h->pdev->dev, "Board failed to become ready "
  3616. "after soft reset.\n");
  3617. return -1;
  3618. }
  3619. return 0;
  3620. }
  3621. static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
  3622. {
  3623. free_irq(h->intr[h->intr_mode], h);
  3624. #ifdef CONFIG_PCI_MSI
  3625. if (h->msix_vector)
  3626. pci_disable_msix(h->pdev);
  3627. else if (h->msi_vector)
  3628. pci_disable_msi(h->pdev);
  3629. #endif /* CONFIG_PCI_MSI */
  3630. hpsa_free_sg_chain_blocks(h);
  3631. hpsa_free_cmd_pool(h);
  3632. kfree(h->blockFetchTable);
  3633. pci_free_consistent(h->pdev, h->reply_pool_size,
  3634. h->reply_pool, h->reply_pool_dhandle);
  3635. if (h->vaddr)
  3636. iounmap(h->vaddr);
  3637. if (h->transtable)
  3638. iounmap(h->transtable);
  3639. if (h->cfgtable)
  3640. iounmap(h->cfgtable);
  3641. pci_release_regions(h->pdev);
  3642. kfree(h);
  3643. }
  3644. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3645. const struct pci_device_id *ent)
  3646. {
  3647. int dac, rc;
  3648. struct ctlr_info *h;
  3649. int try_soft_reset = 0;
  3650. unsigned long flags;
  3651. if (number_of_controllers == 0)
  3652. printk(KERN_INFO DRIVER_NAME "\n");
  3653. rc = hpsa_init_reset_devices(pdev);
  3654. if (rc) {
  3655. if (rc != -ENOTSUPP)
  3656. return rc;
  3657. /* If the reset fails in a particular way (it has no way to do
  3658. * a proper hard reset, so returns -ENOTSUPP) we can try to do
  3659. * a soft reset once we get the controller configured up to the
  3660. * point that it can accept a command.
  3661. */
  3662. try_soft_reset = 1;
  3663. rc = 0;
  3664. }
  3665. reinit_after_soft_reset:
  3666. /* Command structures must be aligned on a 32-byte boundary because
  3667. * the 5 lower bits of the address are used by the hardware. and by
  3668. * the driver. See comments in hpsa.h for more info.
  3669. */
  3670. #define COMMANDLIST_ALIGNMENT 32
  3671. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3672. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3673. if (!h)
  3674. return -ENOMEM;
  3675. h->pdev = pdev;
  3676. h->busy_initializing = 1;
  3677. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  3678. INIT_LIST_HEAD(&h->cmpQ);
  3679. INIT_LIST_HEAD(&h->reqQ);
  3680. spin_lock_init(&h->lock);
  3681. spin_lock_init(&h->scan_lock);
  3682. rc = hpsa_pci_init(h);
  3683. if (rc != 0)
  3684. goto clean1;
  3685. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3686. h->ctlr = number_of_controllers;
  3687. number_of_controllers++;
  3688. /* configure PCI DMA stuff */
  3689. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3690. if (rc == 0) {
  3691. dac = 1;
  3692. } else {
  3693. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3694. if (rc == 0) {
  3695. dac = 0;
  3696. } else {
  3697. dev_err(&pdev->dev, "no suitable DMA available\n");
  3698. goto clean1;
  3699. }
  3700. }
  3701. /* make sure the board interrupts are off */
  3702. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3703. if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
  3704. goto clean2;
  3705. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3706. h->devname, pdev->device,
  3707. h->intr[h->intr_mode], dac ? "" : " not");
  3708. if (hpsa_allocate_cmd_pool(h))
  3709. goto clean4;
  3710. if (hpsa_allocate_sg_chain_blocks(h))
  3711. goto clean4;
  3712. init_waitqueue_head(&h->scan_wait_queue);
  3713. h->scan_finished = 1; /* no scan currently in progress */
  3714. pci_set_drvdata(pdev, h);
  3715. h->ndevices = 0;
  3716. h->scsi_host = NULL;
  3717. spin_lock_init(&h->devlock);
  3718. hpsa_put_ctlr_into_performant_mode(h);
  3719. /* At this point, the controller is ready to take commands.
  3720. * Now, if reset_devices and the hard reset didn't work, try
  3721. * the soft reset and see if that works.
  3722. */
  3723. if (try_soft_reset) {
  3724. /* This is kind of gross. We may or may not get a completion
  3725. * from the soft reset command, and if we do, then the value
  3726. * from the fifo may or may not be valid. So, we wait 10 secs
  3727. * after the reset throwing away any completions we get during
  3728. * that time. Unregister the interrupt handler and register
  3729. * fake ones to scoop up any residual completions.
  3730. */
  3731. spin_lock_irqsave(&h->lock, flags);
  3732. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3733. spin_unlock_irqrestore(&h->lock, flags);
  3734. free_irq(h->intr[h->intr_mode], h);
  3735. rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
  3736. hpsa_intx_discard_completions);
  3737. if (rc) {
  3738. dev_warn(&h->pdev->dev, "Failed to request_irq after "
  3739. "soft reset.\n");
  3740. goto clean4;
  3741. }
  3742. rc = hpsa_kdump_soft_reset(h);
  3743. if (rc)
  3744. /* Neither hard nor soft reset worked, we're hosed. */
  3745. goto clean4;
  3746. dev_info(&h->pdev->dev, "Board READY.\n");
  3747. dev_info(&h->pdev->dev,
  3748. "Waiting for stale completions to drain.\n");
  3749. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3750. msleep(10000);
  3751. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3752. rc = controller_reset_failed(h->cfgtable);
  3753. if (rc)
  3754. dev_info(&h->pdev->dev,
  3755. "Soft reset appears to have failed.\n");
  3756. /* since the controller's reset, we have to go back and re-init
  3757. * everything. Easiest to just forget what we've done and do it
  3758. * all over again.
  3759. */
  3760. hpsa_undo_allocations_after_kdump_soft_reset(h);
  3761. try_soft_reset = 0;
  3762. if (rc)
  3763. /* don't go to clean4, we already unallocated */
  3764. return -ENODEV;
  3765. goto reinit_after_soft_reset;
  3766. }
  3767. /* Turn the interrupts on so we can service requests */
  3768. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3769. hpsa_hba_inquiry(h);
  3770. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3771. h->busy_initializing = 0;
  3772. return 1;
  3773. clean4:
  3774. hpsa_free_sg_chain_blocks(h);
  3775. hpsa_free_cmd_pool(h);
  3776. free_irq(h->intr[h->intr_mode], h);
  3777. clean2:
  3778. clean1:
  3779. h->busy_initializing = 0;
  3780. kfree(h);
  3781. return rc;
  3782. }
  3783. static void hpsa_flush_cache(struct ctlr_info *h)
  3784. {
  3785. char *flush_buf;
  3786. struct CommandList *c;
  3787. flush_buf = kzalloc(4, GFP_KERNEL);
  3788. if (!flush_buf)
  3789. return;
  3790. c = cmd_special_alloc(h);
  3791. if (!c) {
  3792. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3793. goto out_of_memory;
  3794. }
  3795. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3796. RAID_CTLR_LUNID, TYPE_CMD);
  3797. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3798. if (c->err_info->CommandStatus != 0)
  3799. dev_warn(&h->pdev->dev,
  3800. "error flushing cache on controller\n");
  3801. cmd_special_free(h, c);
  3802. out_of_memory:
  3803. kfree(flush_buf);
  3804. }
  3805. static void hpsa_shutdown(struct pci_dev *pdev)
  3806. {
  3807. struct ctlr_info *h;
  3808. h = pci_get_drvdata(pdev);
  3809. /* Turn board interrupts off and send the flush cache command
  3810. * sendcmd will turn off interrupt, and send the flush...
  3811. * To write all data in the battery backed cache to disks
  3812. */
  3813. hpsa_flush_cache(h);
  3814. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3815. free_irq(h->intr[h->intr_mode], h);
  3816. #ifdef CONFIG_PCI_MSI
  3817. if (h->msix_vector)
  3818. pci_disable_msix(h->pdev);
  3819. else if (h->msi_vector)
  3820. pci_disable_msi(h->pdev);
  3821. #endif /* CONFIG_PCI_MSI */
  3822. }
  3823. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3824. {
  3825. struct ctlr_info *h;
  3826. if (pci_get_drvdata(pdev) == NULL) {
  3827. dev_err(&pdev->dev, "unable to remove device \n");
  3828. return;
  3829. }
  3830. h = pci_get_drvdata(pdev);
  3831. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3832. hpsa_shutdown(pdev);
  3833. iounmap(h->vaddr);
  3834. iounmap(h->transtable);
  3835. iounmap(h->cfgtable);
  3836. hpsa_free_sg_chain_blocks(h);
  3837. pci_free_consistent(h->pdev,
  3838. h->nr_cmds * sizeof(struct CommandList),
  3839. h->cmd_pool, h->cmd_pool_dhandle);
  3840. pci_free_consistent(h->pdev,
  3841. h->nr_cmds * sizeof(struct ErrorInfo),
  3842. h->errinfo_pool, h->errinfo_pool_dhandle);
  3843. pci_free_consistent(h->pdev, h->reply_pool_size,
  3844. h->reply_pool, h->reply_pool_dhandle);
  3845. kfree(h->cmd_pool_bits);
  3846. kfree(h->blockFetchTable);
  3847. kfree(h->hba_inquiry_data);
  3848. /*
  3849. * Deliberately omit pci_disable_device(): it does something nasty to
  3850. * Smart Array controllers that pci_enable_device does not undo
  3851. */
  3852. pci_release_regions(pdev);
  3853. pci_set_drvdata(pdev, NULL);
  3854. kfree(h);
  3855. }
  3856. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3857. __attribute__((unused)) pm_message_t state)
  3858. {
  3859. return -ENOSYS;
  3860. }
  3861. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3862. {
  3863. return -ENOSYS;
  3864. }
  3865. static struct pci_driver hpsa_pci_driver = {
  3866. .name = "hpsa",
  3867. .probe = hpsa_init_one,
  3868. .remove = __devexit_p(hpsa_remove_one),
  3869. .id_table = hpsa_pci_device_id, /* id_table */
  3870. .shutdown = hpsa_shutdown,
  3871. .suspend = hpsa_suspend,
  3872. .resume = hpsa_resume,
  3873. };
  3874. /* Fill in bucket_map[], given nsgs (the max number of
  3875. * scatter gather elements supported) and bucket[],
  3876. * which is an array of 8 integers. The bucket[] array
  3877. * contains 8 different DMA transfer sizes (in 16
  3878. * byte increments) which the controller uses to fetch
  3879. * commands. This function fills in bucket_map[], which
  3880. * maps a given number of scatter gather elements to one of
  3881. * the 8 DMA transfer sizes. The point of it is to allow the
  3882. * controller to only do as much DMA as needed to fetch the
  3883. * command, with the DMA transfer size encoded in the lower
  3884. * bits of the command address.
  3885. */
  3886. static void calc_bucket_map(int bucket[], int num_buckets,
  3887. int nsgs, int *bucket_map)
  3888. {
  3889. int i, j, b, size;
  3890. /* even a command with 0 SGs requires 4 blocks */
  3891. #define MINIMUM_TRANSFER_BLOCKS 4
  3892. #define NUM_BUCKETS 8
  3893. /* Note, bucket_map must have nsgs+1 entries. */
  3894. for (i = 0; i <= nsgs; i++) {
  3895. /* Compute size of a command with i SG entries */
  3896. size = i + MINIMUM_TRANSFER_BLOCKS;
  3897. b = num_buckets; /* Assume the biggest bucket */
  3898. /* Find the bucket that is just big enough */
  3899. for (j = 0; j < 8; j++) {
  3900. if (bucket[j] >= size) {
  3901. b = j;
  3902. break;
  3903. }
  3904. }
  3905. /* for a command with i SG entries, use bucket b. */
  3906. bucket_map[i] = b;
  3907. }
  3908. }
  3909. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
  3910. u32 use_short_tags)
  3911. {
  3912. int i;
  3913. unsigned long register_value;
  3914. /* This is a bit complicated. There are 8 registers on
  3915. * the controller which we write to to tell it 8 different
  3916. * sizes of commands which there may be. It's a way of
  3917. * reducing the DMA done to fetch each command. Encoded into
  3918. * each command's tag are 3 bits which communicate to the controller
  3919. * which of the eight sizes that command fits within. The size of
  3920. * each command depends on how many scatter gather entries there are.
  3921. * Each SG entry requires 16 bytes. The eight registers are programmed
  3922. * with the number of 16-byte blocks a command of that size requires.
  3923. * The smallest command possible requires 5 such 16 byte blocks.
  3924. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3925. * blocks. Note, this only extends to the SG entries contained
  3926. * within the command block, and does not extend to chained blocks
  3927. * of SG elements. bft[] contains the eight values we write to
  3928. * the registers. They are not evenly distributed, but have more
  3929. * sizes for small commands, and fewer sizes for larger commands.
  3930. */
  3931. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3932. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3933. /* 5 = 1 s/g entry or 4k
  3934. * 6 = 2 s/g entry or 8k
  3935. * 8 = 4 s/g entry or 16k
  3936. * 10 = 6 s/g entry or 24k
  3937. */
  3938. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3939. /* Controller spec: zero out this buffer. */
  3940. memset(h->reply_pool, 0, h->reply_pool_size);
  3941. h->reply_pool_head = h->reply_pool;
  3942. bft[7] = h->max_sg_entries + 4;
  3943. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3944. for (i = 0; i < 8; i++)
  3945. writel(bft[i], &h->transtable->BlockFetch[i]);
  3946. /* size of controller ring buffer */
  3947. writel(h->max_commands, &h->transtable->RepQSize);
  3948. writel(1, &h->transtable->RepQCount);
  3949. writel(0, &h->transtable->RepQCtrAddrLow32);
  3950. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3951. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3952. writel(0, &h->transtable->RepQAddr0High32);
  3953. writel(CFGTBL_Trans_Performant | use_short_tags,
  3954. &(h->cfgtable->HostWrite.TransportRequest));
  3955. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3956. hpsa_wait_for_mode_change_ack(h);
  3957. register_value = readl(&(h->cfgtable->TransportActive));
  3958. if (!(register_value & CFGTBL_Trans_Performant)) {
  3959. dev_warn(&h->pdev->dev, "unable to get board into"
  3960. " performant mode\n");
  3961. return;
  3962. }
  3963. /* Change the access methods to the performant access methods */
  3964. h->access = SA5_performant_access;
  3965. h->transMethod = CFGTBL_Trans_Performant;
  3966. }
  3967. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3968. {
  3969. u32 trans_support;
  3970. if (hpsa_simple_mode)
  3971. return;
  3972. trans_support = readl(&(h->cfgtable->TransportSupport));
  3973. if (!(trans_support & PERFORMANT_MODE))
  3974. return;
  3975. hpsa_get_max_perf_mode_cmds(h);
  3976. h->max_sg_entries = 32;
  3977. /* Performant mode ring buffer and supporting data structures */
  3978. h->reply_pool_size = h->max_commands * sizeof(u64);
  3979. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3980. &(h->reply_pool_dhandle));
  3981. /* Need a block fetch table for performant mode */
  3982. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3983. sizeof(u32)), GFP_KERNEL);
  3984. if ((h->reply_pool == NULL)
  3985. || (h->blockFetchTable == NULL))
  3986. goto clean_up;
  3987. hpsa_enter_performant_mode(h,
  3988. trans_support & CFGTBL_Trans_use_short_tags);
  3989. return;
  3990. clean_up:
  3991. if (h->reply_pool)
  3992. pci_free_consistent(h->pdev, h->reply_pool_size,
  3993. h->reply_pool, h->reply_pool_dhandle);
  3994. kfree(h->blockFetchTable);
  3995. }
  3996. /*
  3997. * This is it. Register the PCI driver information for the cards we control
  3998. * the OS will call our registered routines when it finds one of our cards.
  3999. */
  4000. static int __init hpsa_init(void)
  4001. {
  4002. return pci_register_driver(&hpsa_pci_driver);
  4003. }
  4004. static void __exit hpsa_cleanup(void)
  4005. {
  4006. pci_unregister_driver(&hpsa_pci_driver);
  4007. }
  4008. module_init(hpsa_init);
  4009. module_exit(hpsa_cleanup);