oxygen.c 19 KB

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  1. /*
  2. * C-Media CMI8788 driver for C-Media's reference design and similar models
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. /*
  20. * CMI8788:
  21. *
  22. * SPI 0 -> 1st AK4396 (front)
  23. * SPI 1 -> 2nd AK4396 (surround)
  24. * SPI 2 -> 3rd AK4396 (center/LFE)
  25. * SPI 3 -> WM8785
  26. * SPI 4 -> 4th AK4396 (back)
  27. *
  28. * GPIO 0 -> DFS0 of AK5385
  29. * GPIO 1 -> DFS1 of AK5385
  30. * GPIO 8 -> enable headphone amplifier on HT-Omega models
  31. *
  32. * CM9780:
  33. *
  34. * LINE_OUT -> input of ADC
  35. *
  36. * AUX_IN <- aux
  37. * CD_IN <- CD
  38. * MIC_IN <- mic
  39. *
  40. * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
  41. */
  42. #include <linux/delay.h>
  43. #include <linux/mutex.h>
  44. #include <linux/pci.h>
  45. #include <sound/ac97_codec.h>
  46. #include <sound/control.h>
  47. #include <sound/core.h>
  48. #include <sound/info.h>
  49. #include <sound/initval.h>
  50. #include <sound/pcm.h>
  51. #include <sound/pcm_params.h>
  52. #include <sound/tlv.h>
  53. #include "oxygen.h"
  54. #include "ak4396.h"
  55. #include "wm8785.h"
  56. MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  57. MODULE_DESCRIPTION("C-Media CMI8788 driver");
  58. MODULE_LICENSE("GPL v2");
  59. MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
  60. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  61. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  62. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  63. module_param_array(index, int, NULL, 0444);
  64. MODULE_PARM_DESC(index, "card index");
  65. module_param_array(id, charp, NULL, 0444);
  66. MODULE_PARM_DESC(id, "ID string");
  67. module_param_array(enable, bool, NULL, 0444);
  68. MODULE_PARM_DESC(enable, "enable card");
  69. enum {
  70. MODEL_CMEDIA_REF,
  71. MODEL_MERIDIAN,
  72. MODEL_CLARO,
  73. MODEL_CLARO_HALO,
  74. MODEL_FANTASIA,
  75. MODEL_2CH_OUTPUT,
  76. };
  77. static DEFINE_PCI_DEVICE_TABLE(oxygen_ids) = {
  78. /* C-Media's reference design */
  79. { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
  80. { OXYGEN_PCI_SUBID(0x10b0, 0x0217), .driver_data = MODEL_CMEDIA_REF },
  81. { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
  82. { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
  83. { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
  84. { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
  85. { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
  86. { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
  87. { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
  88. /* PCI 2.0 HD Audio */
  89. { OXYGEN_PCI_SUBID(0x13f6, 0x8782), .driver_data = MODEL_2CH_OUTPUT },
  90. /* Kuroutoshikou CMI8787-HG2PCI */
  91. { OXYGEN_PCI_SUBID(0x13f6, 0xffff), .driver_data = MODEL_2CH_OUTPUT },
  92. /* TempoTec HiFier Fantasia */
  93. { OXYGEN_PCI_SUBID(0x14c3, 0x1710), .driver_data = MODEL_FANTASIA },
  94. /* TempoTec HiFier Serenade */
  95. { OXYGEN_PCI_SUBID(0x14c3, 0x1711), .driver_data = MODEL_2CH_OUTPUT },
  96. /* AuzenTech X-Meridian */
  97. { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
  98. /* HT-Omega Claro */
  99. { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
  100. /* HT-Omega Claro halo */
  101. { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
  102. { }
  103. };
  104. MODULE_DEVICE_TABLE(pci, oxygen_ids);
  105. #define GPIO_AK5385_DFS_MASK 0x0003
  106. #define GPIO_AK5385_DFS_NORMAL 0x0000
  107. #define GPIO_AK5385_DFS_DOUBLE 0x0001
  108. #define GPIO_AK5385_DFS_QUAD 0x0002
  109. #define GPIO_CLARO_HP 0x0100
  110. struct generic_data {
  111. unsigned int dacs;
  112. u8 ak4396_regs[4][5];
  113. u16 wm8785_regs[3];
  114. };
  115. static void ak4396_write(struct oxygen *chip, unsigned int codec,
  116. u8 reg, u8 value)
  117. {
  118. /* maps ALSA channel pair number to SPI output */
  119. static const u8 codec_spi_map[4] = {
  120. 0, 1, 2, 4
  121. };
  122. struct generic_data *data = chip->model_data;
  123. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  124. OXYGEN_SPI_DATA_LENGTH_2 |
  125. OXYGEN_SPI_CLOCK_160 |
  126. (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
  127. OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
  128. AK4396_WRITE | (reg << 8) | value);
  129. data->ak4396_regs[codec][reg] = value;
  130. }
  131. static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
  132. u8 reg, u8 value)
  133. {
  134. struct generic_data *data = chip->model_data;
  135. if (value != data->ak4396_regs[codec][reg])
  136. ak4396_write(chip, codec, reg, value);
  137. }
  138. static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
  139. {
  140. struct generic_data *data = chip->model_data;
  141. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  142. OXYGEN_SPI_DATA_LENGTH_2 |
  143. OXYGEN_SPI_CLOCK_160 |
  144. (3 << OXYGEN_SPI_CODEC_SHIFT) |
  145. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  146. (reg << 9) | value);
  147. if (reg < ARRAY_SIZE(data->wm8785_regs))
  148. data->wm8785_regs[reg] = value;
  149. }
  150. static void ak4396_registers_init(struct oxygen *chip)
  151. {
  152. struct generic_data *data = chip->model_data;
  153. unsigned int i;
  154. for (i = 0; i < data->dacs; ++i) {
  155. ak4396_write(chip, i, AK4396_CONTROL_1,
  156. AK4396_DIF_24_MSB | AK4396_RSTN);
  157. ak4396_write(chip, i, AK4396_CONTROL_2,
  158. data->ak4396_regs[0][AK4396_CONTROL_2]);
  159. ak4396_write(chip, i, AK4396_CONTROL_3,
  160. AK4396_PCM);
  161. ak4396_write(chip, i, AK4396_LCH_ATT,
  162. chip->dac_volume[i * 2]);
  163. ak4396_write(chip, i, AK4396_RCH_ATT,
  164. chip->dac_volume[i * 2 + 1]);
  165. }
  166. }
  167. static void ak4396_init(struct oxygen *chip)
  168. {
  169. struct generic_data *data = chip->model_data;
  170. data->dacs = chip->model.dac_channels_pcm / 2;
  171. data->ak4396_regs[0][AK4396_CONTROL_2] =
  172. AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
  173. ak4396_registers_init(chip);
  174. snd_component_add(chip->card, "AK4396");
  175. }
  176. static void ak5385_init(struct oxygen *chip)
  177. {
  178. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
  179. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
  180. snd_component_add(chip->card, "AK5385");
  181. }
  182. static void wm8785_registers_init(struct oxygen *chip)
  183. {
  184. struct generic_data *data = chip->model_data;
  185. wm8785_write(chip, WM8785_R7, 0);
  186. wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
  187. wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
  188. }
  189. static void wm8785_init(struct oxygen *chip)
  190. {
  191. struct generic_data *data = chip->model_data;
  192. data->wm8785_regs[0] =
  193. WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
  194. data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
  195. wm8785_registers_init(chip);
  196. snd_component_add(chip->card, "WM8785");
  197. }
  198. static void generic_init(struct oxygen *chip)
  199. {
  200. ak4396_init(chip);
  201. wm8785_init(chip);
  202. }
  203. static void meridian_init(struct oxygen *chip)
  204. {
  205. ak4396_init(chip);
  206. ak5385_init(chip);
  207. }
  208. static void claro_enable_hp(struct oxygen *chip)
  209. {
  210. msleep(300);
  211. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
  212. oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
  213. }
  214. static void claro_init(struct oxygen *chip)
  215. {
  216. ak4396_init(chip);
  217. wm8785_init(chip);
  218. claro_enable_hp(chip);
  219. }
  220. static void claro_halo_init(struct oxygen *chip)
  221. {
  222. ak4396_init(chip);
  223. ak5385_init(chip);
  224. claro_enable_hp(chip);
  225. }
  226. static void fantasia_init(struct oxygen *chip)
  227. {
  228. ak4396_init(chip);
  229. snd_component_add(chip->card, "CS5340");
  230. }
  231. static void stereo_output_init(struct oxygen *chip)
  232. {
  233. ak4396_init(chip);
  234. }
  235. static void generic_cleanup(struct oxygen *chip)
  236. {
  237. }
  238. static void claro_disable_hp(struct oxygen *chip)
  239. {
  240. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
  241. }
  242. static void claro_cleanup(struct oxygen *chip)
  243. {
  244. claro_disable_hp(chip);
  245. }
  246. static void claro_suspend(struct oxygen *chip)
  247. {
  248. claro_disable_hp(chip);
  249. }
  250. static void generic_resume(struct oxygen *chip)
  251. {
  252. ak4396_registers_init(chip);
  253. wm8785_registers_init(chip);
  254. }
  255. static void meridian_resume(struct oxygen *chip)
  256. {
  257. ak4396_registers_init(chip);
  258. }
  259. static void claro_resume(struct oxygen *chip)
  260. {
  261. ak4396_registers_init(chip);
  262. claro_enable_hp(chip);
  263. }
  264. static void stereo_resume(struct oxygen *chip)
  265. {
  266. ak4396_registers_init(chip);
  267. }
  268. static void set_ak4396_params(struct oxygen *chip,
  269. struct snd_pcm_hw_params *params)
  270. {
  271. struct generic_data *data = chip->model_data;
  272. unsigned int i;
  273. u8 value;
  274. value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
  275. if (params_rate(params) <= 54000)
  276. value |= AK4396_DFS_NORMAL;
  277. else if (params_rate(params) <= 108000)
  278. value |= AK4396_DFS_DOUBLE;
  279. else
  280. value |= AK4396_DFS_QUAD;
  281. msleep(1); /* wait for the new MCLK to become stable */
  282. if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
  283. for (i = 0; i < data->dacs; ++i) {
  284. ak4396_write(chip, i, AK4396_CONTROL_1,
  285. AK4396_DIF_24_MSB);
  286. ak4396_write(chip, i, AK4396_CONTROL_2, value);
  287. ak4396_write(chip, i, AK4396_CONTROL_1,
  288. AK4396_DIF_24_MSB | AK4396_RSTN);
  289. }
  290. }
  291. }
  292. static void update_ak4396_volume(struct oxygen *chip)
  293. {
  294. struct generic_data *data = chip->model_data;
  295. unsigned int i;
  296. for (i = 0; i < data->dacs; ++i) {
  297. ak4396_write_cached(chip, i, AK4396_LCH_ATT,
  298. chip->dac_volume[i * 2]);
  299. ak4396_write_cached(chip, i, AK4396_RCH_ATT,
  300. chip->dac_volume[i * 2 + 1]);
  301. }
  302. }
  303. static void update_ak4396_mute(struct oxygen *chip)
  304. {
  305. struct generic_data *data = chip->model_data;
  306. unsigned int i;
  307. u8 value;
  308. value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
  309. if (chip->dac_mute)
  310. value |= AK4396_SMUTE;
  311. for (i = 0; i < data->dacs; ++i)
  312. ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
  313. }
  314. static void set_wm8785_params(struct oxygen *chip,
  315. struct snd_pcm_hw_params *params)
  316. {
  317. struct generic_data *data = chip->model_data;
  318. unsigned int value;
  319. value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
  320. if (params_rate(params) <= 48000)
  321. value |= WM8785_OSR_SINGLE;
  322. else if (params_rate(params) <= 96000)
  323. value |= WM8785_OSR_DOUBLE;
  324. else
  325. value |= WM8785_OSR_QUAD;
  326. if (value != data->wm8785_regs[0]) {
  327. wm8785_write(chip, WM8785_R7, 0);
  328. wm8785_write(chip, WM8785_R0, value);
  329. wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
  330. }
  331. }
  332. static void set_ak5385_params(struct oxygen *chip,
  333. struct snd_pcm_hw_params *params)
  334. {
  335. unsigned int value;
  336. if (params_rate(params) <= 54000)
  337. value = GPIO_AK5385_DFS_NORMAL;
  338. else if (params_rate(params) <= 108000)
  339. value = GPIO_AK5385_DFS_DOUBLE;
  340. else
  341. value = GPIO_AK5385_DFS_QUAD;
  342. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  343. value, GPIO_AK5385_DFS_MASK);
  344. }
  345. static void set_no_params(struct oxygen *chip, struct snd_pcm_hw_params *params)
  346. {
  347. }
  348. static int rolloff_info(struct snd_kcontrol *ctl,
  349. struct snd_ctl_elem_info *info)
  350. {
  351. static const char *const names[2] = {
  352. "Sharp Roll-off", "Slow Roll-off"
  353. };
  354. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  355. info->count = 1;
  356. info->value.enumerated.items = 2;
  357. if (info->value.enumerated.item >= 2)
  358. info->value.enumerated.item = 1;
  359. strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
  360. return 0;
  361. }
  362. static int rolloff_get(struct snd_kcontrol *ctl,
  363. struct snd_ctl_elem_value *value)
  364. {
  365. struct oxygen *chip = ctl->private_data;
  366. struct generic_data *data = chip->model_data;
  367. value->value.enumerated.item[0] =
  368. (data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
  369. return 0;
  370. }
  371. static int rolloff_put(struct snd_kcontrol *ctl,
  372. struct snd_ctl_elem_value *value)
  373. {
  374. struct oxygen *chip = ctl->private_data;
  375. struct generic_data *data = chip->model_data;
  376. unsigned int i;
  377. int changed;
  378. u8 reg;
  379. mutex_lock(&chip->mutex);
  380. reg = data->ak4396_regs[0][AK4396_CONTROL_2];
  381. if (value->value.enumerated.item[0])
  382. reg |= AK4396_SLOW;
  383. else
  384. reg &= ~AK4396_SLOW;
  385. changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
  386. if (changed) {
  387. for (i = 0; i < data->dacs; ++i)
  388. ak4396_write(chip, i, AK4396_CONTROL_2, reg);
  389. }
  390. mutex_unlock(&chip->mutex);
  391. return changed;
  392. }
  393. static const struct snd_kcontrol_new rolloff_control = {
  394. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  395. .name = "DAC Filter Playback Enum",
  396. .info = rolloff_info,
  397. .get = rolloff_get,
  398. .put = rolloff_put,
  399. };
  400. static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
  401. {
  402. static const char *const names[2] = {
  403. "None", "High-pass Filter"
  404. };
  405. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  406. info->count = 1;
  407. info->value.enumerated.items = 2;
  408. if (info->value.enumerated.item >= 2)
  409. info->value.enumerated.item = 1;
  410. strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
  411. return 0;
  412. }
  413. static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  414. {
  415. struct oxygen *chip = ctl->private_data;
  416. struct generic_data *data = chip->model_data;
  417. value->value.enumerated.item[0] =
  418. (data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
  419. return 0;
  420. }
  421. static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  422. {
  423. struct oxygen *chip = ctl->private_data;
  424. struct generic_data *data = chip->model_data;
  425. unsigned int reg;
  426. int changed;
  427. mutex_lock(&chip->mutex);
  428. reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
  429. if (value->value.enumerated.item[0])
  430. reg |= WM8785_HPFR | WM8785_HPFL;
  431. changed = reg != data->wm8785_regs[WM8785_R2];
  432. if (changed)
  433. wm8785_write(chip, WM8785_R2, reg);
  434. mutex_unlock(&chip->mutex);
  435. return changed;
  436. }
  437. static const struct snd_kcontrol_new hpf_control = {
  438. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  439. .name = "ADC Filter Capture Enum",
  440. .info = hpf_info,
  441. .get = hpf_get,
  442. .put = hpf_put,
  443. };
  444. static int generic_mixer_init(struct oxygen *chip)
  445. {
  446. return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
  447. }
  448. static int generic_wm8785_mixer_init(struct oxygen *chip)
  449. {
  450. int err;
  451. err = generic_mixer_init(chip);
  452. if (err < 0)
  453. return err;
  454. err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
  455. if (err < 0)
  456. return err;
  457. return 0;
  458. }
  459. static void dump_ak4396_registers(struct oxygen *chip,
  460. struct snd_info_buffer *buffer)
  461. {
  462. struct generic_data *data = chip->model_data;
  463. unsigned int dac, i;
  464. for (dac = 0; dac < data->dacs; ++dac) {
  465. snd_iprintf(buffer, "\nAK4396 %u:", dac + 1);
  466. for (i = 0; i < 5; ++i)
  467. snd_iprintf(buffer, " %02x", data->ak4396_regs[dac][i]);
  468. }
  469. snd_iprintf(buffer, "\n");
  470. }
  471. static void dump_wm8785_registers(struct oxygen *chip,
  472. struct snd_info_buffer *buffer)
  473. {
  474. struct generic_data *data = chip->model_data;
  475. unsigned int i;
  476. snd_iprintf(buffer, "\nWM8785:");
  477. for (i = 0; i < 3; ++i)
  478. snd_iprintf(buffer, " %03x", data->wm8785_regs[i]);
  479. snd_iprintf(buffer, "\n");
  480. }
  481. static void dump_oxygen_registers(struct oxygen *chip,
  482. struct snd_info_buffer *buffer)
  483. {
  484. dump_ak4396_registers(chip, buffer);
  485. dump_wm8785_registers(chip, buffer);
  486. }
  487. static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
  488. static const struct oxygen_model model_generic = {
  489. .shortname = "C-Media CMI8788",
  490. .longname = "C-Media Oxygen HD Audio",
  491. .chip = "CMI8788",
  492. .init = generic_init,
  493. .mixer_init = generic_wm8785_mixer_init,
  494. .cleanup = generic_cleanup,
  495. .resume = generic_resume,
  496. .set_dac_params = set_ak4396_params,
  497. .set_adc_params = set_wm8785_params,
  498. .update_dac_volume = update_ak4396_volume,
  499. .update_dac_mute = update_ak4396_mute,
  500. .dump_registers = dump_oxygen_registers,
  501. .dac_tlv = ak4396_db_scale,
  502. .model_data_size = sizeof(struct generic_data),
  503. .device_config = PLAYBACK_0_TO_I2S |
  504. PLAYBACK_1_TO_SPDIF |
  505. PLAYBACK_2_TO_AC97_1 |
  506. CAPTURE_0_FROM_I2S_1 |
  507. CAPTURE_1_FROM_SPDIF |
  508. CAPTURE_2_FROM_AC97_1 |
  509. AC97_CD_INPUT,
  510. .dac_channels_pcm = 8,
  511. .dac_channels_mixer = 8,
  512. .dac_volume_min = 0,
  513. .dac_volume_max = 255,
  514. .function_flags = OXYGEN_FUNCTION_SPI |
  515. OXYGEN_FUNCTION_ENABLE_SPI_4_5,
  516. .dac_mclks = OXYGEN_MCLKS(256, 128, 128),
  517. .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
  518. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  519. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  520. };
  521. static int __devinit get_oxygen_model(struct oxygen *chip,
  522. const struct pci_device_id *id)
  523. {
  524. chip->model = model_generic;
  525. switch (id->driver_data) {
  526. case MODEL_MERIDIAN:
  527. chip->model.init = meridian_init;
  528. chip->model.mixer_init = generic_mixer_init;
  529. chip->model.resume = meridian_resume;
  530. chip->model.set_adc_params = set_ak5385_params;
  531. chip->model.dump_registers = dump_ak4396_registers;
  532. chip->model.device_config = PLAYBACK_0_TO_I2S |
  533. PLAYBACK_1_TO_SPDIF |
  534. CAPTURE_0_FROM_I2S_2 |
  535. CAPTURE_1_FROM_SPDIF;
  536. break;
  537. case MODEL_CLARO:
  538. chip->model.init = claro_init;
  539. chip->model.cleanup = claro_cleanup;
  540. chip->model.suspend = claro_suspend;
  541. chip->model.resume = claro_resume;
  542. break;
  543. case MODEL_CLARO_HALO:
  544. chip->model.init = claro_halo_init;
  545. chip->model.mixer_init = generic_mixer_init;
  546. chip->model.cleanup = claro_cleanup;
  547. chip->model.suspend = claro_suspend;
  548. chip->model.resume = claro_resume;
  549. chip->model.set_adc_params = set_ak5385_params;
  550. chip->model.dump_registers = dump_ak4396_registers;
  551. chip->model.device_config = PLAYBACK_0_TO_I2S |
  552. PLAYBACK_1_TO_SPDIF |
  553. CAPTURE_0_FROM_I2S_2 |
  554. CAPTURE_1_FROM_SPDIF;
  555. break;
  556. case MODEL_FANTASIA:
  557. case MODEL_2CH_OUTPUT:
  558. chip->model.shortname = "C-Media CMI8787";
  559. chip->model.chip = "CMI8787";
  560. if (id->driver_data == MODEL_FANTASIA)
  561. chip->model.init = fantasia_init;
  562. else
  563. chip->model.init = stereo_output_init;
  564. chip->model.resume = stereo_resume;
  565. chip->model.mixer_init = generic_mixer_init;
  566. chip->model.set_adc_params = set_no_params;
  567. chip->model.dump_registers = dump_ak4396_registers;
  568. chip->model.device_config = PLAYBACK_0_TO_I2S |
  569. PLAYBACK_1_TO_SPDIF;
  570. if (id->driver_data == MODEL_FANTASIA) {
  571. chip->model.device_config |= CAPTURE_0_FROM_I2S_1;
  572. chip->model.adc_mclks = OXYGEN_MCLKS(256, 128, 128);
  573. }
  574. chip->model.dac_channels_pcm = 2;
  575. chip->model.dac_channels_mixer = 2;
  576. break;
  577. }
  578. if (id->driver_data == MODEL_MERIDIAN ||
  579. id->driver_data == MODEL_CLARO_HALO) {
  580. chip->model.misc_flags = OXYGEN_MISC_MIDI;
  581. chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
  582. }
  583. return 0;
  584. }
  585. static int __devinit generic_oxygen_probe(struct pci_dev *pci,
  586. const struct pci_device_id *pci_id)
  587. {
  588. static int dev;
  589. int err;
  590. if (dev >= SNDRV_CARDS)
  591. return -ENODEV;
  592. if (!enable[dev]) {
  593. ++dev;
  594. return -ENOENT;
  595. }
  596. err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
  597. oxygen_ids, get_oxygen_model);
  598. if (err >= 0)
  599. ++dev;
  600. return err;
  601. }
  602. static struct pci_driver oxygen_driver = {
  603. .name = "CMI8788",
  604. .id_table = oxygen_ids,
  605. .probe = generic_oxygen_probe,
  606. .remove = __devexit_p(oxygen_pci_remove),
  607. #ifdef CONFIG_PM
  608. .suspend = oxygen_pci_suspend,
  609. .resume = oxygen_pci_resume,
  610. #endif
  611. };
  612. static int __init alsa_card_oxygen_init(void)
  613. {
  614. return pci_register_driver(&oxygen_driver);
  615. }
  616. static void __exit alsa_card_oxygen_exit(void)
  617. {
  618. pci_unregister_driver(&oxygen_driver);
  619. }
  620. module_init(alsa_card_oxygen_init)
  621. module_exit(alsa_card_oxygen_exit)