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arch
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arm
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plat-mxc
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include
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irqs.h

irqs.h 1.5 KB
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  1. /*
    2. 

  2.  *  Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
    3. 

  3.  */
    4. 

  4. 

  5. /*
    6. 

  6.  * This program is free software; you can redistribute it and/or modify
    7. 

  7.  * it under the terms of the GNU General Public License version 2 as
    8. 

  8.  * published by the Free Software Foundation.
    9. 

  9.  */
    10. 

  10. 

  11. #ifndef __ASM_ARCH_MXC_IRQS_H__
    12. 

  12. #define __ASM_ARCH_MXC_IRQS_H__
    13. 

  13. 

  14. /*
    15. 

  15.  * So far all i.MX SoCs have 64 internal interrupts
    16. 

  16.  */
    17. 

  17. #define MXC_INTERNAL_IRQS	64
    18. 

  18. 

  19. #define MXC_GPIO_IRQ_START	MXC_INTERNAL_IRQS
    20. 

  20. 

  21. #if defined CONFIG_ARCH_MX1
    22. 

  22. #define MXC_GPIO_IRQS		(32 * 4)
    23. 

  23. #elif defined CONFIG_ARCH_MX2
    24. 

  24. #define MXC_GPIO_IRQS		(32 * 6)
    25. 

  25. #elif defined CONFIG_ARCH_MX3
    26. 

  26. #define MXC_GPIO_IRQS		(32 * 3)
    27. 

  27. #elif defined CONFIG_ARCH_MX25
    28. 

  28. #define MXC_GPIO_IRQS		(32 * 4)
    29. 

  29. #endif
    30. 

  30. 

  31. /*
    32. 

  32.  * The next 16 interrupts are for board specific purposes.  Since
    33. 

  33.  * the kernel can only run on one machine at a time, we can re-use
    34. 

  34.  * these.  If you need more, increase MXC_BOARD_IRQS, but keep it
    35. 

  35.  * within sensible limits.
    36. 

  36.  */
    37. 

  37. #define MXC_BOARD_IRQ_START	(MXC_INTERNAL_IRQS + MXC_GPIO_IRQS)
    38. 

  38. #define MXC_BOARD_IRQS	16
    39. 

  39. 

  40. #define MXC_IPU_IRQ_START	(MXC_BOARD_IRQ_START + MXC_BOARD_IRQS)
    41. 

  41. 

  42. #ifdef CONFIG_MX3_IPU_IRQS
    43. 

  43. #define MX3_IPU_IRQS CONFIG_MX3_IPU_IRQS
    44. 

  44. #else
    45. 

  45. #define MX3_IPU_IRQS 0
    46. 

  46. #endif
    47. 

  47. 

  48. #define NR_IRQS			(MXC_IPU_IRQ_START + MX3_IPU_IRQS)
    49. 

  49. 

  50. extern int imx_irq_set_priority(unsigned char irq, unsigned char prio);
    51. 

  51. 

  52. /* all normal IRQs can be FIQs */
    53. 

  53. #define FIQ_START	0
    54. 

  54. /* switch betwean IRQ and FIQ */
    55. 

  55. extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type);
    56. 

  56. 

  57. #endif /* __ASM_ARCH_MXC_IRQS_H__ */
    58.