ice1724.c 67 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <sound/driver.h>
  25. #include <asm/io.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/init.h>
  29. #include <linux/pci.h>
  30. #include <linux/slab.h>
  31. #include <linux/moduleparam.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/mpu401.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "juli.h"
  47. #include "phase.h"
  48. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  49. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  50. MODULE_LICENSE("GPL");
  51. MODULE_SUPPORTED_DEVICE("{"
  52. REVO_DEVICE_DESC
  53. AMP_AUDIO2000_DEVICE_DESC
  54. AUREON_DEVICE_DESC
  55. VT1720_MOBO_DEVICE_DESC
  56. PONTIS_DEVICE_DESC
  57. PRODIGY192_DEVICE_DESC
  58. JULI_DEVICE_DESC
  59. PHASE_DEVICE_DESC
  60. "{VIA,VT1720},"
  61. "{VIA,VT1724},"
  62. "{ICEnsemble,Generic ICE1724},"
  63. "{ICEnsemble,Generic Envy24HT}"
  64. "{ICEnsemble,Generic Envy24PT}}");
  65. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  66. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  67. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  68. static char *model[SNDRV_CARDS];
  69. module_param_array(index, int, NULL, 0444);
  70. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  71. module_param_array(id, charp, NULL, 0444);
  72. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  73. module_param_array(enable, bool, NULL, 0444);
  74. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  75. module_param_array(model, charp, NULL, 0444);
  76. MODULE_PARM_DESC(model, "Use the given board model.");
  77. /* Both VT1720 and VT1724 have the same PCI IDs */
  78. static struct pci_device_id snd_vt1724_ids[] = {
  79. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  80. { 0, }
  81. };
  82. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  83. static int PRO_RATE_LOCKED;
  84. static int PRO_RATE_RESET = 1;
  85. static unsigned int PRO_RATE_DEFAULT = 44100;
  86. /*
  87. * Basic I/O
  88. */
  89. /* check whether the clock mode is spdif-in */
  90. static inline int is_spdif_master(struct snd_ice1712 *ice)
  91. {
  92. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  93. }
  94. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  95. {
  96. return is_spdif_master(ice) || PRO_RATE_LOCKED;
  97. }
  98. /*
  99. * ac97 section
  100. */
  101. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  102. {
  103. unsigned char old_cmd;
  104. int tm;
  105. for (tm = 0; tm < 0x10000; tm++) {
  106. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  107. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  108. continue;
  109. if (!(old_cmd & VT1724_AC97_READY))
  110. continue;
  111. return old_cmd;
  112. }
  113. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  114. return old_cmd;
  115. }
  116. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  117. {
  118. int tm;
  119. for (tm = 0; tm < 0x10000; tm++)
  120. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  121. return 0;
  122. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  123. return -EIO;
  124. }
  125. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  126. unsigned short reg,
  127. unsigned short val)
  128. {
  129. struct snd_ice1712 *ice = ac97->private_data;
  130. unsigned char old_cmd;
  131. old_cmd = snd_vt1724_ac97_ready(ice);
  132. old_cmd &= ~VT1724_AC97_ID_MASK;
  133. old_cmd |= ac97->num;
  134. outb(reg, ICEMT1724(ice, AC97_INDEX));
  135. outw(val, ICEMT1724(ice, AC97_DATA));
  136. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  137. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  138. }
  139. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  140. {
  141. struct snd_ice1712 *ice = ac97->private_data;
  142. unsigned char old_cmd;
  143. old_cmd = snd_vt1724_ac97_ready(ice);
  144. old_cmd &= ~VT1724_AC97_ID_MASK;
  145. old_cmd |= ac97->num;
  146. outb(reg, ICEMT1724(ice, AC97_INDEX));
  147. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  148. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  149. return ~0;
  150. return inw(ICEMT1724(ice, AC97_DATA));
  151. }
  152. /*
  153. * GPIO operations
  154. */
  155. /* set gpio direction 0 = read, 1 = write */
  156. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  157. {
  158. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  159. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  160. }
  161. /* set the gpio mask (0 = writable) */
  162. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  163. {
  164. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  165. if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  166. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  167. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  168. }
  169. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  170. {
  171. outw(data, ICEREG1724(ice, GPIO_DATA));
  172. if (! ice->vt1720)
  173. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  174. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  175. }
  176. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  177. {
  178. unsigned int data;
  179. if (! ice->vt1720)
  180. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  181. else
  182. data = 0;
  183. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  184. return data;
  185. }
  186. /*
  187. * Interrupt handler
  188. */
  189. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  190. {
  191. struct snd_ice1712 *ice = dev_id;
  192. unsigned char status;
  193. int handled = 0;
  194. while (1) {
  195. status = inb(ICEREG1724(ice, IRQSTAT));
  196. if (status == 0)
  197. break;
  198. handled = 1;
  199. /* these should probably be separated at some point,
  200. * but as we don't currently have MPU support on the board
  201. * I will leave it
  202. */
  203. if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) {
  204. if (ice->rmidi[0])
  205. snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
  206. outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT));
  207. status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX);
  208. }
  209. if (status & VT1724_IRQ_MTPCM) {
  210. /*
  211. * Multi-track PCM
  212. * PCM assignment are:
  213. * Playback DMA0 (M/C) = playback_pro_substream
  214. * Playback DMA1 = playback_con_substream_ds[0]
  215. * Playback DMA2 = playback_con_substream_ds[1]
  216. * Playback DMA3 = playback_con_substream_ds[2]
  217. * Playback DMA4 (SPDIF) = playback_con_substream
  218. * Record DMA0 = capture_pro_substream
  219. * Record DMA1 = capture_con_substream
  220. */
  221. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  222. if (mtstat & VT1724_MULTI_PDMA0) {
  223. if (ice->playback_pro_substream)
  224. snd_pcm_period_elapsed(ice->playback_pro_substream);
  225. }
  226. if (mtstat & VT1724_MULTI_RDMA0) {
  227. if (ice->capture_pro_substream)
  228. snd_pcm_period_elapsed(ice->capture_pro_substream);
  229. }
  230. if (mtstat & VT1724_MULTI_PDMA1) {
  231. if (ice->playback_con_substream_ds[0])
  232. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  233. }
  234. if (mtstat & VT1724_MULTI_PDMA2) {
  235. if (ice->playback_con_substream_ds[1])
  236. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  237. }
  238. if (mtstat & VT1724_MULTI_PDMA3) {
  239. if (ice->playback_con_substream_ds[2])
  240. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  241. }
  242. if (mtstat & VT1724_MULTI_PDMA4) {
  243. if (ice->playback_con_substream)
  244. snd_pcm_period_elapsed(ice->playback_con_substream);
  245. }
  246. if (mtstat & VT1724_MULTI_RDMA1) {
  247. if (ice->capture_con_substream)
  248. snd_pcm_period_elapsed(ice->capture_con_substream);
  249. }
  250. /* ack anyway to avoid freeze */
  251. outb(mtstat, ICEMT1724(ice, IRQ));
  252. /* ought to really handle this properly */
  253. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  254. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  255. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  256. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  257. /* If I don't do this, I get machine lockup due to continual interrupts */
  258. }
  259. }
  260. }
  261. return IRQ_RETVAL(handled);
  262. }
  263. /*
  264. * PCM code - professional part (multitrack)
  265. */
  266. static unsigned int rates[] = {
  267. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  268. 32000, 44100, 48000, 64000, 88200, 96000,
  269. 176400, 192000,
  270. };
  271. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  272. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  273. .list = rates,
  274. .mask = 0,
  275. };
  276. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  277. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  278. .list = rates,
  279. .mask = 0,
  280. };
  281. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  282. .count = ARRAY_SIZE(rates),
  283. .list = rates,
  284. .mask = 0,
  285. };
  286. struct vt1724_pcm_reg {
  287. unsigned int addr; /* ADDR register offset */
  288. unsigned int size; /* SIZE register offset */
  289. unsigned int count; /* COUNT register offset */
  290. unsigned int start; /* start & pause bit */
  291. };
  292. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  293. {
  294. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  295. unsigned char what;
  296. unsigned char old;
  297. struct list_head *pos;
  298. struct snd_pcm_substream *s;
  299. what = 0;
  300. snd_pcm_group_for_each(pos, substream) {
  301. struct vt1724_pcm_reg *reg;
  302. s = snd_pcm_group_substream_entry(pos);
  303. reg = s->runtime->private_data;
  304. what |= reg->start;
  305. snd_pcm_trigger_done(s, substream);
  306. }
  307. switch (cmd) {
  308. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  309. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  310. spin_lock(&ice->reg_lock);
  311. old = inb(ICEMT1724(ice, DMA_PAUSE));
  312. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  313. old |= what;
  314. else
  315. old &= ~what;
  316. outb(old, ICEMT1724(ice, DMA_PAUSE));
  317. spin_unlock(&ice->reg_lock);
  318. break;
  319. case SNDRV_PCM_TRIGGER_START:
  320. case SNDRV_PCM_TRIGGER_STOP:
  321. spin_lock(&ice->reg_lock);
  322. old = inb(ICEMT1724(ice, DMA_CONTROL));
  323. if (cmd == SNDRV_PCM_TRIGGER_START)
  324. old |= what;
  325. else
  326. old &= ~what;
  327. outb(old, ICEMT1724(ice, DMA_CONTROL));
  328. spin_unlock(&ice->reg_lock);
  329. break;
  330. default:
  331. return -EINVAL;
  332. }
  333. return 0;
  334. }
  335. /*
  336. */
  337. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  338. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  339. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  340. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  341. static int get_max_rate(struct snd_ice1712 *ice)
  342. {
  343. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  344. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  345. return 192000;
  346. else
  347. return 96000;
  348. } else
  349. return 48000;
  350. }
  351. static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  352. int force)
  353. {
  354. unsigned long flags;
  355. unsigned char val, old;
  356. unsigned int i, mclk_change;
  357. if (rate > get_max_rate(ice))
  358. return;
  359. switch (rate) {
  360. case 8000: val = 6; break;
  361. case 9600: val = 3; break;
  362. case 11025: val = 10; break;
  363. case 12000: val = 2; break;
  364. case 16000: val = 5; break;
  365. case 22050: val = 9; break;
  366. case 24000: val = 1; break;
  367. case 32000: val = 4; break;
  368. case 44100: val = 8; break;
  369. case 48000: val = 0; break;
  370. case 64000: val = 15; break;
  371. case 88200: val = 11; break;
  372. case 96000: val = 7; break;
  373. case 176400: val = 12; break;
  374. case 192000: val = 14; break;
  375. default:
  376. snd_BUG();
  377. val = 0;
  378. break;
  379. }
  380. spin_lock_irqsave(&ice->reg_lock, flags);
  381. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  382. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  383. /* running? we cannot change the rate now... */
  384. spin_unlock_irqrestore(&ice->reg_lock, flags);
  385. return;
  386. }
  387. if (!force && is_pro_rate_locked(ice)) {
  388. spin_unlock_irqrestore(&ice->reg_lock, flags);
  389. return;
  390. }
  391. old = inb(ICEMT1724(ice, RATE));
  392. if (force || old != val)
  393. outb(val, ICEMT1724(ice, RATE));
  394. else if (rate == ice->cur_rate) {
  395. spin_unlock_irqrestore(&ice->reg_lock, flags);
  396. return;
  397. }
  398. ice->cur_rate = rate;
  399. /* check MT02 */
  400. mclk_change = 0;
  401. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  402. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  403. if (rate > 96000)
  404. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  405. else
  406. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  407. if (val != old) {
  408. outb(val, ICEMT1724(ice, I2S_FORMAT));
  409. mclk_change = 1;
  410. }
  411. }
  412. spin_unlock_irqrestore(&ice->reg_lock, flags);
  413. if (mclk_change && ice->gpio.i2s_mclk_changed)
  414. ice->gpio.i2s_mclk_changed(ice);
  415. if (ice->gpio.set_pro_rate)
  416. ice->gpio.set_pro_rate(ice, rate);
  417. /* set up codecs */
  418. for (i = 0; i < ice->akm_codecs; i++) {
  419. if (ice->akm[i].ops.set_rate_val)
  420. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  421. }
  422. if (ice->spdif.ops.setup_rate)
  423. ice->spdif.ops.setup_rate(ice, rate);
  424. }
  425. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  426. struct snd_pcm_hw_params *hw_params)
  427. {
  428. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  429. int i, chs;
  430. chs = params_channels(hw_params);
  431. down(&ice->open_mutex);
  432. /* mark surround channels */
  433. if (substream == ice->playback_pro_substream) {
  434. /* PDMA0 can be multi-channel up to 8 */
  435. chs = chs / 2 - 1;
  436. for (i = 0; i < chs; i++) {
  437. if (ice->pcm_reserved[i] &&
  438. ice->pcm_reserved[i] != substream) {
  439. up(&ice->open_mutex);
  440. return -EBUSY;
  441. }
  442. ice->pcm_reserved[i] = substream;
  443. }
  444. for (; i < 3; i++) {
  445. if (ice->pcm_reserved[i] == substream)
  446. ice->pcm_reserved[i] = NULL;
  447. }
  448. } else {
  449. for (i = 0; i < 3; i++) {
  450. /* check individual playback stream */
  451. if (ice->playback_con_substream_ds[i] == substream) {
  452. if (ice->pcm_reserved[i] &&
  453. ice->pcm_reserved[i] != substream) {
  454. up(&ice->open_mutex);
  455. return -EBUSY;
  456. }
  457. ice->pcm_reserved[i] = substream;
  458. break;
  459. }
  460. }
  461. }
  462. up(&ice->open_mutex);
  463. snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  464. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  465. }
  466. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  467. {
  468. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  469. int i;
  470. down(&ice->open_mutex);
  471. /* unmark surround channels */
  472. for (i = 0; i < 3; i++)
  473. if (ice->pcm_reserved[i] == substream)
  474. ice->pcm_reserved[i] = NULL;
  475. up(&ice->open_mutex);
  476. return snd_pcm_lib_free_pages(substream);
  477. }
  478. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  479. {
  480. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  481. unsigned char val;
  482. unsigned int size;
  483. spin_lock_irq(&ice->reg_lock);
  484. val = (8 - substream->runtime->channels) >> 1;
  485. outb(val, ICEMT1724(ice, BURST));
  486. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  487. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  488. // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
  489. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  490. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  491. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  492. // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
  493. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  494. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  495. spin_unlock_irq(&ice->reg_lock);
  496. // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
  497. return 0;
  498. }
  499. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  500. {
  501. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  502. size_t ptr;
  503. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  504. return 0;
  505. #if 0 /* read PLAYBACK_ADDR */
  506. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  507. if (ptr < substream->runtime->dma_addr) {
  508. snd_printd("ice1724: invalid negative ptr\n");
  509. return 0;
  510. }
  511. ptr -= substream->runtime->dma_addr;
  512. ptr = bytes_to_frames(substream->runtime, ptr);
  513. if (ptr >= substream->runtime->buffer_size) {
  514. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  515. (int)ptr, (int)substream->runtime->period_size);
  516. return 0;
  517. }
  518. #else /* read PLAYBACK_SIZE */
  519. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  520. ptr = (ptr + 1) << 2;
  521. ptr = bytes_to_frames(substream->runtime, ptr);
  522. if (! ptr)
  523. ;
  524. else if (ptr <= substream->runtime->buffer_size)
  525. ptr = substream->runtime->buffer_size - ptr;
  526. else {
  527. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  528. (int)ptr, (int)substream->runtime->buffer_size);
  529. ptr = 0;
  530. }
  531. #endif
  532. return ptr;
  533. }
  534. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  535. {
  536. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  537. struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  538. spin_lock_irq(&ice->reg_lock);
  539. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  540. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  541. ice->profi_port + reg->size);
  542. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  543. ice->profi_port + reg->count);
  544. spin_unlock_irq(&ice->reg_lock);
  545. return 0;
  546. }
  547. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  548. {
  549. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  550. struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  551. size_t ptr;
  552. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  553. return 0;
  554. #if 0 /* use ADDR register */
  555. ptr = inl(ice->profi_port + reg->addr);
  556. ptr -= substream->runtime->dma_addr;
  557. return bytes_to_frames(substream->runtime, ptr);
  558. #else /* use SIZE register */
  559. ptr = inw(ice->profi_port + reg->size);
  560. ptr = (ptr + 1) << 2;
  561. ptr = bytes_to_frames(substream->runtime, ptr);
  562. if (! ptr)
  563. ;
  564. else if (ptr <= substream->runtime->buffer_size)
  565. ptr = substream->runtime->buffer_size - ptr;
  566. else {
  567. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  568. (int)ptr, (int)substream->runtime->buffer_size);
  569. ptr = 0;
  570. }
  571. return ptr;
  572. #endif
  573. }
  574. static struct vt1724_pcm_reg vt1724_playback_pro_reg = {
  575. .addr = VT1724_MT_PLAYBACK_ADDR,
  576. .size = VT1724_MT_PLAYBACK_SIZE,
  577. .count = VT1724_MT_PLAYBACK_COUNT,
  578. .start = VT1724_PDMA0_START,
  579. };
  580. static struct vt1724_pcm_reg vt1724_capture_pro_reg = {
  581. .addr = VT1724_MT_CAPTURE_ADDR,
  582. .size = VT1724_MT_CAPTURE_SIZE,
  583. .count = VT1724_MT_CAPTURE_COUNT,
  584. .start = VT1724_RDMA0_START,
  585. };
  586. static struct snd_pcm_hardware snd_vt1724_playback_pro =
  587. {
  588. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  589. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  590. SNDRV_PCM_INFO_MMAP_VALID |
  591. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  592. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  593. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  594. .rate_min = 8000,
  595. .rate_max = 192000,
  596. .channels_min = 2,
  597. .channels_max = 8,
  598. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  599. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  600. .period_bytes_max = (1UL << 21),
  601. .periods_min = 2,
  602. .periods_max = 1024,
  603. };
  604. static struct snd_pcm_hardware snd_vt1724_spdif =
  605. {
  606. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  607. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  608. SNDRV_PCM_INFO_MMAP_VALID |
  609. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  610. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  611. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  612. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  613. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  614. SNDRV_PCM_RATE_192000),
  615. .rate_min = 32000,
  616. .rate_max = 192000,
  617. .channels_min = 2,
  618. .channels_max = 2,
  619. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  620. .period_bytes_min = 2 * 4 * 2,
  621. .period_bytes_max = (1UL << 18),
  622. .periods_min = 2,
  623. .periods_max = 1024,
  624. };
  625. static struct snd_pcm_hardware snd_vt1724_2ch_stereo =
  626. {
  627. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  628. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  629. SNDRV_PCM_INFO_MMAP_VALID |
  630. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  631. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  632. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  633. .rate_min = 8000,
  634. .rate_max = 192000,
  635. .channels_min = 2,
  636. .channels_max = 2,
  637. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  638. .period_bytes_min = 2 * 4 * 2,
  639. .period_bytes_max = (1UL << 18),
  640. .periods_min = 2,
  641. .periods_max = 1024,
  642. };
  643. /*
  644. * set rate constraints
  645. */
  646. static int set_rate_constraints(struct snd_ice1712 *ice,
  647. struct snd_pcm_substream *substream)
  648. {
  649. struct snd_pcm_runtime *runtime = substream->runtime;
  650. if (ice->hw_rates) {
  651. /* hardware specific */
  652. runtime->hw.rate_min = ice->hw_rates->list[0];
  653. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  654. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  655. return snd_pcm_hw_constraint_list(runtime, 0,
  656. SNDRV_PCM_HW_PARAM_RATE,
  657. ice->hw_rates);
  658. }
  659. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  660. /* I2S */
  661. /* VT1720 doesn't support more than 96kHz */
  662. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  663. return snd_pcm_hw_constraint_list(runtime, 0,
  664. SNDRV_PCM_HW_PARAM_RATE,
  665. &hw_constraints_rates_192);
  666. else {
  667. runtime->hw.rates = SNDRV_PCM_RATE_KNOT |
  668. SNDRV_PCM_RATE_8000_96000;
  669. runtime->hw.rate_max = 96000;
  670. return snd_pcm_hw_constraint_list(runtime, 0,
  671. SNDRV_PCM_HW_PARAM_RATE,
  672. &hw_constraints_rates_96);
  673. }
  674. } else if (ice->ac97) {
  675. /* ACLINK */
  676. runtime->hw.rate_max = 48000;
  677. runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
  678. return snd_pcm_hw_constraint_list(runtime, 0,
  679. SNDRV_PCM_HW_PARAM_RATE,
  680. &hw_constraints_rates_48);
  681. }
  682. return 0;
  683. }
  684. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  685. * actually used
  686. */
  687. #define VT1724_BUFFER_ALIGN 0x20
  688. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  689. {
  690. struct snd_pcm_runtime *runtime = substream->runtime;
  691. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  692. int chs;
  693. runtime->private_data = &vt1724_playback_pro_reg;
  694. ice->playback_pro_substream = substream;
  695. runtime->hw = snd_vt1724_playback_pro;
  696. snd_pcm_set_sync(substream);
  697. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  698. set_rate_constraints(ice, substream);
  699. down(&ice->open_mutex);
  700. /* calculate the currently available channels */
  701. for (chs = 0; chs < 3; chs++) {
  702. if (ice->pcm_reserved[chs])
  703. break;
  704. }
  705. chs = (chs + 1) * 2;
  706. runtime->hw.channels_max = chs;
  707. if (chs > 2) /* channels must be even */
  708. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  709. up(&ice->open_mutex);
  710. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  711. VT1724_BUFFER_ALIGN);
  712. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  713. VT1724_BUFFER_ALIGN);
  714. return 0;
  715. }
  716. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  717. {
  718. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  719. struct snd_pcm_runtime *runtime = substream->runtime;
  720. runtime->private_data = &vt1724_capture_pro_reg;
  721. ice->capture_pro_substream = substream;
  722. runtime->hw = snd_vt1724_2ch_stereo;
  723. snd_pcm_set_sync(substream);
  724. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  725. set_rate_constraints(ice, substream);
  726. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  727. VT1724_BUFFER_ALIGN);
  728. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  729. VT1724_BUFFER_ALIGN);
  730. return 0;
  731. }
  732. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  733. {
  734. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  735. if (PRO_RATE_RESET)
  736. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  737. ice->playback_pro_substream = NULL;
  738. return 0;
  739. }
  740. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  741. {
  742. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  743. if (PRO_RATE_RESET)
  744. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  745. ice->capture_pro_substream = NULL;
  746. return 0;
  747. }
  748. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  749. .open = snd_vt1724_playback_pro_open,
  750. .close = snd_vt1724_playback_pro_close,
  751. .ioctl = snd_pcm_lib_ioctl,
  752. .hw_params = snd_vt1724_pcm_hw_params,
  753. .hw_free = snd_vt1724_pcm_hw_free,
  754. .prepare = snd_vt1724_playback_pro_prepare,
  755. .trigger = snd_vt1724_pcm_trigger,
  756. .pointer = snd_vt1724_playback_pro_pointer,
  757. };
  758. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  759. .open = snd_vt1724_capture_pro_open,
  760. .close = snd_vt1724_capture_pro_close,
  761. .ioctl = snd_pcm_lib_ioctl,
  762. .hw_params = snd_vt1724_pcm_hw_params,
  763. .hw_free = snd_vt1724_pcm_hw_free,
  764. .prepare = snd_vt1724_pcm_prepare,
  765. .trigger = snd_vt1724_pcm_trigger,
  766. .pointer = snd_vt1724_pcm_pointer,
  767. };
  768. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 * ice, int device)
  769. {
  770. struct snd_pcm *pcm;
  771. int err;
  772. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  773. if (err < 0)
  774. return err;
  775. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  776. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  777. pcm->private_data = ice;
  778. pcm->info_flags = 0;
  779. strcpy(pcm->name, "ICE1724");
  780. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  781. snd_dma_pci_data(ice->pci),
  782. 256*1024, 256*1024);
  783. ice->pcm_pro = pcm;
  784. return 0;
  785. }
  786. /*
  787. * SPDIF PCM
  788. */
  789. static struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
  790. .addr = VT1724_MT_PDMA4_ADDR,
  791. .size = VT1724_MT_PDMA4_SIZE,
  792. .count = VT1724_MT_PDMA4_COUNT,
  793. .start = VT1724_PDMA4_START,
  794. };
  795. static struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
  796. .addr = VT1724_MT_RDMA1_ADDR,
  797. .size = VT1724_MT_RDMA1_SIZE,
  798. .count = VT1724_MT_RDMA1_COUNT,
  799. .start = VT1724_RDMA1_START,
  800. };
  801. /* update spdif control bits; call with reg_lock */
  802. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  803. {
  804. unsigned char cbit, disabled;
  805. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  806. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  807. if (cbit != disabled)
  808. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  809. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  810. if (cbit != disabled)
  811. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  812. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  813. }
  814. /* update SPDIF control bits according to the given rate */
  815. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  816. {
  817. unsigned int val, nval;
  818. unsigned long flags;
  819. spin_lock_irqsave(&ice->reg_lock, flags);
  820. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  821. nval &= ~(7 << 12);
  822. switch (rate) {
  823. case 44100: break;
  824. case 48000: nval |= 2 << 12; break;
  825. case 32000: nval |= 3 << 12; break;
  826. case 88200: nval |= 4 << 12; break;
  827. case 96000: nval |= 5 << 12; break;
  828. case 192000: nval |= 6 << 12; break;
  829. case 176400: nval |= 7 << 12; break;
  830. }
  831. if (val != nval)
  832. update_spdif_bits(ice, nval);
  833. spin_unlock_irqrestore(&ice->reg_lock, flags);
  834. }
  835. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  836. {
  837. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  838. if (! ice->force_pdma4)
  839. update_spdif_rate(ice, substream->runtime->rate);
  840. return snd_vt1724_pcm_prepare(substream);
  841. }
  842. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  843. {
  844. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  845. struct snd_pcm_runtime *runtime = substream->runtime;
  846. runtime->private_data = &vt1724_playback_spdif_reg;
  847. ice->playback_con_substream = substream;
  848. if (ice->force_pdma4) {
  849. runtime->hw = snd_vt1724_2ch_stereo;
  850. set_rate_constraints(ice, substream);
  851. } else
  852. runtime->hw = snd_vt1724_spdif;
  853. snd_pcm_set_sync(substream);
  854. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  855. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  856. VT1724_BUFFER_ALIGN);
  857. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  858. VT1724_BUFFER_ALIGN);
  859. return 0;
  860. }
  861. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  862. {
  863. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  864. if (PRO_RATE_RESET)
  865. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  866. ice->playback_con_substream = NULL;
  867. return 0;
  868. }
  869. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  870. {
  871. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  872. struct snd_pcm_runtime *runtime = substream->runtime;
  873. runtime->private_data = &vt1724_capture_spdif_reg;
  874. ice->capture_con_substream = substream;
  875. if (ice->force_rdma1) {
  876. runtime->hw = snd_vt1724_2ch_stereo;
  877. set_rate_constraints(ice, substream);
  878. } else
  879. runtime->hw = snd_vt1724_spdif;
  880. snd_pcm_set_sync(substream);
  881. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  882. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  883. VT1724_BUFFER_ALIGN);
  884. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  885. VT1724_BUFFER_ALIGN);
  886. return 0;
  887. }
  888. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  889. {
  890. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  891. if (PRO_RATE_RESET)
  892. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  893. ice->capture_con_substream = NULL;
  894. return 0;
  895. }
  896. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  897. .open = snd_vt1724_playback_spdif_open,
  898. .close = snd_vt1724_playback_spdif_close,
  899. .ioctl = snd_pcm_lib_ioctl,
  900. .hw_params = snd_vt1724_pcm_hw_params,
  901. .hw_free = snd_vt1724_pcm_hw_free,
  902. .prepare = snd_vt1724_playback_spdif_prepare,
  903. .trigger = snd_vt1724_pcm_trigger,
  904. .pointer = snd_vt1724_pcm_pointer,
  905. };
  906. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  907. .open = snd_vt1724_capture_spdif_open,
  908. .close = snd_vt1724_capture_spdif_close,
  909. .ioctl = snd_pcm_lib_ioctl,
  910. .hw_params = snd_vt1724_pcm_hw_params,
  911. .hw_free = snd_vt1724_pcm_hw_free,
  912. .prepare = snd_vt1724_pcm_prepare,
  913. .trigger = snd_vt1724_pcm_trigger,
  914. .pointer = snd_vt1724_pcm_pointer,
  915. };
  916. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 * ice, int device)
  917. {
  918. char *name;
  919. struct snd_pcm *pcm;
  920. int play, capt;
  921. int err;
  922. if (ice->force_pdma4 ||
  923. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  924. play = 1;
  925. ice->has_spdif = 1;
  926. } else
  927. play = 0;
  928. if (ice->force_rdma1 ||
  929. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  930. capt = 1;
  931. ice->has_spdif = 1;
  932. } else
  933. capt = 0;
  934. if (! play && ! capt)
  935. return 0; /* no spdif device */
  936. if (ice->force_pdma4 || ice->force_rdma1)
  937. name = "ICE1724 Secondary";
  938. else
  939. name = "IEC1724 IEC958";
  940. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  941. if (err < 0)
  942. return err;
  943. if (play)
  944. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  945. &snd_vt1724_playback_spdif_ops);
  946. if (capt)
  947. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  948. &snd_vt1724_capture_spdif_ops);
  949. pcm->private_data = ice;
  950. pcm->info_flags = 0;
  951. strcpy(pcm->name, name);
  952. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  953. snd_dma_pci_data(ice->pci),
  954. 64*1024, 64*1024);
  955. ice->pcm = pcm;
  956. return 0;
  957. }
  958. /*
  959. * independent surround PCMs
  960. */
  961. static struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  962. {
  963. .addr = VT1724_MT_PDMA1_ADDR,
  964. .size = VT1724_MT_PDMA1_SIZE,
  965. .count = VT1724_MT_PDMA1_COUNT,
  966. .start = VT1724_PDMA1_START,
  967. },
  968. {
  969. .addr = VT1724_MT_PDMA2_ADDR,
  970. .size = VT1724_MT_PDMA2_SIZE,
  971. .count = VT1724_MT_PDMA2_COUNT,
  972. .start = VT1724_PDMA2_START,
  973. },
  974. {
  975. .addr = VT1724_MT_PDMA3_ADDR,
  976. .size = VT1724_MT_PDMA3_SIZE,
  977. .count = VT1724_MT_PDMA3_COUNT,
  978. .start = VT1724_PDMA3_START,
  979. },
  980. };
  981. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  982. {
  983. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  984. unsigned char val;
  985. spin_lock_irq(&ice->reg_lock);
  986. val = 3 - substream->number;
  987. if (inb(ICEMT1724(ice, BURST)) < val)
  988. outb(val, ICEMT1724(ice, BURST));
  989. spin_unlock_irq(&ice->reg_lock);
  990. return snd_vt1724_pcm_prepare(substream);
  991. }
  992. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  993. {
  994. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  995. struct snd_pcm_runtime *runtime = substream->runtime;
  996. down(&ice->open_mutex);
  997. /* already used by PDMA0? */
  998. if (ice->pcm_reserved[substream->number]) {
  999. up(&ice->open_mutex);
  1000. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1001. }
  1002. up(&ice->open_mutex);
  1003. runtime->private_data = &vt1724_playback_dma_regs[substream->number];
  1004. ice->playback_con_substream_ds[substream->number] = substream;
  1005. runtime->hw = snd_vt1724_2ch_stereo;
  1006. snd_pcm_set_sync(substream);
  1007. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1008. set_rate_constraints(ice, substream);
  1009. return 0;
  1010. }
  1011. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1012. {
  1013. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1014. if (PRO_RATE_RESET)
  1015. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1016. ice->playback_con_substream_ds[substream->number] = NULL;
  1017. ice->pcm_reserved[substream->number] = NULL;
  1018. return 0;
  1019. }
  1020. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1021. .open = snd_vt1724_playback_indep_open,
  1022. .close = snd_vt1724_playback_indep_close,
  1023. .ioctl = snd_pcm_lib_ioctl,
  1024. .hw_params = snd_vt1724_pcm_hw_params,
  1025. .hw_free = snd_vt1724_pcm_hw_free,
  1026. .prepare = snd_vt1724_playback_indep_prepare,
  1027. .trigger = snd_vt1724_pcm_trigger,
  1028. .pointer = snd_vt1724_pcm_pointer,
  1029. };
  1030. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 * ice, int device)
  1031. {
  1032. struct snd_pcm *pcm;
  1033. int play;
  1034. int err;
  1035. play = ice->num_total_dacs / 2 - 1;
  1036. if (play <= 0)
  1037. return 0;
  1038. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1039. if (err < 0)
  1040. return err;
  1041. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1042. &snd_vt1724_playback_indep_ops);
  1043. pcm->private_data = ice;
  1044. pcm->info_flags = 0;
  1045. strcpy(pcm->name, "ICE1724 Surround PCM");
  1046. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1047. snd_dma_pci_data(ice->pci),
  1048. 64*1024, 64*1024);
  1049. ice->pcm_ds = pcm;
  1050. return 0;
  1051. }
  1052. /*
  1053. * Mixer section
  1054. */
  1055. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 * ice)
  1056. {
  1057. int err;
  1058. if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1059. struct snd_ac97_bus *pbus;
  1060. struct snd_ac97_template ac97;
  1061. static struct snd_ac97_bus_ops ops = {
  1062. .write = snd_vt1724_ac97_write,
  1063. .read = snd_vt1724_ac97_read,
  1064. };
  1065. /* cold reset */
  1066. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1067. mdelay(5); /* FIXME */
  1068. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1069. if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
  1070. return err;
  1071. memset(&ac97, 0, sizeof(ac97));
  1072. ac97.private_data = ice;
  1073. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1074. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1075. else
  1076. return 0;
  1077. }
  1078. /* I2S mixer only */
  1079. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1080. return 0;
  1081. }
  1082. /*
  1083. *
  1084. */
  1085. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1086. {
  1087. return (unsigned int)ice->eeprom.data[idx] | \
  1088. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1089. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1090. }
  1091. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1092. struct snd_info_buffer *buffer)
  1093. {
  1094. struct snd_ice1712 *ice = entry->private_data;
  1095. unsigned int idx;
  1096. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1097. snd_iprintf(buffer, "EEPROM:\n");
  1098. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1099. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1100. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1101. snd_iprintf(buffer, " System Config : 0x%x\n",
  1102. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1103. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1104. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1105. snd_iprintf(buffer, " I2S : 0x%x\n",
  1106. ice->eeprom.data[ICE_EEP2_I2S]);
  1107. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1108. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1109. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1110. ice->eeprom.gpiodir);
  1111. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1112. ice->eeprom.gpiomask);
  1113. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1114. ice->eeprom.gpiostate);
  1115. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1116. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1117. idx, ice->eeprom.data[idx]);
  1118. snd_iprintf(buffer, "\nRegisters:\n");
  1119. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1120. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1121. for (idx = 0x0; idx < 0x20 ; idx++)
  1122. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1123. idx, inb(ice->port+idx));
  1124. for (idx = 0x0; idx < 0x30 ; idx++)
  1125. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1126. idx, inb(ice->profi_port+idx));
  1127. }
  1128. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 * ice)
  1129. {
  1130. struct snd_info_entry *entry;
  1131. if (! snd_card_proc_new(ice->card, "ice1724", &entry))
  1132. snd_info_set_text_ops(entry, ice, 1024, snd_vt1724_proc_read);
  1133. }
  1134. /*
  1135. *
  1136. */
  1137. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1138. struct snd_ctl_elem_info *uinfo)
  1139. {
  1140. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1141. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1142. return 0;
  1143. }
  1144. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1145. struct snd_ctl_elem_value *ucontrol)
  1146. {
  1147. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1148. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1149. return 0;
  1150. }
  1151. static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1152. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1153. .name = "ICE1724 EEPROM",
  1154. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1155. .info = snd_vt1724_eeprom_info,
  1156. .get = snd_vt1724_eeprom_get
  1157. };
  1158. /*
  1159. */
  1160. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1161. struct snd_ctl_elem_info *uinfo)
  1162. {
  1163. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1164. uinfo->count = 1;
  1165. return 0;
  1166. }
  1167. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1168. {
  1169. unsigned int val, rbits;
  1170. val = diga->status[0] & 0x03; /* professional, non-audio */
  1171. if (val & 0x01) {
  1172. /* professional */
  1173. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1174. IEC958_AES0_PRO_EMPHASIS_5015)
  1175. val |= 1U << 3;
  1176. rbits = (diga->status[4] >> 3) & 0x0f;
  1177. if (rbits) {
  1178. switch (rbits) {
  1179. case 2: val |= 5 << 12; break; /* 96k */
  1180. case 3: val |= 6 << 12; break; /* 192k */
  1181. case 10: val |= 4 << 12; break; /* 88.2k */
  1182. case 11: val |= 7 << 12; break; /* 176.4k */
  1183. }
  1184. } else {
  1185. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1186. case IEC958_AES0_PRO_FS_44100:
  1187. break;
  1188. case IEC958_AES0_PRO_FS_32000:
  1189. val |= 3U << 12;
  1190. break;
  1191. default:
  1192. val |= 2U << 12;
  1193. break;
  1194. }
  1195. }
  1196. } else {
  1197. /* consumer */
  1198. val |= diga->status[1] & 0x04; /* copyright */
  1199. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1200. IEC958_AES0_CON_EMPHASIS_5015)
  1201. val |= 1U << 3;
  1202. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1203. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1204. }
  1205. return val;
  1206. }
  1207. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1208. {
  1209. memset(diga->status, 0, sizeof(diga->status));
  1210. diga->status[0] = val & 0x03; /* professional, non-audio */
  1211. if (val & 0x01) {
  1212. /* professional */
  1213. if (val & (1U << 3))
  1214. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1215. switch ((val >> 12) & 0x7) {
  1216. case 0:
  1217. break;
  1218. case 2:
  1219. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1220. break;
  1221. default:
  1222. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1223. break;
  1224. }
  1225. } else {
  1226. /* consumer */
  1227. diga->status[0] |= val & (1U << 2); /* copyright */
  1228. if (val & (1U << 3))
  1229. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1230. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1231. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1232. }
  1233. }
  1234. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1235. struct snd_ctl_elem_value *ucontrol)
  1236. {
  1237. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1238. unsigned int val;
  1239. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1240. decode_spdif_bits(&ucontrol->value.iec958, val);
  1241. return 0;
  1242. }
  1243. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1244. struct snd_ctl_elem_value *ucontrol)
  1245. {
  1246. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1247. unsigned int val, old;
  1248. val = encode_spdif_bits(&ucontrol->value.iec958);
  1249. spin_lock_irq(&ice->reg_lock);
  1250. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1251. if (val != old)
  1252. update_spdif_bits(ice, val);
  1253. spin_unlock_irq(&ice->reg_lock);
  1254. return (val != old);
  1255. }
  1256. static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1257. {
  1258. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1259. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1260. .info = snd_vt1724_spdif_info,
  1261. .get = snd_vt1724_spdif_default_get,
  1262. .put = snd_vt1724_spdif_default_put
  1263. };
  1264. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1265. struct snd_ctl_elem_value *ucontrol)
  1266. {
  1267. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1268. IEC958_AES0_PROFESSIONAL |
  1269. IEC958_AES0_CON_NOT_COPYRIGHT |
  1270. IEC958_AES0_CON_EMPHASIS;
  1271. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1272. IEC958_AES1_CON_CATEGORY;
  1273. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1274. return 0;
  1275. }
  1276. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1277. struct snd_ctl_elem_value *ucontrol)
  1278. {
  1279. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1280. IEC958_AES0_PROFESSIONAL |
  1281. IEC958_AES0_PRO_FS |
  1282. IEC958_AES0_PRO_EMPHASIS;
  1283. return 0;
  1284. }
  1285. static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1286. {
  1287. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1288. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1289. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1290. .info = snd_vt1724_spdif_info,
  1291. .get = snd_vt1724_spdif_maskc_get,
  1292. };
  1293. static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1294. {
  1295. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1296. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1297. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
  1298. .info = snd_vt1724_spdif_info,
  1299. .get = snd_vt1724_spdif_maskp_get,
  1300. };
  1301. static int snd_vt1724_spdif_sw_info(struct snd_kcontrol *kcontrol,
  1302. struct snd_ctl_elem_info *uinfo)
  1303. {
  1304. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1305. uinfo->count = 1;
  1306. uinfo->value.integer.min = 0;
  1307. uinfo->value.integer.max = 1;
  1308. return 0;
  1309. }
  1310. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1311. struct snd_ctl_elem_value *ucontrol)
  1312. {
  1313. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1314. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1315. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1316. return 0;
  1317. }
  1318. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1319. struct snd_ctl_elem_value *ucontrol)
  1320. {
  1321. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1322. unsigned char old, val;
  1323. spin_lock_irq(&ice->reg_lock);
  1324. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1325. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1326. if (ucontrol->value.integer.value[0])
  1327. val |= VT1724_CFG_SPDIF_OUT_EN;
  1328. if (old != val)
  1329. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1330. spin_unlock_irq(&ice->reg_lock);
  1331. return old != val;
  1332. }
  1333. static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1334. {
  1335. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1336. /* FIXME: the following conflict with IEC958 Playback Route */
  1337. // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
  1338. .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
  1339. .info = snd_vt1724_spdif_sw_info,
  1340. .get = snd_vt1724_spdif_sw_get,
  1341. .put = snd_vt1724_spdif_sw_put
  1342. };
  1343. #if 0 /* NOT USED YET */
  1344. /*
  1345. * GPIO access from extern
  1346. */
  1347. int snd_vt1724_gpio_info(struct snd_kcontrol *kcontrol,
  1348. struct snd_ctl_elem_info *uinfo)
  1349. {
  1350. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1351. uinfo->count = 1;
  1352. uinfo->value.integer.min = 0;
  1353. uinfo->value.integer.max = 1;
  1354. return 0;
  1355. }
  1356. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1357. struct snd_ctl_elem_value *ucontrol)
  1358. {
  1359. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1360. int shift = kcontrol->private_value & 0xff;
  1361. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1362. snd_ice1712_save_gpio_status(ice);
  1363. ucontrol->value.integer.value[0] =
  1364. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1365. snd_ice1712_restore_gpio_status(ice);
  1366. return 0;
  1367. }
  1368. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1369. struct snd_ctl_elem_value *ucontrol)
  1370. {
  1371. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1372. int shift = kcontrol->private_value & 0xff;
  1373. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1374. unsigned int val, nval;
  1375. if (kcontrol->private_value & (1 << 31))
  1376. return -EPERM;
  1377. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1378. snd_ice1712_save_gpio_status(ice);
  1379. val = snd_ice1712_gpio_read(ice);
  1380. nval |= val & ~(1 << shift);
  1381. if (val != nval)
  1382. snd_ice1712_gpio_write(ice, nval);
  1383. snd_ice1712_restore_gpio_status(ice);
  1384. return val != nval;
  1385. }
  1386. #endif /* NOT USED YET */
  1387. /*
  1388. * rate
  1389. */
  1390. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1391. struct snd_ctl_elem_info *uinfo)
  1392. {
  1393. static char *texts_1724[] = {
  1394. "8000", /* 0: 6 */
  1395. "9600", /* 1: 3 */
  1396. "11025", /* 2: 10 */
  1397. "12000", /* 3: 2 */
  1398. "16000", /* 4: 5 */
  1399. "22050", /* 5: 9 */
  1400. "24000", /* 6: 1 */
  1401. "32000", /* 7: 4 */
  1402. "44100", /* 8: 8 */
  1403. "48000", /* 9: 0 */
  1404. "64000", /* 10: 15 */
  1405. "88200", /* 11: 11 */
  1406. "96000", /* 12: 7 */
  1407. "176400", /* 13: 12 */
  1408. "192000", /* 14: 14 */
  1409. "IEC958 Input", /* 15: -- */
  1410. };
  1411. static char *texts_1720[] = {
  1412. "8000", /* 0: 6 */
  1413. "9600", /* 1: 3 */
  1414. "11025", /* 2: 10 */
  1415. "12000", /* 3: 2 */
  1416. "16000", /* 4: 5 */
  1417. "22050", /* 5: 9 */
  1418. "24000", /* 6: 1 */
  1419. "32000", /* 7: 4 */
  1420. "44100", /* 8: 8 */
  1421. "48000", /* 9: 0 */
  1422. "64000", /* 10: 15 */
  1423. "88200", /* 11: 11 */
  1424. "96000", /* 12: 7 */
  1425. "IEC958 Input", /* 13: -- */
  1426. };
  1427. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1428. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1429. uinfo->count = 1;
  1430. uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16;
  1431. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1432. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1433. strcpy(uinfo->value.enumerated.name,
  1434. ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] :
  1435. texts_1724[uinfo->value.enumerated.item]);
  1436. return 0;
  1437. }
  1438. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1439. struct snd_ctl_elem_value *ucontrol)
  1440. {
  1441. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1442. static unsigned char xlate[16] = {
  1443. 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
  1444. };
  1445. unsigned char val;
  1446. spin_lock_irq(&ice->reg_lock);
  1447. if (is_spdif_master(ice)) {
  1448. ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15;
  1449. } else {
  1450. val = xlate[inb(ICEMT1724(ice, RATE)) & 15];
  1451. if (val == 255) {
  1452. snd_BUG();
  1453. val = 0;
  1454. }
  1455. ucontrol->value.enumerated.item[0] = val;
  1456. }
  1457. spin_unlock_irq(&ice->reg_lock);
  1458. return 0;
  1459. }
  1460. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1461. struct snd_ctl_elem_value *ucontrol)
  1462. {
  1463. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1464. unsigned char oval;
  1465. int rate;
  1466. int change = 0;
  1467. int spdif = ice->vt1720 ? 13 : 15;
  1468. spin_lock_irq(&ice->reg_lock);
  1469. oval = inb(ICEMT1724(ice, RATE));
  1470. if (ucontrol->value.enumerated.item[0] == spdif) {
  1471. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1472. } else {
  1473. rate = rates[ucontrol->value.integer.value[0] % 15];
  1474. if (rate <= get_max_rate(ice)) {
  1475. PRO_RATE_DEFAULT = rate;
  1476. spin_unlock_irq(&ice->reg_lock);
  1477. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
  1478. spin_lock_irq(&ice->reg_lock);
  1479. }
  1480. }
  1481. change = inb(ICEMT1724(ice, RATE)) != oval;
  1482. spin_unlock_irq(&ice->reg_lock);
  1483. if ((oval & VT1724_SPDIF_MASTER) !=
  1484. (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) {
  1485. /* notify akm chips as well */
  1486. if (is_spdif_master(ice)) {
  1487. unsigned int i;
  1488. for (i = 0; i < ice->akm_codecs; i++) {
  1489. if (ice->akm[i].ops.set_rate_val)
  1490. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1491. }
  1492. }
  1493. }
  1494. return change;
  1495. }
  1496. static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1497. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1498. .name = "Multi Track Internal Clock",
  1499. .info = snd_vt1724_pro_internal_clock_info,
  1500. .get = snd_vt1724_pro_internal_clock_get,
  1501. .put = snd_vt1724_pro_internal_clock_put
  1502. };
  1503. static int snd_vt1724_pro_rate_locking_info(struct snd_kcontrol *kcontrol,
  1504. struct snd_ctl_elem_info *uinfo)
  1505. {
  1506. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1507. uinfo->count = 1;
  1508. uinfo->value.integer.min = 0;
  1509. uinfo->value.integer.max = 1;
  1510. return 0;
  1511. }
  1512. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1513. struct snd_ctl_elem_value *ucontrol)
  1514. {
  1515. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1516. return 0;
  1517. }
  1518. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1519. struct snd_ctl_elem_value *ucontrol)
  1520. {
  1521. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1522. int change = 0, nval;
  1523. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1524. spin_lock_irq(&ice->reg_lock);
  1525. change = PRO_RATE_LOCKED != nval;
  1526. PRO_RATE_LOCKED = nval;
  1527. spin_unlock_irq(&ice->reg_lock);
  1528. return change;
  1529. }
  1530. static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1531. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1532. .name = "Multi Track Rate Locking",
  1533. .info = snd_vt1724_pro_rate_locking_info,
  1534. .get = snd_vt1724_pro_rate_locking_get,
  1535. .put = snd_vt1724_pro_rate_locking_put
  1536. };
  1537. static int snd_vt1724_pro_rate_reset_info(struct snd_kcontrol *kcontrol,
  1538. struct snd_ctl_elem_info *uinfo)
  1539. {
  1540. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1541. uinfo->count = 1;
  1542. uinfo->value.integer.min = 0;
  1543. uinfo->value.integer.max = 1;
  1544. return 0;
  1545. }
  1546. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1547. struct snd_ctl_elem_value *ucontrol)
  1548. {
  1549. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1550. return 0;
  1551. }
  1552. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1553. struct snd_ctl_elem_value *ucontrol)
  1554. {
  1555. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1556. int change = 0, nval;
  1557. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1558. spin_lock_irq(&ice->reg_lock);
  1559. change = PRO_RATE_RESET != nval;
  1560. PRO_RATE_RESET = nval;
  1561. spin_unlock_irq(&ice->reg_lock);
  1562. return change;
  1563. }
  1564. static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1565. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1566. .name = "Multi Track Rate Reset",
  1567. .info = snd_vt1724_pro_rate_reset_info,
  1568. .get = snd_vt1724_pro_rate_reset_get,
  1569. .put = snd_vt1724_pro_rate_reset_put
  1570. };
  1571. /*
  1572. * routing
  1573. */
  1574. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1575. struct snd_ctl_elem_info *uinfo)
  1576. {
  1577. static char *texts[] = {
  1578. "PCM Out", /* 0 */
  1579. "H/W In 0", "H/W In 1", /* 1-2 */
  1580. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1581. };
  1582. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1583. uinfo->count = 1;
  1584. uinfo->value.enumerated.items = 5;
  1585. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1586. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1587. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1588. return 0;
  1589. }
  1590. static inline int analog_route_shift(int idx)
  1591. {
  1592. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1593. }
  1594. static inline int digital_route_shift(int idx)
  1595. {
  1596. return idx * 3;
  1597. }
  1598. static int get_route_val(struct snd_ice1712 *ice, int shift)
  1599. {
  1600. unsigned long val;
  1601. unsigned char eitem;
  1602. static unsigned char xlate[8] = {
  1603. 0, 255, 1, 2, 255, 255, 3, 4,
  1604. };
  1605. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1606. val >>= shift;
  1607. val &= 7; //we now have 3 bits per output
  1608. eitem = xlate[val];
  1609. if (eitem == 255) {
  1610. snd_BUG();
  1611. return 0;
  1612. }
  1613. return eitem;
  1614. }
  1615. static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
  1616. {
  1617. unsigned int old_val, nval;
  1618. int change;
  1619. static unsigned char xroute[8] = {
  1620. 0, /* PCM */
  1621. 2, /* PSDIN0 Left */
  1622. 3, /* PSDIN0 Right */
  1623. 6, /* SPDIN Left */
  1624. 7, /* SPDIN Right */
  1625. };
  1626. nval = xroute[val % 5];
  1627. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1628. val &= ~(0x07 << shift);
  1629. val |= nval << shift;
  1630. change = val != old_val;
  1631. if (change)
  1632. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1633. return change;
  1634. }
  1635. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1636. struct snd_ctl_elem_value *ucontrol)
  1637. {
  1638. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1639. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1640. ucontrol->value.enumerated.item[0] =
  1641. get_route_val(ice, analog_route_shift(idx));
  1642. return 0;
  1643. }
  1644. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1645. struct snd_ctl_elem_value *ucontrol)
  1646. {
  1647. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1648. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1649. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1650. analog_route_shift(idx));
  1651. }
  1652. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1653. struct snd_ctl_elem_value *ucontrol)
  1654. {
  1655. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1656. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1657. ucontrol->value.enumerated.item[0] =
  1658. get_route_val(ice, digital_route_shift(idx));
  1659. return 0;
  1660. }
  1661. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1662. struct snd_ctl_elem_value *ucontrol)
  1663. {
  1664. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1665. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1666. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1667. digital_route_shift(idx));
  1668. }
  1669. static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
  1670. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1671. .name = "H/W Playback Route",
  1672. .info = snd_vt1724_pro_route_info,
  1673. .get = snd_vt1724_pro_route_analog_get,
  1674. .put = snd_vt1724_pro_route_analog_put,
  1675. };
  1676. static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1677. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1678. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
  1679. .info = snd_vt1724_pro_route_info,
  1680. .get = snd_vt1724_pro_route_spdif_get,
  1681. .put = snd_vt1724_pro_route_spdif_put,
  1682. .count = 2,
  1683. };
  1684. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1685. struct snd_ctl_elem_info *uinfo)
  1686. {
  1687. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1688. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1689. uinfo->value.integer.min = 0;
  1690. uinfo->value.integer.max = 255;
  1691. return 0;
  1692. }
  1693. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1694. struct snd_ctl_elem_value *ucontrol)
  1695. {
  1696. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1697. int idx;
  1698. spin_lock_irq(&ice->reg_lock);
  1699. for (idx = 0; idx < 22; idx++) {
  1700. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1701. ucontrol->value.integer.value[idx] =
  1702. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1703. }
  1704. spin_unlock_irq(&ice->reg_lock);
  1705. return 0;
  1706. }
  1707. static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1708. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1709. .name = "Multi Track Peak",
  1710. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1711. .info = snd_vt1724_pro_peak_info,
  1712. .get = snd_vt1724_pro_peak_get
  1713. };
  1714. /*
  1715. *
  1716. */
  1717. static struct snd_ice1712_card_info no_matched __devinitdata;
  1718. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1719. snd_vt1724_revo_cards,
  1720. snd_vt1724_amp_cards,
  1721. snd_vt1724_aureon_cards,
  1722. snd_vt1720_mobo_cards,
  1723. snd_vt1720_pontis_cards,
  1724. snd_vt1724_prodigy192_cards,
  1725. snd_vt1724_juli_cards,
  1726. snd_vt1724_phase_cards,
  1727. NULL,
  1728. };
  1729. /*
  1730. */
  1731. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1732. {
  1733. int t = 0x10000;
  1734. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1735. ;
  1736. if (t == -1)
  1737. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1738. }
  1739. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1740. unsigned char dev, unsigned char addr)
  1741. {
  1742. unsigned char val;
  1743. down(&ice->i2c_mutex);
  1744. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1745. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1746. wait_i2c_busy(ice);
  1747. val = inb(ICEREG1724(ice, I2C_DATA));
  1748. up(&ice->i2c_mutex);
  1749. //printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  1750. return val;
  1751. }
  1752. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  1753. unsigned char dev, unsigned char addr, unsigned char data)
  1754. {
  1755. down(&ice->i2c_mutex);
  1756. wait_i2c_busy(ice);
  1757. //printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  1758. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1759. outb(data, ICEREG1724(ice, I2C_DATA));
  1760. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1761. wait_i2c_busy(ice);
  1762. up(&ice->i2c_mutex);
  1763. }
  1764. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  1765. const char *modelname)
  1766. {
  1767. const int dev = 0xa0; /* EEPROM device address */
  1768. unsigned int i, size;
  1769. struct snd_ice1712_card_info **tbl, *c;
  1770. if (! modelname || ! *modelname) {
  1771. ice->eeprom.subvendor = 0;
  1772. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1773. ice->eeprom.subvendor =
  1774. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1775. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1776. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1777. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1778. if (ice->eeprom.subvendor == 0 ||
  1779. ice->eeprom.subvendor == (unsigned int)-1) {
  1780. /* invalid subvendor from EEPROM, try the PCI
  1781. * subststem ID instead
  1782. */
  1783. u16 vendor, device;
  1784. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  1785. &vendor);
  1786. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1787. ice->eeprom.subvendor =
  1788. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1789. if (ice->eeprom.subvendor == 0 ||
  1790. ice->eeprom.subvendor == (unsigned int)-1) {
  1791. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1792. return -ENXIO;
  1793. }
  1794. }
  1795. }
  1796. for (tbl = card_tables; *tbl; tbl++) {
  1797. for (c = *tbl; c->subvendor; c++) {
  1798. if (modelname && c->model &&
  1799. ! strcmp(modelname, c->model)) {
  1800. printk(KERN_INFO "ice1724: Using board model %s\n",
  1801. c->name);
  1802. ice->eeprom.subvendor = c->subvendor;
  1803. } else if (c->subvendor != ice->eeprom.subvendor)
  1804. continue;
  1805. if (! c->eeprom_size || ! c->eeprom_data)
  1806. goto found;
  1807. /* if the EEPROM is given by the driver, use it */
  1808. snd_printdd("using the defined eeprom..\n");
  1809. ice->eeprom.version = 2;
  1810. ice->eeprom.size = c->eeprom_size + 6;
  1811. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1812. goto read_skipped;
  1813. }
  1814. }
  1815. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  1816. ice->eeprom.subvendor);
  1817. found:
  1818. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1819. if (ice->eeprom.size < 6)
  1820. ice->eeprom.size = 32;
  1821. else if (ice->eeprom.size > 32) {
  1822. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  1823. ice->eeprom.size);
  1824. return -EIO;
  1825. }
  1826. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1827. if (ice->eeprom.version != 2)
  1828. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  1829. ice->eeprom.version);
  1830. size = ice->eeprom.size - 6;
  1831. for (i = 0; i < size; i++)
  1832. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1833. read_skipped:
  1834. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1835. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1836. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  1837. return 0;
  1838. }
  1839. static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
  1840. {
  1841. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  1842. udelay(200);
  1843. outb(0, ICEREG1724(ice, CONTROL));
  1844. udelay(200);
  1845. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  1846. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  1847. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  1848. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  1849. ice->gpio.write_mask = ice->eeprom.gpiomask;
  1850. ice->gpio.direction = ice->eeprom.gpiodir;
  1851. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  1852. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  1853. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  1854. outb(0, ICEREG1724(ice, POWERDOWN));
  1855. return 0;
  1856. }
  1857. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  1858. {
  1859. int err;
  1860. struct snd_kcontrol *kctl;
  1861. snd_assert(ice->pcm != NULL, return -EIO);
  1862. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  1863. if (err < 0)
  1864. return err;
  1865. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  1866. if (err < 0)
  1867. return err;
  1868. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  1869. if (err < 0)
  1870. return err;
  1871. kctl->id.device = ice->pcm->device;
  1872. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  1873. if (err < 0)
  1874. return err;
  1875. kctl->id.device = ice->pcm->device;
  1876. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  1877. if (err < 0)
  1878. return err;
  1879. kctl->id.device = ice->pcm->device;
  1880. #if 0 /* use default only */
  1881. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  1882. if (err < 0)
  1883. return err;
  1884. kctl->id.device = ice->pcm->device;
  1885. ice->spdif.stream_ctl = kctl;
  1886. #endif
  1887. return 0;
  1888. }
  1889. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  1890. {
  1891. int err;
  1892. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  1893. if (err < 0)
  1894. return err;
  1895. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  1896. if (err < 0)
  1897. return err;
  1898. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  1899. if (err < 0)
  1900. return err;
  1901. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  1902. if (err < 0)
  1903. return err;
  1904. if (ice->num_total_dacs > 0) {
  1905. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  1906. tmp.count = ice->num_total_dacs;
  1907. if (ice->vt1720 && tmp.count > 2)
  1908. tmp.count = 2;
  1909. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  1910. if (err < 0)
  1911. return err;
  1912. }
  1913. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  1914. if (err < 0)
  1915. return err;
  1916. return 0;
  1917. }
  1918. static int snd_vt1724_free(struct snd_ice1712 *ice)
  1919. {
  1920. if (! ice->port)
  1921. goto __hw_end;
  1922. /* mask all interrupts */
  1923. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  1924. outb(0xff, ICEREG1724(ice, IRQMASK));
  1925. /* --- */
  1926. __hw_end:
  1927. if (ice->irq >= 0) {
  1928. synchronize_irq(ice->irq);
  1929. free_irq(ice->irq, ice);
  1930. }
  1931. pci_release_regions(ice->pci);
  1932. snd_ice1712_akm4xxx_free(ice);
  1933. pci_disable_device(ice->pci);
  1934. kfree(ice);
  1935. return 0;
  1936. }
  1937. static int snd_vt1724_dev_free(struct snd_device *device)
  1938. {
  1939. struct snd_ice1712 *ice = device->device_data;
  1940. return snd_vt1724_free(ice);
  1941. }
  1942. static int __devinit snd_vt1724_create(struct snd_card *card,
  1943. struct pci_dev *pci,
  1944. const char *modelname,
  1945. struct snd_ice1712 ** r_ice1712)
  1946. {
  1947. struct snd_ice1712 *ice;
  1948. int err;
  1949. unsigned char mask;
  1950. static struct snd_device_ops ops = {
  1951. .dev_free = snd_vt1724_dev_free,
  1952. };
  1953. *r_ice1712 = NULL;
  1954. /* enable PCI device */
  1955. if ((err = pci_enable_device(pci)) < 0)
  1956. return err;
  1957. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  1958. if (ice == NULL) {
  1959. pci_disable_device(pci);
  1960. return -ENOMEM;
  1961. }
  1962. ice->vt1724 = 1;
  1963. spin_lock_init(&ice->reg_lock);
  1964. init_MUTEX(&ice->gpio_mutex);
  1965. init_MUTEX(&ice->open_mutex);
  1966. init_MUTEX(&ice->i2c_mutex);
  1967. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  1968. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  1969. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  1970. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  1971. ice->card = card;
  1972. ice->pci = pci;
  1973. ice->irq = -1;
  1974. pci_set_master(pci);
  1975. snd_vt1724_proc_init(ice);
  1976. synchronize_irq(pci->irq);
  1977. if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
  1978. kfree(ice);
  1979. pci_disable_device(pci);
  1980. return err;
  1981. }
  1982. ice->port = pci_resource_start(pci, 0);
  1983. ice->profi_port = pci_resource_start(pci, 1);
  1984. if (request_irq(pci->irq, snd_vt1724_interrupt,
  1985. SA_INTERRUPT|SA_SHIRQ, "ICE1724", ice)) {
  1986. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  1987. snd_vt1724_free(ice);
  1988. return -EIO;
  1989. }
  1990. ice->irq = pci->irq;
  1991. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  1992. snd_vt1724_free(ice);
  1993. return -EIO;
  1994. }
  1995. if (snd_vt1724_chip_init(ice) < 0) {
  1996. snd_vt1724_free(ice);
  1997. return -EIO;
  1998. }
  1999. /* unmask used interrupts */
  2000. if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401))
  2001. mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
  2002. else
  2003. mask = 0;
  2004. outb(mask, ICEREG1724(ice, IRQMASK));
  2005. /* don't handle FIFO overrun/underruns (just yet),
  2006. * since they cause machine lockups
  2007. */
  2008. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  2009. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
  2010. snd_vt1724_free(ice);
  2011. return err;
  2012. }
  2013. snd_card_set_dev(card, &pci->dev);
  2014. *r_ice1712 = ice;
  2015. return 0;
  2016. }
  2017. /*
  2018. *
  2019. * Registration
  2020. *
  2021. */
  2022. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  2023. const struct pci_device_id *pci_id)
  2024. {
  2025. static int dev;
  2026. struct snd_card *card;
  2027. struct snd_ice1712 *ice;
  2028. int pcm_dev = 0, err;
  2029. struct snd_ice1712_card_info **tbl, *c;
  2030. if (dev >= SNDRV_CARDS)
  2031. return -ENODEV;
  2032. if (!enable[dev]) {
  2033. dev++;
  2034. return -ENOENT;
  2035. }
  2036. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  2037. if (card == NULL)
  2038. return -ENOMEM;
  2039. strcpy(card->driver, "ICE1724");
  2040. strcpy(card->shortname, "ICEnsemble ICE1724");
  2041. if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
  2042. snd_card_free(card);
  2043. return err;
  2044. }
  2045. for (tbl = card_tables; *tbl; tbl++) {
  2046. for (c = *tbl; c->subvendor; c++) {
  2047. if (c->subvendor == ice->eeprom.subvendor) {
  2048. strcpy(card->shortname, c->name);
  2049. if (c->driver) /* specific driver? */
  2050. strcpy(card->driver, c->driver);
  2051. if (c->chip_init) {
  2052. if ((err = c->chip_init(ice)) < 0) {
  2053. snd_card_free(card);
  2054. return err;
  2055. }
  2056. }
  2057. goto __found;
  2058. }
  2059. }
  2060. }
  2061. c = &no_matched;
  2062. __found:
  2063. if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
  2064. snd_card_free(card);
  2065. return err;
  2066. }
  2067. if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
  2068. snd_card_free(card);
  2069. return err;
  2070. }
  2071. if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
  2072. snd_card_free(card);
  2073. return err;
  2074. }
  2075. if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
  2076. snd_card_free(card);
  2077. return err;
  2078. }
  2079. if ((err = snd_vt1724_build_controls(ice)) < 0) {
  2080. snd_card_free(card);
  2081. return err;
  2082. }
  2083. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2084. if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
  2085. snd_card_free(card);
  2086. return err;
  2087. }
  2088. }
  2089. if (c->build_controls) {
  2090. if ((err = c->build_controls(ice)) < 0) {
  2091. snd_card_free(card);
  2092. return err;
  2093. }
  2094. }
  2095. if (! c->no_mpu401) {
  2096. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2097. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  2098. ICEREG1724(ice, MPU_CTRL), 1,
  2099. ice->irq, 0,
  2100. &ice->rmidi[0])) < 0) {
  2101. snd_card_free(card);
  2102. return err;
  2103. }
  2104. }
  2105. }
  2106. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2107. card->shortname, ice->port, ice->irq);
  2108. if ((err = snd_card_register(card)) < 0) {
  2109. snd_card_free(card);
  2110. return err;
  2111. }
  2112. pci_set_drvdata(pci, card);
  2113. dev++;
  2114. return 0;
  2115. }
  2116. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2117. {
  2118. snd_card_free(pci_get_drvdata(pci));
  2119. pci_set_drvdata(pci, NULL);
  2120. }
  2121. static struct pci_driver driver = {
  2122. .name = "ICE1724",
  2123. .id_table = snd_vt1724_ids,
  2124. .probe = snd_vt1724_probe,
  2125. .remove = __devexit_p(snd_vt1724_remove),
  2126. };
  2127. static int __init alsa_card_ice1724_init(void)
  2128. {
  2129. return pci_register_driver(&driver);
  2130. }
  2131. static void __exit alsa_card_ice1724_exit(void)
  2132. {
  2133. pci_unregister_driver(&driver);
  2134. }
  2135. module_init(alsa_card_ice1724_init)
  2136. module_exit(alsa_card_ice1724_exit)