ice1712.c 81 KB

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  1. /*
  2. * ALSA driver for ICEnsemble ICE1712 (Envy24)
  3. *
  4. * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. /*
  22. NOTES:
  23. - spdif nonaudio consumer mode does not work (at least with my
  24. Sony STR-DB830)
  25. */
  26. /*
  27. * Changes:
  28. *
  29. * 2002.09.09 Takashi Iwai <tiwai@suse.de>
  30. * split the code to several files. each low-level routine
  31. * is stored in the local file and called from registration
  32. * function from card_info struct.
  33. *
  34. * 2002.11.26 James Stafford <jstafford@ampltd.com>
  35. * Added support for VT1724 (Envy24HT)
  36. * I have left out support for 176.4 and 192 KHz for the moment.
  37. * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
  38. *
  39. * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
  40. * Split vt1724 part to an independent driver.
  41. * The GPIO is accessed through the callback functions now.
  42. *
  43. * 2004.03.31 Doug McLain <nostar@comcast.net>
  44. * Added support for Event Electronics EZ8 card to hoontech.c.
  45. */
  46. #include <sound/driver.h>
  47. #include <asm/io.h>
  48. #include <linux/delay.h>
  49. #include <linux/interrupt.h>
  50. #include <linux/init.h>
  51. #include <linux/pci.h>
  52. #include <linux/slab.h>
  53. #include <linux/moduleparam.h>
  54. #include <sound/core.h>
  55. #include <sound/cs8427.h>
  56. #include <sound/info.h>
  57. #include <sound/mpu401.h>
  58. #include <sound/initval.h>
  59. #include <sound/asoundef.h>
  60. #include "ice1712.h"
  61. /* lowlevel routines */
  62. #include "delta.h"
  63. #include "ews.h"
  64. #include "hoontech.h"
  65. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  66. MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
  67. MODULE_LICENSE("GPL");
  68. MODULE_SUPPORTED_DEVICE("{"
  69. HOONTECH_DEVICE_DESC
  70. DELTA_DEVICE_DESC
  71. EWS_DEVICE_DESC
  72. "{ICEnsemble,Generic ICE1712},"
  73. "{ICEnsemble,Generic Envy24}}");
  74. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  75. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  76. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  77. static char *model[SNDRV_CARDS];
  78. static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
  79. static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
  80. module_param_array(index, int, NULL, 0444);
  81. MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
  82. module_param_array(id, charp, NULL, 0444);
  83. MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
  84. module_param_array(enable, bool, NULL, 0444);
  85. MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
  86. module_param_array(omni, bool, NULL, 0444);
  87. MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
  88. module_param_array(cs8427_timeout, int, NULL, 0444);
  89. MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
  90. module_param_array(model, charp, NULL, 0444);
  91. MODULE_PARM_DESC(model, "Use the given board model.");
  92. static struct pci_device_id snd_ice1712_ids[] = {
  93. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */
  94. { 0, }
  95. };
  96. MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
  97. static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
  98. static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
  99. static int PRO_RATE_LOCKED;
  100. static int PRO_RATE_RESET = 1;
  101. static unsigned int PRO_RATE_DEFAULT = 44100;
  102. /*
  103. * Basic I/O
  104. */
  105. /* check whether the clock mode is spdif-in */
  106. static inline int is_spdif_master(struct snd_ice1712 *ice)
  107. {
  108. return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
  109. }
  110. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  111. {
  112. return is_spdif_master(ice) || PRO_RATE_LOCKED;
  113. }
  114. static inline void snd_ice1712_ds_write(struct snd_ice1712 * ice, u8 channel, u8 addr, u32 data)
  115. {
  116. outb((channel << 4) | addr, ICEDS(ice, INDEX));
  117. outl(data, ICEDS(ice, DATA));
  118. }
  119. static inline u32 snd_ice1712_ds_read(struct snd_ice1712 * ice, u8 channel, u8 addr)
  120. {
  121. outb((channel << 4) | addr, ICEDS(ice, INDEX));
  122. return inl(ICEDS(ice, DATA));
  123. }
  124. static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
  125. unsigned short reg,
  126. unsigned short val)
  127. {
  128. struct snd_ice1712 *ice = ac97->private_data;
  129. int tm;
  130. unsigned char old_cmd = 0;
  131. for (tm = 0; tm < 0x10000; tm++) {
  132. old_cmd = inb(ICEREG(ice, AC97_CMD));
  133. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  134. continue;
  135. if (!(old_cmd & ICE1712_AC97_READY))
  136. continue;
  137. break;
  138. }
  139. outb(reg, ICEREG(ice, AC97_INDEX));
  140. outw(val, ICEREG(ice, AC97_DATA));
  141. old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
  142. outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
  143. for (tm = 0; tm < 0x10000; tm++)
  144. if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
  145. break;
  146. }
  147. static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
  148. unsigned short reg)
  149. {
  150. struct snd_ice1712 *ice = ac97->private_data;
  151. int tm;
  152. unsigned char old_cmd = 0;
  153. for (tm = 0; tm < 0x10000; tm++) {
  154. old_cmd = inb(ICEREG(ice, AC97_CMD));
  155. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  156. continue;
  157. if (!(old_cmd & ICE1712_AC97_READY))
  158. continue;
  159. break;
  160. }
  161. outb(reg, ICEREG(ice, AC97_INDEX));
  162. outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
  163. for (tm = 0; tm < 0x10000; tm++)
  164. if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
  165. break;
  166. if (tm >= 0x10000) /* timeout */
  167. return ~0;
  168. return inw(ICEREG(ice, AC97_DATA));
  169. }
  170. /*
  171. * pro ac97 section
  172. */
  173. static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
  174. unsigned short reg,
  175. unsigned short val)
  176. {
  177. struct snd_ice1712 *ice = ac97->private_data;
  178. int tm;
  179. unsigned char old_cmd = 0;
  180. for (tm = 0; tm < 0x10000; tm++) {
  181. old_cmd = inb(ICEMT(ice, AC97_CMD));
  182. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  183. continue;
  184. if (!(old_cmd & ICE1712_AC97_READY))
  185. continue;
  186. break;
  187. }
  188. outb(reg, ICEMT(ice, AC97_INDEX));
  189. outw(val, ICEMT(ice, AC97_DATA));
  190. old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
  191. outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
  192. for (tm = 0; tm < 0x10000; tm++)
  193. if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
  194. break;
  195. }
  196. static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
  197. unsigned short reg)
  198. {
  199. struct snd_ice1712 *ice = ac97->private_data;
  200. int tm;
  201. unsigned char old_cmd = 0;
  202. for (tm = 0; tm < 0x10000; tm++) {
  203. old_cmd = inb(ICEMT(ice, AC97_CMD));
  204. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  205. continue;
  206. if (!(old_cmd & ICE1712_AC97_READY))
  207. continue;
  208. break;
  209. }
  210. outb(reg, ICEMT(ice, AC97_INDEX));
  211. outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
  212. for (tm = 0; tm < 0x10000; tm++)
  213. if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
  214. break;
  215. if (tm >= 0x10000) /* timeout */
  216. return ~0;
  217. return inw(ICEMT(ice, AC97_DATA));
  218. }
  219. /*
  220. * consumer ac97 digital mix
  221. */
  222. static int snd_ice1712_digmix_route_ac97_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  223. {
  224. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  225. uinfo->count = 1;
  226. uinfo->value.integer.min = 0;
  227. uinfo->value.integer.max = 1;
  228. return 0;
  229. }
  230. static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  231. {
  232. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  233. ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
  234. return 0;
  235. }
  236. static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  237. {
  238. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  239. unsigned char val, nval;
  240. spin_lock_irq(&ice->reg_lock);
  241. val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
  242. nval = val & ~ICE1712_ROUTE_AC97;
  243. if (ucontrol->value.integer.value[0]) nval |= ICE1712_ROUTE_AC97;
  244. outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
  245. spin_unlock_irq(&ice->reg_lock);
  246. return val != nval;
  247. }
  248. static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
  249. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  250. .name = "Digital Mixer To AC97",
  251. .info = snd_ice1712_digmix_route_ac97_info,
  252. .get = snd_ice1712_digmix_route_ac97_get,
  253. .put = snd_ice1712_digmix_route_ac97_put,
  254. };
  255. /*
  256. * gpio operations
  257. */
  258. static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  259. {
  260. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
  261. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  262. }
  263. static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  264. {
  265. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
  266. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  267. }
  268. static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
  269. {
  270. return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  271. }
  272. static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
  273. {
  274. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
  275. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  276. }
  277. /*
  278. *
  279. * CS8427 interface
  280. *
  281. */
  282. /*
  283. * change the input clock selection
  284. * spdif_clock = 1 - IEC958 input, 0 - Envy24
  285. */
  286. static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
  287. {
  288. unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
  289. unsigned char val, nval;
  290. int res = 0;
  291. snd_i2c_lock(ice->i2c);
  292. if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
  293. snd_i2c_unlock(ice->i2c);
  294. return -EIO;
  295. }
  296. if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
  297. snd_i2c_unlock(ice->i2c);
  298. return -EIO;
  299. }
  300. nval = val & 0xf0;
  301. if (spdif_clock)
  302. nval |= 0x01;
  303. else
  304. nval |= 0x04;
  305. if (val != nval) {
  306. reg[1] = nval;
  307. if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
  308. res = -EIO;
  309. } else {
  310. res++;
  311. }
  312. }
  313. snd_i2c_unlock(ice->i2c);
  314. return res;
  315. }
  316. /*
  317. * spdif callbacks
  318. */
  319. static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  320. {
  321. snd_cs8427_iec958_active(ice->cs8427, 1);
  322. }
  323. static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  324. {
  325. snd_cs8427_iec958_active(ice->cs8427, 0);
  326. }
  327. static void setup_cs8427(struct snd_ice1712 *ice, int rate)
  328. {
  329. snd_cs8427_iec958_pcm(ice->cs8427, rate);
  330. }
  331. /*
  332. * create and initialize callbacks for cs8427 interface
  333. */
  334. int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
  335. {
  336. int err;
  337. if ((err = snd_cs8427_create(ice->i2c, addr,
  338. (ice->cs8427_timeout * HZ) / 1000,
  339. &ice->cs8427)) < 0) {
  340. snd_printk(KERN_ERR "CS8427 initialization failed\n");
  341. return err;
  342. }
  343. ice->spdif.ops.open = open_cs8427;
  344. ice->spdif.ops.close = close_cs8427;
  345. ice->spdif.ops.setup_rate = setup_cs8427;
  346. return 0;
  347. }
  348. /*
  349. * Interrupt handler
  350. */
  351. static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  352. {
  353. struct snd_ice1712 *ice = dev_id;
  354. unsigned char status;
  355. int handled = 0;
  356. while (1) {
  357. status = inb(ICEREG(ice, IRQSTAT));
  358. if (status == 0)
  359. break;
  360. handled = 1;
  361. if (status & ICE1712_IRQ_MPU1) {
  362. if (ice->rmidi[0])
  363. snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
  364. outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
  365. status &= ~ICE1712_IRQ_MPU1;
  366. }
  367. if (status & ICE1712_IRQ_TIMER)
  368. outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
  369. if (status & ICE1712_IRQ_MPU2) {
  370. if (ice->rmidi[1])
  371. snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data, regs);
  372. outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
  373. status &= ~ICE1712_IRQ_MPU2;
  374. }
  375. if (status & ICE1712_IRQ_PROPCM) {
  376. unsigned char mtstat = inb(ICEMT(ice, IRQ));
  377. if (mtstat & ICE1712_MULTI_PBKSTATUS) {
  378. if (ice->playback_pro_substream)
  379. snd_pcm_period_elapsed(ice->playback_pro_substream);
  380. outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
  381. }
  382. if (mtstat & ICE1712_MULTI_CAPSTATUS) {
  383. if (ice->capture_pro_substream)
  384. snd_pcm_period_elapsed(ice->capture_pro_substream);
  385. outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
  386. }
  387. }
  388. if (status & ICE1712_IRQ_FM)
  389. outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
  390. if (status & ICE1712_IRQ_PBKDS) {
  391. u32 idx;
  392. u16 pbkstatus;
  393. struct snd_pcm_substream *substream;
  394. pbkstatus = inw(ICEDS(ice, INTSTAT));
  395. //printk("pbkstatus = 0x%x\n", pbkstatus);
  396. for (idx = 0; idx < 6; idx++) {
  397. if ((pbkstatus & (3 << (idx * 2))) == 0)
  398. continue;
  399. if ((substream = ice->playback_con_substream_ds[idx]) != NULL)
  400. snd_pcm_period_elapsed(substream);
  401. outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
  402. }
  403. outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
  404. }
  405. if (status & ICE1712_IRQ_CONCAP) {
  406. if (ice->capture_con_substream)
  407. snd_pcm_period_elapsed(ice->capture_con_substream);
  408. outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
  409. }
  410. if (status & ICE1712_IRQ_CONPBK) {
  411. if (ice->playback_con_substream)
  412. snd_pcm_period_elapsed(ice->playback_con_substream);
  413. outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
  414. }
  415. }
  416. return IRQ_RETVAL(handled);
  417. }
  418. /*
  419. * PCM part - misc
  420. */
  421. static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
  422. struct snd_pcm_hw_params *hw_params)
  423. {
  424. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  425. }
  426. static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
  427. {
  428. return snd_pcm_lib_free_pages(substream);
  429. }
  430. /*
  431. * PCM part - consumer I/O
  432. */
  433. static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
  434. int cmd)
  435. {
  436. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  437. int result = 0;
  438. u32 tmp;
  439. spin_lock(&ice->reg_lock);
  440. tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
  441. if (cmd == SNDRV_PCM_TRIGGER_START) {
  442. tmp |= 1;
  443. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  444. tmp &= ~1;
  445. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
  446. tmp |= 2;
  447. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
  448. tmp &= ~2;
  449. } else {
  450. result = -EINVAL;
  451. }
  452. snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
  453. spin_unlock(&ice->reg_lock);
  454. return result;
  455. }
  456. static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
  457. int cmd)
  458. {
  459. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  460. int result = 0;
  461. u32 tmp;
  462. spin_lock(&ice->reg_lock);
  463. tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
  464. if (cmd == SNDRV_PCM_TRIGGER_START) {
  465. tmp |= 1;
  466. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  467. tmp &= ~1;
  468. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
  469. tmp |= 2;
  470. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
  471. tmp &= ~2;
  472. } else {
  473. result = -EINVAL;
  474. }
  475. snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
  476. spin_unlock(&ice->reg_lock);
  477. return result;
  478. }
  479. static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
  480. int cmd)
  481. {
  482. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  483. int result = 0;
  484. u8 tmp;
  485. spin_lock(&ice->reg_lock);
  486. tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
  487. if (cmd == SNDRV_PCM_TRIGGER_START) {
  488. tmp |= 1;
  489. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  490. tmp &= ~1;
  491. } else {
  492. result = -EINVAL;
  493. }
  494. snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
  495. spin_unlock(&ice->reg_lock);
  496. return result;
  497. }
  498. static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
  499. {
  500. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  501. struct snd_pcm_runtime *runtime = substream->runtime;
  502. u32 period_size, buf_size, rate, tmp;
  503. period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  504. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  505. tmp = 0x0000;
  506. if (snd_pcm_format_width(runtime->format) == 16)
  507. tmp |= 0x10;
  508. if (runtime->channels == 2)
  509. tmp |= 0x08;
  510. rate = (runtime->rate * 8192) / 375;
  511. if (rate > 0x000fffff)
  512. rate = 0x000fffff;
  513. spin_lock_irq(&ice->reg_lock);
  514. outb(0, ice->ddma_port + 15);
  515. outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
  516. outl(runtime->dma_addr, ice->ddma_port + 0);
  517. outw(buf_size, ice->ddma_port + 4);
  518. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
  519. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
  520. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
  521. snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
  522. snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
  523. snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
  524. snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
  525. snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
  526. spin_unlock_irq(&ice->reg_lock);
  527. return 0;
  528. }
  529. static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
  530. {
  531. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  532. struct snd_pcm_runtime *runtime = substream->runtime;
  533. u32 period_size, buf_size, rate, tmp, chn;
  534. period_size = snd_pcm_lib_period_bytes(substream) - 1;
  535. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  536. tmp = 0x0064;
  537. if (snd_pcm_format_width(runtime->format) == 16)
  538. tmp &= ~0x04;
  539. if (runtime->channels == 2)
  540. tmp |= 0x08;
  541. rate = (runtime->rate * 8192) / 375;
  542. if (rate > 0x000fffff)
  543. rate = 0x000fffff;
  544. ice->playback_con_active_buf[substream->number] = 0;
  545. ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
  546. chn = substream->number * 2;
  547. spin_lock_irq(&ice->reg_lock);
  548. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
  549. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
  550. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
  551. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
  552. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
  553. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
  554. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
  555. if (runtime->channels == 2) {
  556. snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
  557. snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
  558. }
  559. spin_unlock_irq(&ice->reg_lock);
  560. return 0;
  561. }
  562. static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
  563. {
  564. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  565. struct snd_pcm_runtime *runtime = substream->runtime;
  566. u32 period_size, buf_size;
  567. u8 tmp;
  568. period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  569. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  570. tmp = 0x06;
  571. if (snd_pcm_format_width(runtime->format) == 16)
  572. tmp &= ~0x04;
  573. if (runtime->channels == 2)
  574. tmp &= ~0x02;
  575. spin_lock_irq(&ice->reg_lock);
  576. outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
  577. outw(buf_size, ICEREG(ice, CONCAP_COUNT));
  578. snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
  579. snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
  580. snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
  581. spin_unlock_irq(&ice->reg_lock);
  582. snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
  583. return 0;
  584. }
  585. static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
  586. {
  587. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  588. struct snd_pcm_runtime *runtime = substream->runtime;
  589. size_t ptr;
  590. if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
  591. return 0;
  592. ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
  593. if (ptr == runtime->buffer_size)
  594. ptr = 0;
  595. return bytes_to_frames(substream->runtime, ptr);
  596. }
  597. static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
  598. {
  599. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  600. u8 addr;
  601. size_t ptr;
  602. if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
  603. return 0;
  604. if (ice->playback_con_active_buf[substream->number])
  605. addr = ICE1712_DSC_ADDR1;
  606. else
  607. addr = ICE1712_DSC_ADDR0;
  608. ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
  609. ice->playback_con_virt_addr[substream->number];
  610. if (ptr == substream->runtime->buffer_size)
  611. ptr = 0;
  612. return bytes_to_frames(substream->runtime, ptr);
  613. }
  614. static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
  615. {
  616. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  617. size_t ptr;
  618. if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
  619. return 0;
  620. ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
  621. if (ptr == substream->runtime->buffer_size)
  622. ptr = 0;
  623. return bytes_to_frames(substream->runtime, ptr);
  624. }
  625. static struct snd_pcm_hardware snd_ice1712_playback =
  626. {
  627. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  628. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  629. SNDRV_PCM_INFO_MMAP_VALID |
  630. SNDRV_PCM_INFO_PAUSE),
  631. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  632. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  633. .rate_min = 4000,
  634. .rate_max = 48000,
  635. .channels_min = 1,
  636. .channels_max = 2,
  637. .buffer_bytes_max = (64*1024),
  638. .period_bytes_min = 64,
  639. .period_bytes_max = (64*1024),
  640. .periods_min = 1,
  641. .periods_max = 1024,
  642. .fifo_size = 0,
  643. };
  644. static struct snd_pcm_hardware snd_ice1712_playback_ds =
  645. {
  646. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  647. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  648. SNDRV_PCM_INFO_MMAP_VALID |
  649. SNDRV_PCM_INFO_PAUSE),
  650. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  651. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  652. .rate_min = 4000,
  653. .rate_max = 48000,
  654. .channels_min = 1,
  655. .channels_max = 2,
  656. .buffer_bytes_max = (128*1024),
  657. .period_bytes_min = 64,
  658. .period_bytes_max = (128*1024),
  659. .periods_min = 2,
  660. .periods_max = 2,
  661. .fifo_size = 0,
  662. };
  663. static struct snd_pcm_hardware snd_ice1712_capture =
  664. {
  665. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  666. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  667. SNDRV_PCM_INFO_MMAP_VALID),
  668. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  669. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  670. .rate_min = 4000,
  671. .rate_max = 48000,
  672. .channels_min = 1,
  673. .channels_max = 2,
  674. .buffer_bytes_max = (64*1024),
  675. .period_bytes_min = 64,
  676. .period_bytes_max = (64*1024),
  677. .periods_min = 1,
  678. .periods_max = 1024,
  679. .fifo_size = 0,
  680. };
  681. static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
  682. {
  683. struct snd_pcm_runtime *runtime = substream->runtime;
  684. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  685. ice->playback_con_substream = substream;
  686. runtime->hw = snd_ice1712_playback;
  687. return 0;
  688. }
  689. static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
  690. {
  691. struct snd_pcm_runtime *runtime = substream->runtime;
  692. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  693. u32 tmp;
  694. ice->playback_con_substream_ds[substream->number] = substream;
  695. runtime->hw = snd_ice1712_playback_ds;
  696. spin_lock_irq(&ice->reg_lock);
  697. tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
  698. outw(tmp, ICEDS(ice, INTMASK));
  699. spin_unlock_irq(&ice->reg_lock);
  700. return 0;
  701. }
  702. static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
  703. {
  704. struct snd_pcm_runtime *runtime = substream->runtime;
  705. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  706. ice->capture_con_substream = substream;
  707. runtime->hw = snd_ice1712_capture;
  708. runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
  709. if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
  710. runtime->hw.rate_min = 48000;
  711. return 0;
  712. }
  713. static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
  714. {
  715. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  716. ice->playback_con_substream = NULL;
  717. return 0;
  718. }
  719. static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
  720. {
  721. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  722. u32 tmp;
  723. spin_lock_irq(&ice->reg_lock);
  724. tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
  725. outw(tmp, ICEDS(ice, INTMASK));
  726. spin_unlock_irq(&ice->reg_lock);
  727. ice->playback_con_substream_ds[substream->number] = NULL;
  728. return 0;
  729. }
  730. static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
  731. {
  732. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  733. ice->capture_con_substream = NULL;
  734. return 0;
  735. }
  736. static struct snd_pcm_ops snd_ice1712_playback_ops = {
  737. .open = snd_ice1712_playback_open,
  738. .close = snd_ice1712_playback_close,
  739. .ioctl = snd_pcm_lib_ioctl,
  740. .hw_params = snd_ice1712_hw_params,
  741. .hw_free = snd_ice1712_hw_free,
  742. .prepare = snd_ice1712_playback_prepare,
  743. .trigger = snd_ice1712_playback_trigger,
  744. .pointer = snd_ice1712_playback_pointer,
  745. };
  746. static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
  747. .open = snd_ice1712_playback_ds_open,
  748. .close = snd_ice1712_playback_ds_close,
  749. .ioctl = snd_pcm_lib_ioctl,
  750. .hw_params = snd_ice1712_hw_params,
  751. .hw_free = snd_ice1712_hw_free,
  752. .prepare = snd_ice1712_playback_ds_prepare,
  753. .trigger = snd_ice1712_playback_ds_trigger,
  754. .pointer = snd_ice1712_playback_ds_pointer,
  755. };
  756. static struct snd_pcm_ops snd_ice1712_capture_ops = {
  757. .open = snd_ice1712_capture_open,
  758. .close = snd_ice1712_capture_close,
  759. .ioctl = snd_pcm_lib_ioctl,
  760. .hw_params = snd_ice1712_hw_params,
  761. .hw_free = snd_ice1712_hw_free,
  762. .prepare = snd_ice1712_capture_prepare,
  763. .trigger = snd_ice1712_capture_trigger,
  764. .pointer = snd_ice1712_capture_pointer,
  765. };
  766. static int __devinit snd_ice1712_pcm(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
  767. {
  768. struct snd_pcm *pcm;
  769. int err;
  770. if (rpcm)
  771. *rpcm = NULL;
  772. err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
  773. if (err < 0)
  774. return err;
  775. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
  776. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
  777. pcm->private_data = ice;
  778. pcm->info_flags = 0;
  779. strcpy(pcm->name, "ICE1712 consumer");
  780. ice->pcm = pcm;
  781. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  782. snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
  783. if (rpcm)
  784. *rpcm = pcm;
  785. printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
  786. return 0;
  787. }
  788. static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
  789. {
  790. struct snd_pcm *pcm;
  791. int err;
  792. if (rpcm)
  793. *rpcm = NULL;
  794. err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
  795. if (err < 0)
  796. return err;
  797. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
  798. pcm->private_data = ice;
  799. pcm->info_flags = 0;
  800. strcpy(pcm->name, "ICE1712 consumer (DS)");
  801. ice->pcm_ds = pcm;
  802. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  803. snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
  804. if (rpcm)
  805. *rpcm = pcm;
  806. return 0;
  807. }
  808. /*
  809. * PCM code - professional part (multitrack)
  810. */
  811. static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  812. 32000, 44100, 48000, 64000, 88200, 96000 };
  813. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  814. .count = ARRAY_SIZE(rates),
  815. .list = rates,
  816. .mask = 0,
  817. };
  818. static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
  819. int cmd)
  820. {
  821. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  822. switch (cmd) {
  823. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  824. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  825. {
  826. unsigned int what;
  827. unsigned int old;
  828. if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
  829. return -EINVAL;
  830. what = ICE1712_PLAYBACK_PAUSE;
  831. snd_pcm_trigger_done(substream, substream);
  832. spin_lock(&ice->reg_lock);
  833. old = inl(ICEMT(ice, PLAYBACK_CONTROL));
  834. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  835. old |= what;
  836. else
  837. old &= ~what;
  838. outl(old, ICEMT(ice, PLAYBACK_CONTROL));
  839. spin_unlock(&ice->reg_lock);
  840. break;
  841. }
  842. case SNDRV_PCM_TRIGGER_START:
  843. case SNDRV_PCM_TRIGGER_STOP:
  844. {
  845. unsigned int what = 0;
  846. unsigned int old;
  847. struct list_head *pos;
  848. struct snd_pcm_substream *s;
  849. snd_pcm_group_for_each(pos, substream) {
  850. s = snd_pcm_group_substream_entry(pos);
  851. if (s == ice->playback_pro_substream) {
  852. what |= ICE1712_PLAYBACK_START;
  853. snd_pcm_trigger_done(s, substream);
  854. } else if (s == ice->capture_pro_substream) {
  855. what |= ICE1712_CAPTURE_START_SHADOW;
  856. snd_pcm_trigger_done(s, substream);
  857. }
  858. }
  859. spin_lock(&ice->reg_lock);
  860. old = inl(ICEMT(ice, PLAYBACK_CONTROL));
  861. if (cmd == SNDRV_PCM_TRIGGER_START)
  862. old |= what;
  863. else
  864. old &= ~what;
  865. outl(old, ICEMT(ice, PLAYBACK_CONTROL));
  866. spin_unlock(&ice->reg_lock);
  867. break;
  868. }
  869. default:
  870. return -EINVAL;
  871. }
  872. return 0;
  873. }
  874. /*
  875. */
  876. static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
  877. {
  878. unsigned long flags;
  879. unsigned char val, old;
  880. unsigned int i;
  881. switch (rate) {
  882. case 8000: val = 6; break;
  883. case 9600: val = 3; break;
  884. case 11025: val = 10; break;
  885. case 12000: val = 2; break;
  886. case 16000: val = 5; break;
  887. case 22050: val = 9; break;
  888. case 24000: val = 1; break;
  889. case 32000: val = 4; break;
  890. case 44100: val = 8; break;
  891. case 48000: val = 0; break;
  892. case 64000: val = 15; break;
  893. case 88200: val = 11; break;
  894. case 96000: val = 7; break;
  895. default:
  896. snd_BUG();
  897. val = 0;
  898. rate = 48000;
  899. break;
  900. }
  901. spin_lock_irqsave(&ice->reg_lock, flags);
  902. if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
  903. ICE1712_PLAYBACK_PAUSE|
  904. ICE1712_PLAYBACK_START)) {
  905. __out:
  906. spin_unlock_irqrestore(&ice->reg_lock, flags);
  907. return;
  908. }
  909. if (!force && is_pro_rate_locked(ice))
  910. goto __out;
  911. old = inb(ICEMT(ice, RATE));
  912. if (!force && old == val)
  913. goto __out;
  914. outb(val, ICEMT(ice, RATE));
  915. spin_unlock_irqrestore(&ice->reg_lock, flags);
  916. if (ice->gpio.set_pro_rate)
  917. ice->gpio.set_pro_rate(ice, rate);
  918. for (i = 0; i < ice->akm_codecs; i++) {
  919. if (ice->akm[i].ops.set_rate_val)
  920. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  921. }
  922. if (ice->spdif.ops.setup_rate)
  923. ice->spdif.ops.setup_rate(ice, rate);
  924. }
  925. static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
  926. {
  927. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  928. ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
  929. spin_lock_irq(&ice->reg_lock);
  930. outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
  931. outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
  932. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
  933. spin_unlock_irq(&ice->reg_lock);
  934. return 0;
  935. }
  936. static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
  937. struct snd_pcm_hw_params *hw_params)
  938. {
  939. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  940. snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
  941. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  942. }
  943. static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
  944. {
  945. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  946. ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
  947. spin_lock_irq(&ice->reg_lock);
  948. outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
  949. outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
  950. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
  951. spin_unlock_irq(&ice->reg_lock);
  952. return 0;
  953. }
  954. static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
  955. struct snd_pcm_hw_params *hw_params)
  956. {
  957. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  958. snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
  959. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  960. }
  961. static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
  962. {
  963. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  964. size_t ptr;
  965. if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
  966. return 0;
  967. ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
  968. if (ptr == substream->runtime->buffer_size)
  969. ptr = 0;
  970. return bytes_to_frames(substream->runtime, ptr);
  971. }
  972. static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
  973. {
  974. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  975. size_t ptr;
  976. if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
  977. return 0;
  978. ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
  979. if (ptr == substream->runtime->buffer_size)
  980. ptr = 0;
  981. return bytes_to_frames(substream->runtime, ptr);
  982. }
  983. static struct snd_pcm_hardware snd_ice1712_playback_pro =
  984. {
  985. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  986. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  987. SNDRV_PCM_INFO_MMAP_VALID |
  988. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  989. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  990. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
  991. .rate_min = 4000,
  992. .rate_max = 96000,
  993. .channels_min = 10,
  994. .channels_max = 10,
  995. .buffer_bytes_max = (256*1024),
  996. .period_bytes_min = 10 * 4 * 2,
  997. .period_bytes_max = 131040,
  998. .periods_min = 1,
  999. .periods_max = 1024,
  1000. .fifo_size = 0,
  1001. };
  1002. static struct snd_pcm_hardware snd_ice1712_capture_pro =
  1003. {
  1004. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  1005. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  1006. SNDRV_PCM_INFO_MMAP_VALID |
  1007. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  1008. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  1009. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
  1010. .rate_min = 4000,
  1011. .rate_max = 96000,
  1012. .channels_min = 12,
  1013. .channels_max = 12,
  1014. .buffer_bytes_max = (256*1024),
  1015. .period_bytes_min = 12 * 4 * 2,
  1016. .period_bytes_max = 131040,
  1017. .periods_min = 1,
  1018. .periods_max = 1024,
  1019. .fifo_size = 0,
  1020. };
  1021. static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
  1022. {
  1023. struct snd_pcm_runtime *runtime = substream->runtime;
  1024. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1025. ice->playback_pro_substream = substream;
  1026. runtime->hw = snd_ice1712_playback_pro;
  1027. snd_pcm_set_sync(substream);
  1028. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1029. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  1030. if (ice->spdif.ops.open)
  1031. ice->spdif.ops.open(ice, substream);
  1032. return 0;
  1033. }
  1034. static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
  1035. {
  1036. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1037. struct snd_pcm_runtime *runtime = substream->runtime;
  1038. ice->capture_pro_substream = substream;
  1039. runtime->hw = snd_ice1712_capture_pro;
  1040. snd_pcm_set_sync(substream);
  1041. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1042. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  1043. return 0;
  1044. }
  1045. static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
  1046. {
  1047. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1048. if (PRO_RATE_RESET)
  1049. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1050. ice->playback_pro_substream = NULL;
  1051. if (ice->spdif.ops.close)
  1052. ice->spdif.ops.close(ice, substream);
  1053. return 0;
  1054. }
  1055. static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
  1056. {
  1057. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1058. if (PRO_RATE_RESET)
  1059. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1060. ice->capture_pro_substream = NULL;
  1061. return 0;
  1062. }
  1063. static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
  1064. .open = snd_ice1712_playback_pro_open,
  1065. .close = snd_ice1712_playback_pro_close,
  1066. .ioctl = snd_pcm_lib_ioctl,
  1067. .hw_params = snd_ice1712_playback_pro_hw_params,
  1068. .hw_free = snd_ice1712_hw_free,
  1069. .prepare = snd_ice1712_playback_pro_prepare,
  1070. .trigger = snd_ice1712_pro_trigger,
  1071. .pointer = snd_ice1712_playback_pro_pointer,
  1072. };
  1073. static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
  1074. .open = snd_ice1712_capture_pro_open,
  1075. .close = snd_ice1712_capture_pro_close,
  1076. .ioctl = snd_pcm_lib_ioctl,
  1077. .hw_params = snd_ice1712_capture_pro_hw_params,
  1078. .hw_free = snd_ice1712_hw_free,
  1079. .prepare = snd_ice1712_capture_pro_prepare,
  1080. .trigger = snd_ice1712_pro_trigger,
  1081. .pointer = snd_ice1712_capture_pro_pointer,
  1082. };
  1083. static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
  1084. {
  1085. struct snd_pcm *pcm;
  1086. int err;
  1087. if (rpcm)
  1088. *rpcm = NULL;
  1089. err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
  1090. if (err < 0)
  1091. return err;
  1092. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
  1093. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
  1094. pcm->private_data = ice;
  1095. pcm->info_flags = 0;
  1096. strcpy(pcm->name, "ICE1712 multi");
  1097. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1098. snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
  1099. ice->pcm_pro = pcm;
  1100. if (rpcm)
  1101. *rpcm = pcm;
  1102. if (ice->cs8427) {
  1103. /* assign channels to iec958 */
  1104. err = snd_cs8427_iec958_build(ice->cs8427,
  1105. pcm->streams[0].substream,
  1106. pcm->streams[1].substream);
  1107. if (err < 0)
  1108. return err;
  1109. }
  1110. if ((err = snd_ice1712_build_pro_mixer(ice)) < 0)
  1111. return err;
  1112. return 0;
  1113. }
  1114. /*
  1115. * Mixer section
  1116. */
  1117. static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
  1118. {
  1119. unsigned int vol = ice->pro_volumes[index];
  1120. unsigned short val = 0;
  1121. val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
  1122. val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
  1123. outb(index, ICEMT(ice, MONITOR_INDEX));
  1124. outw(val, ICEMT(ice, MONITOR_VOLUME));
  1125. }
  1126. static int snd_ice1712_pro_mixer_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1127. {
  1128. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1129. uinfo->count = 2;
  1130. uinfo->value.integer.min = 0;
  1131. uinfo->value.integer.max = 1;
  1132. return 0;
  1133. }
  1134. static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1135. {
  1136. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1137. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1138. spin_lock_irq(&ice->reg_lock);
  1139. ucontrol->value.integer.value[0] = !((ice->pro_volumes[index] >> 15) & 1);
  1140. ucontrol->value.integer.value[1] = !((ice->pro_volumes[index] >> 31) & 1);
  1141. spin_unlock_irq(&ice->reg_lock);
  1142. return 0;
  1143. }
  1144. static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1145. {
  1146. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1147. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1148. unsigned int nval, change;
  1149. nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
  1150. (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
  1151. spin_lock_irq(&ice->reg_lock);
  1152. nval |= ice->pro_volumes[index] & ~0x80008000;
  1153. change = nval != ice->pro_volumes[index];
  1154. ice->pro_volumes[index] = nval;
  1155. snd_ice1712_update_volume(ice, index);
  1156. spin_unlock_irq(&ice->reg_lock);
  1157. return change;
  1158. }
  1159. static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1160. {
  1161. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1162. uinfo->count = 2;
  1163. uinfo->value.integer.min = 0;
  1164. uinfo->value.integer.max = 96;
  1165. return 0;
  1166. }
  1167. static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1168. {
  1169. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1170. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1171. spin_lock_irq(&ice->reg_lock);
  1172. ucontrol->value.integer.value[0] = (ice->pro_volumes[index] >> 0) & 127;
  1173. ucontrol->value.integer.value[1] = (ice->pro_volumes[index] >> 16) & 127;
  1174. spin_unlock_irq(&ice->reg_lock);
  1175. return 0;
  1176. }
  1177. static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1178. {
  1179. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1180. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1181. unsigned int nval, change;
  1182. nval = (ucontrol->value.integer.value[0] & 127) |
  1183. ((ucontrol->value.integer.value[1] & 127) << 16);
  1184. spin_lock_irq(&ice->reg_lock);
  1185. nval |= ice->pro_volumes[index] & ~0x007f007f;
  1186. change = nval != ice->pro_volumes[index];
  1187. ice->pro_volumes[index] = nval;
  1188. snd_ice1712_update_volume(ice, index);
  1189. spin_unlock_irq(&ice->reg_lock);
  1190. return change;
  1191. }
  1192. static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
  1193. {
  1194. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1195. .name = "Multi Playback Switch",
  1196. .info = snd_ice1712_pro_mixer_switch_info,
  1197. .get = snd_ice1712_pro_mixer_switch_get,
  1198. .put = snd_ice1712_pro_mixer_switch_put,
  1199. .private_value = 0,
  1200. .count = 10,
  1201. },
  1202. {
  1203. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1204. .name = "Multi Playback Volume",
  1205. .info = snd_ice1712_pro_mixer_volume_info,
  1206. .get = snd_ice1712_pro_mixer_volume_get,
  1207. .put = snd_ice1712_pro_mixer_volume_put,
  1208. .private_value = 0,
  1209. .count = 10,
  1210. },
  1211. };
  1212. static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
  1213. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1214. .name = "H/W Multi Capture Switch",
  1215. .info = snd_ice1712_pro_mixer_switch_info,
  1216. .get = snd_ice1712_pro_mixer_switch_get,
  1217. .put = snd_ice1712_pro_mixer_switch_put,
  1218. .private_value = 10,
  1219. };
  1220. static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
  1221. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1222. .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,SWITCH),
  1223. .info = snd_ice1712_pro_mixer_switch_info,
  1224. .get = snd_ice1712_pro_mixer_switch_get,
  1225. .put = snd_ice1712_pro_mixer_switch_put,
  1226. .private_value = 18,
  1227. .count = 2,
  1228. };
  1229. static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
  1230. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1231. .name = "H/W Multi Capture Volume",
  1232. .info = snd_ice1712_pro_mixer_volume_info,
  1233. .get = snd_ice1712_pro_mixer_volume_get,
  1234. .put = snd_ice1712_pro_mixer_volume_put,
  1235. .private_value = 10,
  1236. };
  1237. static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
  1238. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1239. .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,VOLUME),
  1240. .info = snd_ice1712_pro_mixer_volume_info,
  1241. .get = snd_ice1712_pro_mixer_volume_get,
  1242. .put = snd_ice1712_pro_mixer_volume_put,
  1243. .private_value = 18,
  1244. .count = 2,
  1245. };
  1246. static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
  1247. {
  1248. struct snd_card *card = ice->card;
  1249. unsigned int idx;
  1250. int err;
  1251. /* multi-channel mixer */
  1252. for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
  1253. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
  1254. if (err < 0)
  1255. return err;
  1256. }
  1257. if (ice->num_total_adcs > 0) {
  1258. struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
  1259. tmp.count = ice->num_total_adcs;
  1260. err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
  1261. if (err < 0)
  1262. return err;
  1263. }
  1264. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
  1265. if (err < 0)
  1266. return err;
  1267. if (ice->num_total_adcs > 0) {
  1268. struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
  1269. tmp.count = ice->num_total_adcs;
  1270. err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
  1271. if (err < 0)
  1272. return err;
  1273. }
  1274. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
  1275. if (err < 0)
  1276. return err;
  1277. /* initialize volumes */
  1278. for (idx = 0; idx < 10; idx++) {
  1279. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1280. snd_ice1712_update_volume(ice, idx);
  1281. }
  1282. for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
  1283. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1284. snd_ice1712_update_volume(ice, idx);
  1285. }
  1286. for (idx = 18; idx < 20; idx++) {
  1287. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1288. snd_ice1712_update_volume(ice, idx);
  1289. }
  1290. return 0;
  1291. }
  1292. static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
  1293. {
  1294. struct snd_ice1712 *ice = ac97->private_data;
  1295. ice->ac97 = NULL;
  1296. }
  1297. static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 * ice)
  1298. {
  1299. int err, bus_num = 0;
  1300. struct snd_ac97_template ac97;
  1301. struct snd_ac97_bus *pbus;
  1302. static struct snd_ac97_bus_ops con_ops = {
  1303. .write = snd_ice1712_ac97_write,
  1304. .read = snd_ice1712_ac97_read,
  1305. };
  1306. static struct snd_ac97_bus_ops pro_ops = {
  1307. .write = snd_ice1712_pro_ac97_write,
  1308. .read = snd_ice1712_pro_ac97_read,
  1309. };
  1310. if (ice_has_con_ac97(ice)) {
  1311. if ((err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus)) < 0)
  1312. return err;
  1313. memset(&ac97, 0, sizeof(ac97));
  1314. ac97.private_data = ice;
  1315. ac97.private_free = snd_ice1712_mixer_free_ac97;
  1316. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1317. printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
  1318. else {
  1319. if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0)
  1320. return err;
  1321. return 0;
  1322. }
  1323. }
  1324. if (! (ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
  1325. if ((err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus)) < 0)
  1326. return err;
  1327. memset(&ac97, 0, sizeof(ac97));
  1328. ac97.private_data = ice;
  1329. ac97.private_free = snd_ice1712_mixer_free_ac97;
  1330. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1331. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1332. else
  1333. return 0;
  1334. }
  1335. /* I2S mixer only */
  1336. strcat(ice->card->mixername, "ICE1712 - multitrack");
  1337. return 0;
  1338. }
  1339. /*
  1340. *
  1341. */
  1342. static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
  1343. {
  1344. return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
  1345. }
  1346. static void snd_ice1712_proc_read(struct snd_info_entry *entry,
  1347. struct snd_info_buffer *buffer)
  1348. {
  1349. struct snd_ice1712 *ice = entry->private_data;
  1350. unsigned int idx;
  1351. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1352. snd_iprintf(buffer, "EEPROM:\n");
  1353. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1354. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1355. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1356. snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
  1357. snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
  1358. snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
  1359. snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
  1360. snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
  1361. snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
  1362. snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
  1363. snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
  1364. snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
  1365. snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
  1366. snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
  1367. for (idx = 0; idx < 4; idx++)
  1368. snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
  1369. for (idx = 0; idx < 4; idx++)
  1370. snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
  1371. for (idx = 0x1c; idx < ice->eeprom.size; idx++)
  1372. snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
  1373. snd_iprintf(buffer, "\nRegisters:\n");
  1374. snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
  1375. snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
  1376. snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
  1377. snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
  1378. }
  1379. static void __devinit snd_ice1712_proc_init(struct snd_ice1712 * ice)
  1380. {
  1381. struct snd_info_entry *entry;
  1382. if (! snd_card_proc_new(ice->card, "ice1712", &entry))
  1383. snd_info_set_text_ops(entry, ice, 1024, snd_ice1712_proc_read);
  1384. }
  1385. /*
  1386. *
  1387. */
  1388. static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
  1389. struct snd_ctl_elem_info *uinfo)
  1390. {
  1391. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1392. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1393. return 0;
  1394. }
  1395. static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
  1396. struct snd_ctl_elem_value *ucontrol)
  1397. {
  1398. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1399. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1400. return 0;
  1401. }
  1402. static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
  1403. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1404. .name = "ICE1712 EEPROM",
  1405. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1406. .info = snd_ice1712_eeprom_info,
  1407. .get = snd_ice1712_eeprom_get
  1408. };
  1409. /*
  1410. */
  1411. static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
  1412. struct snd_ctl_elem_info *uinfo)
  1413. {
  1414. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1415. uinfo->count = 1;
  1416. return 0;
  1417. }
  1418. static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
  1419. struct snd_ctl_elem_value *ucontrol)
  1420. {
  1421. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1422. if (ice->spdif.ops.default_get)
  1423. ice->spdif.ops.default_get(ice, ucontrol);
  1424. return 0;
  1425. }
  1426. static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
  1427. struct snd_ctl_elem_value *ucontrol)
  1428. {
  1429. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1430. if (ice->spdif.ops.default_put)
  1431. return ice->spdif.ops.default_put(ice, ucontrol);
  1432. return 0;
  1433. }
  1434. static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
  1435. {
  1436. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1437. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1438. .info = snd_ice1712_spdif_info,
  1439. .get = snd_ice1712_spdif_default_get,
  1440. .put = snd_ice1712_spdif_default_put
  1441. };
  1442. static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1443. struct snd_ctl_elem_value *ucontrol)
  1444. {
  1445. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1446. if (ice->spdif.ops.default_get) {
  1447. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1448. IEC958_AES0_PROFESSIONAL |
  1449. IEC958_AES0_CON_NOT_COPYRIGHT |
  1450. IEC958_AES0_CON_EMPHASIS;
  1451. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1452. IEC958_AES1_CON_CATEGORY;
  1453. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1454. } else {
  1455. ucontrol->value.iec958.status[0] = 0xff;
  1456. ucontrol->value.iec958.status[1] = 0xff;
  1457. ucontrol->value.iec958.status[2] = 0xff;
  1458. ucontrol->value.iec958.status[3] = 0xff;
  1459. ucontrol->value.iec958.status[4] = 0xff;
  1460. }
  1461. return 0;
  1462. }
  1463. static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1464. struct snd_ctl_elem_value *ucontrol)
  1465. {
  1466. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1467. if (ice->spdif.ops.default_get) {
  1468. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1469. IEC958_AES0_PROFESSIONAL |
  1470. IEC958_AES0_PRO_FS |
  1471. IEC958_AES0_PRO_EMPHASIS;
  1472. ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
  1473. } else {
  1474. ucontrol->value.iec958.status[0] = 0xff;
  1475. ucontrol->value.iec958.status[1] = 0xff;
  1476. ucontrol->value.iec958.status[2] = 0xff;
  1477. ucontrol->value.iec958.status[3] = 0xff;
  1478. ucontrol->value.iec958.status[4] = 0xff;
  1479. }
  1480. return 0;
  1481. }
  1482. static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
  1483. {
  1484. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1485. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1486. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1487. .info = snd_ice1712_spdif_info,
  1488. .get = snd_ice1712_spdif_maskc_get,
  1489. };
  1490. static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
  1491. {
  1492. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1493. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1494. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
  1495. .info = snd_ice1712_spdif_info,
  1496. .get = snd_ice1712_spdif_maskp_get,
  1497. };
  1498. static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
  1499. struct snd_ctl_elem_value *ucontrol)
  1500. {
  1501. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1502. if (ice->spdif.ops.stream_get)
  1503. ice->spdif.ops.stream_get(ice, ucontrol);
  1504. return 0;
  1505. }
  1506. static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
  1507. struct snd_ctl_elem_value *ucontrol)
  1508. {
  1509. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1510. if (ice->spdif.ops.stream_put)
  1511. return ice->spdif.ops.stream_put(ice, ucontrol);
  1512. return 0;
  1513. }
  1514. static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
  1515. {
  1516. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1517. SNDRV_CTL_ELEM_ACCESS_INACTIVE),
  1518. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1519. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  1520. .info = snd_ice1712_spdif_info,
  1521. .get = snd_ice1712_spdif_stream_get,
  1522. .put = snd_ice1712_spdif_stream_put
  1523. };
  1524. int snd_ice1712_gpio_info(struct snd_kcontrol *kcontrol,
  1525. struct snd_ctl_elem_info *uinfo)
  1526. {
  1527. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1528. uinfo->count = 1;
  1529. uinfo->value.integer.min = 0;
  1530. uinfo->value.integer.max = 1;
  1531. return 0;
  1532. }
  1533. int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
  1534. struct snd_ctl_elem_value *ucontrol)
  1535. {
  1536. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1537. unsigned char mask = kcontrol->private_value & 0xff;
  1538. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1539. snd_ice1712_save_gpio_status(ice);
  1540. ucontrol->value.integer.value[0] =
  1541. (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
  1542. snd_ice1712_restore_gpio_status(ice);
  1543. return 0;
  1544. }
  1545. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1546. struct snd_ctl_elem_value *ucontrol)
  1547. {
  1548. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1549. unsigned char mask = kcontrol->private_value & 0xff;
  1550. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1551. unsigned int val, nval;
  1552. if (kcontrol->private_value & (1 << 31))
  1553. return -EPERM;
  1554. nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
  1555. snd_ice1712_save_gpio_status(ice);
  1556. val = snd_ice1712_gpio_read(ice);
  1557. nval |= val & ~mask;
  1558. if (val != nval)
  1559. snd_ice1712_gpio_write(ice, nval);
  1560. snd_ice1712_restore_gpio_status(ice);
  1561. return val != nval;
  1562. }
  1563. /*
  1564. * rate
  1565. */
  1566. static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1567. struct snd_ctl_elem_info *uinfo)
  1568. {
  1569. static char *texts[] = {
  1570. "8000", /* 0: 6 */
  1571. "9600", /* 1: 3 */
  1572. "11025", /* 2: 10 */
  1573. "12000", /* 3: 2 */
  1574. "16000", /* 4: 5 */
  1575. "22050", /* 5: 9 */
  1576. "24000", /* 6: 1 */
  1577. "32000", /* 7: 4 */
  1578. "44100", /* 8: 8 */
  1579. "48000", /* 9: 0 */
  1580. "64000", /* 10: 15 */
  1581. "88200", /* 11: 11 */
  1582. "96000", /* 12: 7 */
  1583. "IEC958 Input", /* 13: -- */
  1584. };
  1585. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1586. uinfo->count = 1;
  1587. uinfo->value.enumerated.items = 14;
  1588. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1589. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1590. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1591. return 0;
  1592. }
  1593. static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1594. struct snd_ctl_elem_value *ucontrol)
  1595. {
  1596. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1597. static unsigned char xlate[16] = {
  1598. 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
  1599. };
  1600. unsigned char val;
  1601. spin_lock_irq(&ice->reg_lock);
  1602. if (is_spdif_master(ice)) {
  1603. ucontrol->value.enumerated.item[0] = 13;
  1604. } else {
  1605. val = xlate[inb(ICEMT(ice, RATE)) & 15];
  1606. if (val == 255) {
  1607. snd_BUG();
  1608. val = 0;
  1609. }
  1610. ucontrol->value.enumerated.item[0] = val;
  1611. }
  1612. spin_unlock_irq(&ice->reg_lock);
  1613. return 0;
  1614. }
  1615. static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1616. struct snd_ctl_elem_value *ucontrol)
  1617. {
  1618. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1619. static unsigned int xrate[13] = {
  1620. 8000, 9600, 11025, 12000, 1600, 22050, 24000,
  1621. 32000, 44100, 48000, 64000, 88200, 96000
  1622. };
  1623. unsigned char oval;
  1624. int change = 0;
  1625. spin_lock_irq(&ice->reg_lock);
  1626. oval = inb(ICEMT(ice, RATE));
  1627. if (ucontrol->value.enumerated.item[0] == 13) {
  1628. outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
  1629. } else {
  1630. PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
  1631. spin_unlock_irq(&ice->reg_lock);
  1632. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
  1633. spin_lock_irq(&ice->reg_lock);
  1634. }
  1635. change = inb(ICEMT(ice, RATE)) != oval;
  1636. spin_unlock_irq(&ice->reg_lock);
  1637. if ((oval & ICE1712_SPDIF_MASTER) !=
  1638. (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER)) {
  1639. /* change CS8427 clock source too */
  1640. if (ice->cs8427) {
  1641. snd_ice1712_cs8427_set_input_clock(ice, is_spdif_master(ice));
  1642. }
  1643. /* notify ak4524 chip as well */
  1644. if (is_spdif_master(ice)) {
  1645. unsigned int i;
  1646. for (i = 0; i < ice->akm_codecs; i++) {
  1647. if (ice->akm[i].ops.set_rate_val)
  1648. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1649. }
  1650. }
  1651. }
  1652. return change;
  1653. }
  1654. static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
  1655. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1656. .name = "Multi Track Internal Clock",
  1657. .info = snd_ice1712_pro_internal_clock_info,
  1658. .get = snd_ice1712_pro_internal_clock_get,
  1659. .put = snd_ice1712_pro_internal_clock_put
  1660. };
  1661. static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
  1662. struct snd_ctl_elem_info *uinfo)
  1663. {
  1664. static char *texts[] = {
  1665. "8000", /* 0: 6 */
  1666. "9600", /* 1: 3 */
  1667. "11025", /* 2: 10 */
  1668. "12000", /* 3: 2 */
  1669. "16000", /* 4: 5 */
  1670. "22050", /* 5: 9 */
  1671. "24000", /* 6: 1 */
  1672. "32000", /* 7: 4 */
  1673. "44100", /* 8: 8 */
  1674. "48000", /* 9: 0 */
  1675. "64000", /* 10: 15 */
  1676. "88200", /* 11: 11 */
  1677. "96000", /* 12: 7 */
  1678. // "IEC958 Input", /* 13: -- */
  1679. };
  1680. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1681. uinfo->count = 1;
  1682. uinfo->value.enumerated.items = 13;
  1683. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1684. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1685. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1686. return 0;
  1687. }
  1688. static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
  1689. struct snd_ctl_elem_value *ucontrol)
  1690. {
  1691. int val;
  1692. static unsigned int xrate[13] = {
  1693. 8000, 9600, 11025, 12000, 1600, 22050, 24000,
  1694. 32000, 44100, 48000, 64000, 88200, 96000
  1695. };
  1696. for (val = 0; val < 13; val++) {
  1697. if (xrate[val] == PRO_RATE_DEFAULT)
  1698. break;
  1699. }
  1700. ucontrol->value.enumerated.item[0] = val;
  1701. return 0;
  1702. }
  1703. static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
  1704. struct snd_ctl_elem_value *ucontrol)
  1705. {
  1706. static unsigned int xrate[13] = {
  1707. 8000, 9600, 11025, 12000, 1600, 22050, 24000,
  1708. 32000, 44100, 48000, 64000, 88200, 96000
  1709. };
  1710. unsigned char oval;
  1711. int change = 0;
  1712. oval = PRO_RATE_DEFAULT;
  1713. PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
  1714. change = PRO_RATE_DEFAULT != oval;
  1715. return change;
  1716. }
  1717. static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
  1718. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1719. .name = "Multi Track Internal Clock Default",
  1720. .info = snd_ice1712_pro_internal_clock_default_info,
  1721. .get = snd_ice1712_pro_internal_clock_default_get,
  1722. .put = snd_ice1712_pro_internal_clock_default_put
  1723. };
  1724. static int snd_ice1712_pro_rate_locking_info(struct snd_kcontrol *kcontrol,
  1725. struct snd_ctl_elem_info *uinfo)
  1726. {
  1727. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1728. uinfo->count = 1;
  1729. uinfo->value.integer.min = 0;
  1730. uinfo->value.integer.max = 1;
  1731. return 0;
  1732. }
  1733. static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1734. struct snd_ctl_elem_value *ucontrol)
  1735. {
  1736. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1737. return 0;
  1738. }
  1739. static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1740. struct snd_ctl_elem_value *ucontrol)
  1741. {
  1742. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1743. int change = 0, nval;
  1744. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1745. spin_lock_irq(&ice->reg_lock);
  1746. change = PRO_RATE_LOCKED != nval;
  1747. PRO_RATE_LOCKED = nval;
  1748. spin_unlock_irq(&ice->reg_lock);
  1749. return change;
  1750. }
  1751. static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
  1752. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1753. .name = "Multi Track Rate Locking",
  1754. .info = snd_ice1712_pro_rate_locking_info,
  1755. .get = snd_ice1712_pro_rate_locking_get,
  1756. .put = snd_ice1712_pro_rate_locking_put
  1757. };
  1758. static int snd_ice1712_pro_rate_reset_info(struct snd_kcontrol *kcontrol,
  1759. struct snd_ctl_elem_info *uinfo)
  1760. {
  1761. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1762. uinfo->count = 1;
  1763. uinfo->value.integer.min = 0;
  1764. uinfo->value.integer.max = 1;
  1765. return 0;
  1766. }
  1767. static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1768. struct snd_ctl_elem_value *ucontrol)
  1769. {
  1770. ucontrol->value.integer.value[0] = PRO_RATE_RESET;
  1771. return 0;
  1772. }
  1773. static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1774. struct snd_ctl_elem_value *ucontrol)
  1775. {
  1776. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1777. int change = 0, nval;
  1778. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1779. spin_lock_irq(&ice->reg_lock);
  1780. change = PRO_RATE_RESET != nval;
  1781. PRO_RATE_RESET = nval;
  1782. spin_unlock_irq(&ice->reg_lock);
  1783. return change;
  1784. }
  1785. static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
  1786. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1787. .name = "Multi Track Rate Reset",
  1788. .info = snd_ice1712_pro_rate_reset_info,
  1789. .get = snd_ice1712_pro_rate_reset_get,
  1790. .put = snd_ice1712_pro_rate_reset_put
  1791. };
  1792. /*
  1793. * routing
  1794. */
  1795. static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
  1796. struct snd_ctl_elem_info *uinfo)
  1797. {
  1798. static char *texts[] = {
  1799. "PCM Out", /* 0 */
  1800. "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
  1801. "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
  1802. "IEC958 In L", "IEC958 In R", /* 9-10 */
  1803. "Digital Mixer", /* 11 - optional */
  1804. };
  1805. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1806. uinfo->count = 1;
  1807. uinfo->value.enumerated.items =
  1808. snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
  1809. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1810. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1811. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1812. return 0;
  1813. }
  1814. static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1815. struct snd_ctl_elem_value *ucontrol)
  1816. {
  1817. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1818. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1819. unsigned int val, cval;
  1820. spin_lock_irq(&ice->reg_lock);
  1821. val = inw(ICEMT(ice, ROUTE_PSDOUT03));
  1822. cval = inl(ICEMT(ice, ROUTE_CAPTURE));
  1823. spin_unlock_irq(&ice->reg_lock);
  1824. val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
  1825. val &= 3;
  1826. cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
  1827. if (val == 1 && idx < 2)
  1828. ucontrol->value.enumerated.item[0] = 11;
  1829. else if (val == 2)
  1830. ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
  1831. else if (val == 3)
  1832. ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
  1833. else
  1834. ucontrol->value.enumerated.item[0] = 0;
  1835. return 0;
  1836. }
  1837. static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1838. struct snd_ctl_elem_value *ucontrol)
  1839. {
  1840. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1841. int change, shift;
  1842. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1843. unsigned int val, old_val, nval;
  1844. /* update PSDOUT */
  1845. if (ucontrol->value.enumerated.item[0] >= 11)
  1846. nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
  1847. else if (ucontrol->value.enumerated.item[0] >= 9)
  1848. nval = 3; /* spdif in */
  1849. else if (ucontrol->value.enumerated.item[0] >= 1)
  1850. nval = 2; /* analog in */
  1851. else
  1852. nval = 0; /* pcm */
  1853. shift = ((idx % 2) * 8) + ((idx / 2) * 2);
  1854. spin_lock_irq(&ice->reg_lock);
  1855. val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
  1856. val &= ~(0x03 << shift);
  1857. val |= nval << shift;
  1858. change = val != old_val;
  1859. if (change)
  1860. outw(val, ICEMT(ice, ROUTE_PSDOUT03));
  1861. spin_unlock_irq(&ice->reg_lock);
  1862. if (nval < 2) /* dig mixer of pcm */
  1863. return change;
  1864. /* update CAPTURE */
  1865. spin_lock_irq(&ice->reg_lock);
  1866. val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
  1867. shift = ((idx / 2) * 8) + ((idx % 2) * 4);
  1868. if (nval == 2) { /* analog in */
  1869. nval = ucontrol->value.enumerated.item[0] - 1;
  1870. val &= ~(0x07 << shift);
  1871. val |= nval << shift;
  1872. } else { /* spdif in */
  1873. nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
  1874. val &= ~(0x08 << shift);
  1875. val |= nval << shift;
  1876. }
  1877. if (val != old_val) {
  1878. change = 1;
  1879. outl(val, ICEMT(ice, ROUTE_CAPTURE));
  1880. }
  1881. spin_unlock_irq(&ice->reg_lock);
  1882. return change;
  1883. }
  1884. static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1885. struct snd_ctl_elem_value *ucontrol)
  1886. {
  1887. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1888. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1889. unsigned int val, cval;
  1890. val = inw(ICEMT(ice, ROUTE_SPDOUT));
  1891. cval = (val >> (idx * 4 + 8)) & 0x0f;
  1892. val = (val >> (idx * 2)) & 0x03;
  1893. if (val == 1)
  1894. ucontrol->value.enumerated.item[0] = 11;
  1895. else if (val == 2)
  1896. ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
  1897. else if (val == 3)
  1898. ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
  1899. else
  1900. ucontrol->value.enumerated.item[0] = 0;
  1901. return 0;
  1902. }
  1903. static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1904. struct snd_ctl_elem_value *ucontrol)
  1905. {
  1906. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1907. int change, shift;
  1908. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1909. unsigned int val, old_val, nval;
  1910. /* update SPDOUT */
  1911. spin_lock_irq(&ice->reg_lock);
  1912. val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
  1913. if (ucontrol->value.enumerated.item[0] >= 11)
  1914. nval = 1;
  1915. else if (ucontrol->value.enumerated.item[0] >= 9)
  1916. nval = 3;
  1917. else if (ucontrol->value.enumerated.item[0] >= 1)
  1918. nval = 2;
  1919. else
  1920. nval = 0;
  1921. shift = idx * 2;
  1922. val &= ~(0x03 << shift);
  1923. val |= nval << shift;
  1924. shift = idx * 4 + 8;
  1925. if (nval == 2) {
  1926. nval = ucontrol->value.enumerated.item[0] - 1;
  1927. val &= ~(0x07 << shift);
  1928. val |= nval << shift;
  1929. } else if (nval == 3) {
  1930. nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
  1931. val &= ~(0x08 << shift);
  1932. val |= nval << shift;
  1933. }
  1934. change = val != old_val;
  1935. if (change)
  1936. outw(val, ICEMT(ice, ROUTE_SPDOUT));
  1937. spin_unlock_irq(&ice->reg_lock);
  1938. return change;
  1939. }
  1940. static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
  1941. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1942. .name = "H/W Playback Route",
  1943. .info = snd_ice1712_pro_route_info,
  1944. .get = snd_ice1712_pro_route_analog_get,
  1945. .put = snd_ice1712_pro_route_analog_put,
  1946. };
  1947. static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
  1948. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1949. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
  1950. .info = snd_ice1712_pro_route_info,
  1951. .get = snd_ice1712_pro_route_spdif_get,
  1952. .put = snd_ice1712_pro_route_spdif_put,
  1953. .count = 2,
  1954. };
  1955. static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
  1956. struct snd_ctl_elem_info *uinfo)
  1957. {
  1958. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1959. uinfo->count = 1;
  1960. uinfo->value.integer.min = 0;
  1961. uinfo->value.integer.max = 255;
  1962. return 0;
  1963. }
  1964. static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
  1965. struct snd_ctl_elem_value *ucontrol)
  1966. {
  1967. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1968. ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
  1969. return 0;
  1970. }
  1971. static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
  1972. struct snd_ctl_elem_value *ucontrol)
  1973. {
  1974. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1975. int change;
  1976. spin_lock_irq(&ice->reg_lock);
  1977. change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
  1978. outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
  1979. spin_unlock_irq(&ice->reg_lock);
  1980. return change;
  1981. }
  1982. static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
  1983. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1984. .name = "Multi Track Volume Rate",
  1985. .info = snd_ice1712_pro_volume_rate_info,
  1986. .get = snd_ice1712_pro_volume_rate_get,
  1987. .put = snd_ice1712_pro_volume_rate_put
  1988. };
  1989. static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
  1990. struct snd_ctl_elem_info *uinfo)
  1991. {
  1992. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1993. uinfo->count = 22;
  1994. uinfo->value.integer.min = 0;
  1995. uinfo->value.integer.max = 255;
  1996. return 0;
  1997. }
  1998. static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
  1999. struct snd_ctl_elem_value *ucontrol)
  2000. {
  2001. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  2002. int idx;
  2003. spin_lock_irq(&ice->reg_lock);
  2004. for (idx = 0; idx < 22; idx++) {
  2005. outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
  2006. ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
  2007. }
  2008. spin_unlock_irq(&ice->reg_lock);
  2009. return 0;
  2010. }
  2011. static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
  2012. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2013. .name = "Multi Track Peak",
  2014. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  2015. .info = snd_ice1712_pro_peak_info,
  2016. .get = snd_ice1712_pro_peak_get
  2017. };
  2018. /*
  2019. *
  2020. */
  2021. /*
  2022. * list of available boards
  2023. */
  2024. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  2025. snd_ice1712_hoontech_cards,
  2026. snd_ice1712_delta_cards,
  2027. snd_ice1712_ews_cards,
  2028. NULL,
  2029. };
  2030. static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
  2031. unsigned char dev,
  2032. unsigned char addr)
  2033. {
  2034. long t = 0x10000;
  2035. outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
  2036. outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
  2037. while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
  2038. return inb(ICEREG(ice, I2C_DATA));
  2039. }
  2040. static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
  2041. const char *modelname)
  2042. {
  2043. int dev = 0xa0; /* EEPROM device address */
  2044. unsigned int i, size;
  2045. struct snd_ice1712_card_info **tbl, *c;
  2046. if (! modelname || ! *modelname) {
  2047. ice->eeprom.subvendor = 0;
  2048. if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
  2049. ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
  2050. (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
  2051. (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
  2052. (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
  2053. if (ice->eeprom.subvendor == 0 ||
  2054. ice->eeprom.subvendor == (unsigned int)-1) {
  2055. /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
  2056. u16 vendor, device;
  2057. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
  2058. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  2059. ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
  2060. if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
  2061. printk(KERN_ERR "ice1712: No valid ID is found\n");
  2062. return -ENXIO;
  2063. }
  2064. }
  2065. }
  2066. for (tbl = card_tables; *tbl; tbl++) {
  2067. for (c = *tbl; c->subvendor; c++) {
  2068. if (modelname && c->model && ! strcmp(modelname, c->model)) {
  2069. printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
  2070. ice->eeprom.subvendor = c->subvendor;
  2071. } else if (c->subvendor != ice->eeprom.subvendor)
  2072. continue;
  2073. if (! c->eeprom_size || ! c->eeprom_data)
  2074. goto found;
  2075. /* if the EEPROM is given by the driver, use it */
  2076. snd_printdd("using the defined eeprom..\n");
  2077. ice->eeprom.version = 1;
  2078. ice->eeprom.size = c->eeprom_size + 6;
  2079. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  2080. goto read_skipped;
  2081. }
  2082. }
  2083. printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
  2084. ice->eeprom.subvendor);
  2085. found:
  2086. ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
  2087. if (ice->eeprom.size < 6)
  2088. ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
  2089. else if (ice->eeprom.size > 32) {
  2090. snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
  2091. return -EIO;
  2092. }
  2093. ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
  2094. if (ice->eeprom.version != 1) {
  2095. snd_printk(KERN_ERR "invalid EEPROM version %i\n",
  2096. ice->eeprom.version);
  2097. /* return -EIO; */
  2098. }
  2099. size = ice->eeprom.size - 6;
  2100. for (i = 0; i < size; i++)
  2101. ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
  2102. read_skipped:
  2103. ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
  2104. ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
  2105. ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
  2106. return 0;
  2107. }
  2108. static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
  2109. {
  2110. outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
  2111. udelay(200);
  2112. outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
  2113. udelay(200);
  2114. pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
  2115. pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
  2116. pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
  2117. pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
  2118. if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
  2119. ice->gpio.write_mask = ice->eeprom.gpiomask;
  2120. ice->gpio.direction = ice->eeprom.gpiodir;
  2121. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
  2122. ice->eeprom.gpiomask);
  2123. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
  2124. ice->eeprom.gpiodir);
  2125. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
  2126. ice->eeprom.gpiostate);
  2127. } else {
  2128. ice->gpio.write_mask = 0xc0;
  2129. ice->gpio.direction = 0xff;
  2130. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
  2131. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
  2132. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
  2133. ICE1712_STDSP24_CLOCK_BIT);
  2134. }
  2135. snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
  2136. if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
  2137. outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
  2138. udelay(100);
  2139. outb(0, ICEREG(ice, AC97_CMD));
  2140. udelay(200);
  2141. snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
  2142. }
  2143. snd_ice1712_set_pro_rate(ice, 48000, 1);
  2144. return 0;
  2145. }
  2146. int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
  2147. {
  2148. int err;
  2149. struct snd_kcontrol *kctl;
  2150. snd_assert(ice->pcm_pro != NULL, return -EIO);
  2151. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
  2152. if (err < 0)
  2153. return err;
  2154. kctl->id.device = ice->pcm_pro->device;
  2155. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
  2156. if (err < 0)
  2157. return err;
  2158. kctl->id.device = ice->pcm_pro->device;
  2159. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
  2160. if (err < 0)
  2161. return err;
  2162. kctl->id.device = ice->pcm_pro->device;
  2163. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
  2164. if (err < 0)
  2165. return err;
  2166. kctl->id.device = ice->pcm_pro->device;
  2167. ice->spdif.stream_ctl = kctl;
  2168. return 0;
  2169. }
  2170. static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
  2171. {
  2172. int err;
  2173. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
  2174. if (err < 0)
  2175. return err;
  2176. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
  2177. if (err < 0)
  2178. return err;
  2179. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
  2180. if (err < 0)
  2181. return err;
  2182. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
  2183. if (err < 0)
  2184. return err;
  2185. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
  2186. if (err < 0)
  2187. return err;
  2188. if (ice->num_total_dacs > 0) {
  2189. struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
  2190. tmp.count = ice->num_total_dacs;
  2191. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  2192. if (err < 0)
  2193. return err;
  2194. }
  2195. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
  2196. if (err < 0)
  2197. return err;
  2198. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
  2199. if (err < 0)
  2200. return err;
  2201. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
  2202. if (err < 0)
  2203. return err;
  2204. return 0;
  2205. }
  2206. static int snd_ice1712_free(struct snd_ice1712 *ice)
  2207. {
  2208. if (! ice->port)
  2209. goto __hw_end;
  2210. /* mask all interrupts */
  2211. outb(0xc0, ICEMT(ice, IRQ));
  2212. outb(0xff, ICEREG(ice, IRQMASK));
  2213. /* --- */
  2214. __hw_end:
  2215. if (ice->irq >= 0) {
  2216. synchronize_irq(ice->irq);
  2217. free_irq(ice->irq, ice);
  2218. }
  2219. if (ice->port)
  2220. pci_release_regions(ice->pci);
  2221. snd_ice1712_akm4xxx_free(ice);
  2222. pci_disable_device(ice->pci);
  2223. kfree(ice);
  2224. return 0;
  2225. }
  2226. static int snd_ice1712_dev_free(struct snd_device *device)
  2227. {
  2228. struct snd_ice1712 *ice = device->device_data;
  2229. return snd_ice1712_free(ice);
  2230. }
  2231. static int __devinit snd_ice1712_create(struct snd_card *card,
  2232. struct pci_dev *pci,
  2233. const char *modelname,
  2234. int omni,
  2235. int cs8427_timeout,
  2236. struct snd_ice1712 ** r_ice1712)
  2237. {
  2238. struct snd_ice1712 *ice;
  2239. int err;
  2240. static struct snd_device_ops ops = {
  2241. .dev_free = snd_ice1712_dev_free,
  2242. };
  2243. *r_ice1712 = NULL;
  2244. /* enable PCI device */
  2245. if ((err = pci_enable_device(pci)) < 0)
  2246. return err;
  2247. /* check, if we can restrict PCI DMA transfers to 28 bits */
  2248. if (pci_set_dma_mask(pci, 0x0fffffff) < 0 ||
  2249. pci_set_consistent_dma_mask(pci, 0x0fffffff) < 0) {
  2250. snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
  2251. pci_disable_device(pci);
  2252. return -ENXIO;
  2253. }
  2254. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  2255. if (ice == NULL) {
  2256. pci_disable_device(pci);
  2257. return -ENOMEM;
  2258. }
  2259. ice->omni = omni ? 1 : 0;
  2260. if (cs8427_timeout < 1)
  2261. cs8427_timeout = 1;
  2262. else if (cs8427_timeout > 1000)
  2263. cs8427_timeout = 1000;
  2264. ice->cs8427_timeout = cs8427_timeout;
  2265. spin_lock_init(&ice->reg_lock);
  2266. init_MUTEX(&ice->gpio_mutex);
  2267. init_MUTEX(&ice->i2c_mutex);
  2268. init_MUTEX(&ice->open_mutex);
  2269. ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
  2270. ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
  2271. ice->gpio.set_data = snd_ice1712_set_gpio_data;
  2272. ice->gpio.get_data = snd_ice1712_get_gpio_data;
  2273. ice->spdif.cs8403_bits =
  2274. ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
  2275. 0x10 | /* no emphasis */
  2276. 0x20); /* PCM encoder/decoder */
  2277. ice->card = card;
  2278. ice->pci = pci;
  2279. ice->irq = -1;
  2280. pci_set_master(pci);
  2281. pci_write_config_word(ice->pci, 0x40, 0x807f);
  2282. pci_write_config_word(ice->pci, 0x42, 0x0006);
  2283. snd_ice1712_proc_init(ice);
  2284. synchronize_irq(pci->irq);
  2285. if ((err = pci_request_regions(pci, "ICE1712")) < 0) {
  2286. kfree(ice);
  2287. pci_disable_device(pci);
  2288. return err;
  2289. }
  2290. ice->port = pci_resource_start(pci, 0);
  2291. ice->ddma_port = pci_resource_start(pci, 1);
  2292. ice->dmapath_port = pci_resource_start(pci, 2);
  2293. ice->profi_port = pci_resource_start(pci, 3);
  2294. if (request_irq(pci->irq, snd_ice1712_interrupt, SA_INTERRUPT|SA_SHIRQ,
  2295. "ICE1712", ice)) {
  2296. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2297. snd_ice1712_free(ice);
  2298. return -EIO;
  2299. }
  2300. ice->irq = pci->irq;
  2301. if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
  2302. snd_ice1712_free(ice);
  2303. return -EIO;
  2304. }
  2305. if (snd_ice1712_chip_init(ice) < 0) {
  2306. snd_ice1712_free(ice);
  2307. return -EIO;
  2308. }
  2309. /* unmask used interrupts */
  2310. outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
  2311. ICE1712_IRQ_MPU2 : 0) |
  2312. ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
  2313. ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
  2314. ICEREG(ice, IRQMASK));
  2315. outb(0x00, ICEMT(ice, IRQ));
  2316. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
  2317. snd_ice1712_free(ice);
  2318. return err;
  2319. }
  2320. snd_card_set_dev(card, &pci->dev);
  2321. *r_ice1712 = ice;
  2322. return 0;
  2323. }
  2324. /*
  2325. *
  2326. * Registration
  2327. *
  2328. */
  2329. static struct snd_ice1712_card_info no_matched __devinitdata;
  2330. static int __devinit snd_ice1712_probe(struct pci_dev *pci,
  2331. const struct pci_device_id *pci_id)
  2332. {
  2333. static int dev;
  2334. struct snd_card *card;
  2335. struct snd_ice1712 *ice;
  2336. int pcm_dev = 0, err;
  2337. struct snd_ice1712_card_info **tbl, *c;
  2338. if (dev >= SNDRV_CARDS)
  2339. return -ENODEV;
  2340. if (!enable[dev]) {
  2341. dev++;
  2342. return -ENOENT;
  2343. }
  2344. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  2345. if (card == NULL)
  2346. return -ENOMEM;
  2347. strcpy(card->driver, "ICE1712");
  2348. strcpy(card->shortname, "ICEnsemble ICE1712");
  2349. if ((err = snd_ice1712_create(card, pci, model[dev], omni[dev],
  2350. cs8427_timeout[dev], &ice)) < 0) {
  2351. snd_card_free(card);
  2352. return err;
  2353. }
  2354. for (tbl = card_tables; *tbl; tbl++) {
  2355. for (c = *tbl; c->subvendor; c++) {
  2356. if (c->subvendor == ice->eeprom.subvendor) {
  2357. strcpy(card->shortname, c->name);
  2358. if (c->driver) /* specific driver? */
  2359. strcpy(card->driver, c->driver);
  2360. if (c->chip_init) {
  2361. if ((err = c->chip_init(ice)) < 0) {
  2362. snd_card_free(card);
  2363. return err;
  2364. }
  2365. }
  2366. goto __found;
  2367. }
  2368. }
  2369. }
  2370. c = &no_matched;
  2371. __found:
  2372. if ((err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL)) < 0) {
  2373. snd_card_free(card);
  2374. return err;
  2375. }
  2376. if (ice_has_con_ac97(ice))
  2377. if ((err = snd_ice1712_pcm(ice, pcm_dev++, NULL)) < 0) {
  2378. snd_card_free(card);
  2379. return err;
  2380. }
  2381. if ((err = snd_ice1712_ac97_mixer(ice)) < 0) {
  2382. snd_card_free(card);
  2383. return err;
  2384. }
  2385. if ((err = snd_ice1712_build_controls(ice)) < 0) {
  2386. snd_card_free(card);
  2387. return err;
  2388. }
  2389. if (c->build_controls) {
  2390. if ((err = c->build_controls(ice)) < 0) {
  2391. snd_card_free(card);
  2392. return err;
  2393. }
  2394. }
  2395. if (ice_has_con_ac97(ice))
  2396. if ((err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL)) < 0) {
  2397. snd_card_free(card);
  2398. return err;
  2399. }
  2400. if (! c->no_mpu401) {
  2401. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  2402. ICEREG(ice, MPU1_CTRL), 1,
  2403. ice->irq, 0,
  2404. &ice->rmidi[0])) < 0) {
  2405. snd_card_free(card);
  2406. return err;
  2407. }
  2408. if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401)
  2409. if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
  2410. ICEREG(ice, MPU2_CTRL), 1,
  2411. ice->irq, 0,
  2412. &ice->rmidi[1])) < 0) {
  2413. snd_card_free(card);
  2414. return err;
  2415. }
  2416. }
  2417. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2418. card->shortname, ice->port, ice->irq);
  2419. if ((err = snd_card_register(card)) < 0) {
  2420. snd_card_free(card);
  2421. return err;
  2422. }
  2423. pci_set_drvdata(pci, card);
  2424. dev++;
  2425. return 0;
  2426. }
  2427. static void __devexit snd_ice1712_remove(struct pci_dev *pci)
  2428. {
  2429. snd_card_free(pci_get_drvdata(pci));
  2430. pci_set_drvdata(pci, NULL);
  2431. }
  2432. static struct pci_driver driver = {
  2433. .name = "ICE1712",
  2434. .id_table = snd_ice1712_ids,
  2435. .probe = snd_ice1712_probe,
  2436. .remove = __devexit_p(snd_ice1712_remove),
  2437. };
  2438. static int __init alsa_card_ice1712_init(void)
  2439. {
  2440. return pci_register_driver(&driver);
  2441. }
  2442. static void __exit alsa_card_ice1712_exit(void)
  2443. {
  2444. pci_unregister_driver(&driver);
  2445. }
  2446. module_init(alsa_card_ice1712_init)
  2447. module_exit(alsa_card_ice1712_exit)