delta.c 21 KB

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  1. /*
  2. * ALSA driver for ICEnsemble ICE1712 (Envy24)
  3. *
  4. * Lowlevel functions for M-Audio Delta 1010, 44, 66, Dio2496, Audiophile
  5. * Digigram VX442
  6. *
  7. * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <sound/driver.h>
  25. #include <asm/io.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/init.h>
  29. #include <linux/slab.h>
  30. #include <sound/core.h>
  31. #include <sound/cs8427.h>
  32. #include <sound/asoundef.h>
  33. #include "ice1712.h"
  34. #include "delta.h"
  35. #define SND_CS8403
  36. #include <sound/cs8403.h>
  37. /*
  38. * CS8427 via SPI mode (for Audiophile), emulated I2C
  39. */
  40. /* send 8 bits */
  41. static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp)
  42. {
  43. int idx;
  44. for (idx = 7; idx >= 0; idx--) {
  45. tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK);
  46. if (data & (1 << idx))
  47. tmp |= ICE1712_DELTA_AP_DOUT;
  48. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  49. udelay(5);
  50. tmp |= ICE1712_DELTA_AP_CCLK;
  51. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  52. udelay(5);
  53. }
  54. }
  55. /* read 8 bits */
  56. static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp)
  57. {
  58. unsigned char data = 0;
  59. int idx;
  60. for (idx = 7; idx >= 0; idx--) {
  61. tmp &= ~ICE1712_DELTA_AP_CCLK;
  62. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  63. udelay(5);
  64. if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN)
  65. data |= 1 << idx;
  66. tmp |= ICE1712_DELTA_AP_CCLK;
  67. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  68. udelay(5);
  69. }
  70. return data;
  71. }
  72. /* assert chip select */
  73. static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice)
  74. {
  75. unsigned char tmp;
  76. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  77. switch (ice->eeprom.subvendor) {
  78. case ICE1712_SUBDEVICE_DELTA1010LT:
  79. tmp &= ~ICE1712_DELTA_1010LT_CS;
  80. tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427;
  81. break;
  82. case ICE1712_SUBDEVICE_AUDIOPHILE:
  83. case ICE1712_SUBDEVICE_DELTA410:
  84. tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC;
  85. tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL;
  86. break;
  87. case ICE1712_SUBDEVICE_VX442:
  88. tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B;
  89. tmp &= ~ICE1712_VX442_CS_DIGITAL;
  90. break;
  91. }
  92. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  93. udelay(5);
  94. return tmp;
  95. }
  96. /* deassert chip select */
  97. static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp)
  98. {
  99. switch (ice->eeprom.subvendor) {
  100. case ICE1712_SUBDEVICE_DELTA1010LT:
  101. tmp &= ~ICE1712_DELTA_1010LT_CS;
  102. tmp |= ICE1712_DELTA_1010LT_CS_NONE;
  103. break;
  104. case ICE1712_SUBDEVICE_AUDIOPHILE:
  105. case ICE1712_SUBDEVICE_DELTA410:
  106. tmp |= ICE1712_DELTA_AP_CS_DIGITAL;
  107. break;
  108. case ICE1712_SUBDEVICE_VX442:
  109. tmp |= ICE1712_VX442_CS_DIGITAL;
  110. break;
  111. }
  112. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  113. }
  114. /* sequential write */
  115. static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
  116. {
  117. struct snd_ice1712 *ice = device->bus->private_data;
  118. int res = count;
  119. unsigned char tmp;
  120. down(&ice->gpio_mutex);
  121. tmp = ap_cs8427_codec_select(ice);
  122. ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */
  123. while (count-- > 0)
  124. ap_cs8427_write_byte(ice, *bytes++, tmp);
  125. ap_cs8427_codec_deassert(ice, tmp);
  126. up(&ice->gpio_mutex);
  127. return res;
  128. }
  129. /* sequential read */
  130. static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
  131. {
  132. struct snd_ice1712 *ice = device->bus->private_data;
  133. int res = count;
  134. unsigned char tmp;
  135. down(&ice->gpio_mutex);
  136. tmp = ap_cs8427_codec_select(ice);
  137. ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */
  138. while (count-- > 0)
  139. *bytes++ = ap_cs8427_read_byte(ice, tmp);
  140. ap_cs8427_codec_deassert(ice, tmp);
  141. up(&ice->gpio_mutex);
  142. return res;
  143. }
  144. static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr)
  145. {
  146. if (addr == 0x10)
  147. return 1;
  148. return -ENOENT;
  149. }
  150. static struct snd_i2c_ops ap_cs8427_i2c_ops = {
  151. .sendbytes = ap_cs8427_sendbytes,
  152. .readbytes = ap_cs8427_readbytes,
  153. .probeaddr = ap_cs8427_probeaddr,
  154. };
  155. /*
  156. */
  157. static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
  158. {
  159. unsigned char tmp, mask1, mask2;
  160. int idx;
  161. /* send byte to transmitter */
  162. mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK;
  163. mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA;
  164. down(&ice->gpio_mutex);
  165. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  166. for (idx = 7; idx >= 0; idx--) {
  167. tmp &= ~(mask1 | mask2);
  168. if (bits & (1 << idx))
  169. tmp |= mask2;
  170. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  171. udelay(100);
  172. tmp |= mask1;
  173. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  174. udelay(100);
  175. }
  176. tmp &= ~mask1;
  177. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  178. up(&ice->gpio_mutex);
  179. }
  180. static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  181. {
  182. snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits);
  183. }
  184. static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  185. {
  186. unsigned int val;
  187. int change;
  188. val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
  189. spin_lock_irq(&ice->reg_lock);
  190. change = ice->spdif.cs8403_bits != val;
  191. ice->spdif.cs8403_bits = val;
  192. if (change && ice->playback_pro_substream == NULL) {
  193. spin_unlock_irq(&ice->reg_lock);
  194. snd_ice1712_delta_cs8403_spdif_write(ice, val);
  195. } else {
  196. spin_unlock_irq(&ice->reg_lock);
  197. }
  198. return change;
  199. }
  200. static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  201. {
  202. snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits);
  203. }
  204. static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  205. {
  206. unsigned int val;
  207. int change;
  208. val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
  209. spin_lock_irq(&ice->reg_lock);
  210. change = ice->spdif.cs8403_stream_bits != val;
  211. ice->spdif.cs8403_stream_bits = val;
  212. if (change && ice->playback_pro_substream != NULL) {
  213. spin_unlock_irq(&ice->reg_lock);
  214. snd_ice1712_delta_cs8403_spdif_write(ice, val);
  215. } else {
  216. spin_unlock_irq(&ice->reg_lock);
  217. }
  218. return change;
  219. }
  220. /*
  221. * AK4524 on Delta 44 and 66 to choose the chip mask
  222. */
  223. static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  224. {
  225. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  226. struct snd_ice1712 *ice = ak->private_data[0];
  227. snd_ice1712_save_gpio_status(ice);
  228. priv->cs_mask =
  229. priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A :
  230. ICE1712_DELTA_CODEC_CHIP_B;
  231. }
  232. /*
  233. * AK4524 on Delta1010LT to choose the chip address
  234. */
  235. static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  236. {
  237. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  238. struct snd_ice1712 *ice = ak->private_data[0];
  239. snd_ice1712_save_gpio_status(ice);
  240. priv->cs_mask = ICE1712_DELTA_1010LT_CS;
  241. priv->cs_addr = chip << 4;
  242. }
  243. /*
  244. * AK4528 on VX442 to choose the chip mask
  245. */
  246. static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  247. {
  248. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  249. struct snd_ice1712 *ice = ak->private_data[0];
  250. snd_ice1712_save_gpio_status(ice);
  251. priv->cs_mask =
  252. priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A :
  253. ICE1712_VX442_CODEC_CHIP_B;
  254. }
  255. /*
  256. * change the DFS bit according rate for Delta1010
  257. */
  258. static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate)
  259. {
  260. unsigned char tmp, tmp2;
  261. if (rate == 0) /* no hint - S/PDIF input is master, simply return */
  262. return;
  263. down(&ice->gpio_mutex);
  264. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  265. tmp2 = tmp & ~ICE1712_DELTA_DFS;
  266. if (rate > 48000)
  267. tmp2 |= ICE1712_DELTA_DFS;
  268. if (tmp != tmp2)
  269. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2);
  270. up(&ice->gpio_mutex);
  271. }
  272. /*
  273. * change the rate of AK4524 on Delta 44/66, AP, 1010LT
  274. */
  275. static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
  276. {
  277. unsigned char tmp, tmp2;
  278. struct snd_ice1712 *ice = ak->private_data[0];
  279. if (rate == 0) /* no hint - S/PDIF input is master, simply return */
  280. return;
  281. /* check before reset ak4524 to avoid unnecessary clicks */
  282. down(&ice->gpio_mutex);
  283. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  284. up(&ice->gpio_mutex);
  285. tmp2 = tmp & ~ICE1712_DELTA_DFS;
  286. if (rate > 48000)
  287. tmp2 |= ICE1712_DELTA_DFS;
  288. if (tmp == tmp2)
  289. return;
  290. /* do it again */
  291. snd_akm4xxx_reset(ak, 1);
  292. down(&ice->gpio_mutex);
  293. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS;
  294. if (rate > 48000)
  295. tmp |= ICE1712_DELTA_DFS;
  296. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  297. up(&ice->gpio_mutex);
  298. snd_akm4xxx_reset(ak, 0);
  299. }
  300. /*
  301. * change the rate of AK4524 on VX442
  302. */
  303. static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
  304. {
  305. unsigned char val;
  306. val = (rate > 48000) ? 0x65 : 0x60;
  307. if (snd_akm4xxx_get(ak, 0, 0x02) != val ||
  308. snd_akm4xxx_get(ak, 1, 0x02) != val) {
  309. snd_akm4xxx_reset(ak, 1);
  310. snd_akm4xxx_write(ak, 0, 0x02, val);
  311. snd_akm4xxx_write(ak, 1, 0x02, val);
  312. snd_akm4xxx_reset(ak, 0);
  313. }
  314. }
  315. /*
  316. * SPDIF ops for Delta 1010, Dio, 66
  317. */
  318. /* open callback */
  319. static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  320. {
  321. ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits;
  322. }
  323. /* set up */
  324. static void delta_setup_spdif(struct snd_ice1712 *ice, int rate)
  325. {
  326. unsigned long flags;
  327. unsigned int tmp;
  328. int change;
  329. spin_lock_irqsave(&ice->reg_lock, flags);
  330. tmp = ice->spdif.cs8403_stream_bits;
  331. if (tmp & 0x01) /* consumer */
  332. tmp &= (tmp & 0x01) ? ~0x06 : ~0x18;
  333. switch (rate) {
  334. case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break;
  335. case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break;
  336. case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break;
  337. default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break;
  338. }
  339. change = ice->spdif.cs8403_stream_bits != tmp;
  340. ice->spdif.cs8403_stream_bits = tmp;
  341. spin_unlock_irqrestore(&ice->reg_lock, flags);
  342. if (change)
  343. snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id);
  344. snd_ice1712_delta_cs8403_spdif_write(ice, tmp);
  345. }
  346. /*
  347. * initialize the chips on M-Audio cards
  348. */
  349. static struct snd_akm4xxx akm_audiophile __devinitdata = {
  350. .type = SND_AK4528,
  351. .num_adcs = 2,
  352. .num_dacs = 2,
  353. .ops = {
  354. .set_rate_val = delta_ak4524_set_rate_val
  355. }
  356. };
  357. static struct snd_ak4xxx_private akm_audiophile_priv __devinitdata = {
  358. .caddr = 2,
  359. .cif = 0,
  360. .data_mask = ICE1712_DELTA_AP_DOUT,
  361. .clk_mask = ICE1712_DELTA_AP_CCLK,
  362. .cs_mask = ICE1712_DELTA_AP_CS_CODEC,
  363. .cs_addr = ICE1712_DELTA_AP_CS_CODEC,
  364. .cs_none = 0,
  365. .add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
  366. .mask_flags = 0,
  367. };
  368. static struct snd_akm4xxx akm_delta410 __devinitdata = {
  369. .type = SND_AK4529,
  370. .num_adcs = 2,
  371. .num_dacs = 8,
  372. .ops = {
  373. .set_rate_val = delta_ak4524_set_rate_val
  374. }
  375. };
  376. static struct snd_ak4xxx_private akm_delta410_priv __devinitdata = {
  377. .caddr = 0,
  378. .cif = 0,
  379. .data_mask = ICE1712_DELTA_AP_DOUT,
  380. .clk_mask = ICE1712_DELTA_AP_CCLK,
  381. .cs_mask = ICE1712_DELTA_AP_CS_CODEC,
  382. .cs_addr = ICE1712_DELTA_AP_CS_CODEC,
  383. .cs_none = 0,
  384. .add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
  385. .mask_flags = 0,
  386. };
  387. static struct snd_akm4xxx akm_delta1010lt __devinitdata = {
  388. .type = SND_AK4524,
  389. .num_adcs = 8,
  390. .num_dacs = 8,
  391. .ops = {
  392. .lock = delta1010lt_ak4524_lock,
  393. .set_rate_val = delta_ak4524_set_rate_val
  394. }
  395. };
  396. static struct snd_ak4xxx_private akm_delta1010lt_priv __devinitdata = {
  397. .caddr = 2,
  398. .cif = 0, /* the default level of the CIF pin from AK4524 */
  399. .data_mask = ICE1712_DELTA_1010LT_DOUT,
  400. .clk_mask = ICE1712_DELTA_1010LT_CCLK,
  401. .cs_mask = 0,
  402. .cs_addr = 0, /* set later */
  403. .cs_none = ICE1712_DELTA_1010LT_CS_NONE,
  404. .add_flags = 0,
  405. .mask_flags = 0,
  406. };
  407. static struct snd_akm4xxx akm_delta44 __devinitdata = {
  408. .type = SND_AK4524,
  409. .num_adcs = 4,
  410. .num_dacs = 4,
  411. .ops = {
  412. .lock = delta_ak4524_lock,
  413. .set_rate_val = delta_ak4524_set_rate_val
  414. }
  415. };
  416. static struct snd_ak4xxx_private akm_delta44_priv __devinitdata = {
  417. .caddr = 2,
  418. .cif = 0, /* the default level of the CIF pin from AK4524 */
  419. .data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA,
  420. .clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK,
  421. .cs_mask = 0,
  422. .cs_addr = 0, /* set later */
  423. .cs_none = 0,
  424. .add_flags = 0,
  425. .mask_flags = 0,
  426. };
  427. static struct snd_akm4xxx akm_vx442 __devinitdata = {
  428. .type = SND_AK4524,
  429. .num_adcs = 4,
  430. .num_dacs = 4,
  431. .ops = {
  432. .lock = vx442_ak4524_lock,
  433. .set_rate_val = vx442_ak4524_set_rate_val
  434. }
  435. };
  436. static struct snd_ak4xxx_private akm_vx442_priv __devinitdata = {
  437. .caddr = 2,
  438. .cif = 0,
  439. .data_mask = ICE1712_VX442_DOUT,
  440. .clk_mask = ICE1712_VX442_CCLK,
  441. .cs_mask = 0,
  442. .cs_addr = 0, /* set later */
  443. .cs_none = 0,
  444. .add_flags = 0,
  445. .mask_flags = 0,
  446. };
  447. static int __devinit snd_ice1712_delta_init(struct snd_ice1712 *ice)
  448. {
  449. int err;
  450. struct snd_akm4xxx *ak;
  451. /* determine I2C, DACs and ADCs */
  452. switch (ice->eeprom.subvendor) {
  453. case ICE1712_SUBDEVICE_AUDIOPHILE:
  454. ice->num_total_dacs = 2;
  455. ice->num_total_adcs = 2;
  456. break;
  457. case ICE1712_SUBDEVICE_DELTA410:
  458. ice->num_total_dacs = 8;
  459. ice->num_total_adcs = 2;
  460. break;
  461. case ICE1712_SUBDEVICE_DELTA44:
  462. case ICE1712_SUBDEVICE_DELTA66:
  463. ice->num_total_dacs = ice->omni ? 8 : 4;
  464. ice->num_total_adcs = ice->omni ? 8 : 4;
  465. break;
  466. case ICE1712_SUBDEVICE_DELTA1010:
  467. case ICE1712_SUBDEVICE_DELTA1010LT:
  468. case ICE1712_SUBDEVICE_MEDIASTATION:
  469. ice->num_total_dacs = 8;
  470. ice->num_total_adcs = 8;
  471. break;
  472. case ICE1712_SUBDEVICE_DELTADIO2496:
  473. ice->num_total_dacs = 4; /* two AK4324 codecs */
  474. break;
  475. case ICE1712_SUBDEVICE_VX442:
  476. ice->num_total_dacs = 4;
  477. ice->num_total_adcs = 4;
  478. break;
  479. }
  480. /* initialize spdif */
  481. switch (ice->eeprom.subvendor) {
  482. case ICE1712_SUBDEVICE_AUDIOPHILE:
  483. case ICE1712_SUBDEVICE_DELTA410:
  484. case ICE1712_SUBDEVICE_DELTA1010LT:
  485. case ICE1712_SUBDEVICE_VX442:
  486. if ((err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c)) < 0) {
  487. snd_printk(KERN_ERR "unable to create I2C bus\n");
  488. return err;
  489. }
  490. ice->i2c->private_data = ice;
  491. ice->i2c->ops = &ap_cs8427_i2c_ops;
  492. if ((err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR)) < 0)
  493. return err;
  494. break;
  495. case ICE1712_SUBDEVICE_DELTA1010:
  496. case ICE1712_SUBDEVICE_MEDIASTATION:
  497. ice->gpio.set_pro_rate = delta_1010_set_rate_val;
  498. break;
  499. case ICE1712_SUBDEVICE_DELTADIO2496:
  500. ice->gpio.set_pro_rate = delta_1010_set_rate_val;
  501. /* fall thru */
  502. case ICE1712_SUBDEVICE_DELTA66:
  503. ice->spdif.ops.open = delta_open_spdif;
  504. ice->spdif.ops.setup_rate = delta_setup_spdif;
  505. ice->spdif.ops.default_get = delta_spdif_default_get;
  506. ice->spdif.ops.default_put = delta_spdif_default_put;
  507. ice->spdif.ops.stream_get = delta_spdif_stream_get;
  508. ice->spdif.ops.stream_put = delta_spdif_stream_put;
  509. /* Set spdif defaults */
  510. snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
  511. break;
  512. }
  513. /* no analog? */
  514. switch (ice->eeprom.subvendor) {
  515. case ICE1712_SUBDEVICE_DELTA1010:
  516. case ICE1712_SUBDEVICE_DELTADIO2496:
  517. case ICE1712_SUBDEVICE_MEDIASTATION:
  518. return 0;
  519. }
  520. /* second stage of initialization, analog parts and others */
  521. ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  522. if (! ak)
  523. return -ENOMEM;
  524. ice->akm_codecs = 1;
  525. switch (ice->eeprom.subvendor) {
  526. case ICE1712_SUBDEVICE_AUDIOPHILE:
  527. err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice);
  528. break;
  529. case ICE1712_SUBDEVICE_DELTA410:
  530. err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice);
  531. break;
  532. case ICE1712_SUBDEVICE_DELTA1010LT:
  533. err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice);
  534. break;
  535. case ICE1712_SUBDEVICE_DELTA66:
  536. case ICE1712_SUBDEVICE_DELTA44:
  537. err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice);
  538. break;
  539. case ICE1712_SUBDEVICE_VX442:
  540. err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice);
  541. break;
  542. default:
  543. snd_BUG();
  544. return -EINVAL;
  545. }
  546. return err;
  547. }
  548. /*
  549. * additional controls for M-Audio cards
  550. */
  551. static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select __devinitdata =
  552. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0);
  553. static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select __devinitdata =
  554. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 1, 0);
  555. static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status __devinitdata =
  556. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
  557. static struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select __devinitdata =
  558. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0);
  559. static struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status __devinitdata =
  560. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
  561. static int __devinit snd_ice1712_delta_add_controls(struct snd_ice1712 *ice)
  562. {
  563. int err;
  564. /* 1010 and dio specific controls */
  565. switch (ice->eeprom.subvendor) {
  566. case ICE1712_SUBDEVICE_DELTA1010:
  567. case ICE1712_SUBDEVICE_MEDIASTATION:
  568. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice));
  569. if (err < 0)
  570. return err;
  571. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice));
  572. if (err < 0)
  573. return err;
  574. break;
  575. case ICE1712_SUBDEVICE_DELTADIO2496:
  576. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice));
  577. if (err < 0)
  578. return err;
  579. break;
  580. case ICE1712_SUBDEVICE_DELTA1010LT:
  581. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice));
  582. if (err < 0)
  583. return err;
  584. break;
  585. }
  586. /* normal spdif controls */
  587. switch (ice->eeprom.subvendor) {
  588. case ICE1712_SUBDEVICE_DELTA1010:
  589. case ICE1712_SUBDEVICE_DELTADIO2496:
  590. case ICE1712_SUBDEVICE_DELTA66:
  591. case ICE1712_SUBDEVICE_MEDIASTATION:
  592. err = snd_ice1712_spdif_build_controls(ice);
  593. if (err < 0)
  594. return err;
  595. break;
  596. }
  597. /* spdif status in */
  598. switch (ice->eeprom.subvendor) {
  599. case ICE1712_SUBDEVICE_DELTA1010:
  600. case ICE1712_SUBDEVICE_DELTADIO2496:
  601. case ICE1712_SUBDEVICE_DELTA66:
  602. case ICE1712_SUBDEVICE_MEDIASTATION:
  603. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice));
  604. if (err < 0)
  605. return err;
  606. break;
  607. }
  608. /* ak4524 controls */
  609. switch (ice->eeprom.subvendor) {
  610. case ICE1712_SUBDEVICE_DELTA1010LT:
  611. case ICE1712_SUBDEVICE_AUDIOPHILE:
  612. case ICE1712_SUBDEVICE_DELTA410:
  613. case ICE1712_SUBDEVICE_DELTA44:
  614. case ICE1712_SUBDEVICE_DELTA66:
  615. case ICE1712_SUBDEVICE_VX442:
  616. err = snd_ice1712_akm4xxx_build_controls(ice);
  617. if (err < 0)
  618. return err;
  619. break;
  620. }
  621. return 0;
  622. }
  623. /* entry point */
  624. struct snd_ice1712_card_info snd_ice1712_delta_cards[] __devinitdata = {
  625. {
  626. .subvendor = ICE1712_SUBDEVICE_DELTA1010,
  627. .name = "M Audio Delta 1010",
  628. .model = "delta1010",
  629. .chip_init = snd_ice1712_delta_init,
  630. .build_controls = snd_ice1712_delta_add_controls,
  631. },
  632. {
  633. .subvendor = ICE1712_SUBDEVICE_DELTADIO2496,
  634. .name = "M Audio Delta DiO 2496",
  635. .model = "dio2496",
  636. .chip_init = snd_ice1712_delta_init,
  637. .build_controls = snd_ice1712_delta_add_controls,
  638. .no_mpu401 = 1,
  639. },
  640. {
  641. .subvendor = ICE1712_SUBDEVICE_DELTA66,
  642. .name = "M Audio Delta 66",
  643. .model = "delta66",
  644. .chip_init = snd_ice1712_delta_init,
  645. .build_controls = snd_ice1712_delta_add_controls,
  646. .no_mpu401 = 1,
  647. },
  648. {
  649. .subvendor = ICE1712_SUBDEVICE_DELTA44,
  650. .name = "M Audio Delta 44",
  651. .model = "delta44",
  652. .chip_init = snd_ice1712_delta_init,
  653. .build_controls = snd_ice1712_delta_add_controls,
  654. .no_mpu401 = 1,
  655. },
  656. {
  657. .subvendor = ICE1712_SUBDEVICE_AUDIOPHILE,
  658. .name = "M Audio Audiophile 24/96",
  659. .model = "audiophile",
  660. .chip_init = snd_ice1712_delta_init,
  661. .build_controls = snd_ice1712_delta_add_controls,
  662. },
  663. {
  664. .subvendor = ICE1712_SUBDEVICE_DELTA410,
  665. .name = "M Audio Delta 410",
  666. .model = "delta410",
  667. .chip_init = snd_ice1712_delta_init,
  668. .build_controls = snd_ice1712_delta_add_controls,
  669. },
  670. {
  671. .subvendor = ICE1712_SUBDEVICE_DELTA1010LT,
  672. .name = "M Audio Delta 1010LT",
  673. .model = "delta1010lt",
  674. .chip_init = snd_ice1712_delta_init,
  675. .build_controls = snd_ice1712_delta_add_controls,
  676. },
  677. {
  678. .subvendor = ICE1712_SUBDEVICE_VX442,
  679. .name = "Digigram VX442",
  680. .model = "vx442",
  681. .chip_init = snd_ice1712_delta_init,
  682. .build_controls = snd_ice1712_delta_add_controls,
  683. .no_mpu401 = 1,
  684. },
  685. {
  686. .subvendor = ICE1712_SUBDEVICE_MEDIASTATION,
  687. .name = "Lionstracs Mediastation",
  688. .model = "mediastation",
  689. .chip_init = snd_ice1712_delta_init,
  690. .build_controls = snd_ice1712_delta_add_controls,
  691. },
  692. { } /* terminator */
  693. };