fm801.c 44 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554
  1. /*
  2. * The driver for the ForteMedia FM801 based soundcards
  3. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  4. *
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #include <sound/driver.h>
  22. #include <linux/delay.h>
  23. #include <linux/init.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/pci.h>
  26. #include <linux/slab.h>
  27. #include <linux/moduleparam.h>
  28. #include <sound/core.h>
  29. #include <sound/pcm.h>
  30. #include <sound/ac97_codec.h>
  31. #include <sound/mpu401.h>
  32. #include <sound/opl3.h>
  33. #include <sound/initval.h>
  34. #include <asm/io.h>
  35. #if (defined(CONFIG_SND_FM801_TEA575X) || defined(CONFIG_SND_FM801_TEA575X_MODULE)) && (defined(CONFIG_VIDEO_DEV) || defined(CONFIG_VIDEO_DEV_MODULE))
  36. #include <sound/tea575x-tuner.h>
  37. #define TEA575X_RADIO 1
  38. #endif
  39. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  40. MODULE_DESCRIPTION("ForteMedia FM801");
  41. MODULE_LICENSE("GPL");
  42. MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
  43. "{Genius,SoundMaker Live 5.1}}");
  44. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  45. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  46. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  47. /*
  48. * Enable TEA575x tuner
  49. * 1 = MediaForte 256-PCS
  50. * 2 = MediaForte 256-PCPR
  51. * 3 = MediaForte 64-PCR
  52. * High 16-bits are video (radio) device number + 1
  53. */
  54. static int tea575x_tuner[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 };
  55. module_param_array(index, int, NULL, 0444);
  56. MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
  57. module_param_array(id, charp, NULL, 0444);
  58. MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
  59. module_param_array(enable, bool, NULL, 0444);
  60. MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
  61. module_param_array(tea575x_tuner, int, NULL, 0444);
  62. MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner.");
  63. /*
  64. * Direct registers
  65. */
  66. #define FM801_REG(chip, reg) (chip->port + FM801_##reg)
  67. #define FM801_PCM_VOL 0x00 /* PCM Output Volume */
  68. #define FM801_FM_VOL 0x02 /* FM Output Volume */
  69. #define FM801_I2S_VOL 0x04 /* I2S Volume */
  70. #define FM801_REC_SRC 0x06 /* Record Source */
  71. #define FM801_PLY_CTRL 0x08 /* Playback Control */
  72. #define FM801_PLY_COUNT 0x0a /* Playback Count */
  73. #define FM801_PLY_BUF1 0x0c /* Playback Bufer I */
  74. #define FM801_PLY_BUF2 0x10 /* Playback Buffer II */
  75. #define FM801_CAP_CTRL 0x14 /* Capture Control */
  76. #define FM801_CAP_COUNT 0x16 /* Capture Count */
  77. #define FM801_CAP_BUF1 0x18 /* Capture Buffer I */
  78. #define FM801_CAP_BUF2 0x1c /* Capture Buffer II */
  79. #define FM801_CODEC_CTRL 0x22 /* Codec Control */
  80. #define FM801_I2S_MODE 0x24 /* I2S Mode Control */
  81. #define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */
  82. #define FM801_I2C_CTRL 0x29 /* I2C Control */
  83. #define FM801_AC97_CMD 0x2a /* AC'97 Command */
  84. #define FM801_AC97_DATA 0x2c /* AC'97 Data */
  85. #define FM801_MPU401_DATA 0x30 /* MPU401 Data */
  86. #define FM801_MPU401_CMD 0x31 /* MPU401 Command */
  87. #define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */
  88. #define FM801_GEN_CTRL 0x54 /* General Control */
  89. #define FM801_IRQ_MASK 0x56 /* Interrupt Mask */
  90. #define FM801_IRQ_STATUS 0x5a /* Interrupt Status */
  91. #define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */
  92. #define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */
  93. #define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */
  94. #define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */
  95. #define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */
  96. /* codec access */
  97. #define FM801_AC97_READ (1<<7) /* read=1, write=0 */
  98. #define FM801_AC97_VALID (1<<8) /* port valid=1 */
  99. #define FM801_AC97_BUSY (1<<9) /* busy=1 */
  100. #define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */
  101. /* playback and record control register bits */
  102. #define FM801_BUF1_LAST (1<<1)
  103. #define FM801_BUF2_LAST (1<<2)
  104. #define FM801_START (1<<5)
  105. #define FM801_PAUSE (1<<6)
  106. #define FM801_IMMED_STOP (1<<7)
  107. #define FM801_RATE_SHIFT 8
  108. #define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)
  109. #define FM801_CHANNELS_4 (1<<12) /* playback only */
  110. #define FM801_CHANNELS_6 (2<<12) /* playback only */
  111. #define FM801_CHANNELS_6MS (3<<12) /* playback only */
  112. #define FM801_CHANNELS_MASK (3<<12)
  113. #define FM801_16BIT (1<<14)
  114. #define FM801_STEREO (1<<15)
  115. /* IRQ status bits */
  116. #define FM801_IRQ_PLAYBACK (1<<8)
  117. #define FM801_IRQ_CAPTURE (1<<9)
  118. #define FM801_IRQ_VOLUME (1<<14)
  119. #define FM801_IRQ_MPU (1<<15)
  120. /* GPIO control register */
  121. #define FM801_GPIO_GP0 (1<<0) /* read/write */
  122. #define FM801_GPIO_GP1 (1<<1)
  123. #define FM801_GPIO_GP2 (1<<2)
  124. #define FM801_GPIO_GP3 (1<<3)
  125. #define FM801_GPIO_GP(x) (1<<(0+(x)))
  126. #define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/
  127. #define FM801_GPIO_GD1 (1<<9)
  128. #define FM801_GPIO_GD2 (1<<10)
  129. #define FM801_GPIO_GD3 (1<<11)
  130. #define FM801_GPIO_GD(x) (1<<(8+(x)))
  131. #define FM801_GPIO_GS0 (1<<12) /* function select: */
  132. #define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */
  133. #define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */
  134. #define FM801_GPIO_GS3 (1<<15)
  135. #define FM801_GPIO_GS(x) (1<<(12+(x)))
  136. /*
  137. */
  138. struct fm801 {
  139. int irq;
  140. unsigned long port; /* I/O port number */
  141. unsigned int multichannel: 1, /* multichannel support */
  142. secondary: 1; /* secondary codec */
  143. unsigned char secondary_addr; /* address of the secondary codec */
  144. unsigned short ply_ctrl; /* playback control */
  145. unsigned short cap_ctrl; /* capture control */
  146. unsigned long ply_buffer;
  147. unsigned int ply_buf;
  148. unsigned int ply_count;
  149. unsigned int ply_size;
  150. unsigned int ply_pos;
  151. unsigned long cap_buffer;
  152. unsigned int cap_buf;
  153. unsigned int cap_count;
  154. unsigned int cap_size;
  155. unsigned int cap_pos;
  156. struct snd_ac97_bus *ac97_bus;
  157. struct snd_ac97 *ac97;
  158. struct snd_ac97 *ac97_sec;
  159. struct pci_dev *pci;
  160. struct snd_card *card;
  161. struct snd_pcm *pcm;
  162. struct snd_rawmidi *rmidi;
  163. struct snd_pcm_substream *playback_substream;
  164. struct snd_pcm_substream *capture_substream;
  165. unsigned int p_dma_size;
  166. unsigned int c_dma_size;
  167. spinlock_t reg_lock;
  168. struct snd_info_entry *proc_entry;
  169. #ifdef TEA575X_RADIO
  170. struct snd_tea575x tea;
  171. #endif
  172. #ifdef CONFIG_PM
  173. u16 saved_regs[0x20];
  174. #endif
  175. };
  176. static struct pci_device_id snd_fm801_ids[] = {
  177. { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
  178. { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */
  179. { 0, }
  180. };
  181. MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
  182. /*
  183. * common I/O routines
  184. */
  185. static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg,
  186. unsigned short mask, unsigned short value)
  187. {
  188. int change;
  189. unsigned long flags;
  190. unsigned short old, new;
  191. spin_lock_irqsave(&chip->reg_lock, flags);
  192. old = inw(chip->port + reg);
  193. new = (old & ~mask) | value;
  194. change = old != new;
  195. if (change)
  196. outw(new, chip->port + reg);
  197. spin_unlock_irqrestore(&chip->reg_lock, flags);
  198. return change;
  199. }
  200. static void snd_fm801_codec_write(struct snd_ac97 *ac97,
  201. unsigned short reg,
  202. unsigned short val)
  203. {
  204. struct fm801 *chip = ac97->private_data;
  205. int idx;
  206. /*
  207. * Wait until the codec interface is not ready..
  208. */
  209. for (idx = 0; idx < 100; idx++) {
  210. if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY))
  211. goto ok1;
  212. udelay(10);
  213. }
  214. snd_printk(KERN_ERR "AC'97 interface is busy (1)\n");
  215. return;
  216. ok1:
  217. /* write data and address */
  218. outw(val, FM801_REG(chip, AC97_DATA));
  219. outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
  220. /*
  221. * Wait until the write command is not completed..
  222. */
  223. for (idx = 0; idx < 1000; idx++) {
  224. if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY))
  225. return;
  226. udelay(10);
  227. }
  228. snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num);
  229. }
  230. static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg)
  231. {
  232. struct fm801 *chip = ac97->private_data;
  233. int idx;
  234. /*
  235. * Wait until the codec interface is not ready..
  236. */
  237. for (idx = 0; idx < 100; idx++) {
  238. if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY))
  239. goto ok1;
  240. udelay(10);
  241. }
  242. snd_printk(KERN_ERR "AC'97 interface is busy (1)\n");
  243. return 0;
  244. ok1:
  245. /* read command */
  246. outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ,
  247. FM801_REG(chip, AC97_CMD));
  248. for (idx = 0; idx < 100; idx++) {
  249. if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY))
  250. goto ok2;
  251. udelay(10);
  252. }
  253. snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num);
  254. return 0;
  255. ok2:
  256. for (idx = 0; idx < 1000; idx++) {
  257. if (inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_VALID)
  258. goto ok3;
  259. udelay(10);
  260. }
  261. snd_printk(KERN_ERR "AC'97 interface #%d is not valid (2)\n", ac97->num);
  262. return 0;
  263. ok3:
  264. return inw(FM801_REG(chip, AC97_DATA));
  265. }
  266. static unsigned int rates[] = {
  267. 5500, 8000, 9600, 11025,
  268. 16000, 19200, 22050, 32000,
  269. 38400, 44100, 48000
  270. };
  271. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  272. .count = ARRAY_SIZE(rates),
  273. .list = rates,
  274. .mask = 0,
  275. };
  276. static unsigned int channels[] = {
  277. 2, 4, 6
  278. };
  279. #define CHANNELS sizeof(channels) / sizeof(channels[0])
  280. static struct snd_pcm_hw_constraint_list hw_constraints_channels = {
  281. .count = CHANNELS,
  282. .list = channels,
  283. .mask = 0,
  284. };
  285. /*
  286. * Sample rate routines
  287. */
  288. static unsigned short snd_fm801_rate_bits(unsigned int rate)
  289. {
  290. unsigned int idx;
  291. for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
  292. if (rates[idx] == rate)
  293. return idx;
  294. snd_BUG();
  295. return ARRAY_SIZE(rates) - 1;
  296. }
  297. /*
  298. * PCM part
  299. */
  300. static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream,
  301. int cmd)
  302. {
  303. struct fm801 *chip = snd_pcm_substream_chip(substream);
  304. spin_lock(&chip->reg_lock);
  305. switch (cmd) {
  306. case SNDRV_PCM_TRIGGER_START:
  307. chip->ply_ctrl &= ~(FM801_BUF1_LAST |
  308. FM801_BUF2_LAST |
  309. FM801_PAUSE);
  310. chip->ply_ctrl |= FM801_START |
  311. FM801_IMMED_STOP;
  312. break;
  313. case SNDRV_PCM_TRIGGER_STOP:
  314. chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
  315. break;
  316. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  317. case SNDRV_PCM_TRIGGER_SUSPEND:
  318. chip->ply_ctrl |= FM801_PAUSE;
  319. break;
  320. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  321. case SNDRV_PCM_TRIGGER_RESUME:
  322. chip->ply_ctrl &= ~FM801_PAUSE;
  323. break;
  324. default:
  325. spin_unlock(&chip->reg_lock);
  326. snd_BUG();
  327. return -EINVAL;
  328. }
  329. outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
  330. spin_unlock(&chip->reg_lock);
  331. return 0;
  332. }
  333. static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream,
  334. int cmd)
  335. {
  336. struct fm801 *chip = snd_pcm_substream_chip(substream);
  337. spin_lock(&chip->reg_lock);
  338. switch (cmd) {
  339. case SNDRV_PCM_TRIGGER_START:
  340. chip->cap_ctrl &= ~(FM801_BUF1_LAST |
  341. FM801_BUF2_LAST |
  342. FM801_PAUSE);
  343. chip->cap_ctrl |= FM801_START |
  344. FM801_IMMED_STOP;
  345. break;
  346. case SNDRV_PCM_TRIGGER_STOP:
  347. chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
  348. break;
  349. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  350. case SNDRV_PCM_TRIGGER_SUSPEND:
  351. chip->cap_ctrl |= FM801_PAUSE;
  352. break;
  353. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  354. case SNDRV_PCM_TRIGGER_RESUME:
  355. chip->cap_ctrl &= ~FM801_PAUSE;
  356. break;
  357. default:
  358. spin_unlock(&chip->reg_lock);
  359. snd_BUG();
  360. return -EINVAL;
  361. }
  362. outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
  363. spin_unlock(&chip->reg_lock);
  364. return 0;
  365. }
  366. static int snd_fm801_hw_params(struct snd_pcm_substream *substream,
  367. struct snd_pcm_hw_params *hw_params)
  368. {
  369. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  370. }
  371. static int snd_fm801_hw_free(struct snd_pcm_substream *substream)
  372. {
  373. return snd_pcm_lib_free_pages(substream);
  374. }
  375. static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream)
  376. {
  377. struct fm801 *chip = snd_pcm_substream_chip(substream);
  378. struct snd_pcm_runtime *runtime = substream->runtime;
  379. chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
  380. chip->ply_count = snd_pcm_lib_period_bytes(substream);
  381. spin_lock_irq(&chip->reg_lock);
  382. chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
  383. FM801_STEREO | FM801_RATE_MASK |
  384. FM801_CHANNELS_MASK);
  385. if (snd_pcm_format_width(runtime->format) == 16)
  386. chip->ply_ctrl |= FM801_16BIT;
  387. if (runtime->channels > 1) {
  388. chip->ply_ctrl |= FM801_STEREO;
  389. if (runtime->channels == 4)
  390. chip->ply_ctrl |= FM801_CHANNELS_4;
  391. else if (runtime->channels == 6)
  392. chip->ply_ctrl |= FM801_CHANNELS_6;
  393. }
  394. chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
  395. chip->ply_buf = 0;
  396. outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
  397. outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT));
  398. chip->ply_buffer = runtime->dma_addr;
  399. chip->ply_pos = 0;
  400. outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1));
  401. outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2));
  402. spin_unlock_irq(&chip->reg_lock);
  403. return 0;
  404. }
  405. static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream)
  406. {
  407. struct fm801 *chip = snd_pcm_substream_chip(substream);
  408. struct snd_pcm_runtime *runtime = substream->runtime;
  409. chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
  410. chip->cap_count = snd_pcm_lib_period_bytes(substream);
  411. spin_lock_irq(&chip->reg_lock);
  412. chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
  413. FM801_STEREO | FM801_RATE_MASK);
  414. if (snd_pcm_format_width(runtime->format) == 16)
  415. chip->cap_ctrl |= FM801_16BIT;
  416. if (runtime->channels > 1)
  417. chip->cap_ctrl |= FM801_STEREO;
  418. chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
  419. chip->cap_buf = 0;
  420. outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
  421. outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT));
  422. chip->cap_buffer = runtime->dma_addr;
  423. chip->cap_pos = 0;
  424. outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1));
  425. outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2));
  426. spin_unlock_irq(&chip->reg_lock);
  427. return 0;
  428. }
  429. static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream)
  430. {
  431. struct fm801 *chip = snd_pcm_substream_chip(substream);
  432. size_t ptr;
  433. if (!(chip->ply_ctrl & FM801_START))
  434. return 0;
  435. spin_lock(&chip->reg_lock);
  436. ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT));
  437. if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) {
  438. ptr += chip->ply_count;
  439. ptr %= chip->ply_size;
  440. }
  441. spin_unlock(&chip->reg_lock);
  442. return bytes_to_frames(substream->runtime, ptr);
  443. }
  444. static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream)
  445. {
  446. struct fm801 *chip = snd_pcm_substream_chip(substream);
  447. size_t ptr;
  448. if (!(chip->cap_ctrl & FM801_START))
  449. return 0;
  450. spin_lock(&chip->reg_lock);
  451. ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT));
  452. if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) {
  453. ptr += chip->cap_count;
  454. ptr %= chip->cap_size;
  455. }
  456. spin_unlock(&chip->reg_lock);
  457. return bytes_to_frames(substream->runtime, ptr);
  458. }
  459. static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  460. {
  461. struct fm801 *chip = dev_id;
  462. unsigned short status;
  463. unsigned int tmp;
  464. status = inw(FM801_REG(chip, IRQ_STATUS));
  465. status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
  466. if (! status)
  467. return IRQ_NONE;
  468. /* ack first */
  469. outw(status, FM801_REG(chip, IRQ_STATUS));
  470. if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
  471. spin_lock(&chip->reg_lock);
  472. chip->ply_buf++;
  473. chip->ply_pos += chip->ply_count;
  474. chip->ply_pos %= chip->ply_size;
  475. tmp = chip->ply_pos + chip->ply_count;
  476. tmp %= chip->ply_size;
  477. outl(chip->ply_buffer + tmp,
  478. (chip->ply_buf & 1) ?
  479. FM801_REG(chip, PLY_BUF1) :
  480. FM801_REG(chip, PLY_BUF2));
  481. spin_unlock(&chip->reg_lock);
  482. snd_pcm_period_elapsed(chip->playback_substream);
  483. }
  484. if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
  485. spin_lock(&chip->reg_lock);
  486. chip->cap_buf++;
  487. chip->cap_pos += chip->cap_count;
  488. chip->cap_pos %= chip->cap_size;
  489. tmp = chip->cap_pos + chip->cap_count;
  490. tmp %= chip->cap_size;
  491. outl(chip->cap_buffer + tmp,
  492. (chip->cap_buf & 1) ?
  493. FM801_REG(chip, CAP_BUF1) :
  494. FM801_REG(chip, CAP_BUF2));
  495. spin_unlock(&chip->reg_lock);
  496. snd_pcm_period_elapsed(chip->capture_substream);
  497. }
  498. if (chip->rmidi && (status & FM801_IRQ_MPU))
  499. snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
  500. if (status & FM801_IRQ_VOLUME)
  501. ;/* TODO */
  502. return IRQ_HANDLED;
  503. }
  504. static struct snd_pcm_hardware snd_fm801_playback =
  505. {
  506. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  507. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  508. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
  509. SNDRV_PCM_INFO_MMAP_VALID),
  510. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  511. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  512. .rate_min = 5500,
  513. .rate_max = 48000,
  514. .channels_min = 1,
  515. .channels_max = 2,
  516. .buffer_bytes_max = (128*1024),
  517. .period_bytes_min = 64,
  518. .period_bytes_max = (128*1024),
  519. .periods_min = 1,
  520. .periods_max = 1024,
  521. .fifo_size = 0,
  522. };
  523. static struct snd_pcm_hardware snd_fm801_capture =
  524. {
  525. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  526. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  527. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
  528. SNDRV_PCM_INFO_MMAP_VALID),
  529. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  530. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  531. .rate_min = 5500,
  532. .rate_max = 48000,
  533. .channels_min = 1,
  534. .channels_max = 2,
  535. .buffer_bytes_max = (128*1024),
  536. .period_bytes_min = 64,
  537. .period_bytes_max = (128*1024),
  538. .periods_min = 1,
  539. .periods_max = 1024,
  540. .fifo_size = 0,
  541. };
  542. static int snd_fm801_playback_open(struct snd_pcm_substream *substream)
  543. {
  544. struct fm801 *chip = snd_pcm_substream_chip(substream);
  545. struct snd_pcm_runtime *runtime = substream->runtime;
  546. int err;
  547. chip->playback_substream = substream;
  548. runtime->hw = snd_fm801_playback;
  549. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  550. &hw_constraints_rates);
  551. if (chip->multichannel) {
  552. runtime->hw.channels_max = 6;
  553. snd_pcm_hw_constraint_list(runtime, 0,
  554. SNDRV_PCM_HW_PARAM_CHANNELS,
  555. &hw_constraints_channels);
  556. }
  557. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  558. return err;
  559. return 0;
  560. }
  561. static int snd_fm801_capture_open(struct snd_pcm_substream *substream)
  562. {
  563. struct fm801 *chip = snd_pcm_substream_chip(substream);
  564. struct snd_pcm_runtime *runtime = substream->runtime;
  565. int err;
  566. chip->capture_substream = substream;
  567. runtime->hw = snd_fm801_capture;
  568. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  569. &hw_constraints_rates);
  570. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  571. return err;
  572. return 0;
  573. }
  574. static int snd_fm801_playback_close(struct snd_pcm_substream *substream)
  575. {
  576. struct fm801 *chip = snd_pcm_substream_chip(substream);
  577. chip->playback_substream = NULL;
  578. return 0;
  579. }
  580. static int snd_fm801_capture_close(struct snd_pcm_substream *substream)
  581. {
  582. struct fm801 *chip = snd_pcm_substream_chip(substream);
  583. chip->capture_substream = NULL;
  584. return 0;
  585. }
  586. static struct snd_pcm_ops snd_fm801_playback_ops = {
  587. .open = snd_fm801_playback_open,
  588. .close = snd_fm801_playback_close,
  589. .ioctl = snd_pcm_lib_ioctl,
  590. .hw_params = snd_fm801_hw_params,
  591. .hw_free = snd_fm801_hw_free,
  592. .prepare = snd_fm801_playback_prepare,
  593. .trigger = snd_fm801_playback_trigger,
  594. .pointer = snd_fm801_playback_pointer,
  595. };
  596. static struct snd_pcm_ops snd_fm801_capture_ops = {
  597. .open = snd_fm801_capture_open,
  598. .close = snd_fm801_capture_close,
  599. .ioctl = snd_pcm_lib_ioctl,
  600. .hw_params = snd_fm801_hw_params,
  601. .hw_free = snd_fm801_hw_free,
  602. .prepare = snd_fm801_capture_prepare,
  603. .trigger = snd_fm801_capture_trigger,
  604. .pointer = snd_fm801_capture_pointer,
  605. };
  606. static int __devinit snd_fm801_pcm(struct fm801 *chip, int device, struct snd_pcm ** rpcm)
  607. {
  608. struct snd_pcm *pcm;
  609. int err;
  610. if (rpcm)
  611. *rpcm = NULL;
  612. if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
  613. return err;
  614. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
  615. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
  616. pcm->private_data = chip;
  617. pcm->info_flags = 0;
  618. strcpy(pcm->name, "FM801");
  619. chip->pcm = pcm;
  620. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  621. snd_dma_pci_data(chip->pci),
  622. chip->multichannel ? 128*1024 : 64*1024, 128*1024);
  623. if (rpcm)
  624. *rpcm = pcm;
  625. return 0;
  626. }
  627. /*
  628. * TEA5757 radio
  629. */
  630. #ifdef TEA575X_RADIO
  631. /* 256PCS GPIO numbers */
  632. #define TEA_256PCS_DATA 1
  633. #define TEA_256PCS_WRITE_ENABLE 2 /* inverted */
  634. #define TEA_256PCS_BUS_CLOCK 3
  635. static void snd_fm801_tea575x_256pcs_write(struct snd_tea575x *tea, unsigned int val)
  636. {
  637. struct fm801 *chip = tea->private_data;
  638. unsigned short reg;
  639. int i = 25;
  640. spin_lock_irq(&chip->reg_lock);
  641. reg = inw(FM801_REG(chip, GPIO_CTRL));
  642. /* use GPIO lines and set write enable bit */
  643. reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
  644. FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
  645. FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK);
  646. /* all of lines are in the write direction */
  647. /* clear data and clock lines */
  648. reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) |
  649. FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
  650. FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
  651. FM801_GPIO_GP(TEA_256PCS_DATA) |
  652. FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) |
  653. FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE));
  654. outw(reg, FM801_REG(chip, GPIO_CTRL));
  655. udelay(1);
  656. while (i--) {
  657. if (val & (1 << i))
  658. reg |= FM801_GPIO_GP(TEA_256PCS_DATA);
  659. else
  660. reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA);
  661. outw(reg, FM801_REG(chip, GPIO_CTRL));
  662. udelay(1);
  663. reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
  664. outw(reg, FM801_REG(chip, GPIO_CTRL));
  665. reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
  666. outw(reg, FM801_REG(chip, GPIO_CTRL));
  667. udelay(1);
  668. }
  669. /* and reset the write enable bit */
  670. reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) |
  671. FM801_GPIO_GP(TEA_256PCS_DATA);
  672. outw(reg, FM801_REG(chip, GPIO_CTRL));
  673. spin_unlock_irq(&chip->reg_lock);
  674. }
  675. static unsigned int snd_fm801_tea575x_256pcs_read(struct snd_tea575x *tea)
  676. {
  677. struct fm801 *chip = tea->private_data;
  678. unsigned short reg;
  679. unsigned int val = 0;
  680. int i;
  681. spin_lock_irq(&chip->reg_lock);
  682. reg = inw(FM801_REG(chip, GPIO_CTRL));
  683. /* use GPIO lines, set data direction to input */
  684. reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
  685. FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
  686. FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) |
  687. FM801_GPIO_GD(TEA_256PCS_DATA) |
  688. FM801_GPIO_GP(TEA_256PCS_DATA) |
  689. FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE);
  690. /* all of lines are in the write direction, except data */
  691. /* clear data, write enable and clock lines */
  692. reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
  693. FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
  694. FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK));
  695. for (i = 0; i < 24; i++) {
  696. reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
  697. outw(reg, FM801_REG(chip, GPIO_CTRL));
  698. udelay(1);
  699. reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
  700. outw(reg, FM801_REG(chip, GPIO_CTRL));
  701. udelay(1);
  702. val <<= 1;
  703. if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA))
  704. val |= 1;
  705. }
  706. spin_unlock_irq(&chip->reg_lock);
  707. return val;
  708. }
  709. /* 256PCPR GPIO numbers */
  710. #define TEA_256PCPR_BUS_CLOCK 0
  711. #define TEA_256PCPR_DATA 1
  712. #define TEA_256PCPR_WRITE_ENABLE 2 /* inverted */
  713. static void snd_fm801_tea575x_256pcpr_write(struct snd_tea575x *tea, unsigned int val)
  714. {
  715. struct fm801 *chip = tea->private_data;
  716. unsigned short reg;
  717. int i = 25;
  718. spin_lock_irq(&chip->reg_lock);
  719. reg = inw(FM801_REG(chip, GPIO_CTRL));
  720. /* use GPIO lines and set write enable bit */
  721. reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
  722. FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
  723. FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK);
  724. /* all of lines are in the write direction */
  725. /* clear data and clock lines */
  726. reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) |
  727. FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
  728. FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
  729. FM801_GPIO_GP(TEA_256PCPR_DATA) |
  730. FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) |
  731. FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE));
  732. outw(reg, FM801_REG(chip, GPIO_CTRL));
  733. udelay(1);
  734. while (i--) {
  735. if (val & (1 << i))
  736. reg |= FM801_GPIO_GP(TEA_256PCPR_DATA);
  737. else
  738. reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA);
  739. outw(reg, FM801_REG(chip, GPIO_CTRL));
  740. udelay(1);
  741. reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
  742. outw(reg, FM801_REG(chip, GPIO_CTRL));
  743. reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
  744. outw(reg, FM801_REG(chip, GPIO_CTRL));
  745. udelay(1);
  746. }
  747. /* and reset the write enable bit */
  748. reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) |
  749. FM801_GPIO_GP(TEA_256PCPR_DATA);
  750. outw(reg, FM801_REG(chip, GPIO_CTRL));
  751. spin_unlock_irq(&chip->reg_lock);
  752. }
  753. static unsigned int snd_fm801_tea575x_256pcpr_read(struct snd_tea575x *tea)
  754. {
  755. struct fm801 *chip = tea->private_data;
  756. unsigned short reg;
  757. unsigned int val = 0;
  758. int i;
  759. spin_lock_irq(&chip->reg_lock);
  760. reg = inw(FM801_REG(chip, GPIO_CTRL));
  761. /* use GPIO lines, set data direction to input */
  762. reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
  763. FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
  764. FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) |
  765. FM801_GPIO_GD(TEA_256PCPR_DATA) |
  766. FM801_GPIO_GP(TEA_256PCPR_DATA) |
  767. FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE);
  768. /* all of lines are in the write direction, except data */
  769. /* clear data, write enable and clock lines */
  770. reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
  771. FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
  772. FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK));
  773. for (i = 0; i < 24; i++) {
  774. reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
  775. outw(reg, FM801_REG(chip, GPIO_CTRL));
  776. udelay(1);
  777. reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
  778. outw(reg, FM801_REG(chip, GPIO_CTRL));
  779. udelay(1);
  780. val <<= 1;
  781. if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA))
  782. val |= 1;
  783. }
  784. spin_unlock_irq(&chip->reg_lock);
  785. return val;
  786. }
  787. /* 64PCR GPIO numbers */
  788. #define TEA_64PCR_BUS_CLOCK 0
  789. #define TEA_64PCR_WRITE_ENABLE 1 /* inverted */
  790. #define TEA_64PCR_DATA 2
  791. static void snd_fm801_tea575x_64pcr_write(struct snd_tea575x *tea, unsigned int val)
  792. {
  793. struct fm801 *chip = tea->private_data;
  794. unsigned short reg;
  795. int i = 25;
  796. spin_lock_irq(&chip->reg_lock);
  797. reg = inw(FM801_REG(chip, GPIO_CTRL));
  798. /* use GPIO lines and set write enable bit */
  799. reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
  800. FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
  801. FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK);
  802. /* all of lines are in the write direction */
  803. /* clear data and clock lines */
  804. reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) |
  805. FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
  806. FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
  807. FM801_GPIO_GP(TEA_64PCR_DATA) |
  808. FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) |
  809. FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE));
  810. outw(reg, FM801_REG(chip, GPIO_CTRL));
  811. udelay(1);
  812. while (i--) {
  813. if (val & (1 << i))
  814. reg |= FM801_GPIO_GP(TEA_64PCR_DATA);
  815. else
  816. reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA);
  817. outw(reg, FM801_REG(chip, GPIO_CTRL));
  818. udelay(1);
  819. reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
  820. outw(reg, FM801_REG(chip, GPIO_CTRL));
  821. reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
  822. outw(reg, FM801_REG(chip, GPIO_CTRL));
  823. udelay(1);
  824. }
  825. /* and reset the write enable bit */
  826. reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) |
  827. FM801_GPIO_GP(TEA_64PCR_DATA);
  828. outw(reg, FM801_REG(chip, GPIO_CTRL));
  829. spin_unlock_irq(&chip->reg_lock);
  830. }
  831. static unsigned int snd_fm801_tea575x_64pcr_read(struct snd_tea575x *tea)
  832. {
  833. struct fm801 *chip = tea->private_data;
  834. unsigned short reg;
  835. unsigned int val = 0;
  836. int i;
  837. spin_lock_irq(&chip->reg_lock);
  838. reg = inw(FM801_REG(chip, GPIO_CTRL));
  839. /* use GPIO lines, set data direction to input */
  840. reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
  841. FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
  842. FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) |
  843. FM801_GPIO_GD(TEA_64PCR_DATA) |
  844. FM801_GPIO_GP(TEA_64PCR_DATA) |
  845. FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE);
  846. /* all of lines are in the write direction, except data */
  847. /* clear data, write enable and clock lines */
  848. reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
  849. FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
  850. FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK));
  851. for (i = 0; i < 24; i++) {
  852. reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
  853. outw(reg, FM801_REG(chip, GPIO_CTRL));
  854. udelay(1);
  855. reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
  856. outw(reg, FM801_REG(chip, GPIO_CTRL));
  857. udelay(1);
  858. val <<= 1;
  859. if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA))
  860. val |= 1;
  861. }
  862. spin_unlock_irq(&chip->reg_lock);
  863. return val;
  864. }
  865. static struct snd_tea575x_ops snd_fm801_tea_ops[3] = {
  866. {
  867. /* 1 = MediaForte 256-PCS */
  868. .write = snd_fm801_tea575x_256pcs_write,
  869. .read = snd_fm801_tea575x_256pcs_read,
  870. },
  871. {
  872. /* 2 = MediaForte 256-PCPR */
  873. .write = snd_fm801_tea575x_256pcpr_write,
  874. .read = snd_fm801_tea575x_256pcpr_read,
  875. },
  876. {
  877. /* 3 = MediaForte 64-PCR */
  878. .write = snd_fm801_tea575x_64pcr_write,
  879. .read = snd_fm801_tea575x_64pcr_read,
  880. }
  881. };
  882. #endif
  883. /*
  884. * Mixer routines
  885. */
  886. #define FM801_SINGLE(xname, reg, shift, mask, invert) \
  887. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
  888. .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
  889. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  890. static int snd_fm801_info_single(struct snd_kcontrol *kcontrol,
  891. struct snd_ctl_elem_info *uinfo)
  892. {
  893. int mask = (kcontrol->private_value >> 16) & 0xff;
  894. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  895. uinfo->count = 1;
  896. uinfo->value.integer.min = 0;
  897. uinfo->value.integer.max = mask;
  898. return 0;
  899. }
  900. static int snd_fm801_get_single(struct snd_kcontrol *kcontrol,
  901. struct snd_ctl_elem_value *ucontrol)
  902. {
  903. struct fm801 *chip = snd_kcontrol_chip(kcontrol);
  904. int reg = kcontrol->private_value & 0xff;
  905. int shift = (kcontrol->private_value >> 8) & 0xff;
  906. int mask = (kcontrol->private_value >> 16) & 0xff;
  907. int invert = (kcontrol->private_value >> 24) & 0xff;
  908. ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask;
  909. if (invert)
  910. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  911. return 0;
  912. }
  913. static int snd_fm801_put_single(struct snd_kcontrol *kcontrol,
  914. struct snd_ctl_elem_value *ucontrol)
  915. {
  916. struct fm801 *chip = snd_kcontrol_chip(kcontrol);
  917. int reg = kcontrol->private_value & 0xff;
  918. int shift = (kcontrol->private_value >> 8) & 0xff;
  919. int mask = (kcontrol->private_value >> 16) & 0xff;
  920. int invert = (kcontrol->private_value >> 24) & 0xff;
  921. unsigned short val;
  922. val = (ucontrol->value.integer.value[0] & mask);
  923. if (invert)
  924. val = mask - val;
  925. return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
  926. }
  927. #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
  928. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
  929. .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
  930. .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
  931. static int snd_fm801_info_double(struct snd_kcontrol *kcontrol,
  932. struct snd_ctl_elem_info *uinfo)
  933. {
  934. int mask = (kcontrol->private_value >> 16) & 0xff;
  935. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  936. uinfo->count = 2;
  937. uinfo->value.integer.min = 0;
  938. uinfo->value.integer.max = mask;
  939. return 0;
  940. }
  941. static int snd_fm801_get_double(struct snd_kcontrol *kcontrol,
  942. struct snd_ctl_elem_value *ucontrol)
  943. {
  944. struct fm801 *chip = snd_kcontrol_chip(kcontrol);
  945. int reg = kcontrol->private_value & 0xff;
  946. int shift_left = (kcontrol->private_value >> 8) & 0x0f;
  947. int shift_right = (kcontrol->private_value >> 12) & 0x0f;
  948. int mask = (kcontrol->private_value >> 16) & 0xff;
  949. int invert = (kcontrol->private_value >> 24) & 0xff;
  950. spin_lock_irq(&chip->reg_lock);
  951. ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask;
  952. ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask;
  953. spin_unlock_irq(&chip->reg_lock);
  954. if (invert) {
  955. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  956. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  957. }
  958. return 0;
  959. }
  960. static int snd_fm801_put_double(struct snd_kcontrol *kcontrol,
  961. struct snd_ctl_elem_value *ucontrol)
  962. {
  963. struct fm801 *chip = snd_kcontrol_chip(kcontrol);
  964. int reg = kcontrol->private_value & 0xff;
  965. int shift_left = (kcontrol->private_value >> 8) & 0x0f;
  966. int shift_right = (kcontrol->private_value >> 12) & 0x0f;
  967. int mask = (kcontrol->private_value >> 16) & 0xff;
  968. int invert = (kcontrol->private_value >> 24) & 0xff;
  969. unsigned short val1, val2;
  970. val1 = ucontrol->value.integer.value[0] & mask;
  971. val2 = ucontrol->value.integer.value[1] & mask;
  972. if (invert) {
  973. val1 = mask - val1;
  974. val2 = mask - val2;
  975. }
  976. return snd_fm801_update_bits(chip, reg,
  977. (mask << shift_left) | (mask << shift_right),
  978. (val1 << shift_left ) | (val2 << shift_right));
  979. }
  980. static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol,
  981. struct snd_ctl_elem_info *uinfo)
  982. {
  983. static char *texts[5] = {
  984. "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
  985. };
  986. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  987. uinfo->count = 1;
  988. uinfo->value.enumerated.items = 5;
  989. if (uinfo->value.enumerated.item > 4)
  990. uinfo->value.enumerated.item = 4;
  991. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  992. return 0;
  993. }
  994. static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol,
  995. struct snd_ctl_elem_value *ucontrol)
  996. {
  997. struct fm801 *chip = snd_kcontrol_chip(kcontrol);
  998. unsigned short val;
  999. val = inw(FM801_REG(chip, REC_SRC)) & 7;
  1000. if (val > 4)
  1001. val = 4;
  1002. ucontrol->value.enumerated.item[0] = val;
  1003. return 0;
  1004. }
  1005. static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol,
  1006. struct snd_ctl_elem_value *ucontrol)
  1007. {
  1008. struct fm801 *chip = snd_kcontrol_chip(kcontrol);
  1009. unsigned short val;
  1010. if ((val = ucontrol->value.enumerated.item[0]) > 4)
  1011. return -EINVAL;
  1012. return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
  1013. }
  1014. #define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls)
  1015. static struct snd_kcontrol_new snd_fm801_controls[] __devinitdata = {
  1016. FM801_DOUBLE("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1),
  1017. FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
  1018. FM801_DOUBLE("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1),
  1019. FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
  1020. FM801_DOUBLE("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1),
  1021. FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
  1022. {
  1023. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1024. .name = "Digital Capture Source",
  1025. .info = snd_fm801_info_mux,
  1026. .get = snd_fm801_get_mux,
  1027. .put = snd_fm801_put_mux,
  1028. }
  1029. };
  1030. #define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi)
  1031. static struct snd_kcontrol_new snd_fm801_controls_multi[] __devinitdata = {
  1032. FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
  1033. FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
  1034. FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),
  1035. FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),
  1036. FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),
  1037. FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),
  1038. };
  1039. static void snd_fm801_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
  1040. {
  1041. struct fm801 *chip = bus->private_data;
  1042. chip->ac97_bus = NULL;
  1043. }
  1044. static void snd_fm801_mixer_free_ac97(struct snd_ac97 *ac97)
  1045. {
  1046. struct fm801 *chip = ac97->private_data;
  1047. if (ac97->num == 0) {
  1048. chip->ac97 = NULL;
  1049. } else {
  1050. chip->ac97_sec = NULL;
  1051. }
  1052. }
  1053. static int __devinit snd_fm801_mixer(struct fm801 *chip)
  1054. {
  1055. struct snd_ac97_template ac97;
  1056. unsigned int i;
  1057. int err;
  1058. static struct snd_ac97_bus_ops ops = {
  1059. .write = snd_fm801_codec_write,
  1060. .read = snd_fm801_codec_read,
  1061. };
  1062. if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
  1063. return err;
  1064. chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
  1065. memset(&ac97, 0, sizeof(ac97));
  1066. ac97.private_data = chip;
  1067. ac97.private_free = snd_fm801_mixer_free_ac97;
  1068. if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
  1069. return err;
  1070. if (chip->secondary) {
  1071. ac97.num = 1;
  1072. ac97.addr = chip->secondary_addr;
  1073. if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
  1074. return err;
  1075. }
  1076. for (i = 0; i < FM801_CONTROLS; i++)
  1077. snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
  1078. if (chip->multichannel) {
  1079. for (i = 0; i < FM801_CONTROLS_MULTI; i++)
  1080. snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
  1081. }
  1082. return 0;
  1083. }
  1084. /*
  1085. * initialization routines
  1086. */
  1087. static int wait_for_codec(struct fm801 *chip, unsigned int codec_id,
  1088. unsigned short reg, unsigned long waits)
  1089. {
  1090. unsigned long timeout = jiffies + waits;
  1091. outw(FM801_AC97_READ | (codec_id << FM801_AC97_ADDR_SHIFT) | reg,
  1092. FM801_REG(chip, AC97_CMD));
  1093. udelay(5);
  1094. do {
  1095. if ((inw(FM801_REG(chip, AC97_CMD)) & (FM801_AC97_VALID|FM801_AC97_BUSY))
  1096. == FM801_AC97_VALID)
  1097. return 0;
  1098. schedule_timeout_uninterruptible(1);
  1099. } while (time_after(timeout, jiffies));
  1100. return -EIO;
  1101. }
  1102. static int snd_fm801_chip_init(struct fm801 *chip, int resume)
  1103. {
  1104. int id;
  1105. unsigned short cmdw;
  1106. /* codec cold reset + AC'97 warm reset */
  1107. outw((1<<5) | (1<<6), FM801_REG(chip, CODEC_CTRL));
  1108. inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */
  1109. udelay(100);
  1110. outw(0, FM801_REG(chip, CODEC_CTRL));
  1111. if (wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750)) < 0) {
  1112. snd_printk(KERN_ERR "Primary AC'97 codec not found\n");
  1113. if (! resume)
  1114. return -EIO;
  1115. }
  1116. if (chip->multichannel) {
  1117. if (chip->secondary_addr) {
  1118. wait_for_codec(chip, chip->secondary_addr,
  1119. AC97_VENDOR_ID1, msecs_to_jiffies(50));
  1120. } else {
  1121. /* my card has the secondary codec */
  1122. /* at address #3, so the loop is inverted */
  1123. for (id = 3; id > 0; id--) {
  1124. if (! wait_for_codec(chip, id, AC97_VENDOR_ID1,
  1125. msecs_to_jiffies(50))) {
  1126. cmdw = inw(FM801_REG(chip, AC97_DATA));
  1127. if (cmdw != 0xffff && cmdw != 0) {
  1128. chip->secondary = 1;
  1129. chip->secondary_addr = id;
  1130. break;
  1131. }
  1132. }
  1133. }
  1134. }
  1135. /* the recovery phase, it seems that probing for non-existing codec might */
  1136. /* cause timeout problems */
  1137. wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750));
  1138. }
  1139. /* init volume */
  1140. outw(0x0808, FM801_REG(chip, PCM_VOL));
  1141. outw(0x9f1f, FM801_REG(chip, FM_VOL));
  1142. outw(0x8808, FM801_REG(chip, I2S_VOL));
  1143. /* I2S control - I2S mode */
  1144. outw(0x0003, FM801_REG(chip, I2S_MODE));
  1145. /* interrupt setup - unmask MPU, PLAYBACK & CAPTURE */
  1146. cmdw = inw(FM801_REG(chip, IRQ_MASK));
  1147. cmdw &= ~0x0083;
  1148. outw(cmdw, FM801_REG(chip, IRQ_MASK));
  1149. /* interrupt clear */
  1150. outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS));
  1151. return 0;
  1152. }
  1153. static int snd_fm801_free(struct fm801 *chip)
  1154. {
  1155. unsigned short cmdw;
  1156. if (chip->irq < 0)
  1157. goto __end_hw;
  1158. /* interrupt setup - mask everything */
  1159. cmdw = inw(FM801_REG(chip, IRQ_MASK));
  1160. cmdw |= 0x00c3;
  1161. outw(cmdw, FM801_REG(chip, IRQ_MASK));
  1162. __end_hw:
  1163. #ifdef TEA575X_RADIO
  1164. snd_tea575x_exit(&chip->tea);
  1165. #endif
  1166. if (chip->irq >= 0)
  1167. free_irq(chip->irq, chip);
  1168. pci_release_regions(chip->pci);
  1169. pci_disable_device(chip->pci);
  1170. kfree(chip);
  1171. return 0;
  1172. }
  1173. static int snd_fm801_dev_free(struct snd_device *device)
  1174. {
  1175. struct fm801 *chip = device->device_data;
  1176. return snd_fm801_free(chip);
  1177. }
  1178. static int __devinit snd_fm801_create(struct snd_card *card,
  1179. struct pci_dev * pci,
  1180. int tea575x_tuner,
  1181. struct fm801 ** rchip)
  1182. {
  1183. struct fm801 *chip;
  1184. unsigned char rev;
  1185. int err;
  1186. static struct snd_device_ops ops = {
  1187. .dev_free = snd_fm801_dev_free,
  1188. };
  1189. *rchip = NULL;
  1190. if ((err = pci_enable_device(pci)) < 0)
  1191. return err;
  1192. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1193. if (chip == NULL) {
  1194. pci_disable_device(pci);
  1195. return -ENOMEM;
  1196. }
  1197. spin_lock_init(&chip->reg_lock);
  1198. chip->card = card;
  1199. chip->pci = pci;
  1200. chip->irq = -1;
  1201. if ((err = pci_request_regions(pci, "FM801")) < 0) {
  1202. kfree(chip);
  1203. pci_disable_device(pci);
  1204. return err;
  1205. }
  1206. chip->port = pci_resource_start(pci, 0);
  1207. if (request_irq(pci->irq, snd_fm801_interrupt, SA_INTERRUPT|SA_SHIRQ,
  1208. "FM801", chip)) {
  1209. snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->irq);
  1210. snd_fm801_free(chip);
  1211. return -EBUSY;
  1212. }
  1213. chip->irq = pci->irq;
  1214. pci_set_master(pci);
  1215. pci_read_config_byte(pci, PCI_REVISION_ID, &rev);
  1216. if (rev >= 0xb1) /* FM801-AU */
  1217. chip->multichannel = 1;
  1218. snd_fm801_chip_init(chip, 0);
  1219. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  1220. snd_fm801_free(chip);
  1221. return err;
  1222. }
  1223. snd_card_set_dev(card, &pci->dev);
  1224. #ifdef TEA575X_RADIO
  1225. if (tea575x_tuner > 0 && (tea575x_tuner & 0xffff) < 4) {
  1226. chip->tea.dev_nr = tea575x_tuner >> 16;
  1227. chip->tea.card = card;
  1228. chip->tea.freq_fixup = 10700;
  1229. chip->tea.private_data = chip;
  1230. chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0xffff) - 1];
  1231. snd_tea575x_init(&chip->tea);
  1232. }
  1233. #endif
  1234. *rchip = chip;
  1235. return 0;
  1236. }
  1237. static int __devinit snd_card_fm801_probe(struct pci_dev *pci,
  1238. const struct pci_device_id *pci_id)
  1239. {
  1240. static int dev;
  1241. struct snd_card *card;
  1242. struct fm801 *chip;
  1243. struct snd_opl3 *opl3;
  1244. int err;
  1245. if (dev >= SNDRV_CARDS)
  1246. return -ENODEV;
  1247. if (!enable[dev]) {
  1248. dev++;
  1249. return -ENOENT;
  1250. }
  1251. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1252. if (card == NULL)
  1253. return -ENOMEM;
  1254. if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) {
  1255. snd_card_free(card);
  1256. return err;
  1257. }
  1258. card->private_data = chip;
  1259. strcpy(card->driver, "FM801");
  1260. strcpy(card->shortname, "ForteMedia FM801-");
  1261. strcat(card->shortname, chip->multichannel ? "AU" : "AS");
  1262. sprintf(card->longname, "%s at 0x%lx, irq %i",
  1263. card->shortname, chip->port, chip->irq);
  1264. if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) {
  1265. snd_card_free(card);
  1266. return err;
  1267. }
  1268. if ((err = snd_fm801_mixer(chip)) < 0) {
  1269. snd_card_free(card);
  1270. return err;
  1271. }
  1272. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
  1273. FM801_REG(chip, MPU401_DATA), 1,
  1274. chip->irq, 0, &chip->rmidi)) < 0) {
  1275. snd_card_free(card);
  1276. return err;
  1277. }
  1278. if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0),
  1279. FM801_REG(chip, OPL3_BANK1),
  1280. OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
  1281. snd_card_free(card);
  1282. return err;
  1283. }
  1284. if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
  1285. snd_card_free(card);
  1286. return err;
  1287. }
  1288. if ((err = snd_card_register(card)) < 0) {
  1289. snd_card_free(card);
  1290. return err;
  1291. }
  1292. pci_set_drvdata(pci, card);
  1293. dev++;
  1294. return 0;
  1295. }
  1296. static void __devexit snd_card_fm801_remove(struct pci_dev *pci)
  1297. {
  1298. snd_card_free(pci_get_drvdata(pci));
  1299. pci_set_drvdata(pci, NULL);
  1300. }
  1301. #ifdef CONFIG_PM
  1302. static unsigned char saved_regs[] = {
  1303. FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC,
  1304. FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2,
  1305. FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2,
  1306. FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL,
  1307. };
  1308. static int snd_fm801_suspend(struct pci_dev *pci, pm_message_t state)
  1309. {
  1310. struct snd_card *card = pci_get_drvdata(pci);
  1311. struct fm801 *chip = card->private_data;
  1312. int i;
  1313. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1314. snd_pcm_suspend_all(chip->pcm);
  1315. snd_ac97_suspend(chip->ac97);
  1316. snd_ac97_suspend(chip->ac97_sec);
  1317. for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
  1318. chip->saved_regs[i] = inw(chip->port + saved_regs[i]);
  1319. /* FIXME: tea575x suspend */
  1320. pci_set_power_state(pci, PCI_D3hot);
  1321. pci_disable_device(pci);
  1322. pci_save_state(pci);
  1323. return 0;
  1324. }
  1325. static int snd_fm801_resume(struct pci_dev *pci)
  1326. {
  1327. struct snd_card *card = pci_get_drvdata(pci);
  1328. struct fm801 *chip = card->private_data;
  1329. int i;
  1330. pci_restore_state(pci);
  1331. pci_enable_device(pci);
  1332. pci_set_power_state(pci, PCI_D0);
  1333. pci_set_master(pci);
  1334. snd_fm801_chip_init(chip, 1);
  1335. snd_ac97_resume(chip->ac97);
  1336. snd_ac97_resume(chip->ac97_sec);
  1337. for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
  1338. outw(chip->saved_regs[i], chip->port + saved_regs[i]);
  1339. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1340. return 0;
  1341. }
  1342. #endif
  1343. static struct pci_driver driver = {
  1344. .name = "FM801",
  1345. .id_table = snd_fm801_ids,
  1346. .probe = snd_card_fm801_probe,
  1347. .remove = __devexit_p(snd_card_fm801_remove),
  1348. #ifdef CONFIG_PM
  1349. .suspend = snd_fm801_suspend,
  1350. .resume = snd_fm801_resume,
  1351. #endif
  1352. };
  1353. static int __init alsa_card_fm801_init(void)
  1354. {
  1355. return pci_register_driver(&driver);
  1356. }
  1357. static void __exit alsa_card_fm801_exit(void)
  1358. {
  1359. pci_unregister_driver(&driver);
  1360. }
  1361. module_init(alsa_card_fm801_init)
  1362. module_exit(alsa_card_fm801_exit)