emufx.c 89 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Creative Labs, Inc.
  4. * Routines for effect processor FX8010
  5. *
  6. * BUGS:
  7. * --
  8. *
  9. * TODO:
  10. * --
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <sound/driver.h>
  28. #include <linux/pci.h>
  29. #include <linux/capability.h>
  30. #include <linux/delay.h>
  31. #include <linux/slab.h>
  32. #include <linux/vmalloc.h>
  33. #include <linux/init.h>
  34. #include <sound/core.h>
  35. #include <sound/emu10k1.h>
  36. #if 0 /* for testing purposes - digital out -> capture */
  37. #define EMU10K1_CAPTURE_DIGITAL_OUT
  38. #endif
  39. #if 0 /* for testing purposes - set S/PDIF to AC3 output */
  40. #define EMU10K1_SET_AC3_IEC958
  41. #endif
  42. #if 0 /* for testing purposes - feed the front signal to Center/LFE outputs */
  43. #define EMU10K1_CENTER_LFE_FROM_FRONT
  44. #endif
  45. /*
  46. * Tables
  47. */
  48. static char *fxbuses[16] = {
  49. /* 0x00 */ "PCM Left",
  50. /* 0x01 */ "PCM Right",
  51. /* 0x02 */ "PCM Surround Left",
  52. /* 0x03 */ "PCM Surround Right",
  53. /* 0x04 */ "MIDI Left",
  54. /* 0x05 */ "MIDI Right",
  55. /* 0x06 */ "Center",
  56. /* 0x07 */ "LFE",
  57. /* 0x08 */ NULL,
  58. /* 0x09 */ NULL,
  59. /* 0x0a */ NULL,
  60. /* 0x0b */ NULL,
  61. /* 0x0c */ "MIDI Reverb",
  62. /* 0x0d */ "MIDI Chorus",
  63. /* 0x0e */ NULL,
  64. /* 0x0f */ NULL
  65. };
  66. static char *creative_ins[16] = {
  67. /* 0x00 */ "AC97 Left",
  68. /* 0x01 */ "AC97 Right",
  69. /* 0x02 */ "TTL IEC958 Left",
  70. /* 0x03 */ "TTL IEC958 Right",
  71. /* 0x04 */ "Zoom Video Left",
  72. /* 0x05 */ "Zoom Video Right",
  73. /* 0x06 */ "Optical IEC958 Left",
  74. /* 0x07 */ "Optical IEC958 Right",
  75. /* 0x08 */ "Line/Mic 1 Left",
  76. /* 0x09 */ "Line/Mic 1 Right",
  77. /* 0x0a */ "Coaxial IEC958 Left",
  78. /* 0x0b */ "Coaxial IEC958 Right",
  79. /* 0x0c */ "Line/Mic 2 Left",
  80. /* 0x0d */ "Line/Mic 2 Right",
  81. /* 0x0e */ NULL,
  82. /* 0x0f */ NULL
  83. };
  84. static char *audigy_ins[16] = {
  85. /* 0x00 */ "AC97 Left",
  86. /* 0x01 */ "AC97 Right",
  87. /* 0x02 */ "Audigy CD Left",
  88. /* 0x03 */ "Audigy CD Right",
  89. /* 0x04 */ "Optical IEC958 Left",
  90. /* 0x05 */ "Optical IEC958 Right",
  91. /* 0x06 */ NULL,
  92. /* 0x07 */ NULL,
  93. /* 0x08 */ "Line/Mic 2 Left",
  94. /* 0x09 */ "Line/Mic 2 Right",
  95. /* 0x0a */ "SPDIF Left",
  96. /* 0x0b */ "SPDIF Right",
  97. /* 0x0c */ "Aux2 Left",
  98. /* 0x0d */ "Aux2 Right",
  99. /* 0x0e */ NULL,
  100. /* 0x0f */ NULL
  101. };
  102. static char *creative_outs[32] = {
  103. /* 0x00 */ "AC97 Left",
  104. /* 0x01 */ "AC97 Right",
  105. /* 0x02 */ "Optical IEC958 Left",
  106. /* 0x03 */ "Optical IEC958 Right",
  107. /* 0x04 */ "Center",
  108. /* 0x05 */ "LFE",
  109. /* 0x06 */ "Headphone Left",
  110. /* 0x07 */ "Headphone Right",
  111. /* 0x08 */ "Surround Left",
  112. /* 0x09 */ "Surround Right",
  113. /* 0x0a */ "PCM Capture Left",
  114. /* 0x0b */ "PCM Capture Right",
  115. /* 0x0c */ "MIC Capture",
  116. /* 0x0d */ "AC97 Surround Left",
  117. /* 0x0e */ "AC97 Surround Right",
  118. /* 0x0f */ NULL,
  119. /* 0x10 */ NULL,
  120. /* 0x11 */ "Analog Center",
  121. /* 0x12 */ "Analog LFE",
  122. /* 0x13 */ NULL,
  123. /* 0x14 */ NULL,
  124. /* 0x15 */ NULL,
  125. /* 0x16 */ NULL,
  126. /* 0x17 */ NULL,
  127. /* 0x18 */ NULL,
  128. /* 0x19 */ NULL,
  129. /* 0x1a */ NULL,
  130. /* 0x1b */ NULL,
  131. /* 0x1c */ NULL,
  132. /* 0x1d */ NULL,
  133. /* 0x1e */ NULL,
  134. /* 0x1f */ NULL,
  135. };
  136. static char *audigy_outs[32] = {
  137. /* 0x00 */ "Digital Front Left",
  138. /* 0x01 */ "Digital Front Right",
  139. /* 0x02 */ "Digital Center",
  140. /* 0x03 */ "Digital LEF",
  141. /* 0x04 */ "Headphone Left",
  142. /* 0x05 */ "Headphone Right",
  143. /* 0x06 */ "Digital Rear Left",
  144. /* 0x07 */ "Digital Rear Right",
  145. /* 0x08 */ "Front Left",
  146. /* 0x09 */ "Front Right",
  147. /* 0x0a */ "Center",
  148. /* 0x0b */ "LFE",
  149. /* 0x0c */ NULL,
  150. /* 0x0d */ NULL,
  151. /* 0x0e */ "Rear Left",
  152. /* 0x0f */ "Rear Right",
  153. /* 0x10 */ "AC97 Front Left",
  154. /* 0x11 */ "AC97 Front Right",
  155. /* 0x12 */ "ADC Caputre Left",
  156. /* 0x13 */ "ADC Capture Right",
  157. /* 0x14 */ NULL,
  158. /* 0x15 */ NULL,
  159. /* 0x16 */ NULL,
  160. /* 0x17 */ NULL,
  161. /* 0x18 */ NULL,
  162. /* 0x19 */ NULL,
  163. /* 0x1a */ NULL,
  164. /* 0x1b */ NULL,
  165. /* 0x1c */ NULL,
  166. /* 0x1d */ NULL,
  167. /* 0x1e */ NULL,
  168. /* 0x1f */ NULL,
  169. };
  170. static const u32 bass_table[41][5] = {
  171. { 0x3e4f844f, 0x84ed4cc3, 0x3cc69927, 0x7b03553a, 0xc4da8486 },
  172. { 0x3e69a17a, 0x84c280fb, 0x3cd77cd4, 0x7b2f2a6f, 0xc4b08d1d },
  173. { 0x3e82ff42, 0x849991d5, 0x3ce7466b, 0x7b5917c6, 0xc48863ee },
  174. { 0x3e9bab3c, 0x847267f0, 0x3cf5ffe8, 0x7b813560, 0xc461f22c },
  175. { 0x3eb3b275, 0x844ced29, 0x3d03b295, 0x7ba79a1c, 0xc43d223b },
  176. { 0x3ecb2174, 0x84290c8b, 0x3d106714, 0x7bcc5ba3, 0xc419dfa5 },
  177. { 0x3ee2044b, 0x8406b244, 0x3d1c2561, 0x7bef8e77, 0xc3f8170f },
  178. { 0x3ef86698, 0x83e5cb96, 0x3d26f4d8, 0x7c114600, 0xc3d7b625 },
  179. { 0x3f0e5390, 0x83c646c9, 0x3d30dc39, 0x7c319498, 0xc3b8ab97 },
  180. { 0x3f23d60b, 0x83a81321, 0x3d39e1af, 0x7c508b9c, 0xc39ae704 },
  181. { 0x3f38f884, 0x838b20d2, 0x3d420ad2, 0x7c6e3b75, 0xc37e58f1 },
  182. { 0x3f4dc52c, 0x836f60ef, 0x3d495cab, 0x7c8ab3a6, 0xc362f2be },
  183. { 0x3f6245e8, 0x8354c565, 0x3d4fdbb8, 0x7ca602d6, 0xc348a69b },
  184. { 0x3f76845f, 0x833b40ec, 0x3d558bf0, 0x7cc036df, 0xc32f677c },
  185. { 0x3f8a8a03, 0x8322c6fb, 0x3d5a70c4, 0x7cd95cd7, 0xc317290b },
  186. { 0x3f9e6014, 0x830b4bc3, 0x3d5e8d25, 0x7cf1811a, 0xc2ffdfa5 },
  187. { 0x3fb20fae, 0x82f4c420, 0x3d61e37f, 0x7d08af56, 0xc2e9804a },
  188. { 0x3fc5a1cc, 0x82df2592, 0x3d6475c3, 0x7d1ef294, 0xc2d40096 },
  189. { 0x3fd91f55, 0x82ca6632, 0x3d664564, 0x7d345541, 0xc2bf56b9 },
  190. { 0x3fec9120, 0x82b67cac, 0x3d675356, 0x7d48e138, 0xc2ab796e },
  191. { 0x40000000, 0x82a36037, 0x3d67a012, 0x7d5c9fc9, 0xc2985fee },
  192. { 0x401374c7, 0x8291088a, 0x3d672b93, 0x7d6f99c3, 0xc28601f2 },
  193. { 0x4026f857, 0x827f6dd7, 0x3d65f559, 0x7d81d77c, 0xc27457a3 },
  194. { 0x403a939f, 0x826e88c5, 0x3d63fc63, 0x7d9360d4, 0xc2635996 },
  195. { 0x404e4faf, 0x825e5266, 0x3d613f32, 0x7da43d42, 0xc25300c6 },
  196. { 0x406235ba, 0x824ec434, 0x3d5dbbc3, 0x7db473d7, 0xc243468e },
  197. { 0x40764f1f, 0x823fd80c, 0x3d596f8f, 0x7dc40b44, 0xc23424a2 },
  198. { 0x408aa576, 0x82318824, 0x3d545787, 0x7dd309e2, 0xc2259509 },
  199. { 0x409f4296, 0x8223cf0b, 0x3d4e7012, 0x7de175b5, 0xc2179218 },
  200. { 0x40b430a0, 0x8216a7a1, 0x3d47b505, 0x7def5475, 0xc20a1670 },
  201. { 0x40c97a0a, 0x820a0d12, 0x3d4021a1, 0x7dfcab8d, 0xc1fd1cf5 },
  202. { 0x40df29a6, 0x81fdfad6, 0x3d37b08d, 0x7e098028, 0xc1f0a0ca },
  203. { 0x40f54ab1, 0x81f26ca9, 0x3d2e5bd1, 0x7e15d72b, 0xc1e49d52 },
  204. { 0x410be8da, 0x81e75e89, 0x3d241cce, 0x7e21b544, 0xc1d90e24 },
  205. { 0x41231051, 0x81dcccb3, 0x3d18ec37, 0x7e2d1ee6, 0xc1cdef10 },
  206. { 0x413acdd0, 0x81d2b39e, 0x3d0cc20a, 0x7e38184e, 0xc1c33c13 },
  207. { 0x41532ea7, 0x81c90ffb, 0x3cff9585, 0x7e42a58b, 0xc1b8f15a },
  208. { 0x416c40cd, 0x81bfdeb2, 0x3cf15d21, 0x7e4cca7c, 0xc1af0b3f },
  209. { 0x418612ea, 0x81b71cdc, 0x3ce20e85, 0x7e568ad3, 0xc1a58640 },
  210. { 0x41a0b465, 0x81aec7c5, 0x3cd19e7c, 0x7e5fea1e, 0xc19c5f03 },
  211. { 0x41bc3573, 0x81a6dcea, 0x3cc000e9, 0x7e68ebc2, 0xc1939250 }
  212. };
  213. static const u32 treble_table[41][5] = {
  214. { 0x0125cba9, 0xfed5debd, 0x00599b6c, 0x0d2506da, 0xfa85b354 },
  215. { 0x0142f67e, 0xfeb03163, 0x0066cd0f, 0x0d14c69d, 0xfa914473 },
  216. { 0x016328bd, 0xfe860158, 0x0075b7f2, 0x0d03eb27, 0xfa9d32d2 },
  217. { 0x0186b438, 0xfe56c982, 0x00869234, 0x0cf27048, 0xfaa97fca },
  218. { 0x01adf358, 0xfe21f5fe, 0x00999842, 0x0ce051c2, 0xfab62ca5 },
  219. { 0x01d949fa, 0xfde6e287, 0x00af0d8d, 0x0ccd8b4a, 0xfac33aa7 },
  220. { 0x02092669, 0xfda4d8bf, 0x00c73d4c, 0x0cba1884, 0xfad0ab07 },
  221. { 0x023e0268, 0xfd5b0e4a, 0x00e27b54, 0x0ca5f509, 0xfade7ef2 },
  222. { 0x0278645c, 0xfd08a2b0, 0x01012509, 0x0c911c63, 0xfaecb788 },
  223. { 0x02b8e091, 0xfcac9d1a, 0x0123a262, 0x0c7b8a14, 0xfafb55df },
  224. { 0x03001a9a, 0xfc45e9ce, 0x014a6709, 0x0c65398f, 0xfb0a5aff },
  225. { 0x034ec6d7, 0xfbd3576b, 0x0175f397, 0x0c4e2643, 0xfb19c7e4 },
  226. { 0x03a5ac15, 0xfb5393ee, 0x01a6d6ed, 0x0c364b94, 0xfb299d7c },
  227. { 0x0405a562, 0xfac52968, 0x01ddafae, 0x0c1da4e2, 0xfb39dca5 },
  228. { 0x046fa3fe, 0xfa267a66, 0x021b2ddd, 0x0c042d8d, 0xfb4a8631 },
  229. { 0x04e4b17f, 0xf975be0f, 0x0260149f, 0x0be9e0f2, 0xfb5b9ae0 },
  230. { 0x0565f220, 0xf8b0fbe5, 0x02ad3c29, 0x0bceba73, 0xfb6d1b60 },
  231. { 0x05f4a745, 0xf7d60722, 0x030393d4, 0x0bb2b578, 0xfb7f084d },
  232. { 0x06923236, 0xf6e279bd, 0x03642465, 0x0b95cd75, 0xfb916233 },
  233. { 0x07401713, 0xf5d3aef9, 0x03d01283, 0x0b77fded, 0xfba42984 },
  234. { 0x08000000, 0xf4a6bd88, 0x0448a161, 0x0b594278, 0xfbb75e9f },
  235. { 0x08d3c097, 0xf3587131, 0x04cf35a4, 0x0b3996c9, 0xfbcb01cb },
  236. { 0x09bd59a2, 0xf1e543f9, 0x05655880, 0x0b18f6b2, 0xfbdf1333 },
  237. { 0x0abefd0f, 0xf04956ca, 0x060cbb12, 0x0af75e2c, 0xfbf392e8 },
  238. { 0x0bdb123e, 0xee806984, 0x06c739fe, 0x0ad4c962, 0xfc0880dd },
  239. { 0x0d143a94, 0xec85d287, 0x0796e150, 0x0ab134b0, 0xfc1ddce5 },
  240. { 0x0e6d5664, 0xea547598, 0x087df0a0, 0x0a8c9cb6, 0xfc33a6ad },
  241. { 0x0fe98a2a, 0xe7e6ba35, 0x097edf83, 0x0a66fe5b, 0xfc49ddc2 },
  242. { 0x118c4421, 0xe536813a, 0x0a9c6248, 0x0a4056d7, 0xfc608185 },
  243. { 0x1359422e, 0xe23d19eb, 0x0bd96efb, 0x0a18a3bf, 0xfc77912c },
  244. { 0x1554982b, 0xdef33645, 0x0d3942bd, 0x09efe312, 0xfc8f0bc1 },
  245. { 0x1782b68a, 0xdb50deb1, 0x0ebf676d, 0x09c6133f, 0xfca6f019 },
  246. { 0x19e8715d, 0xd74d64fd, 0x106fb999, 0x099b3337, 0xfcbf3cd6 },
  247. { 0x1c8b07b8, 0xd2df56ab, 0x124e6ec8, 0x096f4274, 0xfcd7f060 },
  248. { 0x1f702b6d, 0xcdfc6e92, 0x14601c10, 0x0942410b, 0xfcf108e5 },
  249. { 0x229e0933, 0xc89985cd, 0x16a9bcfa, 0x09142fb5, 0xfd0a8451 },
  250. { 0x261b5118, 0xc2aa8409, 0x1930bab6, 0x08e50fdc, 0xfd24604d },
  251. { 0x29ef3f5d, 0xbc224f28, 0x1bfaf396, 0x08b4e3aa, 0xfd3e9a3b },
  252. { 0x2e21a59b, 0xb4f2ba46, 0x1f0ec2d6, 0x0883ae15, 0xfd592f33 },
  253. { 0x32baf44b, 0xad0c7429, 0x227308a3, 0x085172eb, 0xfd741bfd },
  254. { 0x37c4448b, 0xa45ef51d, 0x262f3267, 0x081e36dc, 0xfd8f5d14 }
  255. };
  256. static const u32 db_table[101] = {
  257. 0x00000000, 0x01571f82, 0x01674b41, 0x01783a1b, 0x0189f540,
  258. 0x019c8651, 0x01aff763, 0x01c45306, 0x01d9a446, 0x01eff6b8,
  259. 0x0207567a, 0x021fd03d, 0x0239714c, 0x02544792, 0x027061a1,
  260. 0x028dcebb, 0x02ac9edc, 0x02cce2bf, 0x02eeabe8, 0x03120cb0,
  261. 0x0337184e, 0x035de2df, 0x03868173, 0x03b10a18, 0x03dd93e9,
  262. 0x040c3713, 0x043d0cea, 0x04702ff3, 0x04a5bbf2, 0x04ddcdfb,
  263. 0x0518847f, 0x0555ff62, 0x05966005, 0x05d9c95d, 0x06206005,
  264. 0x066a4a52, 0x06b7b067, 0x0708bc4c, 0x075d9a01, 0x07b6779d,
  265. 0x08138561, 0x0874f5d5, 0x08dafde1, 0x0945d4ed, 0x09b5b4fd,
  266. 0x0a2adad1, 0x0aa58605, 0x0b25f936, 0x0bac7a24, 0x0c3951d8,
  267. 0x0ccccccc, 0x0d673b17, 0x0e08f093, 0x0eb24510, 0x0f639481,
  268. 0x101d3f2d, 0x10dfa9e6, 0x11ab3e3f, 0x12806ac3, 0x135fa333,
  269. 0x144960c5, 0x153e2266, 0x163e6cfe, 0x174acbb7, 0x1863d04d,
  270. 0x198a1357, 0x1abe349f, 0x1c00db77, 0x1d52b712, 0x1eb47ee6,
  271. 0x2026f30f, 0x21aadcb6, 0x23410e7e, 0x24ea64f9, 0x26a7c71d,
  272. 0x287a26c4, 0x2a62812c, 0x2c61df84, 0x2e795779, 0x30aa0bcf,
  273. 0x32f52cfe, 0x355bf9d8, 0x37dfc033, 0x3a81dda4, 0x3d43c038,
  274. 0x4026e73c, 0x432ce40f, 0x46575af8, 0x49a8040f, 0x4d20ac2a,
  275. 0x50c335d3, 0x54919a57, 0x588dead1, 0x5cba514a, 0x611911ea,
  276. 0x65ac8c2f, 0x6a773c39, 0x6f7bbc23, 0x74bcc56c, 0x7a3d3272,
  277. 0x7fffffff,
  278. };
  279. static const u32 onoff_table[2] = {
  280. 0x00000000, 0x00000001
  281. };
  282. /*
  283. */
  284. static inline mm_segment_t snd_enter_user(void)
  285. {
  286. mm_segment_t fs = get_fs();
  287. set_fs(get_ds());
  288. return fs;
  289. }
  290. static inline void snd_leave_user(mm_segment_t fs)
  291. {
  292. set_fs(fs);
  293. }
  294. /*
  295. * controls
  296. */
  297. static int snd_emu10k1_gpr_ctl_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  298. {
  299. struct snd_emu10k1_fx8010_ctl *ctl =
  300. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  301. if (ctl->min == 0 && ctl->max == 1)
  302. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  303. else
  304. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  305. uinfo->count = ctl->vcount;
  306. uinfo->value.integer.min = ctl->min;
  307. uinfo->value.integer.max = ctl->max;
  308. return 0;
  309. }
  310. static int snd_emu10k1_gpr_ctl_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  311. {
  312. struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
  313. struct snd_emu10k1_fx8010_ctl *ctl =
  314. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  315. unsigned long flags;
  316. unsigned int i;
  317. spin_lock_irqsave(&emu->reg_lock, flags);
  318. for (i = 0; i < ctl->vcount; i++)
  319. ucontrol->value.integer.value[i] = ctl->value[i];
  320. spin_unlock_irqrestore(&emu->reg_lock, flags);
  321. return 0;
  322. }
  323. static int snd_emu10k1_gpr_ctl_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  324. {
  325. struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
  326. struct snd_emu10k1_fx8010_ctl *ctl =
  327. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  328. unsigned long flags;
  329. unsigned int nval, val;
  330. unsigned int i, j;
  331. int change = 0;
  332. spin_lock_irqsave(&emu->reg_lock, flags);
  333. for (i = 0; i < ctl->vcount; i++) {
  334. nval = ucontrol->value.integer.value[i];
  335. if (nval < ctl->min)
  336. nval = ctl->min;
  337. if (nval > ctl->max)
  338. nval = ctl->max;
  339. if (nval != ctl->value[i])
  340. change = 1;
  341. val = ctl->value[i] = nval;
  342. switch (ctl->translation) {
  343. case EMU10K1_GPR_TRANSLATION_NONE:
  344. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, val);
  345. break;
  346. case EMU10K1_GPR_TRANSLATION_TABLE100:
  347. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, db_table[val]);
  348. break;
  349. case EMU10K1_GPR_TRANSLATION_BASS:
  350. if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) {
  351. change = -EIO;
  352. goto __error;
  353. }
  354. for (j = 0; j < 5; j++)
  355. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, bass_table[val][j]);
  356. break;
  357. case EMU10K1_GPR_TRANSLATION_TREBLE:
  358. if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) {
  359. change = -EIO;
  360. goto __error;
  361. }
  362. for (j = 0; j < 5; j++)
  363. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, treble_table[val][j]);
  364. break;
  365. case EMU10K1_GPR_TRANSLATION_ONOFF:
  366. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, onoff_table[val]);
  367. break;
  368. }
  369. }
  370. __error:
  371. spin_unlock_irqrestore(&emu->reg_lock, flags);
  372. return change;
  373. }
  374. /*
  375. * Interrupt handler
  376. */
  377. static void snd_emu10k1_fx8010_interrupt(struct snd_emu10k1 *emu)
  378. {
  379. struct snd_emu10k1_fx8010_irq *irq, *nirq;
  380. irq = emu->fx8010.irq_handlers;
  381. while (irq) {
  382. nirq = irq->next; /* irq ptr can be removed from list */
  383. if (snd_emu10k1_ptr_read(emu, emu->gpr_base + irq->gpr_running, 0) & 0xffff0000) {
  384. if (irq->handler)
  385. irq->handler(emu, irq->private_data);
  386. snd_emu10k1_ptr_write(emu, emu->gpr_base + irq->gpr_running, 0, 1);
  387. }
  388. irq = nirq;
  389. }
  390. }
  391. int snd_emu10k1_fx8010_register_irq_handler(struct snd_emu10k1 *emu,
  392. snd_fx8010_irq_handler_t *handler,
  393. unsigned char gpr_running,
  394. void *private_data,
  395. struct snd_emu10k1_fx8010_irq **r_irq)
  396. {
  397. struct snd_emu10k1_fx8010_irq *irq;
  398. unsigned long flags;
  399. irq = kmalloc(sizeof(*irq), GFP_ATOMIC);
  400. if (irq == NULL)
  401. return -ENOMEM;
  402. irq->handler = handler;
  403. irq->gpr_running = gpr_running;
  404. irq->private_data = private_data;
  405. irq->next = NULL;
  406. spin_lock_irqsave(&emu->fx8010.irq_lock, flags);
  407. if (emu->fx8010.irq_handlers == NULL) {
  408. emu->fx8010.irq_handlers = irq;
  409. emu->dsp_interrupt = snd_emu10k1_fx8010_interrupt;
  410. snd_emu10k1_intr_enable(emu, INTE_FXDSPENABLE);
  411. } else {
  412. irq->next = emu->fx8010.irq_handlers;
  413. emu->fx8010.irq_handlers = irq;
  414. }
  415. spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags);
  416. if (r_irq)
  417. *r_irq = irq;
  418. return 0;
  419. }
  420. int snd_emu10k1_fx8010_unregister_irq_handler(struct snd_emu10k1 *emu,
  421. struct snd_emu10k1_fx8010_irq *irq)
  422. {
  423. struct snd_emu10k1_fx8010_irq *tmp;
  424. unsigned long flags;
  425. spin_lock_irqsave(&emu->fx8010.irq_lock, flags);
  426. if ((tmp = emu->fx8010.irq_handlers) == irq) {
  427. emu->fx8010.irq_handlers = tmp->next;
  428. if (emu->fx8010.irq_handlers == NULL) {
  429. snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
  430. emu->dsp_interrupt = NULL;
  431. }
  432. } else {
  433. while (tmp && tmp->next != irq)
  434. tmp = tmp->next;
  435. if (tmp)
  436. tmp->next = tmp->next->next;
  437. }
  438. spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags);
  439. kfree(irq);
  440. return 0;
  441. }
  442. /*************************************************************************
  443. * EMU10K1 effect manager
  444. *************************************************************************/
  445. static void snd_emu10k1_write_op(struct snd_emu10k1_fx8010_code *icode,
  446. unsigned int *ptr,
  447. u32 op, u32 r, u32 a, u32 x, u32 y)
  448. {
  449. u_int32_t *code;
  450. snd_assert(*ptr < 512, return);
  451. code = (u_int32_t __force *)icode->code + (*ptr) * 2;
  452. set_bit(*ptr, icode->code_valid);
  453. code[0] = ((x & 0x3ff) << 10) | (y & 0x3ff);
  454. code[1] = ((op & 0x0f) << 20) | ((r & 0x3ff) << 10) | (a & 0x3ff);
  455. (*ptr)++;
  456. }
  457. #define OP(icode, ptr, op, r, a, x, y) \
  458. snd_emu10k1_write_op(icode, ptr, op, r, a, x, y)
  459. static void snd_emu10k1_audigy_write_op(struct snd_emu10k1_fx8010_code *icode,
  460. unsigned int *ptr,
  461. u32 op, u32 r, u32 a, u32 x, u32 y)
  462. {
  463. u_int32_t *code;
  464. snd_assert(*ptr < 1024, return);
  465. code = (u_int32_t __force *)icode->code + (*ptr) * 2;
  466. set_bit(*ptr, icode->code_valid);
  467. code[0] = ((x & 0x7ff) << 12) | (y & 0x7ff);
  468. code[1] = ((op & 0x0f) << 24) | ((r & 0x7ff) << 12) | (a & 0x7ff);
  469. (*ptr)++;
  470. }
  471. #define A_OP(icode, ptr, op, r, a, x, y) \
  472. snd_emu10k1_audigy_write_op(icode, ptr, op, r, a, x, y)
  473. static void snd_emu10k1_efx_write(struct snd_emu10k1 *emu, unsigned int pc, unsigned int data)
  474. {
  475. pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
  476. snd_emu10k1_ptr_write(emu, pc, 0, data);
  477. }
  478. unsigned int snd_emu10k1_efx_read(struct snd_emu10k1 *emu, unsigned int pc)
  479. {
  480. pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
  481. return snd_emu10k1_ptr_read(emu, pc, 0);
  482. }
  483. static int snd_emu10k1_gpr_poke(struct snd_emu10k1 *emu,
  484. struct snd_emu10k1_fx8010_code *icode)
  485. {
  486. int gpr;
  487. u32 val;
  488. for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) {
  489. if (!test_bit(gpr, icode->gpr_valid))
  490. continue;
  491. if (get_user(val, &icode->gpr_map[gpr]))
  492. return -EFAULT;
  493. snd_emu10k1_ptr_write(emu, emu->gpr_base + gpr, 0, val);
  494. }
  495. return 0;
  496. }
  497. static int snd_emu10k1_gpr_peek(struct snd_emu10k1 *emu,
  498. struct snd_emu10k1_fx8010_code *icode)
  499. {
  500. int gpr;
  501. u32 val;
  502. for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) {
  503. set_bit(gpr, icode->gpr_valid);
  504. val = snd_emu10k1_ptr_read(emu, emu->gpr_base + gpr, 0);
  505. if (put_user(val, &icode->gpr_map[gpr]))
  506. return -EFAULT;
  507. }
  508. return 0;
  509. }
  510. static int snd_emu10k1_tram_poke(struct snd_emu10k1 *emu,
  511. struct snd_emu10k1_fx8010_code *icode)
  512. {
  513. int tram;
  514. u32 addr, val;
  515. for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) {
  516. if (!test_bit(tram, icode->tram_valid))
  517. continue;
  518. if (get_user(val, &icode->tram_data_map[tram]) ||
  519. get_user(addr, &icode->tram_addr_map[tram]))
  520. return -EFAULT;
  521. snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + tram, 0, val);
  522. if (!emu->audigy) {
  523. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr);
  524. } else {
  525. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr << 12);
  526. snd_emu10k1_ptr_write(emu, A_TANKMEMCTLREGBASE + tram, 0, addr >> 20);
  527. }
  528. }
  529. return 0;
  530. }
  531. static int snd_emu10k1_tram_peek(struct snd_emu10k1 *emu,
  532. struct snd_emu10k1_fx8010_code *icode)
  533. {
  534. int tram;
  535. u32 val, addr;
  536. memset(icode->tram_valid, 0, sizeof(icode->tram_valid));
  537. for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) {
  538. set_bit(tram, icode->tram_valid);
  539. val = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + tram, 0);
  540. if (!emu->audigy) {
  541. addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0);
  542. } else {
  543. addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0) >> 12;
  544. addr |= snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + tram, 0) << 20;
  545. }
  546. if (put_user(val, &icode->tram_data_map[tram]) ||
  547. put_user(addr, &icode->tram_addr_map[tram]))
  548. return -EFAULT;
  549. }
  550. return 0;
  551. }
  552. static int snd_emu10k1_code_poke(struct snd_emu10k1 *emu,
  553. struct snd_emu10k1_fx8010_code *icode)
  554. {
  555. u32 pc, lo, hi;
  556. for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) {
  557. if (!test_bit(pc / 2, icode->code_valid))
  558. continue;
  559. if (get_user(lo, &icode->code[pc + 0]) ||
  560. get_user(hi, &icode->code[pc + 1]))
  561. return -EFAULT;
  562. snd_emu10k1_efx_write(emu, pc + 0, lo);
  563. snd_emu10k1_efx_write(emu, pc + 1, hi);
  564. }
  565. return 0;
  566. }
  567. static int snd_emu10k1_code_peek(struct snd_emu10k1 *emu,
  568. struct snd_emu10k1_fx8010_code *icode)
  569. {
  570. u32 pc;
  571. memset(icode->code_valid, 0, sizeof(icode->code_valid));
  572. for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) {
  573. set_bit(pc / 2, icode->code_valid);
  574. if (put_user(snd_emu10k1_efx_read(emu, pc + 0), &icode->code[pc + 0]))
  575. return -EFAULT;
  576. if (put_user(snd_emu10k1_efx_read(emu, pc + 1), &icode->code[pc + 1]))
  577. return -EFAULT;
  578. }
  579. return 0;
  580. }
  581. static struct snd_emu10k1_fx8010_ctl *
  582. snd_emu10k1_look_for_ctl(struct snd_emu10k1 *emu, struct snd_ctl_elem_id *id)
  583. {
  584. struct snd_emu10k1_fx8010_ctl *ctl;
  585. struct snd_kcontrol *kcontrol;
  586. struct list_head *list;
  587. list_for_each(list, &emu->fx8010.gpr_ctl) {
  588. ctl = emu10k1_gpr_ctl(list);
  589. kcontrol = ctl->kcontrol;
  590. if (kcontrol->id.iface == id->iface &&
  591. !strcmp(kcontrol->id.name, id->name) &&
  592. kcontrol->id.index == id->index)
  593. return ctl;
  594. }
  595. return NULL;
  596. }
  597. static int snd_emu10k1_verify_controls(struct snd_emu10k1 *emu,
  598. struct snd_emu10k1_fx8010_code *icode)
  599. {
  600. unsigned int i;
  601. struct snd_ctl_elem_id __user *_id;
  602. struct snd_ctl_elem_id id;
  603. struct snd_emu10k1_fx8010_control_gpr __user *_gctl;
  604. struct snd_emu10k1_fx8010_control_gpr *gctl;
  605. int err;
  606. for (i = 0, _id = icode->gpr_del_controls;
  607. i < icode->gpr_del_control_count; i++, _id++) {
  608. if (copy_from_user(&id, _id, sizeof(id)))
  609. return -EFAULT;
  610. if (snd_emu10k1_look_for_ctl(emu, &id) == NULL)
  611. return -ENOENT;
  612. }
  613. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  614. if (! gctl)
  615. return -ENOMEM;
  616. err = 0;
  617. for (i = 0, _gctl = icode->gpr_add_controls;
  618. i < icode->gpr_add_control_count; i++, _gctl++) {
  619. if (copy_from_user(gctl, _gctl, sizeof(*gctl))) {
  620. err = -EFAULT;
  621. goto __error;
  622. }
  623. if (snd_emu10k1_look_for_ctl(emu, &gctl->id))
  624. continue;
  625. down_read(&emu->card->controls_rwsem);
  626. if (snd_ctl_find_id(emu->card, &gctl->id) != NULL) {
  627. up_read(&emu->card->controls_rwsem);
  628. err = -EEXIST;
  629. goto __error;
  630. }
  631. up_read(&emu->card->controls_rwsem);
  632. if (gctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER &&
  633. gctl->id.iface != SNDRV_CTL_ELEM_IFACE_PCM) {
  634. err = -EINVAL;
  635. goto __error;
  636. }
  637. }
  638. for (i = 0, _gctl = icode->gpr_list_controls;
  639. i < icode->gpr_list_control_count; i++, _gctl++) {
  640. /* FIXME: we need to check the WRITE access */
  641. if (copy_from_user(gctl, _gctl, sizeof(*gctl))) {
  642. err = -EFAULT;
  643. goto __error;
  644. }
  645. }
  646. __error:
  647. kfree(gctl);
  648. return err;
  649. }
  650. static void snd_emu10k1_ctl_private_free(struct snd_kcontrol *kctl)
  651. {
  652. struct snd_emu10k1_fx8010_ctl *ctl;
  653. ctl = (struct snd_emu10k1_fx8010_ctl *) kctl->private_value;
  654. kctl->private_value = 0;
  655. list_del(&ctl->list);
  656. kfree(ctl);
  657. }
  658. static int snd_emu10k1_add_controls(struct snd_emu10k1 *emu,
  659. struct snd_emu10k1_fx8010_code *icode)
  660. {
  661. unsigned int i, j;
  662. struct snd_emu10k1_fx8010_control_gpr __user *_gctl;
  663. struct snd_emu10k1_fx8010_control_gpr *gctl;
  664. struct snd_emu10k1_fx8010_ctl *ctl, *nctl;
  665. struct snd_kcontrol_new knew;
  666. struct snd_kcontrol *kctl;
  667. struct snd_ctl_elem_value *val;
  668. int err = 0;
  669. val = kmalloc(sizeof(*val), GFP_KERNEL);
  670. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  671. nctl = kmalloc(sizeof(*nctl), GFP_KERNEL);
  672. if (!val || !gctl || !nctl) {
  673. err = -ENOMEM;
  674. goto __error;
  675. }
  676. for (i = 0, _gctl = icode->gpr_add_controls;
  677. i < icode->gpr_add_control_count; i++, _gctl++) {
  678. if (copy_from_user(gctl, _gctl, sizeof(*gctl))) {
  679. err = -EFAULT;
  680. goto __error;
  681. }
  682. if (gctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER &&
  683. gctl->id.iface != SNDRV_CTL_ELEM_IFACE_PCM) {
  684. err = -EINVAL;
  685. goto __error;
  686. }
  687. if (! gctl->id.name[0]) {
  688. err = -EINVAL;
  689. goto __error;
  690. }
  691. ctl = snd_emu10k1_look_for_ctl(emu, &gctl->id);
  692. memset(&knew, 0, sizeof(knew));
  693. knew.iface = gctl->id.iface;
  694. knew.name = gctl->id.name;
  695. knew.index = gctl->id.index;
  696. knew.device = gctl->id.device;
  697. knew.subdevice = gctl->id.subdevice;
  698. knew.info = snd_emu10k1_gpr_ctl_info;
  699. knew.get = snd_emu10k1_gpr_ctl_get;
  700. knew.put = snd_emu10k1_gpr_ctl_put;
  701. memset(nctl, 0, sizeof(*nctl));
  702. nctl->vcount = gctl->vcount;
  703. nctl->count = gctl->count;
  704. for (j = 0; j < 32; j++) {
  705. nctl->gpr[j] = gctl->gpr[j];
  706. nctl->value[j] = ~gctl->value[j]; /* inverted, we want to write new value in gpr_ctl_put() */
  707. val->value.integer.value[j] = gctl->value[j];
  708. }
  709. nctl->min = gctl->min;
  710. nctl->max = gctl->max;
  711. nctl->translation = gctl->translation;
  712. if (ctl == NULL) {
  713. ctl = kmalloc(sizeof(*ctl), GFP_KERNEL);
  714. if (ctl == NULL) {
  715. err = -ENOMEM;
  716. goto __error;
  717. }
  718. knew.private_value = (unsigned long)ctl;
  719. *ctl = *nctl;
  720. if ((err = snd_ctl_add(emu->card, kctl = snd_ctl_new1(&knew, emu))) < 0) {
  721. kfree(ctl);
  722. goto __error;
  723. }
  724. kctl->private_free = snd_emu10k1_ctl_private_free;
  725. ctl->kcontrol = kctl;
  726. list_add_tail(&ctl->list, &emu->fx8010.gpr_ctl);
  727. } else {
  728. /* overwrite */
  729. nctl->list = ctl->list;
  730. nctl->kcontrol = ctl->kcontrol;
  731. *ctl = *nctl;
  732. snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE |
  733. SNDRV_CTL_EVENT_MASK_INFO, &ctl->kcontrol->id);
  734. }
  735. snd_emu10k1_gpr_ctl_put(ctl->kcontrol, val);
  736. }
  737. __error:
  738. kfree(nctl);
  739. kfree(gctl);
  740. kfree(val);
  741. return err;
  742. }
  743. static int snd_emu10k1_del_controls(struct snd_emu10k1 *emu,
  744. struct snd_emu10k1_fx8010_code *icode)
  745. {
  746. unsigned int i;
  747. struct snd_ctl_elem_id id;
  748. struct snd_ctl_elem_id __user *_id;
  749. struct snd_emu10k1_fx8010_ctl *ctl;
  750. struct snd_card *card = emu->card;
  751. for (i = 0, _id = icode->gpr_del_controls;
  752. i < icode->gpr_del_control_count; i++, _id++) {
  753. if (copy_from_user(&id, _id, sizeof(id)))
  754. return -EFAULT;
  755. down_write(&card->controls_rwsem);
  756. ctl = snd_emu10k1_look_for_ctl(emu, &id);
  757. if (ctl)
  758. snd_ctl_remove(card, ctl->kcontrol);
  759. up_write(&card->controls_rwsem);
  760. }
  761. return 0;
  762. }
  763. static int snd_emu10k1_list_controls(struct snd_emu10k1 *emu,
  764. struct snd_emu10k1_fx8010_code *icode)
  765. {
  766. unsigned int i = 0, j;
  767. unsigned int total = 0;
  768. struct snd_emu10k1_fx8010_control_gpr *gctl;
  769. struct snd_emu10k1_fx8010_control_gpr __user *_gctl;
  770. struct snd_emu10k1_fx8010_ctl *ctl;
  771. struct snd_ctl_elem_id *id;
  772. struct list_head *list;
  773. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  774. if (! gctl)
  775. return -ENOMEM;
  776. _gctl = icode->gpr_list_controls;
  777. list_for_each(list, &emu->fx8010.gpr_ctl) {
  778. ctl = emu10k1_gpr_ctl(list);
  779. total++;
  780. if (_gctl && i < icode->gpr_list_control_count) {
  781. memset(gctl, 0, sizeof(*gctl));
  782. id = &ctl->kcontrol->id;
  783. gctl->id.iface = id->iface;
  784. strlcpy(gctl->id.name, id->name, sizeof(gctl->id.name));
  785. gctl->id.index = id->index;
  786. gctl->id.device = id->device;
  787. gctl->id.subdevice = id->subdevice;
  788. gctl->vcount = ctl->vcount;
  789. gctl->count = ctl->count;
  790. for (j = 0; j < 32; j++) {
  791. gctl->gpr[j] = ctl->gpr[j];
  792. gctl->value[j] = ctl->value[j];
  793. }
  794. gctl->min = ctl->min;
  795. gctl->max = ctl->max;
  796. gctl->translation = ctl->translation;
  797. if (copy_to_user(_gctl, gctl, sizeof(*gctl))) {
  798. kfree(gctl);
  799. return -EFAULT;
  800. }
  801. _gctl++;
  802. i++;
  803. }
  804. }
  805. icode->gpr_list_control_total = total;
  806. kfree(gctl);
  807. return 0;
  808. }
  809. static int snd_emu10k1_icode_poke(struct snd_emu10k1 *emu,
  810. struct snd_emu10k1_fx8010_code *icode)
  811. {
  812. int err = 0;
  813. down(&emu->fx8010.lock);
  814. if ((err = snd_emu10k1_verify_controls(emu, icode)) < 0)
  815. goto __error;
  816. strlcpy(emu->fx8010.name, icode->name, sizeof(emu->fx8010.name));
  817. /* stop FX processor - this may be dangerous, but it's better to miss
  818. some samples than generate wrong ones - [jk] */
  819. if (emu->audigy)
  820. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP);
  821. else
  822. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP);
  823. /* ok, do the main job */
  824. if ((err = snd_emu10k1_del_controls(emu, icode)) < 0 ||
  825. (err = snd_emu10k1_gpr_poke(emu, icode)) < 0 ||
  826. (err = snd_emu10k1_tram_poke(emu, icode)) < 0 ||
  827. (err = snd_emu10k1_code_poke(emu, icode)) < 0 ||
  828. (err = snd_emu10k1_add_controls(emu, icode)) < 0)
  829. goto __error;
  830. /* start FX processor when the DSP code is updated */
  831. if (emu->audigy)
  832. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  833. else
  834. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  835. __error:
  836. up(&emu->fx8010.lock);
  837. return err;
  838. }
  839. static int snd_emu10k1_icode_peek(struct snd_emu10k1 *emu,
  840. struct snd_emu10k1_fx8010_code *icode)
  841. {
  842. int err;
  843. down(&emu->fx8010.lock);
  844. strlcpy(icode->name, emu->fx8010.name, sizeof(icode->name));
  845. /* ok, do the main job */
  846. err = snd_emu10k1_gpr_peek(emu, icode);
  847. if (err >= 0)
  848. err = snd_emu10k1_tram_peek(emu, icode);
  849. if (err >= 0)
  850. err = snd_emu10k1_code_peek(emu, icode);
  851. if (err >= 0)
  852. err = snd_emu10k1_list_controls(emu, icode);
  853. up(&emu->fx8010.lock);
  854. return err;
  855. }
  856. static int snd_emu10k1_ipcm_poke(struct snd_emu10k1 *emu,
  857. struct snd_emu10k1_fx8010_pcm_rec *ipcm)
  858. {
  859. unsigned int i;
  860. int err = 0;
  861. struct snd_emu10k1_fx8010_pcm *pcm;
  862. if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT)
  863. return -EINVAL;
  864. if (ipcm->channels > 32)
  865. return -EINVAL;
  866. pcm = &emu->fx8010.pcm[ipcm->substream];
  867. down(&emu->fx8010.lock);
  868. spin_lock_irq(&emu->reg_lock);
  869. if (pcm->opened) {
  870. err = -EBUSY;
  871. goto __error;
  872. }
  873. if (ipcm->channels == 0) { /* remove */
  874. pcm->valid = 0;
  875. } else {
  876. /* FIXME: we need to add universal code to the PCM transfer routine */
  877. if (ipcm->channels != 2) {
  878. err = -EINVAL;
  879. goto __error;
  880. }
  881. pcm->valid = 1;
  882. pcm->opened = 0;
  883. pcm->channels = ipcm->channels;
  884. pcm->tram_start = ipcm->tram_start;
  885. pcm->buffer_size = ipcm->buffer_size;
  886. pcm->gpr_size = ipcm->gpr_size;
  887. pcm->gpr_count = ipcm->gpr_count;
  888. pcm->gpr_tmpcount = ipcm->gpr_tmpcount;
  889. pcm->gpr_ptr = ipcm->gpr_ptr;
  890. pcm->gpr_trigger = ipcm->gpr_trigger;
  891. pcm->gpr_running = ipcm->gpr_running;
  892. for (i = 0; i < pcm->channels; i++)
  893. pcm->etram[i] = ipcm->etram[i];
  894. }
  895. __error:
  896. spin_unlock_irq(&emu->reg_lock);
  897. up(&emu->fx8010.lock);
  898. return err;
  899. }
  900. static int snd_emu10k1_ipcm_peek(struct snd_emu10k1 *emu,
  901. struct snd_emu10k1_fx8010_pcm_rec *ipcm)
  902. {
  903. unsigned int i;
  904. int err = 0;
  905. struct snd_emu10k1_fx8010_pcm *pcm;
  906. if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT)
  907. return -EINVAL;
  908. pcm = &emu->fx8010.pcm[ipcm->substream];
  909. down(&emu->fx8010.lock);
  910. spin_lock_irq(&emu->reg_lock);
  911. ipcm->channels = pcm->channels;
  912. ipcm->tram_start = pcm->tram_start;
  913. ipcm->buffer_size = pcm->buffer_size;
  914. ipcm->gpr_size = pcm->gpr_size;
  915. ipcm->gpr_ptr = pcm->gpr_ptr;
  916. ipcm->gpr_count = pcm->gpr_count;
  917. ipcm->gpr_tmpcount = pcm->gpr_tmpcount;
  918. ipcm->gpr_trigger = pcm->gpr_trigger;
  919. ipcm->gpr_running = pcm->gpr_running;
  920. for (i = 0; i < pcm->channels; i++)
  921. ipcm->etram[i] = pcm->etram[i];
  922. ipcm->res1 = ipcm->res2 = 0;
  923. ipcm->pad = 0;
  924. spin_unlock_irq(&emu->reg_lock);
  925. up(&emu->fx8010.lock);
  926. return err;
  927. }
  928. #define SND_EMU10K1_GPR_CONTROLS 44
  929. #define SND_EMU10K1_INPUTS 12
  930. #define SND_EMU10K1_PLAYBACK_CHANNELS 8
  931. #define SND_EMU10K1_CAPTURE_CHANNELS 4
  932. static void __devinit
  933. snd_emu10k1_init_mono_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  934. const char *name, int gpr, int defval)
  935. {
  936. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  937. strcpy(ctl->id.name, name);
  938. ctl->vcount = ctl->count = 1;
  939. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  940. ctl->min = 0;
  941. ctl->max = 100;
  942. ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100;
  943. }
  944. static void __devinit
  945. snd_emu10k1_init_stereo_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  946. const char *name, int gpr, int defval)
  947. {
  948. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  949. strcpy(ctl->id.name, name);
  950. ctl->vcount = ctl->count = 2;
  951. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  952. ctl->gpr[1] = gpr + 1; ctl->value[1] = defval;
  953. ctl->min = 0;
  954. ctl->max = 100;
  955. ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100;
  956. }
  957. static void __devinit
  958. snd_emu10k1_init_mono_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  959. const char *name, int gpr, int defval)
  960. {
  961. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  962. strcpy(ctl->id.name, name);
  963. ctl->vcount = ctl->count = 1;
  964. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  965. ctl->min = 0;
  966. ctl->max = 1;
  967. ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
  968. }
  969. static void __devinit
  970. snd_emu10k1_init_stereo_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  971. const char *name, int gpr, int defval)
  972. {
  973. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  974. strcpy(ctl->id.name, name);
  975. ctl->vcount = ctl->count = 2;
  976. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  977. ctl->gpr[1] = gpr + 1; ctl->value[1] = defval;
  978. ctl->min = 0;
  979. ctl->max = 1;
  980. ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
  981. }
  982. /*
  983. * initial DSP configuration for Audigy
  984. */
  985. static int __devinit _snd_emu10k1_audigy_init_efx(struct snd_emu10k1 *emu)
  986. {
  987. int err, i, z, gpr, nctl;
  988. const int playback = 10;
  989. const int capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2); /* we reserve 10 voices */
  990. const int stereo_mix = capture + 2;
  991. const int tmp = 0x88;
  992. u32 ptr;
  993. struct snd_emu10k1_fx8010_code *icode = NULL;
  994. struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl;
  995. u32 *gpr_map;
  996. mm_segment_t seg;
  997. if ((icode = kzalloc(sizeof(*icode), GFP_KERNEL)) == NULL ||
  998. (icode->gpr_map = (u_int32_t __user *)
  999. kcalloc(512 + 256 + 256 + 2 * 1024, sizeof(u_int32_t),
  1000. GFP_KERNEL)) == NULL ||
  1001. (controls = kcalloc(SND_EMU10K1_GPR_CONTROLS,
  1002. sizeof(*controls), GFP_KERNEL)) == NULL) {
  1003. err = -ENOMEM;
  1004. goto __err;
  1005. }
  1006. gpr_map = (u32 __force *)icode->gpr_map;
  1007. icode->tram_data_map = icode->gpr_map + 512;
  1008. icode->tram_addr_map = icode->tram_data_map + 256;
  1009. icode->code = icode->tram_addr_map + 256;
  1010. /* clear free GPRs */
  1011. for (i = 0; i < 512; i++)
  1012. set_bit(i, icode->gpr_valid);
  1013. /* clear TRAM data & address lines */
  1014. for (i = 0; i < 256; i++)
  1015. set_bit(i, icode->tram_valid);
  1016. strcpy(icode->name, "Audigy DSP code for ALSA");
  1017. ptr = 0;
  1018. nctl = 0;
  1019. gpr = stereo_mix + 10;
  1020. /* stop FX processor */
  1021. snd_emu10k1_ptr_write(emu, A_DBG, 0, (emu->fx8010.dbg = 0) | A_DBG_SINGLE_STEP);
  1022. #if 0
  1023. /* FIX: jcd test */
  1024. for (z = 0; z < 80; z=z+2) {
  1025. A_OP(icode, &ptr, iACC3, A_EXTOUT(z), A_FXBUS(FXBUS_PCM_LEFT_FRONT), A_C_00000000, A_C_00000000); /* left */
  1026. A_OP(icode, &ptr, iACC3, A_EXTOUT(z+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT), A_C_00000000, A_C_00000000); /* right */
  1027. }
  1028. #endif /* jcd test */
  1029. #if 1
  1030. /* PCM front Playback Volume (independent from stereo mix) */
  1031. A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_FRONT));
  1032. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT));
  1033. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Front Playback Volume", gpr, 100);
  1034. gpr += 2;
  1035. /* PCM Surround Playback (independent from stereo mix) */
  1036. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_REAR));
  1037. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_REAR));
  1038. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Surround Playback Volume", gpr, 100);
  1039. gpr += 2;
  1040. /* PCM Side Playback (independent from stereo mix) */
  1041. if (emu->card_capabilities->spk71) {
  1042. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_SIDE));
  1043. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_SIDE));
  1044. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Side Playback Volume", gpr, 100);
  1045. gpr += 2;
  1046. }
  1047. /* PCM Center Playback (independent from stereo mix) */
  1048. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_CENTER));
  1049. snd_emu10k1_init_mono_control(&controls[nctl++], "PCM Center Playback Volume", gpr, 100);
  1050. gpr++;
  1051. /* PCM LFE Playback (independent from stereo mix) */
  1052. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LFE));
  1053. snd_emu10k1_init_mono_control(&controls[nctl++], "PCM LFE Playback Volume", gpr, 100);
  1054. gpr++;
  1055. /*
  1056. * Stereo Mix
  1057. */
  1058. /* Wave (PCM) Playback Volume (will be renamed later) */
  1059. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
  1060. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
  1061. snd_emu10k1_init_stereo_control(&controls[nctl++], "Wave Playback Volume", gpr, 100);
  1062. gpr += 2;
  1063. /* Synth Playback */
  1064. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+0), A_GPR(stereo_mix+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT));
  1065. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+1), A_GPR(stereo_mix+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT));
  1066. snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Playback Volume", gpr, 100);
  1067. gpr += 2;
  1068. /* Wave (PCM) Capture */
  1069. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
  1070. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
  1071. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Capture Volume", gpr, 0);
  1072. gpr += 2;
  1073. /* Synth Capture */
  1074. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT));
  1075. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT));
  1076. snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Capture Volume", gpr, 0);
  1077. gpr += 2;
  1078. /*
  1079. * inputs
  1080. */
  1081. #define A_ADD_VOLUME_IN(var,vol,input) \
  1082. A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
  1083. /* AC'97 Playback Volume - used only for mic (renamed later) */
  1084. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AC97_L);
  1085. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AC97_R);
  1086. snd_emu10k1_init_stereo_control(&controls[nctl++], "AMic Playback Volume", gpr, 0);
  1087. gpr += 2;
  1088. /* AC'97 Capture Volume - used only for mic */
  1089. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AC97_L);
  1090. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AC97_R);
  1091. snd_emu10k1_init_stereo_control(&controls[nctl++], "Mic Capture Volume", gpr, 0);
  1092. gpr += 2;
  1093. /* mic capture buffer */
  1094. A_OP(icode, &ptr, iINTERP, A_EXTOUT(A_EXTOUT_MIC_CAP), A_EXTIN(A_EXTIN_AC97_L), 0xcd, A_EXTIN(A_EXTIN_AC97_R));
  1095. /* Audigy CD Playback Volume */
  1096. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_SPDIF_CD_L);
  1097. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_SPDIF_CD_R);
  1098. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1099. emu->card_capabilities->ac97_chip ? "Audigy CD Playback Volume" : "CD Playback Volume",
  1100. gpr, 0);
  1101. gpr += 2;
  1102. /* Audigy CD Capture Volume */
  1103. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_SPDIF_CD_L);
  1104. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_SPDIF_CD_R);
  1105. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1106. emu->card_capabilities->ac97_chip ? "Audigy CD Capture Volume" : "CD Capture Volume",
  1107. gpr, 0);
  1108. gpr += 2;
  1109. /* Optical SPDIF Playback Volume */
  1110. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_OPT_SPDIF_L);
  1111. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_OPT_SPDIF_R);
  1112. snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",PLAYBACK,VOLUME), gpr, 0);
  1113. gpr += 2;
  1114. /* Optical SPDIF Capture Volume */
  1115. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_OPT_SPDIF_L);
  1116. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_OPT_SPDIF_R);
  1117. snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",CAPTURE,VOLUME), gpr, 0);
  1118. gpr += 2;
  1119. /* Line2 Playback Volume */
  1120. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_LINE2_L);
  1121. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_LINE2_R);
  1122. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1123. emu->card_capabilities->ac97_chip ? "Line2 Playback Volume" : "Line Playback Volume",
  1124. gpr, 0);
  1125. gpr += 2;
  1126. /* Line2 Capture Volume */
  1127. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_LINE2_L);
  1128. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_LINE2_R);
  1129. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1130. emu->card_capabilities->ac97_chip ? "Line2 Capture Volume" : "Line Capture Volume",
  1131. gpr, 0);
  1132. gpr += 2;
  1133. /* Philips ADC Playback Volume */
  1134. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_ADC_L);
  1135. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_ADC_R);
  1136. snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Playback Volume", gpr, 0);
  1137. gpr += 2;
  1138. /* Philips ADC Capture Volume */
  1139. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_ADC_L);
  1140. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_ADC_R);
  1141. snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Capture Volume", gpr, 0);
  1142. gpr += 2;
  1143. /* Aux2 Playback Volume */
  1144. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AUX2_L);
  1145. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AUX2_R);
  1146. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1147. emu->card_capabilities->ac97_chip ? "Aux2 Playback Volume" : "Aux Playback Volume",
  1148. gpr, 0);
  1149. gpr += 2;
  1150. /* Aux2 Capture Volume */
  1151. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AUX2_L);
  1152. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AUX2_R);
  1153. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1154. emu->card_capabilities->ac97_chip ? "Aux2 Capture Volume" : "Aux Capture Volume",
  1155. gpr, 0);
  1156. gpr += 2;
  1157. /* Stereo Mix Front Playback Volume */
  1158. A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_GPR(playback), A_GPR(gpr), A_GPR(stereo_mix));
  1159. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_GPR(playback+1), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1160. snd_emu10k1_init_stereo_control(&controls[nctl++], "Front Playback Volume", gpr, 100);
  1161. gpr += 2;
  1162. /* Stereo Mix Surround Playback */
  1163. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2), A_GPR(playback+2), A_GPR(gpr), A_GPR(stereo_mix));
  1164. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3), A_GPR(playback+3), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1165. snd_emu10k1_init_stereo_control(&controls[nctl++], "Surround Playback Volume", gpr, 0);
  1166. gpr += 2;
  1167. /* Stereo Mix Center Playback */
  1168. /* Center = sub = Left/2 + Right/2 */
  1169. A_OP(icode, &ptr, iINTERP, A_GPR(tmp), A_GPR(stereo_mix), 0xcd, A_GPR(stereo_mix+1));
  1170. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_GPR(playback+4), A_GPR(gpr), A_GPR(tmp));
  1171. snd_emu10k1_init_mono_control(&controls[nctl++], "Center Playback Volume", gpr, 0);
  1172. gpr++;
  1173. /* Stereo Mix LFE Playback */
  1174. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5), A_GPR(playback+5), A_GPR(gpr), A_GPR(tmp));
  1175. snd_emu10k1_init_mono_control(&controls[nctl++], "LFE Playback Volume", gpr, 0);
  1176. gpr++;
  1177. if (emu->card_capabilities->spk71) {
  1178. /* Stereo Mix Side Playback */
  1179. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6), A_GPR(playback+6), A_GPR(gpr), A_GPR(stereo_mix));
  1180. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7), A_GPR(playback+7), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1181. snd_emu10k1_init_stereo_control(&controls[nctl++], "Side Playback Volume", gpr, 0);
  1182. gpr += 2;
  1183. }
  1184. /*
  1185. * outputs
  1186. */
  1187. #define A_PUT_OUTPUT(out,src) A_OP(icode, &ptr, iACC3, A_EXTOUT(out), A_C_00000000, A_C_00000000, A_GPR(src))
  1188. #define A_PUT_STEREO_OUTPUT(out1,out2,src) \
  1189. {A_PUT_OUTPUT(out1,src); A_PUT_OUTPUT(out2,src+1);}
  1190. #define _A_SWITCH(icode, ptr, dst, src, sw) \
  1191. A_OP((icode), ptr, iMACINT0, dst, A_C_00000000, src, sw);
  1192. #define A_SWITCH(icode, ptr, dst, src, sw) \
  1193. _A_SWITCH(icode, ptr, A_GPR(dst), A_GPR(src), A_GPR(sw))
  1194. #define _A_SWITCH_NEG(icode, ptr, dst, src) \
  1195. A_OP((icode), ptr, iANDXOR, dst, src, A_C_00000001, A_C_00000001);
  1196. #define A_SWITCH_NEG(icode, ptr, dst, src) \
  1197. _A_SWITCH_NEG(icode, ptr, A_GPR(dst), A_GPR(src))
  1198. /*
  1199. * Process tone control
  1200. */
  1201. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), A_GPR(playback + 0), A_C_00000000, A_C_00000000); /* left */
  1202. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), A_GPR(playback + 1), A_C_00000000, A_C_00000000); /* right */
  1203. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), A_GPR(playback + 2), A_C_00000000, A_C_00000000); /* rear left */
  1204. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), A_GPR(playback + 3), A_C_00000000, A_C_00000000); /* rear right */
  1205. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), A_GPR(playback + 4), A_C_00000000, A_C_00000000); /* center */
  1206. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), A_GPR(playback + 5), A_C_00000000, A_C_00000000); /* LFE */
  1207. if (emu->card_capabilities->spk71) {
  1208. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 6), A_GPR(playback + 6), A_C_00000000, A_C_00000000); /* side left */
  1209. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 7), A_GPR(playback + 7), A_C_00000000, A_C_00000000); /* side right */
  1210. }
  1211. ctl = &controls[nctl + 0];
  1212. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1213. strcpy(ctl->id.name, "Tone Control - Bass");
  1214. ctl->vcount = 2;
  1215. ctl->count = 10;
  1216. ctl->min = 0;
  1217. ctl->max = 40;
  1218. ctl->value[0] = ctl->value[1] = 20;
  1219. ctl->translation = EMU10K1_GPR_TRANSLATION_BASS;
  1220. ctl = &controls[nctl + 1];
  1221. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1222. strcpy(ctl->id.name, "Tone Control - Treble");
  1223. ctl->vcount = 2;
  1224. ctl->count = 10;
  1225. ctl->min = 0;
  1226. ctl->max = 40;
  1227. ctl->value[0] = ctl->value[1] = 20;
  1228. ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE;
  1229. #define BASS_GPR 0x8c
  1230. #define TREBLE_GPR 0x96
  1231. for (z = 0; z < 5; z++) {
  1232. int j;
  1233. for (j = 0; j < 2; j++) {
  1234. controls[nctl + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j;
  1235. controls[nctl + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j;
  1236. }
  1237. }
  1238. for (z = 0; z < 4; z++) { /* front/rear/center-lfe/side */
  1239. int j, k, l, d;
  1240. for (j = 0; j < 2; j++) { /* left/right */
  1241. k = 0xb0 + (z * 8) + (j * 4);
  1242. l = 0xe0 + (z * 8) + (j * 4);
  1243. d = playback + SND_EMU10K1_PLAYBACK_CHANNELS + z * 2 + j;
  1244. A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(d), A_GPR(BASS_GPR + 0 + j));
  1245. A_OP(icode, &ptr, iMACMV, A_GPR(k+1), A_GPR(k), A_GPR(k+1), A_GPR(BASS_GPR + 4 + j));
  1246. A_OP(icode, &ptr, iMACMV, A_GPR(k), A_GPR(d), A_GPR(k), A_GPR(BASS_GPR + 2 + j));
  1247. A_OP(icode, &ptr, iMACMV, A_GPR(k+3), A_GPR(k+2), A_GPR(k+3), A_GPR(BASS_GPR + 8 + j));
  1248. A_OP(icode, &ptr, iMAC0, A_GPR(k+2), A_GPR_ACCU, A_GPR(k+2), A_GPR(BASS_GPR + 6 + j));
  1249. A_OP(icode, &ptr, iACC3, A_GPR(k+2), A_GPR(k+2), A_GPR(k+2), A_C_00000000);
  1250. A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(k+2), A_GPR(TREBLE_GPR + 0 + j));
  1251. A_OP(icode, &ptr, iMACMV, A_GPR(l+1), A_GPR(l), A_GPR(l+1), A_GPR(TREBLE_GPR + 4 + j));
  1252. A_OP(icode, &ptr, iMACMV, A_GPR(l), A_GPR(k+2), A_GPR(l), A_GPR(TREBLE_GPR + 2 + j));
  1253. A_OP(icode, &ptr, iMACMV, A_GPR(l+3), A_GPR(l+2), A_GPR(l+3), A_GPR(TREBLE_GPR + 8 + j));
  1254. A_OP(icode, &ptr, iMAC0, A_GPR(l+2), A_GPR_ACCU, A_GPR(l+2), A_GPR(TREBLE_GPR + 6 + j));
  1255. A_OP(icode, &ptr, iMACINT0, A_GPR(l+2), A_C_00000000, A_GPR(l+2), A_C_00000010);
  1256. A_OP(icode, &ptr, iACC3, A_GPR(d), A_GPR(l+2), A_C_00000000, A_C_00000000);
  1257. if (z == 2) /* center */
  1258. break;
  1259. }
  1260. }
  1261. nctl += 2;
  1262. #undef BASS_GPR
  1263. #undef TREBLE_GPR
  1264. for (z = 0; z < 8; z++) {
  1265. A_SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, gpr + 0);
  1266. A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 0);
  1267. A_SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
  1268. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1269. }
  1270. snd_emu10k1_init_stereo_onoff_control(controls + nctl++, "Tone Control - Switch", gpr, 0);
  1271. gpr += 2;
  1272. /* Master volume (will be renamed later) */
  1273. A_OP(icode, &ptr, iMAC0, A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS));
  1274. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS));
  1275. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS));
  1276. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS));
  1277. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS));
  1278. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS));
  1279. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS));
  1280. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS));
  1281. snd_emu10k1_init_mono_control(&controls[nctl++], "Wave Master Playback Volume", gpr, 0);
  1282. gpr += 2;
  1283. /* analog speakers */
  1284. A_PUT_STEREO_OUTPUT(A_EXTOUT_AFRONT_L, A_EXTOUT_AFRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1285. A_PUT_STEREO_OUTPUT(A_EXTOUT_AREAR_L, A_EXTOUT_AREAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1286. A_PUT_OUTPUT(A_EXTOUT_ACENTER, playback+4 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1287. A_PUT_OUTPUT(A_EXTOUT_ALFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1288. if (emu->card_capabilities->spk71)
  1289. A_PUT_STEREO_OUTPUT(A_EXTOUT_ASIDE_L, A_EXTOUT_ASIDE_R, playback+6 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1290. /* headphone */
  1291. A_PUT_STEREO_OUTPUT(A_EXTOUT_HEADPHONE_L, A_EXTOUT_HEADPHONE_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1292. /* digital outputs */
  1293. /* A_PUT_STEREO_OUTPUT(A_EXTOUT_FRONT_L, A_EXTOUT_FRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS); */
  1294. /* IEC958 Optical Raw Playback Switch */
  1295. gpr_map[gpr++] = 0;
  1296. gpr_map[gpr++] = 0x1008;
  1297. gpr_map[gpr++] = 0xffff0000;
  1298. for (z = 0; z < 2; z++) {
  1299. A_OP(icode, &ptr, iMAC0, A_GPR(tmp + 2), A_FXBUS(FXBUS_PT_LEFT + z), A_C_00000000, A_C_00000000);
  1300. A_OP(icode, &ptr, iSKIP, A_GPR_COND, A_GPR_COND, A_GPR(gpr - 2), A_C_00000001);
  1301. A_OP(icode, &ptr, iACC3, A_GPR(tmp + 2), A_C_00000000, A_C_00010000, A_GPR(tmp + 2));
  1302. A_OP(icode, &ptr, iANDXOR, A_GPR(tmp + 2), A_GPR(tmp + 2), A_GPR(gpr - 1), A_C_00000000);
  1303. A_SWITCH(icode, &ptr, tmp + 0, tmp + 2, gpr + z);
  1304. A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z);
  1305. A_SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  1306. if ((z==1) && (emu->card_capabilities->spdif_bug)) {
  1307. /* Due to a SPDIF output bug on some Audigy cards, this code delays the Right channel by 1 sample */
  1308. snd_printk(KERN_INFO "Installing spdif_bug patch: %s\n", emu->card_capabilities->name);
  1309. A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(gpr - 3), A_C_00000000, A_C_00000000);
  1310. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 3), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1311. } else {
  1312. A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1313. }
  1314. }
  1315. snd_emu10k1_init_stereo_onoff_control(controls + nctl++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0);
  1316. gpr += 2;
  1317. A_PUT_STEREO_OUTPUT(A_EXTOUT_REAR_L, A_EXTOUT_REAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1318. A_PUT_OUTPUT(A_EXTOUT_CENTER, playback+4 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1319. A_PUT_OUTPUT(A_EXTOUT_LFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1320. /* ADC buffer */
  1321. #ifdef EMU10K1_CAPTURE_DIGITAL_OUT
  1322. A_PUT_STEREO_OUTPUT(A_EXTOUT_ADC_CAP_L, A_EXTOUT_ADC_CAP_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1323. #else
  1324. A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_L, capture);
  1325. A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_R, capture+1);
  1326. #endif
  1327. /* EFX capture - capture the 16 EXTINs */
  1328. for (z = 0; z < 16; z++) {
  1329. A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_EXTIN(z));
  1330. }
  1331. #endif /* JCD test */
  1332. /*
  1333. * ok, set up done..
  1334. */
  1335. if (gpr > tmp) {
  1336. snd_BUG();
  1337. err = -EIO;
  1338. goto __err;
  1339. }
  1340. /* clear remaining instruction memory */
  1341. while (ptr < 0x400)
  1342. A_OP(icode, &ptr, 0x0f, 0xc0, 0xc0, 0xcf, 0xc0);
  1343. seg = snd_enter_user();
  1344. icode->gpr_add_control_count = nctl;
  1345. icode->gpr_add_controls = (struct snd_emu10k1_fx8010_control_gpr __user *)controls;
  1346. err = snd_emu10k1_icode_poke(emu, icode);
  1347. snd_leave_user(seg);
  1348. __err:
  1349. kfree(controls);
  1350. if (icode != NULL) {
  1351. kfree((void __force *)icode->gpr_map);
  1352. kfree(icode);
  1353. }
  1354. return err;
  1355. }
  1356. /*
  1357. * initial DSP configuration for Emu10k1
  1358. */
  1359. /* when volume = max, then copy only to avoid volume modification */
  1360. /* with iMAC0 (negative values) */
  1361. static void __devinit _volume(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1362. {
  1363. OP(icode, ptr, iMAC0, dst, C_00000000, src, vol);
  1364. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1365. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000001);
  1366. OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000);
  1367. }
  1368. static void __devinit _volume_add(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1369. {
  1370. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1371. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1372. OP(icode, ptr, iMACINT0, dst, dst, src, C_00000001);
  1373. OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001);
  1374. OP(icode, ptr, iMAC0, dst, dst, src, vol);
  1375. }
  1376. static void __devinit _volume_out(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1377. {
  1378. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1379. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1380. OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000);
  1381. OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001);
  1382. OP(icode, ptr, iMAC0, dst, C_00000000, src, vol);
  1383. }
  1384. #define VOLUME(icode, ptr, dst, src, vol) \
  1385. _volume(icode, ptr, GPR(dst), GPR(src), GPR(vol))
  1386. #define VOLUME_IN(icode, ptr, dst, src, vol) \
  1387. _volume(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
  1388. #define VOLUME_ADD(icode, ptr, dst, src, vol) \
  1389. _volume_add(icode, ptr, GPR(dst), GPR(src), GPR(vol))
  1390. #define VOLUME_ADDIN(icode, ptr, dst, src, vol) \
  1391. _volume_add(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
  1392. #define VOLUME_OUT(icode, ptr, dst, src, vol) \
  1393. _volume_out(icode, ptr, EXTOUT(dst), GPR(src), GPR(vol))
  1394. #define _SWITCH(icode, ptr, dst, src, sw) \
  1395. OP((icode), ptr, iMACINT0, dst, C_00000000, src, sw);
  1396. #define SWITCH(icode, ptr, dst, src, sw) \
  1397. _SWITCH(icode, ptr, GPR(dst), GPR(src), GPR(sw))
  1398. #define SWITCH_IN(icode, ptr, dst, src, sw) \
  1399. _SWITCH(icode, ptr, GPR(dst), EXTIN(src), GPR(sw))
  1400. #define _SWITCH_NEG(icode, ptr, dst, src) \
  1401. OP((icode), ptr, iANDXOR, dst, src, C_00000001, C_00000001);
  1402. #define SWITCH_NEG(icode, ptr, dst, src) \
  1403. _SWITCH_NEG(icode, ptr, GPR(dst), GPR(src))
  1404. static int __devinit _snd_emu10k1_init_efx(struct snd_emu10k1 *emu)
  1405. {
  1406. int err, i, z, gpr, tmp, playback, capture;
  1407. u32 ptr;
  1408. struct snd_emu10k1_fx8010_code *icode;
  1409. struct snd_emu10k1_fx8010_pcm_rec *ipcm = NULL;
  1410. struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl;
  1411. u32 *gpr_map;
  1412. mm_segment_t seg;
  1413. if ((icode = kzalloc(sizeof(*icode), GFP_KERNEL)) == NULL)
  1414. return -ENOMEM;
  1415. if ((icode->gpr_map = (u_int32_t __user *)
  1416. kcalloc(256 + 160 + 160 + 2 * 512, sizeof(u_int32_t),
  1417. GFP_KERNEL)) == NULL ||
  1418. (controls = kcalloc(SND_EMU10K1_GPR_CONTROLS,
  1419. sizeof(struct snd_emu10k1_fx8010_control_gpr),
  1420. GFP_KERNEL)) == NULL ||
  1421. (ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL)) == NULL) {
  1422. err = -ENOMEM;
  1423. goto __err;
  1424. }
  1425. gpr_map = (u32 __force *)icode->gpr_map;
  1426. icode->tram_data_map = icode->gpr_map + 256;
  1427. icode->tram_addr_map = icode->tram_data_map + 160;
  1428. icode->code = icode->tram_addr_map + 160;
  1429. /* clear free GPRs */
  1430. for (i = 0; i < 256; i++)
  1431. set_bit(i, icode->gpr_valid);
  1432. /* clear TRAM data & address lines */
  1433. for (i = 0; i < 160; i++)
  1434. set_bit(i, icode->tram_valid);
  1435. strcpy(icode->name, "SB Live! FX8010 code for ALSA v1.2 by Jaroslav Kysela");
  1436. ptr = 0; i = 0;
  1437. /* we have 12 inputs */
  1438. playback = SND_EMU10K1_INPUTS;
  1439. /* we have 6 playback channels and tone control doubles */
  1440. capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2);
  1441. gpr = capture + SND_EMU10K1_CAPTURE_CHANNELS;
  1442. tmp = 0x88; /* we need 4 temporary GPR */
  1443. /* from 0x8c to 0xff is the area for tone control */
  1444. /* stop FX processor */
  1445. snd_emu10k1_ptr_write(emu, DBG, 0, (emu->fx8010.dbg = 0) | EMU10K1_DBG_SINGLE_STEP);
  1446. /*
  1447. * Process FX Buses
  1448. */
  1449. OP(icode, &ptr, iMACINT0, GPR(0), C_00000000, FXBUS(FXBUS_PCM_LEFT), C_00000004);
  1450. OP(icode, &ptr, iMACINT0, GPR(1), C_00000000, FXBUS(FXBUS_PCM_RIGHT), C_00000004);
  1451. OP(icode, &ptr, iMACINT0, GPR(2), C_00000000, FXBUS(FXBUS_MIDI_LEFT), C_00000004);
  1452. OP(icode, &ptr, iMACINT0, GPR(3), C_00000000, FXBUS(FXBUS_MIDI_RIGHT), C_00000004);
  1453. OP(icode, &ptr, iMACINT0, GPR(4), C_00000000, FXBUS(FXBUS_PCM_LEFT_REAR), C_00000004);
  1454. OP(icode, &ptr, iMACINT0, GPR(5), C_00000000, FXBUS(FXBUS_PCM_RIGHT_REAR), C_00000004);
  1455. OP(icode, &ptr, iMACINT0, GPR(6), C_00000000, FXBUS(FXBUS_PCM_CENTER), C_00000004);
  1456. OP(icode, &ptr, iMACINT0, GPR(7), C_00000000, FXBUS(FXBUS_PCM_LFE), C_00000004);
  1457. OP(icode, &ptr, iMACINT0, GPR(8), C_00000000, C_00000000, C_00000000); /* S/PDIF left */
  1458. OP(icode, &ptr, iMACINT0, GPR(9), C_00000000, C_00000000, C_00000000); /* S/PDIF right */
  1459. OP(icode, &ptr, iMACINT0, GPR(10), C_00000000, FXBUS(FXBUS_PCM_LEFT_FRONT), C_00000004);
  1460. OP(icode, &ptr, iMACINT0, GPR(11), C_00000000, FXBUS(FXBUS_PCM_RIGHT_FRONT), C_00000004);
  1461. /* Raw S/PDIF PCM */
  1462. ipcm->substream = 0;
  1463. ipcm->channels = 2;
  1464. ipcm->tram_start = 0;
  1465. ipcm->buffer_size = (64 * 1024) / 2;
  1466. ipcm->gpr_size = gpr++;
  1467. ipcm->gpr_ptr = gpr++;
  1468. ipcm->gpr_count = gpr++;
  1469. ipcm->gpr_tmpcount = gpr++;
  1470. ipcm->gpr_trigger = gpr++;
  1471. ipcm->gpr_running = gpr++;
  1472. ipcm->etram[0] = 0;
  1473. ipcm->etram[1] = 1;
  1474. gpr_map[gpr + 0] = 0xfffff000;
  1475. gpr_map[gpr + 1] = 0xffff0000;
  1476. gpr_map[gpr + 2] = 0x70000000;
  1477. gpr_map[gpr + 3] = 0x00000007;
  1478. gpr_map[gpr + 4] = 0x001f << 11;
  1479. gpr_map[gpr + 5] = 0x001c << 11;
  1480. gpr_map[gpr + 6] = (0x22 - 0x01) - 1; /* skip at 01 to 22 */
  1481. gpr_map[gpr + 7] = (0x22 - 0x06) - 1; /* skip at 06 to 22 */
  1482. gpr_map[gpr + 8] = 0x2000000 + (2<<11);
  1483. gpr_map[gpr + 9] = 0x4000000 + (2<<11);
  1484. gpr_map[gpr + 10] = 1<<11;
  1485. gpr_map[gpr + 11] = (0x24 - 0x0a) - 1; /* skip at 0a to 24 */
  1486. gpr_map[gpr + 12] = 0;
  1487. /* if the trigger flag is not set, skip */
  1488. /* 00: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_trigger), C_00000000, C_00000000);
  1489. /* 01: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_ZERO, GPR(gpr + 6));
  1490. /* if the running flag is set, we're running */
  1491. /* 02: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_running), C_00000000, C_00000000);
  1492. /* 03: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000004);
  1493. /* wait until ((GPR_DBAC>>11) & 0x1f) == 0x1c) */
  1494. /* 04: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), GPR_DBAC, GPR(gpr + 4), C_00000000);
  1495. /* 05: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(gpr + 5));
  1496. /* 06: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 7));
  1497. /* 07: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000010, C_00000001, C_00000000);
  1498. /* 08: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000000, C_00000001);
  1499. /* 09: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), GPR(gpr + 12), C_ffffffff, C_00000000);
  1500. /* 0a: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 11));
  1501. /* 0b: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000001, C_00000000, C_00000000);
  1502. /* 0c: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[0]), GPR(gpr + 0), C_00000000);
  1503. /* 0d: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000);
  1504. /* 0e: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2));
  1505. /* 0f: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001);
  1506. /* 10: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(8), GPR(gpr + 1), GPR(gpr + 2));
  1507. /* 11: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[1]), GPR(gpr + 0), C_00000000);
  1508. /* 12: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000);
  1509. /* 13: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2));
  1510. /* 14: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001);
  1511. /* 15: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(9), GPR(gpr + 1), GPR(gpr + 2));
  1512. /* 16: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(ipcm->gpr_ptr), C_00000001, C_00000000);
  1513. /* 17: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(ipcm->gpr_size));
  1514. /* 18: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_MINUS, C_00000001);
  1515. /* 19: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), C_00000000, C_00000000, C_00000000);
  1516. /* 1a: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_ptr), GPR(tmp + 0), C_00000000, C_00000000);
  1517. /* 1b: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_tmpcount), C_ffffffff, C_00000000);
  1518. /* 1c: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1519. /* 1d: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_count), C_00000000, C_00000000);
  1520. /* 1e: */ OP(icode, &ptr, iACC3, GPR_IRQ, C_80000000, C_00000000, C_00000000);
  1521. /* 1f: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000001, C_00010000);
  1522. /* 20: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00010000, C_00000001);
  1523. /* 21: */ OP(icode, &ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000002);
  1524. /* 22: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[0]), GPR(gpr + 8), GPR_DBAC, C_ffffffff);
  1525. /* 23: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[1]), GPR(gpr + 9), GPR_DBAC, C_ffffffff);
  1526. /* 24: */
  1527. gpr += 13;
  1528. /* Wave Playback Volume */
  1529. for (z = 0; z < 2; z++)
  1530. VOLUME(icode, &ptr, playback + z, z, gpr + z);
  1531. snd_emu10k1_init_stereo_control(controls + i++, "Wave Playback Volume", gpr, 100);
  1532. gpr += 2;
  1533. /* Wave Surround Playback Volume */
  1534. for (z = 0; z < 2; z++)
  1535. VOLUME(icode, &ptr, playback + 2 + z, z, gpr + z);
  1536. snd_emu10k1_init_stereo_control(controls + i++, "Wave Surround Playback Volume", gpr, 0);
  1537. gpr += 2;
  1538. /* Wave Center/LFE Playback Volume */
  1539. OP(icode, &ptr, iACC3, GPR(tmp + 0), FXBUS(FXBUS_PCM_LEFT), FXBUS(FXBUS_PCM_RIGHT), C_00000000);
  1540. OP(icode, &ptr, iMACINT0, GPR(tmp + 0), C_00000000, GPR(tmp + 0), C_00000002);
  1541. VOLUME(icode, &ptr, playback + 4, tmp + 0, gpr);
  1542. snd_emu10k1_init_mono_control(controls + i++, "Wave Center Playback Volume", gpr++, 0);
  1543. VOLUME(icode, &ptr, playback + 5, tmp + 0, gpr);
  1544. snd_emu10k1_init_mono_control(controls + i++, "Wave LFE Playback Volume", gpr++, 0);
  1545. /* Wave Capture Volume + Switch */
  1546. for (z = 0; z < 2; z++) {
  1547. SWITCH(icode, &ptr, tmp + 0, z, gpr + 2 + z);
  1548. VOLUME(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1549. }
  1550. snd_emu10k1_init_stereo_control(controls + i++, "Wave Capture Volume", gpr, 0);
  1551. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Wave Capture Switch", gpr + 2, 0);
  1552. gpr += 4;
  1553. /* Synth Playback Volume */
  1554. for (z = 0; z < 2; z++)
  1555. VOLUME_ADD(icode, &ptr, playback + z, 2 + z, gpr + z);
  1556. snd_emu10k1_init_stereo_control(controls + i++, "Synth Playback Volume", gpr, 100);
  1557. gpr += 2;
  1558. /* Synth Capture Volume + Switch */
  1559. for (z = 0; z < 2; z++) {
  1560. SWITCH(icode, &ptr, tmp + 0, 2 + z, gpr + 2 + z);
  1561. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1562. }
  1563. snd_emu10k1_init_stereo_control(controls + i++, "Synth Capture Volume", gpr, 0);
  1564. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Synth Capture Switch", gpr + 2, 0);
  1565. gpr += 4;
  1566. /* Surround Digital Playback Volume (renamed later without Digital) */
  1567. for (z = 0; z < 2; z++)
  1568. VOLUME_ADD(icode, &ptr, playback + 2 + z, 4 + z, gpr + z);
  1569. snd_emu10k1_init_stereo_control(controls + i++, "Surround Digital Playback Volume", gpr, 100);
  1570. gpr += 2;
  1571. /* Surround Capture Volume + Switch */
  1572. for (z = 0; z < 2; z++) {
  1573. SWITCH(icode, &ptr, tmp + 0, 4 + z, gpr + 2 + z);
  1574. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1575. }
  1576. snd_emu10k1_init_stereo_control(controls + i++, "Surround Capture Volume", gpr, 0);
  1577. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Surround Capture Switch", gpr + 2, 0);
  1578. gpr += 4;
  1579. /* Center Playback Volume (renamed later without Digital) */
  1580. VOLUME_ADD(icode, &ptr, playback + 4, 6, gpr);
  1581. snd_emu10k1_init_mono_control(controls + i++, "Center Digital Playback Volume", gpr++, 100);
  1582. /* LFE Playback Volume + Switch (renamed later without Digital) */
  1583. VOLUME_ADD(icode, &ptr, playback + 5, 7, gpr);
  1584. snd_emu10k1_init_mono_control(controls + i++, "LFE Digital Playback Volume", gpr++, 100);
  1585. /* Front Playback Volume */
  1586. for (z = 0; z < 2; z++)
  1587. VOLUME_ADD(icode, &ptr, playback + z, 10 + z, gpr + z);
  1588. snd_emu10k1_init_stereo_control(controls + i++, "Front Playback Volume", gpr, 100);
  1589. gpr += 2;
  1590. /* Front Capture Volume + Switch */
  1591. for (z = 0; z < 2; z++) {
  1592. SWITCH(icode, &ptr, tmp + 0, 10 + z, gpr + 2);
  1593. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1594. }
  1595. snd_emu10k1_init_stereo_control(controls + i++, "Front Capture Volume", gpr, 0);
  1596. snd_emu10k1_init_mono_onoff_control(controls + i++, "Front Capture Switch", gpr + 2, 0);
  1597. gpr += 3;
  1598. /*
  1599. * Process inputs
  1600. */
  1601. if (emu->fx8010.extin_mask & ((1<<EXTIN_AC97_L)|(1<<EXTIN_AC97_R))) {
  1602. /* AC'97 Playback Volume */
  1603. VOLUME_ADDIN(icode, &ptr, playback + 0, EXTIN_AC97_L, gpr); gpr++;
  1604. VOLUME_ADDIN(icode, &ptr, playback + 1, EXTIN_AC97_R, gpr); gpr++;
  1605. snd_emu10k1_init_stereo_control(controls + i++, "AC97 Playback Volume", gpr-2, 0);
  1606. /* AC'97 Capture Volume */
  1607. VOLUME_ADDIN(icode, &ptr, capture + 0, EXTIN_AC97_L, gpr); gpr++;
  1608. VOLUME_ADDIN(icode, &ptr, capture + 1, EXTIN_AC97_R, gpr); gpr++;
  1609. snd_emu10k1_init_stereo_control(controls + i++, "AC97 Capture Volume", gpr-2, 100);
  1610. }
  1611. if (emu->fx8010.extin_mask & ((1<<EXTIN_SPDIF_CD_L)|(1<<EXTIN_SPDIF_CD_R))) {
  1612. /* IEC958 TTL Playback Volume */
  1613. for (z = 0; z < 2; z++)
  1614. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_SPDIF_CD_L + z, gpr + z);
  1615. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",PLAYBACK,VOLUME), gpr, 0);
  1616. gpr += 2;
  1617. /* IEC958 TTL Capture Volume + Switch */
  1618. for (z = 0; z < 2; z++) {
  1619. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_SPDIF_CD_L + z, gpr + 2 + z);
  1620. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1621. }
  1622. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,VOLUME), gpr, 0);
  1623. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,SWITCH), gpr + 2, 0);
  1624. gpr += 4;
  1625. }
  1626. if (emu->fx8010.extin_mask & ((1<<EXTIN_ZOOM_L)|(1<<EXTIN_ZOOM_R))) {
  1627. /* Zoom Video Playback Volume */
  1628. for (z = 0; z < 2; z++)
  1629. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_ZOOM_L + z, gpr + z);
  1630. snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Playback Volume", gpr, 0);
  1631. gpr += 2;
  1632. /* Zoom Video Capture Volume + Switch */
  1633. for (z = 0; z < 2; z++) {
  1634. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_ZOOM_L + z, gpr + 2 + z);
  1635. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1636. }
  1637. snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Capture Volume", gpr, 0);
  1638. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Zoom Video Capture Switch", gpr + 2, 0);
  1639. gpr += 4;
  1640. }
  1641. if (emu->fx8010.extin_mask & ((1<<EXTIN_TOSLINK_L)|(1<<EXTIN_TOSLINK_R))) {
  1642. /* IEC958 Optical Playback Volume */
  1643. for (z = 0; z < 2; z++)
  1644. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_TOSLINK_L + z, gpr + z);
  1645. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",PLAYBACK,VOLUME), gpr, 0);
  1646. gpr += 2;
  1647. /* IEC958 Optical Capture Volume */
  1648. for (z = 0; z < 2; z++) {
  1649. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_TOSLINK_L + z, gpr + 2 + z);
  1650. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1651. }
  1652. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,VOLUME), gpr, 0);
  1653. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,SWITCH), gpr + 2, 0);
  1654. gpr += 4;
  1655. }
  1656. if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE1_L)|(1<<EXTIN_LINE1_R))) {
  1657. /* Line LiveDrive Playback Volume */
  1658. for (z = 0; z < 2; z++)
  1659. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE1_L + z, gpr + z);
  1660. snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Playback Volume", gpr, 0);
  1661. gpr += 2;
  1662. /* Line LiveDrive Capture Volume + Switch */
  1663. for (z = 0; z < 2; z++) {
  1664. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE1_L + z, gpr + 2 + z);
  1665. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1666. }
  1667. snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Capture Volume", gpr, 0);
  1668. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line LiveDrive Capture Switch", gpr + 2, 0);
  1669. gpr += 4;
  1670. }
  1671. if (emu->fx8010.extin_mask & ((1<<EXTIN_COAX_SPDIF_L)|(1<<EXTIN_COAX_SPDIF_R))) {
  1672. /* IEC958 Coax Playback Volume */
  1673. for (z = 0; z < 2; z++)
  1674. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_COAX_SPDIF_L + z, gpr + z);
  1675. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",PLAYBACK,VOLUME), gpr, 0);
  1676. gpr += 2;
  1677. /* IEC958 Coax Capture Volume + Switch */
  1678. for (z = 0; z < 2; z++) {
  1679. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_COAX_SPDIF_L + z, gpr + 2 + z);
  1680. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1681. }
  1682. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,VOLUME), gpr, 0);
  1683. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,SWITCH), gpr + 2, 0);
  1684. gpr += 4;
  1685. }
  1686. if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE2_L)|(1<<EXTIN_LINE2_R))) {
  1687. /* Line LiveDrive Playback Volume */
  1688. for (z = 0; z < 2; z++)
  1689. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE2_L + z, gpr + z);
  1690. snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Playback Volume", gpr, 0);
  1691. controls[i-1].id.index = 1;
  1692. gpr += 2;
  1693. /* Line LiveDrive Capture Volume */
  1694. for (z = 0; z < 2; z++) {
  1695. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE2_L + z, gpr + 2 + z);
  1696. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1697. }
  1698. snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Capture Volume", gpr, 0);
  1699. controls[i-1].id.index = 1;
  1700. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line2 LiveDrive Capture Switch", gpr + 2, 0);
  1701. controls[i-1].id.index = 1;
  1702. gpr += 4;
  1703. }
  1704. /*
  1705. * Process tone control
  1706. */
  1707. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), GPR(playback + 0), C_00000000, C_00000000); /* left */
  1708. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), GPR(playback + 1), C_00000000, C_00000000); /* right */
  1709. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), GPR(playback + 2), C_00000000, C_00000000); /* rear left */
  1710. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), GPR(playback + 3), C_00000000, C_00000000); /* rear right */
  1711. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), GPR(playback + 4), C_00000000, C_00000000); /* center */
  1712. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), GPR(playback + 5), C_00000000, C_00000000); /* LFE */
  1713. ctl = &controls[i + 0];
  1714. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1715. strcpy(ctl->id.name, "Tone Control - Bass");
  1716. ctl->vcount = 2;
  1717. ctl->count = 10;
  1718. ctl->min = 0;
  1719. ctl->max = 40;
  1720. ctl->value[0] = ctl->value[1] = 20;
  1721. ctl->translation = EMU10K1_GPR_TRANSLATION_BASS;
  1722. ctl = &controls[i + 1];
  1723. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1724. strcpy(ctl->id.name, "Tone Control - Treble");
  1725. ctl->vcount = 2;
  1726. ctl->count = 10;
  1727. ctl->min = 0;
  1728. ctl->max = 40;
  1729. ctl->value[0] = ctl->value[1] = 20;
  1730. ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE;
  1731. #define BASS_GPR 0x8c
  1732. #define TREBLE_GPR 0x96
  1733. for (z = 0; z < 5; z++) {
  1734. int j;
  1735. for (j = 0; j < 2; j++) {
  1736. controls[i + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j;
  1737. controls[i + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j;
  1738. }
  1739. }
  1740. for (z = 0; z < 3; z++) { /* front/rear/center-lfe */
  1741. int j, k, l, d;
  1742. for (j = 0; j < 2; j++) { /* left/right */
  1743. k = 0xa0 + (z * 8) + (j * 4);
  1744. l = 0xd0 + (z * 8) + (j * 4);
  1745. d = playback + SND_EMU10K1_PLAYBACK_CHANNELS + z * 2 + j;
  1746. OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(d), GPR(BASS_GPR + 0 + j));
  1747. OP(icode, &ptr, iMACMV, GPR(k+1), GPR(k), GPR(k+1), GPR(BASS_GPR + 4 + j));
  1748. OP(icode, &ptr, iMACMV, GPR(k), GPR(d), GPR(k), GPR(BASS_GPR + 2 + j));
  1749. OP(icode, &ptr, iMACMV, GPR(k+3), GPR(k+2), GPR(k+3), GPR(BASS_GPR + 8 + j));
  1750. OP(icode, &ptr, iMAC0, GPR(k+2), GPR_ACCU, GPR(k+2), GPR(BASS_GPR + 6 + j));
  1751. OP(icode, &ptr, iACC3, GPR(k+2), GPR(k+2), GPR(k+2), C_00000000);
  1752. OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(k+2), GPR(TREBLE_GPR + 0 + j));
  1753. OP(icode, &ptr, iMACMV, GPR(l+1), GPR(l), GPR(l+1), GPR(TREBLE_GPR + 4 + j));
  1754. OP(icode, &ptr, iMACMV, GPR(l), GPR(k+2), GPR(l), GPR(TREBLE_GPR + 2 + j));
  1755. OP(icode, &ptr, iMACMV, GPR(l+3), GPR(l+2), GPR(l+3), GPR(TREBLE_GPR + 8 + j));
  1756. OP(icode, &ptr, iMAC0, GPR(l+2), GPR_ACCU, GPR(l+2), GPR(TREBLE_GPR + 6 + j));
  1757. OP(icode, &ptr, iMACINT0, GPR(l+2), C_00000000, GPR(l+2), C_00000010);
  1758. OP(icode, &ptr, iACC3, GPR(d), GPR(l+2), C_00000000, C_00000000);
  1759. if (z == 2) /* center */
  1760. break;
  1761. }
  1762. }
  1763. i += 2;
  1764. #undef BASS_GPR
  1765. #undef TREBLE_GPR
  1766. for (z = 0; z < 6; z++) {
  1767. SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, gpr + 0);
  1768. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 0);
  1769. SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
  1770. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1771. }
  1772. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Tone Control - Switch", gpr, 0);
  1773. gpr += 2;
  1774. /*
  1775. * Process outputs
  1776. */
  1777. if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_L)|(1<<EXTOUT_AC97_R))) {
  1778. /* AC'97 Playback Volume */
  1779. for (z = 0; z < 2; z++)
  1780. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), C_00000000, C_00000000);
  1781. }
  1782. if (emu->fx8010.extout_mask & ((1<<EXTOUT_TOSLINK_L)|(1<<EXTOUT_TOSLINK_R))) {
  1783. /* IEC958 Optical Raw Playback Switch */
  1784. for (z = 0; z < 2; z++) {
  1785. SWITCH(icode, &ptr, tmp + 0, 8 + z, gpr + z);
  1786. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z);
  1787. SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  1788. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_TOSLINK_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1789. #ifdef EMU10K1_CAPTURE_DIGITAL_OUT
  1790. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1791. #endif
  1792. }
  1793. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0);
  1794. gpr += 2;
  1795. }
  1796. if (emu->fx8010.extout_mask & ((1<<EXTOUT_HEADPHONE_L)|(1<<EXTOUT_HEADPHONE_R))) {
  1797. /* Headphone Playback Volume */
  1798. for (z = 0; z < 2; z++) {
  1799. SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4 + z, gpr + 2 + z);
  1800. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 2 + z);
  1801. SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  1802. OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1803. VOLUME_OUT(icode, &ptr, EXTOUT_HEADPHONE_L + z, tmp + 0, gpr + z);
  1804. }
  1805. snd_emu10k1_init_stereo_control(controls + i++, "Headphone Playback Volume", gpr + 0, 0);
  1806. controls[i-1].id.index = 1; /* AC'97 can have also Headphone control */
  1807. snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone Center Playback Switch", gpr + 2, 0);
  1808. controls[i-1].id.index = 1;
  1809. snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone LFE Playback Switch", gpr + 3, 0);
  1810. controls[i-1].id.index = 1;
  1811. gpr += 4;
  1812. }
  1813. if (emu->fx8010.extout_mask & ((1<<EXTOUT_REAR_L)|(1<<EXTOUT_REAR_R)))
  1814. for (z = 0; z < 2; z++)
  1815. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000);
  1816. if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_REAR_L)|(1<<EXTOUT_AC97_REAR_R)))
  1817. for (z = 0; z < 2; z++)
  1818. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000);
  1819. if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_CENTER)) {
  1820. #ifndef EMU10K1_CENTER_LFE_FROM_FRONT
  1821. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000);
  1822. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000);
  1823. #else
  1824. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000);
  1825. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000);
  1826. #endif
  1827. }
  1828. if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_LFE)) {
  1829. #ifndef EMU10K1_CENTER_LFE_FROM_FRONT
  1830. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000);
  1831. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000);
  1832. #else
  1833. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000);
  1834. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000);
  1835. #endif
  1836. }
  1837. #ifndef EMU10K1_CAPTURE_DIGITAL_OUT
  1838. for (z = 0; z < 2; z++)
  1839. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(capture + z), C_00000000, C_00000000);
  1840. #endif
  1841. if (emu->fx8010.extout_mask & (1<<EXTOUT_MIC_CAP))
  1842. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_MIC_CAP), GPR(capture + 2), C_00000000, C_00000000);
  1843. /* EFX capture - capture the 16 EXTINS */
  1844. if (emu->card_capabilities->sblive51) {
  1845. /* On the Live! 5.1, FXBUS2(1) and FXBUS(2) are shared with EXTOUT_ACENTER
  1846. * and EXTOUT_ALFE, so we can't connect inputs to them for multitrack recording.
  1847. *
  1848. * Since only 14 of the 16 EXTINs are used, this is not a big problem.
  1849. * We route AC97L and R to FX capture 14 and 15, SPDIF CD in to FX capture
  1850. * 0 and 3, then the rest of the EXTINs to the corresponding FX capture
  1851. * channel. Multitrack recorders will still see the center/lfe output signal
  1852. * on the second and third channels.
  1853. */
  1854. OP(icode, &ptr, iACC3, FXBUS2(14), C_00000000, C_00000000, EXTIN(0));
  1855. OP(icode, &ptr, iACC3, FXBUS2(15), C_00000000, C_00000000, EXTIN(1));
  1856. OP(icode, &ptr, iACC3, FXBUS2(0), C_00000000, C_00000000, EXTIN(2));
  1857. OP(icode, &ptr, iACC3, FXBUS2(3), C_00000000, C_00000000, EXTIN(3));
  1858. for (z = 4; z < 14; z++)
  1859. OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z));
  1860. } else {
  1861. for (z = 0; z < 16; z++)
  1862. OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z));
  1863. }
  1864. if (gpr > tmp) {
  1865. snd_BUG();
  1866. err = -EIO;
  1867. goto __err;
  1868. }
  1869. if (i > SND_EMU10K1_GPR_CONTROLS) {
  1870. snd_BUG();
  1871. err = -EIO;
  1872. goto __err;
  1873. }
  1874. /* clear remaining instruction memory */
  1875. while (ptr < 0x200)
  1876. OP(icode, &ptr, iACC3, C_00000000, C_00000000, C_00000000, C_00000000);
  1877. if ((err = snd_emu10k1_fx8010_tram_setup(emu, ipcm->buffer_size)) < 0)
  1878. goto __err;
  1879. seg = snd_enter_user();
  1880. icode->gpr_add_control_count = i;
  1881. icode->gpr_add_controls = (struct snd_emu10k1_fx8010_control_gpr __user *)controls;
  1882. err = snd_emu10k1_icode_poke(emu, icode);
  1883. snd_leave_user(seg);
  1884. if (err >= 0)
  1885. err = snd_emu10k1_ipcm_poke(emu, ipcm);
  1886. __err:
  1887. kfree(ipcm);
  1888. kfree(controls);
  1889. if (icode != NULL) {
  1890. kfree((void __force *)icode->gpr_map);
  1891. kfree(icode);
  1892. }
  1893. return err;
  1894. }
  1895. int __devinit snd_emu10k1_init_efx(struct snd_emu10k1 *emu)
  1896. {
  1897. spin_lock_init(&emu->fx8010.irq_lock);
  1898. INIT_LIST_HEAD(&emu->fx8010.gpr_ctl);
  1899. if (emu->audigy)
  1900. return _snd_emu10k1_audigy_init_efx(emu);
  1901. else
  1902. return _snd_emu10k1_init_efx(emu);
  1903. }
  1904. void snd_emu10k1_free_efx(struct snd_emu10k1 *emu)
  1905. {
  1906. /* stop processor */
  1907. if (emu->audigy)
  1908. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = A_DBG_SINGLE_STEP);
  1909. else
  1910. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = EMU10K1_DBG_SINGLE_STEP);
  1911. }
  1912. #if 0 // FIXME: who use them?
  1913. int snd_emu10k1_fx8010_tone_control_activate(struct snd_emu10k1 *emu, int output)
  1914. {
  1915. if (output < 0 || output >= 6)
  1916. return -EINVAL;
  1917. snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 1);
  1918. return 0;
  1919. }
  1920. int snd_emu10k1_fx8010_tone_control_deactivate(struct snd_emu10k1 *emu, int output)
  1921. {
  1922. if (output < 0 || output >= 6)
  1923. return -EINVAL;
  1924. snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 0);
  1925. return 0;
  1926. }
  1927. #endif
  1928. int snd_emu10k1_fx8010_tram_setup(struct snd_emu10k1 *emu, u32 size)
  1929. {
  1930. u8 size_reg = 0;
  1931. /* size is in samples */
  1932. if (size != 0) {
  1933. size = (size - 1) >> 13;
  1934. while (size) {
  1935. size >>= 1;
  1936. size_reg++;
  1937. }
  1938. size = 0x2000 << size_reg;
  1939. }
  1940. if ((emu->fx8010.etram_pages.bytes / 2) == size)
  1941. return 0;
  1942. spin_lock_irq(&emu->emu_lock);
  1943. outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
  1944. spin_unlock_irq(&emu->emu_lock);
  1945. snd_emu10k1_ptr_write(emu, TCB, 0, 0);
  1946. snd_emu10k1_ptr_write(emu, TCBS, 0, 0);
  1947. if (emu->fx8010.etram_pages.area != NULL) {
  1948. snd_dma_free_pages(&emu->fx8010.etram_pages);
  1949. emu->fx8010.etram_pages.area = NULL;
  1950. emu->fx8010.etram_pages.bytes = 0;
  1951. }
  1952. if (size > 0) {
  1953. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(emu->pci),
  1954. size * 2, &emu->fx8010.etram_pages) < 0)
  1955. return -ENOMEM;
  1956. memset(emu->fx8010.etram_pages.area, 0, size * 2);
  1957. snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr);
  1958. snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg);
  1959. spin_lock_irq(&emu->emu_lock);
  1960. outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
  1961. spin_unlock_irq(&emu->emu_lock);
  1962. }
  1963. return 0;
  1964. }
  1965. static int snd_emu10k1_fx8010_open(struct snd_hwdep * hw, struct file *file)
  1966. {
  1967. return 0;
  1968. }
  1969. static void copy_string(char *dst, char *src, char *null, int idx)
  1970. {
  1971. if (src == NULL)
  1972. sprintf(dst, "%s %02X", null, idx);
  1973. else
  1974. strcpy(dst, src);
  1975. }
  1976. static int snd_emu10k1_fx8010_info(struct snd_emu10k1 *emu,
  1977. struct snd_emu10k1_fx8010_info *info)
  1978. {
  1979. char **fxbus, **extin, **extout;
  1980. unsigned short fxbus_mask, extin_mask, extout_mask;
  1981. int res;
  1982. memset(info, 0, sizeof(info));
  1983. info->internal_tram_size = emu->fx8010.itram_size;
  1984. info->external_tram_size = emu->fx8010.etram_pages.bytes / 2;
  1985. fxbus = fxbuses;
  1986. extin = emu->audigy ? audigy_ins : creative_ins;
  1987. extout = emu->audigy ? audigy_outs : creative_outs;
  1988. fxbus_mask = emu->fx8010.fxbus_mask;
  1989. extin_mask = emu->fx8010.extin_mask;
  1990. extout_mask = emu->fx8010.extout_mask;
  1991. for (res = 0; res < 16; res++, fxbus++, extin++, extout++) {
  1992. copy_string(info->fxbus_names[res], fxbus_mask & (1 << res) ? *fxbus : NULL, "FXBUS", res);
  1993. copy_string(info->extin_names[res], extin_mask & (1 << res) ? *extin : NULL, "Unused", res);
  1994. copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res);
  1995. }
  1996. for (res = 16; res < 32; res++, extout++)
  1997. copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res);
  1998. info->gpr_controls = emu->fx8010.gpr_count;
  1999. return 0;
  2000. }
  2001. static int snd_emu10k1_fx8010_ioctl(struct snd_hwdep * hw, struct file *file, unsigned int cmd, unsigned long arg)
  2002. {
  2003. struct snd_emu10k1 *emu = hw->private_data;
  2004. struct snd_emu10k1_fx8010_info *info;
  2005. struct snd_emu10k1_fx8010_code *icode;
  2006. struct snd_emu10k1_fx8010_pcm_rec *ipcm;
  2007. unsigned int addr;
  2008. void __user *argp = (void __user *)arg;
  2009. int res;
  2010. switch (cmd) {
  2011. case SNDRV_EMU10K1_IOCTL_INFO:
  2012. info = kmalloc(sizeof(*info), GFP_KERNEL);
  2013. if (!info)
  2014. return -ENOMEM;
  2015. if ((res = snd_emu10k1_fx8010_info(emu, info)) < 0) {
  2016. kfree(info);
  2017. return res;
  2018. }
  2019. if (copy_to_user(argp, info, sizeof(*info))) {
  2020. kfree(info);
  2021. return -EFAULT;
  2022. }
  2023. kfree(info);
  2024. return 0;
  2025. case SNDRV_EMU10K1_IOCTL_CODE_POKE:
  2026. if (!capable(CAP_SYS_ADMIN))
  2027. return -EPERM;
  2028. icode = kmalloc(sizeof(*icode), GFP_KERNEL);
  2029. if (icode == NULL)
  2030. return -ENOMEM;
  2031. if (copy_from_user(icode, argp, sizeof(*icode))) {
  2032. kfree(icode);
  2033. return -EFAULT;
  2034. }
  2035. res = snd_emu10k1_icode_poke(emu, icode);
  2036. kfree(icode);
  2037. return res;
  2038. case SNDRV_EMU10K1_IOCTL_CODE_PEEK:
  2039. icode = kmalloc(sizeof(*icode), GFP_KERNEL);
  2040. if (icode == NULL)
  2041. return -ENOMEM;
  2042. if (copy_from_user(icode, argp, sizeof(*icode))) {
  2043. kfree(icode);
  2044. return -EFAULT;
  2045. }
  2046. res = snd_emu10k1_icode_peek(emu, icode);
  2047. if (res == 0 && copy_to_user(argp, icode, sizeof(*icode))) {
  2048. kfree(icode);
  2049. return -EFAULT;
  2050. }
  2051. kfree(icode);
  2052. return res;
  2053. case SNDRV_EMU10K1_IOCTL_PCM_POKE:
  2054. ipcm = kmalloc(sizeof(*ipcm), GFP_KERNEL);
  2055. if (ipcm == NULL)
  2056. return -ENOMEM;
  2057. if (copy_from_user(ipcm, argp, sizeof(*ipcm))) {
  2058. kfree(ipcm);
  2059. return -EFAULT;
  2060. }
  2061. res = snd_emu10k1_ipcm_poke(emu, ipcm);
  2062. kfree(ipcm);
  2063. return res;
  2064. case SNDRV_EMU10K1_IOCTL_PCM_PEEK:
  2065. ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL);
  2066. if (ipcm == NULL)
  2067. return -ENOMEM;
  2068. if (copy_from_user(ipcm, argp, sizeof(*ipcm))) {
  2069. kfree(ipcm);
  2070. return -EFAULT;
  2071. }
  2072. res = snd_emu10k1_ipcm_peek(emu, ipcm);
  2073. if (res == 0 && copy_to_user(argp, ipcm, sizeof(*ipcm))) {
  2074. kfree(ipcm);
  2075. return -EFAULT;
  2076. }
  2077. kfree(ipcm);
  2078. return res;
  2079. case SNDRV_EMU10K1_IOCTL_TRAM_SETUP:
  2080. if (!capable(CAP_SYS_ADMIN))
  2081. return -EPERM;
  2082. if (get_user(addr, (unsigned int __user *)argp))
  2083. return -EFAULT;
  2084. down(&emu->fx8010.lock);
  2085. res = snd_emu10k1_fx8010_tram_setup(emu, addr);
  2086. up(&emu->fx8010.lock);
  2087. return res;
  2088. case SNDRV_EMU10K1_IOCTL_STOP:
  2089. if (!capable(CAP_SYS_ADMIN))
  2090. return -EPERM;
  2091. if (emu->audigy)
  2092. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP);
  2093. else
  2094. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP);
  2095. return 0;
  2096. case SNDRV_EMU10K1_IOCTL_CONTINUE:
  2097. if (!capable(CAP_SYS_ADMIN))
  2098. return -EPERM;
  2099. if (emu->audigy)
  2100. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = 0);
  2101. else
  2102. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = 0);
  2103. return 0;
  2104. case SNDRV_EMU10K1_IOCTL_ZERO_TRAM_COUNTER:
  2105. if (!capable(CAP_SYS_ADMIN))
  2106. return -EPERM;
  2107. if (emu->audigy)
  2108. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_ZC);
  2109. else
  2110. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_ZC);
  2111. udelay(10);
  2112. if (emu->audigy)
  2113. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  2114. else
  2115. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  2116. return 0;
  2117. case SNDRV_EMU10K1_IOCTL_SINGLE_STEP:
  2118. if (!capable(CAP_SYS_ADMIN))
  2119. return -EPERM;
  2120. if (get_user(addr, (unsigned int __user *)argp))
  2121. return -EFAULT;
  2122. if (addr > 0x1ff)
  2123. return -EINVAL;
  2124. if (emu->audigy)
  2125. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP | addr);
  2126. else
  2127. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP | addr);
  2128. udelay(10);
  2129. if (emu->audigy)
  2130. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP | A_DBG_STEP_ADDR | addr);
  2131. else
  2132. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP | EMU10K1_DBG_STEP | addr);
  2133. return 0;
  2134. case SNDRV_EMU10K1_IOCTL_DBG_READ:
  2135. if (emu->audigy)
  2136. addr = snd_emu10k1_ptr_read(emu, A_DBG, 0);
  2137. else
  2138. addr = snd_emu10k1_ptr_read(emu, DBG, 0);
  2139. if (put_user(addr, (unsigned int __user *)argp))
  2140. return -EFAULT;
  2141. return 0;
  2142. }
  2143. return -ENOTTY;
  2144. }
  2145. static int snd_emu10k1_fx8010_release(struct snd_hwdep * hw, struct file *file)
  2146. {
  2147. return 0;
  2148. }
  2149. int __devinit snd_emu10k1_fx8010_new(struct snd_emu10k1 *emu, int device, struct snd_hwdep ** rhwdep)
  2150. {
  2151. struct snd_hwdep *hw;
  2152. int err;
  2153. if (rhwdep)
  2154. *rhwdep = NULL;
  2155. if ((err = snd_hwdep_new(emu->card, "FX8010", device, &hw)) < 0)
  2156. return err;
  2157. strcpy(hw->name, "EMU10K1 (FX8010)");
  2158. hw->iface = SNDRV_HWDEP_IFACE_EMU10K1;
  2159. hw->ops.open = snd_emu10k1_fx8010_open;
  2160. hw->ops.ioctl = snd_emu10k1_fx8010_ioctl;
  2161. hw->ops.release = snd_emu10k1_fx8010_release;
  2162. hw->private_data = emu;
  2163. if (rhwdep)
  2164. *rhwdep = hw;
  2165. return 0;
  2166. }
  2167. #ifdef CONFIG_PM
  2168. int __devinit snd_emu10k1_efx_alloc_pm_buffer(struct snd_emu10k1 *emu)
  2169. {
  2170. int len;
  2171. len = emu->audigy ? 0x200 : 0x100;
  2172. emu->saved_gpr = kmalloc(len * 4, GFP_KERNEL);
  2173. if (! emu->saved_gpr)
  2174. return -ENOMEM;
  2175. len = emu->audigy ? 0x100 : 0xa0;
  2176. emu->tram_val_saved = kmalloc(len * 4, GFP_KERNEL);
  2177. emu->tram_addr_saved = kmalloc(len * 4, GFP_KERNEL);
  2178. if (! emu->tram_val_saved || ! emu->tram_addr_saved)
  2179. return -ENOMEM;
  2180. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2181. emu->saved_icode = vmalloc(len * 4);
  2182. if (! emu->saved_icode)
  2183. return -ENOMEM;
  2184. return 0;
  2185. }
  2186. void snd_emu10k1_efx_free_pm_buffer(struct snd_emu10k1 *emu)
  2187. {
  2188. kfree(emu->saved_gpr);
  2189. kfree(emu->tram_val_saved);
  2190. kfree(emu->tram_addr_saved);
  2191. vfree(emu->saved_icode);
  2192. }
  2193. /*
  2194. * save/restore GPR, TRAM and codes
  2195. */
  2196. void snd_emu10k1_efx_suspend(struct snd_emu10k1 *emu)
  2197. {
  2198. int i, len;
  2199. len = emu->audigy ? 0x200 : 0x100;
  2200. for (i = 0; i < len; i++)
  2201. emu->saved_gpr[i] = snd_emu10k1_ptr_read(emu, emu->gpr_base + i, 0);
  2202. len = emu->audigy ? 0x100 : 0xa0;
  2203. for (i = 0; i < len; i++) {
  2204. emu->tram_val_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + i, 0);
  2205. emu->tram_addr_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + i, 0);
  2206. if (emu->audigy) {
  2207. emu->tram_addr_saved[i] >>= 12;
  2208. emu->tram_addr_saved[i] |=
  2209. snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + i, 0) << 20;
  2210. }
  2211. }
  2212. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2213. for (i = 0; i < len; i++)
  2214. emu->saved_icode[i] = snd_emu10k1_efx_read(emu, i);
  2215. }
  2216. void snd_emu10k1_efx_resume(struct snd_emu10k1 *emu)
  2217. {
  2218. int i, len;
  2219. /* set up TRAM */
  2220. if (emu->fx8010.etram_pages.bytes > 0) {
  2221. unsigned size, size_reg = 0;
  2222. size = emu->fx8010.etram_pages.bytes / 2;
  2223. size = (size - 1) >> 13;
  2224. while (size) {
  2225. size >>= 1;
  2226. size_reg++;
  2227. }
  2228. outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
  2229. snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr);
  2230. snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg);
  2231. outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
  2232. }
  2233. if (emu->audigy)
  2234. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP);
  2235. else
  2236. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP);
  2237. len = emu->audigy ? 0x200 : 0x100;
  2238. for (i = 0; i < len; i++)
  2239. snd_emu10k1_ptr_write(emu, emu->gpr_base + i, 0, emu->saved_gpr[i]);
  2240. len = emu->audigy ? 0x100 : 0xa0;
  2241. for (i = 0; i < len; i++) {
  2242. snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + i, 0,
  2243. emu->tram_val_saved[i]);
  2244. if (! emu->audigy)
  2245. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2246. emu->tram_addr_saved[i]);
  2247. else {
  2248. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2249. emu->tram_addr_saved[i] << 12);
  2250. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2251. emu->tram_addr_saved[i] >> 20);
  2252. }
  2253. }
  2254. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2255. for (i = 0; i < len; i++)
  2256. snd_emu10k1_efx_write(emu, i, emu->saved_icode[i]);
  2257. /* start FX processor when the DSP code is updated */
  2258. if (emu->audigy)
  2259. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  2260. else
  2261. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  2262. }
  2263. #endif