ad1889.c 27 KB

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  1. /* Analog Devices 1889 audio driver
  2. *
  3. * This is a driver for the AD1889 PCI audio chipset found
  4. * on the HP PA-RISC [BCJ]-xxx0 workstations.
  5. *
  6. * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org>
  7. * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org>
  8. * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License, version 2, as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. *
  23. * TODO:
  24. * Do we need to take care of CCS register?
  25. * Maybe we could use finer grained locking (separate locks for pb/cap)?
  26. * Wishlist:
  27. * Control Interface (mixer) support
  28. * Better AC97 support (VSR...)?
  29. * PM support
  30. * MIDI support
  31. * Game Port support
  32. * SG DMA support (this will need *alot* of work)
  33. */
  34. #include <linux/init.h>
  35. #include <linux/pci.h>
  36. #include <linux/slab.h>
  37. #include <linux/interrupt.h>
  38. #include <linux/compiler.h>
  39. #include <linux/delay.h>
  40. #include <sound/driver.h>
  41. #include <sound/core.h>
  42. #include <sound/pcm.h>
  43. #include <sound/initval.h>
  44. #include <sound/ac97_codec.h>
  45. #include <asm/io.h>
  46. #include "ad1889.h"
  47. #include "ac97/ac97_id.h"
  48. #define AD1889_DRVVER "Version: 1.7"
  49. MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
  50. MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
  51. MODULE_LICENSE("GPL");
  52. MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
  53. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  54. module_param_array(index, int, NULL, 0444);
  55. MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard.");
  56. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  57. module_param_array(id, charp, NULL, 0444);
  58. MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard.");
  59. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  60. module_param_array(enable, bool, NULL, 0444);
  61. MODULE_PARM_DESC(enable, "Enable AD1889 soundcard.");
  62. static char *ac97_quirk[SNDRV_CARDS];
  63. module_param_array(ac97_quirk, charp, NULL, 0444);
  64. MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
  65. #define DEVNAME "ad1889"
  66. #define PFX DEVNAME ": "
  67. /* let's use the global sound debug interfaces */
  68. #define ad1889_debug(fmt, arg...) snd_printd(KERN_DEBUG fmt, ## arg)
  69. /* keep track of some hw registers */
  70. struct ad1889_register_state {
  71. u16 reg; /* reg setup */
  72. u32 addr; /* dma base address */
  73. unsigned long size; /* DMA buffer size */
  74. };
  75. struct snd_ad1889 {
  76. struct snd_card *card;
  77. struct pci_dev *pci;
  78. int irq;
  79. unsigned long bar;
  80. void __iomem *iobase;
  81. struct snd_ac97 *ac97;
  82. struct snd_ac97_bus *ac97_bus;
  83. struct snd_pcm *pcm;
  84. struct snd_info_entry *proc;
  85. struct snd_pcm_substream *psubs;
  86. struct snd_pcm_substream *csubs;
  87. /* playback register state */
  88. struct ad1889_register_state wave;
  89. struct ad1889_register_state ramc;
  90. spinlock_t lock;
  91. };
  92. static inline u16
  93. ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
  94. {
  95. return readw(chip->iobase + reg);
  96. }
  97. static inline void
  98. ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
  99. {
  100. writew(val, chip->iobase + reg);
  101. }
  102. static inline u32
  103. ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
  104. {
  105. return readl(chip->iobase + reg);
  106. }
  107. static inline void
  108. ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
  109. {
  110. writel(val, chip->iobase + reg);
  111. }
  112. static inline void
  113. ad1889_unmute(struct snd_ad1889 *chip)
  114. {
  115. u16 st;
  116. st = ad1889_readw(chip, AD_DS_WADA) &
  117. ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM);
  118. ad1889_writew(chip, AD_DS_WADA, st);
  119. ad1889_readw(chip, AD_DS_WADA);
  120. }
  121. static inline void
  122. ad1889_mute(struct snd_ad1889 *chip)
  123. {
  124. u16 st;
  125. st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
  126. ad1889_writew(chip, AD_DS_WADA, st);
  127. ad1889_readw(chip, AD_DS_WADA);
  128. }
  129. static inline void
  130. ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
  131. {
  132. ad1889_writel(chip, AD_DMA_ADCBA, address);
  133. ad1889_writel(chip, AD_DMA_ADCCA, address);
  134. }
  135. static inline void
  136. ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
  137. {
  138. ad1889_writel(chip, AD_DMA_ADCBC, count);
  139. ad1889_writel(chip, AD_DMA_ADCCC, count);
  140. }
  141. static inline void
  142. ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
  143. {
  144. ad1889_writel(chip, AD_DMA_ADCIB, count);
  145. ad1889_writel(chip, AD_DMA_ADCIC, count);
  146. }
  147. static inline void
  148. ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
  149. {
  150. ad1889_writel(chip, AD_DMA_WAVBA, address);
  151. ad1889_writel(chip, AD_DMA_WAVCA, address);
  152. }
  153. static inline void
  154. ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
  155. {
  156. ad1889_writel(chip, AD_DMA_WAVBC, count);
  157. ad1889_writel(chip, AD_DMA_WAVCC, count);
  158. }
  159. static inline void
  160. ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
  161. {
  162. ad1889_writel(chip, AD_DMA_WAVIB, count);
  163. ad1889_writel(chip, AD_DMA_WAVIC, count);
  164. }
  165. static void
  166. ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
  167. {
  168. u16 reg;
  169. if (channel & AD_CHAN_WAV) {
  170. /* Disable wave channel */
  171. reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
  172. ad1889_writew(chip, AD_DS_WSMC, reg);
  173. chip->wave.reg = reg;
  174. /* disable IRQs */
  175. reg = ad1889_readw(chip, AD_DMA_WAV);
  176. reg &= AD_DMA_IM_DIS;
  177. reg &= ~AD_DMA_LOOP;
  178. ad1889_writew(chip, AD_DMA_WAV, reg);
  179. /* clear IRQ and address counters and pointers */
  180. ad1889_load_wave_buffer_address(chip, 0x0);
  181. ad1889_load_wave_buffer_count(chip, 0x0);
  182. ad1889_load_wave_interrupt_count(chip, 0x0);
  183. /* flush */
  184. ad1889_readw(chip, AD_DMA_WAV);
  185. }
  186. if (channel & AD_CHAN_ADC) {
  187. /* Disable ADC channel */
  188. reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
  189. ad1889_writew(chip, AD_DS_RAMC, reg);
  190. chip->ramc.reg = reg;
  191. reg = ad1889_readw(chip, AD_DMA_ADC);
  192. reg &= AD_DMA_IM_DIS;
  193. reg &= ~AD_DMA_LOOP;
  194. ad1889_writew(chip, AD_DMA_ADC, reg);
  195. ad1889_load_adc_buffer_address(chip, 0x0);
  196. ad1889_load_adc_buffer_count(chip, 0x0);
  197. ad1889_load_adc_interrupt_count(chip, 0x0);
  198. /* flush */
  199. ad1889_readw(chip, AD_DMA_ADC);
  200. }
  201. }
  202. static inline u16
  203. snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  204. {
  205. struct snd_ad1889 *chip = ac97->private_data;
  206. return ad1889_readw(chip, AD_AC97_BASE + reg);
  207. }
  208. static inline void
  209. snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
  210. {
  211. struct snd_ad1889 *chip = ac97->private_data;
  212. ad1889_writew(chip, AD_AC97_BASE + reg, val);
  213. }
  214. static int
  215. snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
  216. {
  217. int retry = 400; /* average needs 352 msec */
  218. while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY)
  219. && --retry)
  220. mdelay(1);
  221. if (!retry) {
  222. snd_printk(KERN_ERR PFX "[%s] Link is not ready.\n",
  223. __FUNCTION__);
  224. return -EIO;
  225. }
  226. ad1889_debug("[%s] ready after %d ms\n", __FUNCTION__, 400 - retry);
  227. return 0;
  228. }
  229. static int
  230. snd_ad1889_hw_params(struct snd_pcm_substream *substream,
  231. struct snd_pcm_hw_params *hw_params)
  232. {
  233. return snd_pcm_lib_malloc_pages(substream,
  234. params_buffer_bytes(hw_params));
  235. }
  236. static int
  237. snd_ad1889_hw_free(struct snd_pcm_substream *substream)
  238. {
  239. return snd_pcm_lib_free_pages(substream);
  240. }
  241. static struct snd_pcm_hardware snd_ad1889_playback_hw = {
  242. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  243. SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
  244. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  245. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  246. .rate_min = 8000, /* docs say 7000, but we're lazy */
  247. .rate_max = 48000,
  248. .channels_min = 1,
  249. .channels_max = 2,
  250. .buffer_bytes_max = BUFFER_BYTES_MAX,
  251. .period_bytes_min = PERIOD_BYTES_MIN,
  252. .period_bytes_max = PERIOD_BYTES_MAX,
  253. .periods_min = PERIODS_MIN,
  254. .periods_max = PERIODS_MAX,
  255. /*.fifo_size = 0,*/
  256. };
  257. static struct snd_pcm_hardware snd_ad1889_capture_hw = {
  258. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  259. SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
  260. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  261. .rates = SNDRV_PCM_RATE_48000,
  262. .rate_min = 48000, /* docs say we could to VSR, but we're lazy */
  263. .rate_max = 48000,
  264. .channels_min = 1,
  265. .channels_max = 2,
  266. .buffer_bytes_max = BUFFER_BYTES_MAX,
  267. .period_bytes_min = PERIOD_BYTES_MIN,
  268. .period_bytes_max = PERIOD_BYTES_MAX,
  269. .periods_min = PERIODS_MIN,
  270. .periods_max = PERIODS_MAX,
  271. /*.fifo_size = 0,*/
  272. };
  273. static int
  274. snd_ad1889_playback_open(struct snd_pcm_substream *ss)
  275. {
  276. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  277. struct snd_pcm_runtime *rt = ss->runtime;
  278. chip->psubs = ss;
  279. rt->hw = snd_ad1889_playback_hw;
  280. return 0;
  281. }
  282. static int
  283. snd_ad1889_capture_open(struct snd_pcm_substream *ss)
  284. {
  285. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  286. struct snd_pcm_runtime *rt = ss->runtime;
  287. chip->csubs = ss;
  288. rt->hw = snd_ad1889_capture_hw;
  289. return 0;
  290. }
  291. static int
  292. snd_ad1889_playback_close(struct snd_pcm_substream *ss)
  293. {
  294. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  295. chip->psubs = NULL;
  296. return 0;
  297. }
  298. static int
  299. snd_ad1889_capture_close(struct snd_pcm_substream *ss)
  300. {
  301. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  302. chip->csubs = NULL;
  303. return 0;
  304. }
  305. static int
  306. snd_ad1889_playback_prepare(struct snd_pcm_substream *ss)
  307. {
  308. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  309. struct snd_pcm_runtime *rt = ss->runtime;
  310. unsigned int size = snd_pcm_lib_buffer_bytes(ss);
  311. unsigned int count = snd_pcm_lib_period_bytes(ss);
  312. u16 reg;
  313. ad1889_channel_reset(chip, AD_CHAN_WAV);
  314. reg = ad1889_readw(chip, AD_DS_WSMC);
  315. /* Mask out 16-bit / Stereo */
  316. reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST);
  317. if (snd_pcm_format_width(rt->format) == 16)
  318. reg |= AD_DS_WSMC_WA16;
  319. if (rt->channels > 1)
  320. reg |= AD_DS_WSMC_WAST;
  321. /* let's make sure we don't clobber ourselves */
  322. spin_lock_irq(&chip->lock);
  323. chip->wave.size = size;
  324. chip->wave.reg = reg;
  325. chip->wave.addr = rt->dma_addr;
  326. ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
  327. /* Set sample rates on the codec */
  328. ad1889_writew(chip, AD_DS_WAS, rt->rate);
  329. /* Set up DMA */
  330. ad1889_load_wave_buffer_address(chip, chip->wave.addr);
  331. ad1889_load_wave_buffer_count(chip, size);
  332. ad1889_load_wave_interrupt_count(chip, count);
  333. /* writes flush */
  334. ad1889_readw(chip, AD_DS_WSMC);
  335. spin_unlock_irq(&chip->lock);
  336. ad1889_debug("prepare playback: addr = 0x%x, count = %u, "
  337. "size = %u, reg = 0x%x, rate = %u\n", chip->wave.addr,
  338. count, size, reg, rt->rate);
  339. return 0;
  340. }
  341. static int
  342. snd_ad1889_capture_prepare(struct snd_pcm_substream *ss)
  343. {
  344. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  345. struct snd_pcm_runtime *rt = ss->runtime;
  346. unsigned int size = snd_pcm_lib_buffer_bytes(ss);
  347. unsigned int count = snd_pcm_lib_period_bytes(ss);
  348. u16 reg;
  349. ad1889_channel_reset(chip, AD_CHAN_ADC);
  350. reg = ad1889_readw(chip, AD_DS_RAMC);
  351. /* Mask out 16-bit / Stereo */
  352. reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST);
  353. if (snd_pcm_format_width(rt->format) == 16)
  354. reg |= AD_DS_RAMC_AD16;
  355. if (rt->channels > 1)
  356. reg |= AD_DS_RAMC_ADST;
  357. /* let's make sure we don't clobber ourselves */
  358. spin_lock_irq(&chip->lock);
  359. chip->ramc.size = size;
  360. chip->ramc.reg = reg;
  361. chip->ramc.addr = rt->dma_addr;
  362. ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
  363. /* Set up DMA */
  364. ad1889_load_adc_buffer_address(chip, chip->ramc.addr);
  365. ad1889_load_adc_buffer_count(chip, size);
  366. ad1889_load_adc_interrupt_count(chip, count);
  367. /* writes flush */
  368. ad1889_readw(chip, AD_DS_RAMC);
  369. spin_unlock_irq(&chip->lock);
  370. ad1889_debug("prepare capture: addr = 0x%x, count = %u, "
  371. "size = %u, reg = 0x%x, rate = %u\n", chip->ramc.addr,
  372. count, size, reg, rt->rate);
  373. return 0;
  374. }
  375. /* this is called in atomic context with IRQ disabled.
  376. Must be as fast as possible and not sleep.
  377. DMA should be *triggered* by this call.
  378. The WSMC "WAEN" bit triggers DMA Wave On/Off */
  379. static int
  380. snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd)
  381. {
  382. u16 wsmc;
  383. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  384. wsmc = ad1889_readw(chip, AD_DS_WSMC);
  385. switch (cmd) {
  386. case SNDRV_PCM_TRIGGER_START:
  387. /* enable DMA loop & interrupts */
  388. ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT);
  389. wsmc |= AD_DS_WSMC_WAEN;
  390. /* 1 to clear CHSS bit */
  391. ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS);
  392. ad1889_unmute(chip);
  393. break;
  394. case SNDRV_PCM_TRIGGER_STOP:
  395. ad1889_mute(chip);
  396. wsmc &= ~AD_DS_WSMC_WAEN;
  397. break;
  398. default:
  399. snd_BUG();
  400. return -EINVAL;
  401. }
  402. chip->wave.reg = wsmc;
  403. ad1889_writew(chip, AD_DS_WSMC, wsmc);
  404. ad1889_readw(chip, AD_DS_WSMC); /* flush */
  405. /* reset the chip when STOP - will disable IRQs */
  406. if (cmd == SNDRV_PCM_TRIGGER_STOP)
  407. ad1889_channel_reset(chip, AD_CHAN_WAV);
  408. return 0;
  409. }
  410. /* this is called in atomic context with IRQ disabled.
  411. Must be as fast as possible and not sleep.
  412. DMA should be *triggered* by this call.
  413. The RAMC "ADEN" bit triggers DMA ADC On/Off */
  414. static int
  415. snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd)
  416. {
  417. u16 ramc;
  418. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  419. ramc = ad1889_readw(chip, AD_DS_RAMC);
  420. switch (cmd) {
  421. case SNDRV_PCM_TRIGGER_START:
  422. /* enable DMA loop & interrupts */
  423. ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT);
  424. ramc |= AD_DS_RAMC_ADEN;
  425. /* 1 to clear CHSS bit */
  426. ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS);
  427. break;
  428. case SNDRV_PCM_TRIGGER_STOP:
  429. ramc &= ~AD_DS_RAMC_ADEN;
  430. break;
  431. default:
  432. return -EINVAL;
  433. }
  434. chip->ramc.reg = ramc;
  435. ad1889_writew(chip, AD_DS_RAMC, ramc);
  436. ad1889_readw(chip, AD_DS_RAMC); /* flush */
  437. /* reset the chip when STOP - will disable IRQs */
  438. if (cmd == SNDRV_PCM_TRIGGER_STOP)
  439. ad1889_channel_reset(chip, AD_CHAN_ADC);
  440. return 0;
  441. }
  442. /* Called in atomic context with IRQ disabled */
  443. static snd_pcm_uframes_t
  444. snd_ad1889_playback_pointer(struct snd_pcm_substream *ss)
  445. {
  446. size_t ptr = 0;
  447. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  448. if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
  449. return 0;
  450. ptr = ad1889_readl(chip, AD_DMA_WAVCA);
  451. ptr -= chip->wave.addr;
  452. snd_assert((ptr >= 0) && (ptr < chip->wave.size), return 0);
  453. return bytes_to_frames(ss->runtime, ptr);
  454. }
  455. /* Called in atomic context with IRQ disabled */
  456. static snd_pcm_uframes_t
  457. snd_ad1889_capture_pointer(struct snd_pcm_substream *ss)
  458. {
  459. size_t ptr = 0;
  460. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  461. if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
  462. return 0;
  463. ptr = ad1889_readl(chip, AD_DMA_ADCCA);
  464. ptr -= chip->ramc.addr;
  465. snd_assert((ptr >= 0) && (ptr < chip->ramc.size), return 0);
  466. return bytes_to_frames(ss->runtime, ptr);
  467. }
  468. static struct snd_pcm_ops snd_ad1889_playback_ops = {
  469. .open = snd_ad1889_playback_open,
  470. .close = snd_ad1889_playback_close,
  471. .ioctl = snd_pcm_lib_ioctl,
  472. .hw_params = snd_ad1889_hw_params,
  473. .hw_free = snd_ad1889_hw_free,
  474. .prepare = snd_ad1889_playback_prepare,
  475. .trigger = snd_ad1889_playback_trigger,
  476. .pointer = snd_ad1889_playback_pointer,
  477. };
  478. static struct snd_pcm_ops snd_ad1889_capture_ops = {
  479. .open = snd_ad1889_capture_open,
  480. .close = snd_ad1889_capture_close,
  481. .ioctl = snd_pcm_lib_ioctl,
  482. .hw_params = snd_ad1889_hw_params,
  483. .hw_free = snd_ad1889_hw_free,
  484. .prepare = snd_ad1889_capture_prepare,
  485. .trigger = snd_ad1889_capture_trigger,
  486. .pointer = snd_ad1889_capture_pointer,
  487. };
  488. static irqreturn_t
  489. snd_ad1889_interrupt(int irq,
  490. void *dev_id,
  491. struct pt_regs *regs)
  492. {
  493. unsigned long st;
  494. struct snd_ad1889 *chip = dev_id;
  495. st = ad1889_readl(chip, AD_DMA_DISR);
  496. /* clear ISR */
  497. ad1889_writel(chip, AD_DMA_DISR, st);
  498. st &= AD_INTR_MASK;
  499. if (unlikely(!st))
  500. return IRQ_NONE;
  501. if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI))
  502. ad1889_debug("Unexpected master or target abort interrupt!\n");
  503. if ((st & AD_DMA_DISR_WAVI) && chip->psubs)
  504. snd_pcm_period_elapsed(chip->psubs);
  505. if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
  506. snd_pcm_period_elapsed(chip->csubs);
  507. return IRQ_HANDLED;
  508. }
  509. static int __devinit
  510. snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device, struct snd_pcm **rpcm)
  511. {
  512. int err;
  513. struct snd_pcm *pcm;
  514. if (rpcm)
  515. *rpcm = NULL;
  516. err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm);
  517. if (err < 0)
  518. return err;
  519. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  520. &snd_ad1889_playback_ops);
  521. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  522. &snd_ad1889_capture_ops);
  523. pcm->private_data = chip;
  524. pcm->info_flags = 0;
  525. strcpy(pcm->name, chip->card->shortname);
  526. chip->pcm = pcm;
  527. chip->psubs = NULL;
  528. chip->csubs = NULL;
  529. err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  530. snd_dma_pci_data(chip->pci),
  531. BUFFER_BYTES_MAX / 2,
  532. BUFFER_BYTES_MAX);
  533. if (err < 0) {
  534. snd_printk(KERN_ERR PFX "buffer allocation error: %d\n", err);
  535. return err;
  536. }
  537. if (rpcm)
  538. *rpcm = pcm;
  539. return 0;
  540. }
  541. static void
  542. snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  543. {
  544. struct snd_ad1889 *chip = entry->private_data;
  545. u16 reg;
  546. int tmp;
  547. reg = ad1889_readw(chip, AD_DS_WSMC);
  548. snd_iprintf(buffer, "Wave output: %s\n",
  549. (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled");
  550. snd_iprintf(buffer, "Wave Channels: %s\n",
  551. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  552. snd_iprintf(buffer, "Wave Quality: %d-bit linear\n",
  553. (reg & AD_DS_WSMC_WA16) ? 16 : 8);
  554. /* WARQ is at offset 12 */
  555. tmp = (reg & AD_DS_WSMC_WARQ) ?
  556. (((reg & AD_DS_WSMC_WARQ >> 12) & 0x01) ? 12 : 18) : 4;
  557. tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
  558. snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp,
  559. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  560. snd_iprintf(buffer, "Synthesis output: %s\n",
  561. reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled");
  562. /* SYRQ is at offset 4 */
  563. tmp = (reg & AD_DS_WSMC_SYRQ) ?
  564. (((reg & AD_DS_WSMC_SYRQ >> 4) & 0x01) ? 12 : 18) : 4;
  565. tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
  566. snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp,
  567. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  568. reg = ad1889_readw(chip, AD_DS_RAMC);
  569. snd_iprintf(buffer, "ADC input: %s\n",
  570. (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled");
  571. snd_iprintf(buffer, "ADC Channels: %s\n",
  572. (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
  573. snd_iprintf(buffer, "ADC Quality: %d-bit linear\n",
  574. (reg & AD_DS_RAMC_AD16) ? 16 : 8);
  575. /* ACRQ is at offset 4 */
  576. tmp = (reg & AD_DS_RAMC_ACRQ) ?
  577. (((reg & AD_DS_RAMC_ACRQ >> 4) & 0x01) ? 12 : 18) : 4;
  578. tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
  579. snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp,
  580. (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
  581. snd_iprintf(buffer, "Resampler input: %s\n",
  582. reg & AD_DS_RAMC_REEN ? "enabled" : "disabled");
  583. /* RERQ is at offset 12 */
  584. tmp = (reg & AD_DS_RAMC_RERQ) ?
  585. (((reg & AD_DS_RAMC_RERQ >> 12) & 0x01) ? 12 : 18) : 4;
  586. tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
  587. snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp,
  588. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  589. /* doc says LSB represents -1.5dB, but the max value (-94.5dB)
  590. suggests that LSB is -3dB, which is more coherent with the logarithmic
  591. nature of the dB scale */
  592. reg = ad1889_readw(chip, AD_DS_WADA);
  593. snd_iprintf(buffer, "Left: %s, -%d dB\n",
  594. (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute",
  595. ((reg & AD_DS_WADA_LWAA) >> 8) * 3);
  596. reg = ad1889_readw(chip, AD_DS_WADA);
  597. snd_iprintf(buffer, "Right: %s, -%d dB\n",
  598. (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute",
  599. ((reg & AD_DS_WADA_RWAA) >> 8) * 3);
  600. reg = ad1889_readw(chip, AD_DS_WAS);
  601. snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg);
  602. reg = ad1889_readw(chip, AD_DS_RES);
  603. snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg);
  604. }
  605. static void __devinit
  606. snd_ad1889_proc_init(struct snd_ad1889 *chip)
  607. {
  608. struct snd_info_entry *entry;
  609. if (!snd_card_proc_new(chip->card, chip->card->driver, &entry))
  610. snd_info_set_text_ops(entry, chip, 1024, snd_ad1889_proc_read);
  611. }
  612. static struct ac97_quirk ac97_quirks[] = {
  613. {
  614. .subvendor = 0x11d4, /* AD */
  615. .subdevice = 0x1889, /* AD1889 */
  616. .codec_id = AC97_ID_AD1819,
  617. .name = "AD1889",
  618. .type = AC97_TUNE_HP_ONLY
  619. },
  620. { } /* terminator */
  621. };
  622. static void __devinit
  623. snd_ad1889_ac97_xinit(struct snd_ad1889 *chip)
  624. {
  625. u16 reg;
  626. reg = ad1889_readw(chip, AD_AC97_ACIC);
  627. reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */
  628. ad1889_writew(chip, AD_AC97_ACIC, reg);
  629. ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
  630. udelay(10);
  631. /* Interface Enable */
  632. reg |= AD_AC97_ACIC_ACIE;
  633. ad1889_writew(chip, AD_AC97_ACIC, reg);
  634. snd_ad1889_ac97_ready(chip);
  635. /* Audio Stream Output | Variable Sample Rate Mode */
  636. reg = ad1889_readw(chip, AD_AC97_ACIC);
  637. reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM;
  638. ad1889_writew(chip, AD_AC97_ACIC, reg);
  639. ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
  640. }
  641. static void
  642. snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus)
  643. {
  644. struct snd_ad1889 *chip = bus->private_data;
  645. chip->ac97_bus = NULL;
  646. }
  647. static void
  648. snd_ad1889_ac97_free(struct snd_ac97 *ac97)
  649. {
  650. struct snd_ad1889 *chip = ac97->private_data;
  651. chip->ac97 = NULL;
  652. }
  653. static int __devinit
  654. snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override)
  655. {
  656. int err;
  657. struct snd_ac97_template ac97;
  658. static struct snd_ac97_bus_ops ops = {
  659. .write = snd_ad1889_ac97_write,
  660. .read = snd_ad1889_ac97_read,
  661. };
  662. /* doing that here, it works. */
  663. snd_ad1889_ac97_xinit(chip);
  664. err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
  665. if (err < 0)
  666. return err;
  667. chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free;
  668. memset(&ac97, 0, sizeof(ac97));
  669. ac97.private_data = chip;
  670. ac97.private_free = snd_ad1889_ac97_free;
  671. ac97.pci = chip->pci;
  672. err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
  673. if (err < 0)
  674. return err;
  675. snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
  676. return 0;
  677. }
  678. static int
  679. snd_ad1889_free(struct snd_ad1889 *chip)
  680. {
  681. if (chip->irq < 0)
  682. goto skip_hw;
  683. spin_lock_irq(&chip->lock);
  684. ad1889_mute(chip);
  685. /* Turn off interrupt on count and zero DMA registers */
  686. ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC);
  687. /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
  688. ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI);
  689. ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */
  690. spin_unlock_irq(&chip->lock);
  691. synchronize_irq(chip->irq);
  692. if (chip->irq >= 0)
  693. free_irq(chip->irq, (void*)chip);
  694. skip_hw:
  695. if (chip->iobase)
  696. iounmap(chip->iobase);
  697. pci_release_regions(chip->pci);
  698. pci_disable_device(chip->pci);
  699. kfree(chip);
  700. return 0;
  701. }
  702. static inline int
  703. snd_ad1889_dev_free(struct snd_device *device)
  704. {
  705. struct snd_ad1889 *chip = device->device_data;
  706. return snd_ad1889_free(chip);
  707. }
  708. static int __devinit
  709. snd_ad1889_init(struct snd_ad1889 *chip)
  710. {
  711. ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */
  712. ad1889_readw(chip, AD_DS_CCS); /* flush posted write */
  713. mdelay(10);
  714. /* enable Master and Target abort interrupts */
  715. ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE);
  716. return 0;
  717. }
  718. static int __devinit
  719. snd_ad1889_create(struct snd_card *card,
  720. struct pci_dev *pci,
  721. struct snd_ad1889 **rchip)
  722. {
  723. int err;
  724. struct snd_ad1889 *chip;
  725. static struct snd_device_ops ops = {
  726. .dev_free = snd_ad1889_dev_free,
  727. };
  728. *rchip = NULL;
  729. if ((err = pci_enable_device(pci)) < 0)
  730. return err;
  731. /* check PCI availability (32bit DMA) */
  732. if (pci_set_dma_mask(pci, 0xffffffff) < 0 ||
  733. pci_set_consistent_dma_mask(pci, 0xffffffff) < 0) {
  734. printk(KERN_ERR PFX "error setting 32-bit DMA mask.\n");
  735. pci_disable_device(pci);
  736. return -ENXIO;
  737. }
  738. /* allocate chip specific data with zero-filled memory */
  739. if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
  740. pci_disable_device(pci);
  741. return -ENOMEM;
  742. }
  743. chip->card = card;
  744. card->private_data = chip;
  745. chip->pci = pci;
  746. chip->irq = -1;
  747. /* (1) PCI resource allocation */
  748. if ((err = pci_request_regions(pci, card->driver)) < 0)
  749. goto free_and_ret;
  750. chip->bar = pci_resource_start(pci, 0);
  751. chip->iobase = ioremap_nocache(chip->bar, pci_resource_len(pci, 0));
  752. if (chip->iobase == NULL) {
  753. printk(KERN_ERR PFX "unable to reserve region.\n");
  754. err = -EBUSY;
  755. goto free_and_ret;
  756. }
  757. pci_set_master(pci);
  758. spin_lock_init(&chip->lock); /* only now can we call ad1889_free */
  759. if (request_irq(pci->irq, snd_ad1889_interrupt,
  760. SA_INTERRUPT|SA_SHIRQ, card->driver, (void*)chip)) {
  761. printk(KERN_ERR PFX "cannot obtain IRQ %d\n", pci->irq);
  762. snd_ad1889_free(chip);
  763. return -EBUSY;
  764. }
  765. chip->irq = pci->irq;
  766. synchronize_irq(chip->irq);
  767. /* (2) initialization of the chip hardware */
  768. if ((err = snd_ad1889_init(chip)) < 0) {
  769. snd_ad1889_free(chip);
  770. return err;
  771. }
  772. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  773. snd_ad1889_free(chip);
  774. return err;
  775. }
  776. snd_card_set_dev(card, &pci->dev);
  777. *rchip = chip;
  778. return 0;
  779. free_and_ret:
  780. kfree(chip);
  781. pci_disable_device(pci);
  782. return err;
  783. }
  784. static int __devinit
  785. snd_ad1889_probe(struct pci_dev *pci,
  786. const struct pci_device_id *pci_id)
  787. {
  788. int err;
  789. static int devno;
  790. struct snd_card *card;
  791. struct snd_ad1889 *chip;
  792. /* (1) */
  793. if (devno >= SNDRV_CARDS)
  794. return -ENODEV;
  795. if (!enable[devno]) {
  796. devno++;
  797. return -ENOENT;
  798. }
  799. /* (2) */
  800. card = snd_card_new(index[devno], id[devno], THIS_MODULE, 0);
  801. /* XXX REVISIT: we can probably allocate chip in this call */
  802. if (card == NULL)
  803. return -ENOMEM;
  804. strcpy(card->driver, "AD1889");
  805. strcpy(card->shortname, "Analog Devices AD1889");
  806. /* (3) */
  807. err = snd_ad1889_create(card, pci, &chip);
  808. if (err < 0)
  809. goto free_and_ret;
  810. /* (4) */
  811. sprintf(card->longname, "%s at 0x%lx irq %i",
  812. card->shortname, chip->bar, chip->irq);
  813. /* (5) */
  814. /* register AC97 mixer */
  815. err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]);
  816. if (err < 0)
  817. goto free_and_ret;
  818. err = snd_ad1889_pcm_init(chip, 0, NULL);
  819. if (err < 0)
  820. goto free_and_ret;
  821. /* register proc interface */
  822. snd_ad1889_proc_init(chip);
  823. /* (6) */
  824. err = snd_card_register(card);
  825. if (err < 0)
  826. goto free_and_ret;
  827. /* (7) */
  828. pci_set_drvdata(pci, card);
  829. devno++;
  830. return 0;
  831. free_and_ret:
  832. snd_card_free(card);
  833. return err;
  834. }
  835. static void __devexit
  836. snd_ad1889_remove(struct pci_dev *pci)
  837. {
  838. snd_card_free(pci_get_drvdata(pci));
  839. pci_set_drvdata(pci, NULL);
  840. }
  841. static struct pci_device_id snd_ad1889_ids[] = {
  842. { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) },
  843. { 0, },
  844. };
  845. MODULE_DEVICE_TABLE(pci, snd_ad1889_ids);
  846. static struct pci_driver ad1889_pci = {
  847. .name = "AD1889 Audio",
  848. .id_table = snd_ad1889_ids,
  849. .probe = snd_ad1889_probe,
  850. .remove = __devexit_p(snd_ad1889_remove),
  851. };
  852. static int __init
  853. alsa_ad1889_init(void)
  854. {
  855. return pci_register_driver(&ad1889_pci);
  856. }
  857. static void __exit
  858. alsa_ad1889_fini(void)
  859. {
  860. pci_unregister_driver(&ad1889_pci);
  861. }
  862. module_init(alsa_ad1889_init);
  863. module_exit(alsa_ad1889_fini);