ac97_pcm.c 20 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Universal interface for Audio Codec '97
  4. *
  5. * For more details look to AC '97 component specification revision 2.2
  6. * by Intel Corporation (http://developer.intel.com) and to datasheets
  7. * for specific codecs.
  8. *
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. *
  24. */
  25. #include <sound/driver.h>
  26. #include <linux/delay.h>
  27. #include <linux/init.h>
  28. #include <linux/slab.h>
  29. #include <sound/core.h>
  30. #include <sound/pcm.h>
  31. #include <sound/control.h>
  32. #include <sound/ac97_codec.h>
  33. #include <sound/asoundef.h>
  34. #include "ac97_patch.h"
  35. #include "ac97_id.h"
  36. #include "ac97_local.h"
  37. /*
  38. * PCM support
  39. */
  40. static unsigned char rate_reg_tables[2][4][9] = {
  41. {
  42. /* standard rates */
  43. {
  44. /* 3&4 front, 7&8 rear, 6&9 center/lfe */
  45. AC97_PCM_FRONT_DAC_RATE, /* slot 3 */
  46. AC97_PCM_FRONT_DAC_RATE, /* slot 4 */
  47. 0xff, /* slot 5 */
  48. AC97_PCM_LFE_DAC_RATE, /* slot 6 */
  49. AC97_PCM_SURR_DAC_RATE, /* slot 7 */
  50. AC97_PCM_SURR_DAC_RATE, /* slot 8 */
  51. AC97_PCM_LFE_DAC_RATE, /* slot 9 */
  52. 0xff, /* slot 10 */
  53. 0xff, /* slot 11 */
  54. },
  55. {
  56. /* 7&8 front, 6&9 rear, 10&11 center/lfe */
  57. 0xff, /* slot 3 */
  58. 0xff, /* slot 4 */
  59. 0xff, /* slot 5 */
  60. AC97_PCM_SURR_DAC_RATE, /* slot 6 */
  61. AC97_PCM_FRONT_DAC_RATE, /* slot 7 */
  62. AC97_PCM_FRONT_DAC_RATE, /* slot 8 */
  63. AC97_PCM_SURR_DAC_RATE, /* slot 9 */
  64. AC97_PCM_LFE_DAC_RATE, /* slot 10 */
  65. AC97_PCM_LFE_DAC_RATE, /* slot 11 */
  66. },
  67. {
  68. /* 6&9 front, 10&11 rear, 3&4 center/lfe */
  69. AC97_PCM_LFE_DAC_RATE, /* slot 3 */
  70. AC97_PCM_LFE_DAC_RATE, /* slot 4 */
  71. 0xff, /* slot 5 */
  72. AC97_PCM_FRONT_DAC_RATE, /* slot 6 */
  73. 0xff, /* slot 7 */
  74. 0xff, /* slot 8 */
  75. AC97_PCM_FRONT_DAC_RATE, /* slot 9 */
  76. AC97_PCM_SURR_DAC_RATE, /* slot 10 */
  77. AC97_PCM_SURR_DAC_RATE, /* slot 11 */
  78. },
  79. {
  80. /* 10&11 front, 3&4 rear, 7&8 center/lfe */
  81. AC97_PCM_SURR_DAC_RATE, /* slot 3 */
  82. AC97_PCM_SURR_DAC_RATE, /* slot 4 */
  83. 0xff, /* slot 5 */
  84. 0xff, /* slot 6 */
  85. AC97_PCM_LFE_DAC_RATE, /* slot 7 */
  86. AC97_PCM_LFE_DAC_RATE, /* slot 8 */
  87. 0xff, /* slot 9 */
  88. AC97_PCM_FRONT_DAC_RATE, /* slot 10 */
  89. AC97_PCM_FRONT_DAC_RATE, /* slot 11 */
  90. },
  91. },
  92. {
  93. /* double rates */
  94. {
  95. /* 3&4 front, 7&8 front (t+1) */
  96. AC97_PCM_FRONT_DAC_RATE, /* slot 3 */
  97. AC97_PCM_FRONT_DAC_RATE, /* slot 4 */
  98. 0xff, /* slot 5 */
  99. 0xff, /* slot 6 */
  100. AC97_PCM_FRONT_DAC_RATE, /* slot 7 */
  101. AC97_PCM_FRONT_DAC_RATE, /* slot 8 */
  102. 0xff, /* slot 9 */
  103. 0xff, /* slot 10 */
  104. 0xff, /* slot 11 */
  105. },
  106. {
  107. /* not specified in the specification */
  108. 0xff, /* slot 3 */
  109. 0xff, /* slot 4 */
  110. 0xff, /* slot 5 */
  111. 0xff, /* slot 6 */
  112. 0xff, /* slot 7 */
  113. 0xff, /* slot 8 */
  114. 0xff, /* slot 9 */
  115. 0xff, /* slot 10 */
  116. 0xff, /* slot 11 */
  117. },
  118. {
  119. 0xff, /* slot 3 */
  120. 0xff, /* slot 4 */
  121. 0xff, /* slot 5 */
  122. 0xff, /* slot 6 */
  123. 0xff, /* slot 7 */
  124. 0xff, /* slot 8 */
  125. 0xff, /* slot 9 */
  126. 0xff, /* slot 10 */
  127. 0xff, /* slot 11 */
  128. },
  129. {
  130. 0xff, /* slot 3 */
  131. 0xff, /* slot 4 */
  132. 0xff, /* slot 5 */
  133. 0xff, /* slot 6 */
  134. 0xff, /* slot 7 */
  135. 0xff, /* slot 8 */
  136. 0xff, /* slot 9 */
  137. 0xff, /* slot 10 */
  138. 0xff, /* slot 11 */
  139. }
  140. }};
  141. /* FIXME: more various mappings for ADC? */
  142. static unsigned char rate_cregs[9] = {
  143. AC97_PCM_LR_ADC_RATE, /* 3 */
  144. AC97_PCM_LR_ADC_RATE, /* 4 */
  145. 0xff, /* 5 */
  146. AC97_PCM_MIC_ADC_RATE, /* 6 */
  147. 0xff, /* 7 */
  148. 0xff, /* 8 */
  149. 0xff, /* 9 */
  150. 0xff, /* 10 */
  151. 0xff, /* 11 */
  152. };
  153. static unsigned char get_slot_reg(struct ac97_pcm *pcm, unsigned short cidx,
  154. unsigned short slot, int dbl)
  155. {
  156. if (slot < 3)
  157. return 0xff;
  158. if (slot > 11)
  159. return 0xff;
  160. if (pcm->spdif)
  161. return AC97_SPDIF; /* pseudo register */
  162. if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK)
  163. return rate_reg_tables[dbl][pcm->r[dbl].rate_table[cidx]][slot - 3];
  164. else
  165. return rate_cregs[slot - 3];
  166. }
  167. static int set_spdif_rate(struct snd_ac97 *ac97, unsigned short rate)
  168. {
  169. unsigned short old, bits, reg, mask;
  170. unsigned int sbits;
  171. if (! (ac97->ext_id & AC97_EI_SPDIF))
  172. return -ENODEV;
  173. /* TODO: double rate support */
  174. if (ac97->flags & AC97_CS_SPDIF) {
  175. switch (rate) {
  176. case 48000: bits = 0; break;
  177. case 44100: bits = 1 << AC97_SC_SPSR_SHIFT; break;
  178. default: /* invalid - disable output */
  179. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  180. return -EINVAL;
  181. }
  182. reg = AC97_CSR_SPDIF;
  183. mask = 1 << AC97_SC_SPSR_SHIFT;
  184. } else {
  185. if (ac97->id == AC97_ID_CM9739 && rate != 48000) {
  186. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  187. return -EINVAL;
  188. }
  189. switch (rate) {
  190. case 44100: bits = AC97_SC_SPSR_44K; break;
  191. case 48000: bits = AC97_SC_SPSR_48K; break;
  192. case 32000: bits = AC97_SC_SPSR_32K; break;
  193. default: /* invalid - disable output */
  194. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  195. return -EINVAL;
  196. }
  197. reg = AC97_SPDIF;
  198. mask = AC97_SC_SPSR_MASK;
  199. }
  200. down(&ac97->reg_mutex);
  201. old = snd_ac97_read(ac97, reg) & mask;
  202. if (old != bits) {
  203. snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  204. snd_ac97_update_bits_nolock(ac97, reg, mask, bits);
  205. /* update the internal spdif bits */
  206. sbits = ac97->spdif_status;
  207. if (sbits & IEC958_AES0_PROFESSIONAL) {
  208. sbits &= ~IEC958_AES0_PRO_FS;
  209. switch (rate) {
  210. case 44100: sbits |= IEC958_AES0_PRO_FS_44100; break;
  211. case 48000: sbits |= IEC958_AES0_PRO_FS_48000; break;
  212. case 32000: sbits |= IEC958_AES0_PRO_FS_32000; break;
  213. }
  214. } else {
  215. sbits &= ~(IEC958_AES3_CON_FS << 24);
  216. switch (rate) {
  217. case 44100: sbits |= IEC958_AES3_CON_FS_44100<<24; break;
  218. case 48000: sbits |= IEC958_AES3_CON_FS_48000<<24; break;
  219. case 32000: sbits |= IEC958_AES3_CON_FS_32000<<24; break;
  220. }
  221. }
  222. ac97->spdif_status = sbits;
  223. }
  224. snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF);
  225. up(&ac97->reg_mutex);
  226. return 0;
  227. }
  228. /**
  229. * snd_ac97_set_rate - change the rate of the given input/output.
  230. * @ac97: the ac97 instance
  231. * @reg: the register to change
  232. * @rate: the sample rate to set
  233. *
  234. * Changes the rate of the given input/output on the codec.
  235. * If the codec doesn't support VAR, the rate must be 48000 (except
  236. * for SPDIF).
  237. *
  238. * The valid registers are AC97_PMC_MIC_ADC_RATE,
  239. * AC97_PCM_FRONT_DAC_RATE, AC97_PCM_LR_ADC_RATE.
  240. * AC97_PCM_SURR_DAC_RATE and AC97_PCM_LFE_DAC_RATE are accepted
  241. * if the codec supports them.
  242. * AC97_SPDIF is accepted as a pseudo register to modify the SPDIF
  243. * status bits.
  244. *
  245. * Returns zero if successful, or a negative error code on failure.
  246. */
  247. int snd_ac97_set_rate(struct snd_ac97 *ac97, int reg, unsigned int rate)
  248. {
  249. int dbl;
  250. unsigned int tmp;
  251. dbl = rate > 48000;
  252. if (dbl) {
  253. if (!(ac97->flags & AC97_DOUBLE_RATE))
  254. return -EINVAL;
  255. if (reg != AC97_PCM_FRONT_DAC_RATE)
  256. return -EINVAL;
  257. }
  258. switch (reg) {
  259. case AC97_PCM_MIC_ADC_RATE:
  260. if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRM) == 0) /* MIC VRA */
  261. if (rate != 48000)
  262. return -EINVAL;
  263. break;
  264. case AC97_PCM_FRONT_DAC_RATE:
  265. case AC97_PCM_LR_ADC_RATE:
  266. if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRA) == 0) /* VRA */
  267. if (rate != 48000 && rate != 96000)
  268. return -EINVAL;
  269. break;
  270. case AC97_PCM_SURR_DAC_RATE:
  271. if (! (ac97->scaps & AC97_SCAP_SURROUND_DAC))
  272. return -EINVAL;
  273. break;
  274. case AC97_PCM_LFE_DAC_RATE:
  275. if (! (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
  276. return -EINVAL;
  277. break;
  278. case AC97_SPDIF:
  279. /* special case */
  280. return set_spdif_rate(ac97, rate);
  281. default:
  282. return -EINVAL;
  283. }
  284. if (dbl)
  285. rate /= 2;
  286. tmp = (rate * ac97->bus->clock) / 48000;
  287. if (tmp > 65535)
  288. return -EINVAL;
  289. if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE)
  290. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
  291. AC97_EA_DRA, dbl ? AC97_EA_DRA : 0);
  292. snd_ac97_update(ac97, reg, tmp & 0xffff);
  293. snd_ac97_read(ac97, reg);
  294. if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) {
  295. /* Intel controllers require double rate data to be put in
  296. * slots 7+8
  297. */
  298. snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE,
  299. AC97_GP_DRSS_MASK,
  300. dbl ? AC97_GP_DRSS_78 : 0);
  301. snd_ac97_read(ac97, AC97_GENERAL_PURPOSE);
  302. }
  303. return 0;
  304. }
  305. static unsigned short get_pslots(struct snd_ac97 *ac97, unsigned char *rate_table, unsigned short *spdif_slots)
  306. {
  307. if (!ac97_is_audio(ac97))
  308. return 0;
  309. if (ac97_is_rev22(ac97) || ac97_can_amap(ac97)) {
  310. unsigned short slots = 0;
  311. if (ac97_is_rev22(ac97)) {
  312. /* Note: it's simply emulation of AMAP behaviour */
  313. u16 es;
  314. es = ac97->regs[AC97_EXTENDED_ID] &= ~AC97_EI_DACS_SLOT_MASK;
  315. switch (ac97->addr) {
  316. case 1:
  317. case 2: es |= (1<<AC97_EI_DACS_SLOT_SHIFT); break;
  318. case 3: es |= (2<<AC97_EI_DACS_SLOT_SHIFT); break;
  319. }
  320. snd_ac97_write_cache(ac97, AC97_EXTENDED_ID, es);
  321. }
  322. switch (ac97->addr) {
  323. case 0:
  324. slots |= (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
  325. if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
  326. slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
  327. if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
  328. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  329. if (ac97->ext_id & AC97_EI_SPDIF) {
  330. if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
  331. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT);
  332. else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
  333. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
  334. else
  335. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  336. }
  337. *rate_table = 0;
  338. break;
  339. case 1:
  340. case 2:
  341. slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
  342. if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
  343. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  344. if (ac97->ext_id & AC97_EI_SPDIF) {
  345. if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
  346. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
  347. else
  348. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  349. }
  350. *rate_table = 1;
  351. break;
  352. case 3:
  353. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  354. if (ac97->ext_id & AC97_EI_SPDIF)
  355. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  356. *rate_table = 2;
  357. break;
  358. }
  359. return slots;
  360. } else {
  361. unsigned short slots;
  362. slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
  363. if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
  364. slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
  365. if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
  366. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  367. if (ac97->ext_id & AC97_EI_SPDIF) {
  368. if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
  369. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT);
  370. else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
  371. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
  372. else
  373. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  374. }
  375. *rate_table = 0;
  376. return slots;
  377. }
  378. }
  379. static unsigned short get_cslots(struct snd_ac97 *ac97)
  380. {
  381. unsigned short slots;
  382. if (!ac97_is_audio(ac97))
  383. return 0;
  384. slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
  385. slots |= (1<<AC97_SLOT_MIC);
  386. return slots;
  387. }
  388. static unsigned int get_rates(struct ac97_pcm *pcm, unsigned int cidx, unsigned short slots, int dbl)
  389. {
  390. int i, idx;
  391. unsigned int rates = ~0;
  392. unsigned char reg;
  393. for (i = 3; i < 12; i++) {
  394. if (!(slots & (1 << i)))
  395. continue;
  396. reg = get_slot_reg(pcm, cidx, i, dbl);
  397. switch (reg) {
  398. case AC97_PCM_FRONT_DAC_RATE: idx = AC97_RATES_FRONT_DAC; break;
  399. case AC97_PCM_SURR_DAC_RATE: idx = AC97_RATES_SURR_DAC; break;
  400. case AC97_PCM_LFE_DAC_RATE: idx = AC97_RATES_LFE_DAC; break;
  401. case AC97_PCM_LR_ADC_RATE: idx = AC97_RATES_ADC; break;
  402. case AC97_PCM_MIC_ADC_RATE: idx = AC97_RATES_MIC_ADC; break;
  403. default: idx = AC97_RATES_SPDIF; break;
  404. }
  405. rates &= pcm->r[dbl].codec[cidx]->rates[idx];
  406. }
  407. if (!dbl)
  408. rates &= ~(SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 |
  409. SNDRV_PCM_RATE_96000);
  410. return rates;
  411. }
  412. /**
  413. * snd_ac97_pcm_assign - assign AC97 slots to given PCM streams
  414. * @bus: the ac97 bus instance
  415. * @pcms_count: count of PCMs to be assigned
  416. * @pcms: PCMs to be assigned
  417. *
  418. * It assigns available AC97 slots for given PCMs. If none or only
  419. * some slots are available, pcm->xxx.slots and pcm->xxx.rslots[] members
  420. * are reduced and might be zero.
  421. */
  422. int snd_ac97_pcm_assign(struct snd_ac97_bus *bus,
  423. unsigned short pcms_count,
  424. const struct ac97_pcm *pcms)
  425. {
  426. int i, j, k;
  427. const struct ac97_pcm *pcm;
  428. struct ac97_pcm *rpcms, *rpcm;
  429. unsigned short avail_slots[2][4];
  430. unsigned char rate_table[2][4];
  431. unsigned short tmp, slots;
  432. unsigned short spdif_slots[4];
  433. unsigned int rates;
  434. struct snd_ac97 *codec;
  435. rpcms = kcalloc(pcms_count, sizeof(struct ac97_pcm), GFP_KERNEL);
  436. if (rpcms == NULL)
  437. return -ENOMEM;
  438. memset(avail_slots, 0, sizeof(avail_slots));
  439. memset(rate_table, 0, sizeof(rate_table));
  440. memset(spdif_slots, 0, sizeof(spdif_slots));
  441. for (i = 0; i < 4; i++) {
  442. codec = bus->codec[i];
  443. if (!codec)
  444. continue;
  445. avail_slots[0][i] = get_pslots(codec, &rate_table[0][i], &spdif_slots[i]);
  446. avail_slots[1][i] = get_cslots(codec);
  447. if (!(codec->scaps & AC97_SCAP_INDEP_SDIN)) {
  448. for (j = 0; j < i; j++) {
  449. if (bus->codec[j])
  450. avail_slots[1][i] &= ~avail_slots[1][j];
  451. }
  452. }
  453. }
  454. /* first step - exclusive devices */
  455. for (i = 0; i < pcms_count; i++) {
  456. pcm = &pcms[i];
  457. rpcm = &rpcms[i];
  458. /* low-level driver thinks that it's more clever */
  459. if (pcm->copy_flag) {
  460. *rpcm = *pcm;
  461. continue;
  462. }
  463. rpcm->stream = pcm->stream;
  464. rpcm->exclusive = pcm->exclusive;
  465. rpcm->spdif = pcm->spdif;
  466. rpcm->private_value = pcm->private_value;
  467. rpcm->bus = bus;
  468. rpcm->rates = ~0;
  469. slots = pcm->r[0].slots;
  470. for (j = 0; j < 4 && slots; j++) {
  471. if (!bus->codec[j])
  472. continue;
  473. rates = ~0;
  474. if (pcm->spdif && pcm->stream == 0)
  475. tmp = spdif_slots[j];
  476. else
  477. tmp = avail_slots[pcm->stream][j];
  478. if (pcm->exclusive) {
  479. /* exclusive access */
  480. tmp &= slots;
  481. for (k = 0; k < i; k++) {
  482. if (rpcm->stream == rpcms[k].stream)
  483. tmp &= ~rpcms[k].r[0].rslots[j];
  484. }
  485. } else {
  486. /* non-exclusive access */
  487. tmp &= pcm->r[0].slots;
  488. }
  489. if (tmp) {
  490. rpcm->r[0].rslots[j] = tmp;
  491. rpcm->r[0].codec[j] = bus->codec[j];
  492. rpcm->r[0].rate_table[j] = rate_table[pcm->stream][j];
  493. if (bus->no_vra)
  494. rates = SNDRV_PCM_RATE_48000;
  495. else
  496. rates = get_rates(rpcm, j, tmp, 0);
  497. if (pcm->exclusive)
  498. avail_slots[pcm->stream][j] &= ~tmp;
  499. }
  500. slots &= ~tmp;
  501. rpcm->r[0].slots |= tmp;
  502. rpcm->rates &= rates;
  503. }
  504. /* for double rate, we check the first codec only */
  505. if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK &&
  506. bus->codec[0] && (bus->codec[0]->flags & AC97_DOUBLE_RATE) &&
  507. rate_table[pcm->stream][0] == 0) {
  508. tmp = (1<<AC97_SLOT_PCM_LEFT) | (1<<AC97_SLOT_PCM_RIGHT) |
  509. (1<<AC97_SLOT_PCM_LEFT_0) | (1<<AC97_SLOT_PCM_RIGHT_0);
  510. if ((tmp & pcm->r[1].slots) == tmp) {
  511. rpcm->r[1].slots = tmp;
  512. rpcm->r[1].rslots[0] = tmp;
  513. rpcm->r[1].rate_table[0] = 0;
  514. rpcm->r[1].codec[0] = bus->codec[0];
  515. if (pcm->exclusive)
  516. avail_slots[pcm->stream][0] &= ~tmp;
  517. if (bus->no_vra)
  518. rates = SNDRV_PCM_RATE_96000;
  519. else
  520. rates = get_rates(rpcm, 0, tmp, 1);
  521. rpcm->rates |= rates;
  522. }
  523. }
  524. if (rpcm->rates == ~0)
  525. rpcm->rates = 0; /* not used */
  526. }
  527. bus->pcms_count = pcms_count;
  528. bus->pcms = rpcms;
  529. return 0;
  530. }
  531. /**
  532. * snd_ac97_pcm_open - opens the given AC97 pcm
  533. * @pcm: the ac97 pcm instance
  534. * @rate: rate in Hz, if codec does not support VRA, this value must be 48000Hz
  535. * @cfg: output stream characteristics
  536. * @slots: a subset of allocated slots (snd_ac97_pcm_assign) for this pcm
  537. *
  538. * It locks the specified slots and sets the given rate to AC97 registers.
  539. */
  540. int snd_ac97_pcm_open(struct ac97_pcm *pcm, unsigned int rate,
  541. enum ac97_pcm_cfg cfg, unsigned short slots)
  542. {
  543. struct snd_ac97_bus *bus;
  544. int i, cidx, r, ok_flag;
  545. unsigned int reg_ok[4] = {0,0,0,0};
  546. unsigned char reg;
  547. int err = 0;
  548. r = rate > 48000;
  549. bus = pcm->bus;
  550. if (cfg == AC97_PCM_CFG_SPDIF) {
  551. int err;
  552. for (cidx = 0; cidx < 4; cidx++)
  553. if (bus->codec[cidx] && (bus->codec[cidx]->ext_id & AC97_EI_SPDIF)) {
  554. err = set_spdif_rate(bus->codec[cidx], rate);
  555. if (err < 0)
  556. return err;
  557. }
  558. }
  559. spin_lock_irq(&pcm->bus->bus_lock);
  560. for (i = 3; i < 12; i++) {
  561. if (!(slots & (1 << i)))
  562. continue;
  563. ok_flag = 0;
  564. for (cidx = 0; cidx < 4; cidx++) {
  565. if (bus->used_slots[pcm->stream][cidx] & (1 << i)) {
  566. spin_unlock_irq(&pcm->bus->bus_lock);
  567. err = -EBUSY;
  568. goto error;
  569. }
  570. if (pcm->r[r].rslots[cidx] & (1 << i)) {
  571. bus->used_slots[pcm->stream][cidx] |= (1 << i);
  572. ok_flag++;
  573. }
  574. }
  575. if (!ok_flag) {
  576. spin_unlock_irq(&pcm->bus->bus_lock);
  577. snd_printk(KERN_ERR "cannot find configuration for AC97 slot %i\n", i);
  578. err = -EAGAIN;
  579. goto error;
  580. }
  581. }
  582. spin_unlock_irq(&pcm->bus->bus_lock);
  583. for (i = 3; i < 12; i++) {
  584. if (!(slots & (1 << i)))
  585. continue;
  586. for (cidx = 0; cidx < 4; cidx++) {
  587. if (pcm->r[r].rslots[cidx] & (1 << i)) {
  588. reg = get_slot_reg(pcm, cidx, i, r);
  589. if (reg == 0xff) {
  590. snd_printk(KERN_ERR "invalid AC97 slot %i?\n", i);
  591. continue;
  592. }
  593. if (reg_ok[cidx] & (1 << (reg - AC97_PCM_FRONT_DAC_RATE)))
  594. continue;
  595. //printk(KERN_DEBUG "setting ac97 reg 0x%x to rate %d\n", reg, rate);
  596. err = snd_ac97_set_rate(pcm->r[r].codec[cidx], reg, rate);
  597. if (err < 0)
  598. snd_printk(KERN_ERR "error in snd_ac97_set_rate: cidx=%d, reg=0x%x, rate=%d, err=%d\n", cidx, reg, rate, err);
  599. else
  600. reg_ok[cidx] |= (1 << (reg - AC97_PCM_FRONT_DAC_RATE));
  601. }
  602. }
  603. }
  604. pcm->aslots = slots;
  605. return 0;
  606. error:
  607. pcm->aslots = slots;
  608. snd_ac97_pcm_close(pcm);
  609. return err;
  610. }
  611. /**
  612. * snd_ac97_pcm_close - closes the given AC97 pcm
  613. * @pcm: the ac97 pcm instance
  614. *
  615. * It frees the locked AC97 slots.
  616. */
  617. int snd_ac97_pcm_close(struct ac97_pcm *pcm)
  618. {
  619. struct snd_ac97_bus *bus;
  620. unsigned short slots = pcm->aslots;
  621. int i, cidx;
  622. bus = pcm->bus;
  623. spin_lock_irq(&pcm->bus->bus_lock);
  624. for (i = 3; i < 12; i++) {
  625. if (!(slots & (1 << i)))
  626. continue;
  627. for (cidx = 0; cidx < 4; cidx++)
  628. bus->used_slots[pcm->stream][cidx] &= ~(1 << i);
  629. }
  630. pcm->aslots = 0;
  631. spin_unlock_irq(&pcm->bus->bus_lock);
  632. return 0;
  633. }
  634. static int double_rate_hw_constraint_rate(struct snd_pcm_hw_params *params,
  635. struct snd_pcm_hw_rule *rule)
  636. {
  637. struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
  638. if (channels->min > 2) {
  639. static const struct snd_interval single_rates = {
  640. .min = 1,
  641. .max = 48000,
  642. };
  643. struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
  644. return snd_interval_refine(rate, &single_rates);
  645. }
  646. return 0;
  647. }
  648. static int double_rate_hw_constraint_channels(struct snd_pcm_hw_params *params,
  649. struct snd_pcm_hw_rule *rule)
  650. {
  651. struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
  652. if (rate->min > 48000) {
  653. static const struct snd_interval double_rate_channels = {
  654. .min = 2,
  655. .max = 2,
  656. };
  657. struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
  658. return snd_interval_refine(channels, &double_rate_channels);
  659. }
  660. return 0;
  661. }
  662. /**
  663. * snd_ac97_pcm_double_rate_rules - set double rate constraints
  664. * @runtime: the runtime of the ac97 front playback pcm
  665. *
  666. * Installs the hardware constraint rules to prevent using double rates and
  667. * more than two channels at the same time.
  668. */
  669. int snd_ac97_pcm_double_rate_rules(struct snd_pcm_runtime *runtime)
  670. {
  671. int err;
  672. err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  673. double_rate_hw_constraint_rate, NULL,
  674. SNDRV_PCM_HW_PARAM_CHANNELS, -1);
  675. if (err < 0)
  676. return err;
  677. err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
  678. double_rate_hw_constraint_channels, NULL,
  679. SNDRV_PCM_HW_PARAM_RATE, -1);
  680. return err;
  681. }