sscape.c 35 KB

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  1. /*
  2. * sound/sscape.c
  3. *
  4. * Low level driver for Ensoniq SoundScape
  5. *
  6. *
  7. * Copyright (C) by Hannu Savolainen 1993-1997
  8. *
  9. * OSS/Free for Linux is distributed under the GNU GENERAL PUBLIC LICENSE (GPL)
  10. * Version 2 (June 1991). See the "COPYING" file distributed with this software
  11. * for more info.
  12. *
  13. *
  14. * Thomas Sailer : ioctl code reworked (vmalloc/vfree removed)
  15. * Sergey Smitienko : ensoniq p'n'p support
  16. * Christoph Hellwig : adapted to module_init/module_exit
  17. * Bartlomiej Zolnierkiewicz : added __init to attach_sscape()
  18. * Chris Rankin : Specify that this module owns the coprocessor
  19. * Arnaldo C. de Melo : added missing restore_flags in sscape_pnp_upload_file
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include "sound_config.h"
  24. #include "sound_firmware.h"
  25. #include <linux/types.h>
  26. #include <linux/errno.h>
  27. #include <linux/signal.h>
  28. #include <linux/fcntl.h>
  29. #include <linux/ctype.h>
  30. #include <linux/stddef.h>
  31. #include <linux/kmod.h>
  32. #include <asm/dma.h>
  33. #include <asm/io.h>
  34. #include <linux/wait.h>
  35. #include <linux/slab.h>
  36. #include <linux/ioport.h>
  37. #include <linux/delay.h>
  38. #include <linux/proc_fs.h>
  39. #include <linux/spinlock.h>
  40. #include "coproc.h"
  41. #include "ad1848.h"
  42. #include "mpu401.h"
  43. /*
  44. * I/O ports
  45. */
  46. #define MIDI_DATA 0
  47. #define MIDI_CTRL 1
  48. #define HOST_CTRL 2
  49. #define TX_READY 0x02
  50. #define RX_READY 0x01
  51. #define HOST_DATA 3
  52. #define ODIE_ADDR 4
  53. #define ODIE_DATA 5
  54. /*
  55. * Indirect registers
  56. */
  57. #define GA_INTSTAT_REG 0
  58. #define GA_INTENA_REG 1
  59. #define GA_DMAA_REG 2
  60. #define GA_DMAB_REG 3
  61. #define GA_INTCFG_REG 4
  62. #define GA_DMACFG_REG 5
  63. #define GA_CDCFG_REG 6
  64. #define GA_SMCFGA_REG 7
  65. #define GA_SMCFGB_REG 8
  66. #define GA_HMCTL_REG 9
  67. /*
  68. * DMA channel identifiers (A and B)
  69. */
  70. #define SSCAPE_DMA_A 0
  71. #define SSCAPE_DMA_B 1
  72. #define PORT(name) (devc->base+name)
  73. /*
  74. * Host commands recognized by the OBP microcode
  75. */
  76. #define CMD_GEN_HOST_ACK 0x80
  77. #define CMD_GEN_MPU_ACK 0x81
  78. #define CMD_GET_BOARD_TYPE 0x82
  79. #define CMD_SET_CONTROL 0x88 /* Old firmware only */
  80. #define CMD_GET_CONTROL 0x89 /* Old firmware only */
  81. #define CTL_MASTER_VOL 0
  82. #define CTL_MIC_MODE 2
  83. #define CTL_SYNTH_VOL 4
  84. #define CTL_WAVE_VOL 7
  85. #define CMD_SET_EXTMIDI 0x8a
  86. #define CMD_GET_EXTMIDI 0x8b
  87. #define CMD_SET_MT32 0x8c
  88. #define CMD_GET_MT32 0x8d
  89. #define CMD_ACK 0x80
  90. #define IC_ODIE 1
  91. #define IC_OPUS 2
  92. typedef struct sscape_info
  93. {
  94. int base, irq, dma;
  95. int codec, codec_irq; /* required to setup pnp cards*/
  96. int codec_type;
  97. int ic_type;
  98. char* raw_buf;
  99. unsigned long raw_buf_phys;
  100. int buffsize; /* -------------------------- */
  101. spinlock_t lock;
  102. int ok; /* Properly detected */
  103. int failed;
  104. int dma_allocated;
  105. int codec_audiodev;
  106. int opened;
  107. int *osp;
  108. int my_audiodev;
  109. } sscape_info;
  110. static struct sscape_info adev_info = {
  111. 0
  112. };
  113. static struct sscape_info *devc = &adev_info;
  114. static int sscape_mididev = -1;
  115. /* Some older cards have assigned interrupt bits differently than new ones */
  116. static char valid_interrupts_old[] = {
  117. 9, 7, 5, 15
  118. };
  119. static char valid_interrupts_new[] = {
  120. 9, 5, 7, 10
  121. };
  122. static char *valid_interrupts = valid_interrupts_new;
  123. /*
  124. * See the bottom of the driver. This can be set by spea =0/1.
  125. */
  126. #ifdef REVEAL_SPEA
  127. static char old_hardware = 1;
  128. #else
  129. static char old_hardware;
  130. #endif
  131. static void sleep(unsigned howlong)
  132. {
  133. current->state = TASK_INTERRUPTIBLE;
  134. schedule_timeout(howlong);
  135. }
  136. static unsigned char sscape_read(struct sscape_info *devc, int reg)
  137. {
  138. unsigned long flags;
  139. unsigned char val;
  140. spin_lock_irqsave(&devc->lock,flags);
  141. outb(reg, PORT(ODIE_ADDR));
  142. val = inb(PORT(ODIE_DATA));
  143. spin_unlock_irqrestore(&devc->lock,flags);
  144. return val;
  145. }
  146. static void __sscape_write(int reg, int data)
  147. {
  148. outb(reg, PORT(ODIE_ADDR));
  149. outb(data, PORT(ODIE_DATA));
  150. }
  151. static void sscape_write(struct sscape_info *devc, int reg, int data)
  152. {
  153. unsigned long flags;
  154. spin_lock_irqsave(&devc->lock,flags);
  155. __sscape_write(reg, data);
  156. spin_unlock_irqrestore(&devc->lock,flags);
  157. }
  158. static unsigned char sscape_pnp_read_codec(sscape_info* devc, unsigned char reg)
  159. {
  160. unsigned char res;
  161. unsigned long flags;
  162. spin_lock_irqsave(&devc->lock,flags);
  163. outb( reg, devc -> codec);
  164. res = inb (devc -> codec + 1);
  165. spin_unlock_irqrestore(&devc->lock,flags);
  166. return res;
  167. }
  168. static void sscape_pnp_write_codec(sscape_info* devc, unsigned char reg, unsigned char data)
  169. {
  170. unsigned long flags;
  171. spin_lock_irqsave(&devc->lock,flags);
  172. outb( reg, devc -> codec);
  173. outb( data, devc -> codec + 1);
  174. spin_unlock_irqrestore(&devc->lock,flags);
  175. }
  176. static void host_open(struct sscape_info *devc)
  177. {
  178. outb((0x00), PORT(HOST_CTRL)); /* Put the board to the host mode */
  179. }
  180. static void host_close(struct sscape_info *devc)
  181. {
  182. outb((0x03), PORT(HOST_CTRL)); /* Put the board to the MIDI mode */
  183. }
  184. static int host_write(struct sscape_info *devc, unsigned char *data, int count)
  185. {
  186. unsigned long flags;
  187. int i, timeout_val;
  188. spin_lock_irqsave(&devc->lock,flags);
  189. /*
  190. * Send the command and data bytes
  191. */
  192. for (i = 0; i < count; i++)
  193. {
  194. for (timeout_val = 10000; timeout_val > 0; timeout_val--)
  195. if (inb(PORT(HOST_CTRL)) & TX_READY)
  196. break;
  197. if (timeout_val <= 0)
  198. {
  199. spin_unlock_irqrestore(&devc->lock,flags);
  200. return 0;
  201. }
  202. outb(data[i], PORT(HOST_DATA));
  203. }
  204. spin_unlock_irqrestore(&devc->lock,flags);
  205. return 1;
  206. }
  207. static int host_read(struct sscape_info *devc)
  208. {
  209. unsigned long flags;
  210. int timeout_val;
  211. unsigned char data;
  212. spin_lock_irqsave(&devc->lock,flags);
  213. /*
  214. * Read a byte
  215. */
  216. for (timeout_val = 10000; timeout_val > 0; timeout_val--)
  217. if (inb(PORT(HOST_CTRL)) & RX_READY)
  218. break;
  219. if (timeout_val <= 0)
  220. {
  221. spin_unlock_irqrestore(&devc->lock,flags);
  222. return -1;
  223. }
  224. data = inb(PORT(HOST_DATA));
  225. spin_unlock_irqrestore(&devc->lock,flags);
  226. return data;
  227. }
  228. #if 0 /* unused */
  229. static int host_command1(struct sscape_info *devc, int cmd)
  230. {
  231. unsigned char buf[10];
  232. buf[0] = (unsigned char) (cmd & 0xff);
  233. return host_write(devc, buf, 1);
  234. }
  235. #endif /* unused */
  236. static int host_command2(struct sscape_info *devc, int cmd, int parm1)
  237. {
  238. unsigned char buf[10];
  239. buf[0] = (unsigned char) (cmd & 0xff);
  240. buf[1] = (unsigned char) (parm1 & 0xff);
  241. return host_write(devc, buf, 2);
  242. }
  243. static int host_command3(struct sscape_info *devc, int cmd, int parm1, int parm2)
  244. {
  245. unsigned char buf[10];
  246. buf[0] = (unsigned char) (cmd & 0xff);
  247. buf[1] = (unsigned char) (parm1 & 0xff);
  248. buf[2] = (unsigned char) (parm2 & 0xff);
  249. return host_write(devc, buf, 3);
  250. }
  251. static void set_mt32(struct sscape_info *devc, int value)
  252. {
  253. host_open(devc);
  254. host_command2(devc, CMD_SET_MT32, value ? 1 : 0);
  255. if (host_read(devc) != CMD_ACK)
  256. {
  257. /* printk( "SNDSCAPE: Setting MT32 mode failed\n"); */
  258. }
  259. host_close(devc);
  260. }
  261. static void set_control(struct sscape_info *devc, int ctrl, int value)
  262. {
  263. host_open(devc);
  264. host_command3(devc, CMD_SET_CONTROL, ctrl, value);
  265. if (host_read(devc) != CMD_ACK)
  266. {
  267. /* printk( "SNDSCAPE: Setting control (%d) failed\n", ctrl); */
  268. }
  269. host_close(devc);
  270. }
  271. static void do_dma(struct sscape_info *devc, int dma_chan, unsigned long buf, int blk_size, int mode)
  272. {
  273. unsigned char temp;
  274. if (dma_chan != SSCAPE_DMA_A)
  275. {
  276. printk(KERN_WARNING "soundscape: Tried to use DMA channel != A. Why?\n");
  277. return;
  278. }
  279. audio_devs[devc->codec_audiodev]->flags &= ~DMA_AUTOMODE;
  280. DMAbuf_start_dma(devc->codec_audiodev, buf, blk_size, mode);
  281. audio_devs[devc->codec_audiodev]->flags |= DMA_AUTOMODE;
  282. temp = devc->dma << 4; /* Setup DMA channel select bits */
  283. if (devc->dma <= 3)
  284. temp |= 0x80; /* 8 bit DMA channel */
  285. temp |= 1; /* Trigger DMA */
  286. sscape_write(devc, GA_DMAA_REG, temp);
  287. temp &= 0xfe; /* Clear DMA trigger */
  288. sscape_write(devc, GA_DMAA_REG, temp);
  289. }
  290. static int verify_mpu(struct sscape_info *devc)
  291. {
  292. /*
  293. * The SoundScape board could be in three modes (MPU, 8250 and host).
  294. * If the card is not in the MPU mode, enabling the MPU driver will
  295. * cause infinite loop (the driver believes that there is always some
  296. * received data in the buffer.
  297. *
  298. * Detect this by looking if there are more than 10 received MIDI bytes
  299. * (0x00) in the buffer.
  300. */
  301. int i;
  302. for (i = 0; i < 10; i++)
  303. {
  304. if (inb(devc->base + HOST_CTRL) & 0x80)
  305. return 1;
  306. if (inb(devc->base) != 0x00)
  307. return 1;
  308. }
  309. printk(KERN_WARNING "SoundScape: The device is not in the MPU-401 mode\n");
  310. return 0;
  311. }
  312. static int sscape_coproc_open(void *dev_info, int sub_device)
  313. {
  314. if (sub_device == COPR_MIDI)
  315. {
  316. set_mt32(devc, 0);
  317. if (!verify_mpu(devc))
  318. return -EIO;
  319. }
  320. return 0;
  321. }
  322. static void sscape_coproc_close(void *dev_info, int sub_device)
  323. {
  324. struct sscape_info *devc = dev_info;
  325. unsigned long flags;
  326. spin_lock_irqsave(&devc->lock,flags);
  327. if (devc->dma_allocated)
  328. {
  329. __sscape_write(GA_DMAA_REG, 0x20); /* DMA channel disabled */
  330. devc->dma_allocated = 0;
  331. }
  332. spin_unlock_irqrestore(&devc->lock,flags);
  333. return;
  334. }
  335. static void sscape_coproc_reset(void *dev_info)
  336. {
  337. }
  338. static int sscape_download_boot(struct sscape_info *devc, unsigned char *block, int size, int flag)
  339. {
  340. unsigned long flags;
  341. unsigned char temp;
  342. volatile int done, timeout_val;
  343. static unsigned char codec_dma_bits;
  344. if (flag & CPF_FIRST)
  345. {
  346. /*
  347. * First block. Have to allocate DMA and to reset the board
  348. * before continuing.
  349. */
  350. spin_lock_irqsave(&devc->lock,flags);
  351. codec_dma_bits = sscape_read(devc, GA_CDCFG_REG);
  352. if (devc->dma_allocated == 0)
  353. devc->dma_allocated = 1;
  354. spin_unlock_irqrestore(&devc->lock,flags);
  355. sscape_write(devc, GA_HMCTL_REG,
  356. (temp = sscape_read(devc, GA_HMCTL_REG)) & 0x3f); /*Reset */
  357. for (timeout_val = 10000; timeout_val > 0; timeout_val--)
  358. sscape_read(devc, GA_HMCTL_REG); /* Delay */
  359. /* Take board out of reset */
  360. sscape_write(devc, GA_HMCTL_REG,
  361. (temp = sscape_read(devc, GA_HMCTL_REG)) | 0x80);
  362. }
  363. /*
  364. * Transfer one code block using DMA
  365. */
  366. if (audio_devs[devc->codec_audiodev]->dmap_out->raw_buf == NULL)
  367. {
  368. printk(KERN_WARNING "soundscape: DMA buffer not available\n");
  369. return 0;
  370. }
  371. memcpy(audio_devs[devc->codec_audiodev]->dmap_out->raw_buf, block, size);
  372. spin_lock_irqsave(&devc->lock,flags);
  373. /******** INTERRUPTS DISABLED NOW ********/
  374. do_dma(devc, SSCAPE_DMA_A,
  375. audio_devs[devc->codec_audiodev]->dmap_out->raw_buf_phys,
  376. size, DMA_MODE_WRITE);
  377. /*
  378. * Wait until transfer completes.
  379. */
  380. done = 0;
  381. timeout_val = 30;
  382. while (!done && timeout_val-- > 0)
  383. {
  384. int resid;
  385. if (HZ / 50)
  386. sleep(HZ / 50);
  387. clear_dma_ff(devc->dma);
  388. if ((resid = get_dma_residue(devc->dma)) == 0)
  389. done = 1;
  390. }
  391. spin_unlock_irqrestore(&devc->lock,flags);
  392. if (!done)
  393. return 0;
  394. if (flag & CPF_LAST)
  395. {
  396. /*
  397. * Take the board out of reset
  398. */
  399. outb((0x00), PORT(HOST_CTRL));
  400. outb((0x00), PORT(MIDI_CTRL));
  401. temp = sscape_read(devc, GA_HMCTL_REG);
  402. temp |= 0x40;
  403. sscape_write(devc, GA_HMCTL_REG, temp); /* Kickstart the board */
  404. /*
  405. * Wait until the ODB wakes up
  406. */
  407. spin_lock_irqsave(&devc->lock,flags);
  408. done = 0;
  409. timeout_val = 5 * HZ;
  410. while (!done && timeout_val-- > 0)
  411. {
  412. unsigned char x;
  413. sleep(1);
  414. x = inb(PORT(HOST_DATA));
  415. if (x == 0xff || x == 0xfe) /* OBP startup acknowledge */
  416. {
  417. DDB(printk("Soundscape: Acknowledge = %x\n", x));
  418. done = 1;
  419. }
  420. }
  421. sscape_write(devc, GA_CDCFG_REG, codec_dma_bits);
  422. spin_unlock_irqrestore(&devc->lock,flags);
  423. if (!done)
  424. {
  425. printk(KERN_ERR "soundscape: The OBP didn't respond after code download\n");
  426. return 0;
  427. }
  428. spin_lock_irqsave(&devc->lock,flags);
  429. done = 0;
  430. timeout_val = 5 * HZ;
  431. while (!done && timeout_val-- > 0)
  432. {
  433. sleep(1);
  434. if (inb(PORT(HOST_DATA)) == 0xfe) /* Host startup acknowledge */
  435. done = 1;
  436. }
  437. spin_unlock_irqrestore(&devc->lock,flags);
  438. if (!done)
  439. {
  440. printk(KERN_ERR "soundscape: OBP Initialization failed.\n");
  441. return 0;
  442. }
  443. printk(KERN_INFO "SoundScape board initialized OK\n");
  444. set_control(devc, CTL_MASTER_VOL, 100);
  445. set_control(devc, CTL_SYNTH_VOL, 100);
  446. #ifdef SSCAPE_DEBUG3
  447. /*
  448. * Temporary debugging aid. Print contents of the registers after
  449. * downloading the code.
  450. */
  451. {
  452. int i;
  453. for (i = 0; i < 13; i++)
  454. printk("I%d = %02x (new value)\n", i, sscape_read(devc, i));
  455. }
  456. #endif
  457. }
  458. return 1;
  459. }
  460. static int download_boot_block(void *dev_info, copr_buffer * buf)
  461. {
  462. if (buf->len <= 0 || buf->len > sizeof(buf->data))
  463. return -EINVAL;
  464. if (!sscape_download_boot(devc, buf->data, buf->len, buf->flags))
  465. {
  466. printk(KERN_ERR "soundscape: Unable to load microcode block to the OBP.\n");
  467. return -EIO;
  468. }
  469. return 0;
  470. }
  471. static int sscape_coproc_ioctl(void *dev_info, unsigned int cmd, void __user *arg, int local)
  472. {
  473. copr_buffer *buf;
  474. int err;
  475. switch (cmd)
  476. {
  477. case SNDCTL_COPR_RESET:
  478. sscape_coproc_reset(dev_info);
  479. return 0;
  480. case SNDCTL_COPR_LOAD:
  481. buf = (copr_buffer *) vmalloc(sizeof(copr_buffer));
  482. if (buf == NULL)
  483. return -ENOSPC;
  484. if (copy_from_user(buf, arg, sizeof(copr_buffer)))
  485. {
  486. vfree(buf);
  487. return -EFAULT;
  488. }
  489. err = download_boot_block(dev_info, buf);
  490. vfree(buf);
  491. return err;
  492. default:
  493. return -EINVAL;
  494. }
  495. }
  496. static coproc_operations sscape_coproc_operations =
  497. {
  498. "SoundScape M68K",
  499. THIS_MODULE,
  500. sscape_coproc_open,
  501. sscape_coproc_close,
  502. sscape_coproc_ioctl,
  503. sscape_coproc_reset,
  504. &adev_info
  505. };
  506. static struct resource *sscape_ports;
  507. static int sscape_is_pnp;
  508. static void __init attach_sscape(struct address_info *hw_config)
  509. {
  510. #ifndef SSCAPE_REGS
  511. /*
  512. * Config register values for Spea/V7 Media FX and Ensoniq S-2000.
  513. * These values are card
  514. * dependent. If you have another SoundScape based card, you have to
  515. * find the correct values. Do the following:
  516. * - Compile this driver with SSCAPE_DEBUG1 defined.
  517. * - Shut down and power off your machine.
  518. * - Boot with DOS so that the SSINIT.EXE program is run.
  519. * - Warm boot to {Linux|SYSV|BSD} and write down the lines displayed
  520. * when detecting the SoundScape.
  521. * - Modify the following list to use the values printed during boot.
  522. * Undefine the SSCAPE_DEBUG1
  523. */
  524. #define SSCAPE_REGS { \
  525. /* I0 */ 0x00, \
  526. /* I1 */ 0xf0, /* Note! Ignored. Set always to 0xf0 */ \
  527. /* I2 */ 0x20, /* Note! Ignored. Set always to 0x20 */ \
  528. /* I3 */ 0x20, /* Note! Ignored. Set always to 0x20 */ \
  529. /* I4 */ 0xf5, /* Ignored */ \
  530. /* I5 */ 0x10, \
  531. /* I6 */ 0x00, \
  532. /* I7 */ 0x2e, /* I7 MEM config A. Likely to vary between models */ \
  533. /* I8 */ 0x00, /* I8 MEM config B. Likely to vary between models */ \
  534. /* I9 */ 0x40 /* Ignored */ \
  535. }
  536. #endif
  537. unsigned long flags;
  538. static unsigned char regs[10] = SSCAPE_REGS;
  539. int i, irq_bits = 0xff;
  540. if (old_hardware)
  541. {
  542. valid_interrupts = valid_interrupts_old;
  543. conf_printf("Ensoniq SoundScape (old)", hw_config);
  544. }
  545. else
  546. conf_printf("Ensoniq SoundScape", hw_config);
  547. for (i = 0; i < 4; i++)
  548. {
  549. if (hw_config->irq == valid_interrupts[i])
  550. {
  551. irq_bits = i;
  552. break;
  553. }
  554. }
  555. if (hw_config->irq > 15 || (regs[4] = irq_bits == 0xff))
  556. {
  557. printk(KERN_ERR "Invalid IRQ%d\n", hw_config->irq);
  558. release_region(devc->base, 2);
  559. release_region(devc->base + 2, 6);
  560. if (sscape_is_pnp)
  561. release_region(devc->codec, 2);
  562. return;
  563. }
  564. if (!sscape_is_pnp) {
  565. spin_lock_irqsave(&devc->lock,flags);
  566. /* Host interrupt enable */
  567. sscape_write(devc, 1, 0xf0); /* All interrupts enabled */
  568. /* DMA A status/trigger register */
  569. sscape_write(devc, 2, 0x20); /* DMA channel disabled */
  570. /* DMA B status/trigger register */
  571. sscape_write(devc, 3, 0x20); /* DMA channel disabled */
  572. /* Host interrupt config reg */
  573. sscape_write(devc, 4, 0xf0 | (irq_bits << 2) | irq_bits);
  574. /* Don't destroy CD-ROM DMA config bits (0xc0) */
  575. sscape_write(devc, 5, (regs[5] & 0x3f) | (sscape_read(devc, 5) & 0xc0));
  576. /* CD-ROM config (WSS codec actually) */
  577. sscape_write(devc, 6, regs[6]);
  578. sscape_write(devc, 7, regs[7]);
  579. sscape_write(devc, 8, regs[8]);
  580. /* Master control reg. Don't modify CR-ROM bits. Disable SB emul */
  581. sscape_write(devc, 9, (sscape_read(devc, 9) & 0xf0) | 0x08);
  582. spin_unlock_irqrestore(&devc->lock,flags);
  583. }
  584. #ifdef SSCAPE_DEBUG2
  585. /*
  586. * Temporary debugging aid. Print contents of the registers after
  587. * changing them.
  588. */
  589. {
  590. int i;
  591. for (i = 0; i < 13; i++)
  592. printk("I%d = %02x (new value)\n", i, sscape_read(devc, i));
  593. }
  594. #endif
  595. if (probe_mpu401(hw_config, sscape_ports))
  596. hw_config->always_detect = 1;
  597. hw_config->name = "SoundScape";
  598. hw_config->irq *= -1; /* Negative value signals IRQ sharing */
  599. attach_mpu401(hw_config, THIS_MODULE);
  600. hw_config->irq *= -1; /* Restore it */
  601. if (hw_config->slots[1] != -1) /* The MPU driver installed itself */
  602. {
  603. sscape_mididev = hw_config->slots[1];
  604. midi_devs[hw_config->slots[1]]->coproc = &sscape_coproc_operations;
  605. }
  606. sscape_write(devc, GA_INTENA_REG, 0x80); /* Master IRQ enable */
  607. devc->ok = 1;
  608. devc->failed = 0;
  609. }
  610. static int detect_ga(sscape_info * devc)
  611. {
  612. unsigned char save;
  613. DDB(printk("Entered Soundscape detect_ga(%x)\n", devc->base));
  614. /*
  615. * First check that the address register of "ODIE" is
  616. * there and that it has exactly 4 writable bits.
  617. * First 4 bits
  618. */
  619. if ((save = inb(PORT(ODIE_ADDR))) & 0xf0)
  620. {
  621. DDB(printk("soundscape: Detect error A\n"));
  622. return 0;
  623. }
  624. outb((0x00), PORT(ODIE_ADDR));
  625. if (inb(PORT(ODIE_ADDR)) != 0x00)
  626. {
  627. DDB(printk("soundscape: Detect error B\n"));
  628. return 0;
  629. }
  630. outb((0xff), PORT(ODIE_ADDR));
  631. if (inb(PORT(ODIE_ADDR)) != 0x0f)
  632. {
  633. DDB(printk("soundscape: Detect error C\n"));
  634. return 0;
  635. }
  636. outb((save), PORT(ODIE_ADDR));
  637. /*
  638. * Now verify that some indirect registers return zero on some bits.
  639. * This may break the driver with some future revisions of "ODIE" but...
  640. */
  641. if (sscape_read(devc, 0) & 0x0c)
  642. {
  643. DDB(printk("soundscape: Detect error D (%x)\n", sscape_read(devc, 0)));
  644. return 0;
  645. }
  646. if (sscape_read(devc, 1) & 0x0f)
  647. {
  648. DDB(printk("soundscape: Detect error E\n"));
  649. return 0;
  650. }
  651. if (sscape_read(devc, 5) & 0x0f)
  652. {
  653. DDB(printk("soundscape: Detect error F\n"));
  654. return 0;
  655. }
  656. return 1;
  657. }
  658. static int sscape_read_host_ctrl(sscape_info* devc)
  659. {
  660. return host_read(devc);
  661. }
  662. static void sscape_write_host_ctrl2(sscape_info *devc, int a, int b)
  663. {
  664. host_command2(devc, a, b);
  665. }
  666. static int sscape_alloc_dma(sscape_info *devc)
  667. {
  668. char *start_addr, *end_addr;
  669. int dma_pagesize;
  670. int sz, size;
  671. struct page *page;
  672. if (devc->raw_buf != NULL) return 0; /* Already done */
  673. dma_pagesize = (devc->dma < 4) ? (64 * 1024) : (128 * 1024);
  674. devc->raw_buf = NULL;
  675. devc->buffsize = 8192*4;
  676. if (devc->buffsize > dma_pagesize) devc->buffsize = dma_pagesize;
  677. start_addr = NULL;
  678. /*
  679. * Now loop until we get a free buffer. Try to get smaller buffer if
  680. * it fails. Don't accept smaller than 8k buffer for performance
  681. * reasons.
  682. */
  683. while (start_addr == NULL && devc->buffsize > PAGE_SIZE) {
  684. for (sz = 0, size = PAGE_SIZE; size < devc->buffsize; sz++, size <<= 1);
  685. devc->buffsize = PAGE_SIZE * (1 << sz);
  686. start_addr = (char *) __get_free_pages(GFP_ATOMIC|GFP_DMA, sz);
  687. if (start_addr == NULL) devc->buffsize /= 2;
  688. }
  689. if (start_addr == NULL) {
  690. printk(KERN_ERR "sscape pnp init error: Couldn't allocate DMA buffer\n");
  691. return 0;
  692. } else {
  693. /* make some checks */
  694. end_addr = start_addr + devc->buffsize - 1;
  695. /* now check if it fits into the same dma-pagesize */
  696. if (((long) start_addr & ~(dma_pagesize - 1)) != ((long) end_addr & ~(dma_pagesize - 1))
  697. || end_addr >= (char *) (MAX_DMA_ADDRESS)) {
  698. printk(KERN_ERR "sscape pnp: Got invalid address 0x%lx for %db DMA-buffer\n", (long) start_addr, devc->buffsize);
  699. return 0;
  700. }
  701. }
  702. devc->raw_buf = start_addr;
  703. devc->raw_buf_phys = virt_to_bus(start_addr);
  704. for (page = virt_to_page(start_addr); page <= virt_to_page(end_addr); page++)
  705. SetPageReserved(page);
  706. return 1;
  707. }
  708. static void sscape_free_dma(sscape_info *devc)
  709. {
  710. int sz, size;
  711. unsigned long start_addr, end_addr;
  712. struct page *page;
  713. if (devc->raw_buf == NULL) return;
  714. for (sz = 0, size = PAGE_SIZE; size < devc->buffsize; sz++, size <<= 1);
  715. start_addr = (unsigned long) devc->raw_buf;
  716. end_addr = start_addr + devc->buffsize;
  717. for (page = virt_to_page(start_addr); page <= virt_to_page(end_addr); page++)
  718. ClearPageReserved(page);
  719. free_pages((unsigned long) devc->raw_buf, sz);
  720. devc->raw_buf = NULL;
  721. }
  722. /* Intel version !!!!!!!!! */
  723. static int sscape_start_dma(int chan, unsigned long physaddr, int count, int dma_mode)
  724. {
  725. unsigned long flags;
  726. flags = claim_dma_lock();
  727. disable_dma(chan);
  728. clear_dma_ff(chan);
  729. set_dma_mode(chan, dma_mode);
  730. set_dma_addr(chan, physaddr);
  731. set_dma_count(chan, count);
  732. enable_dma(chan);
  733. release_dma_lock(flags);
  734. return 0;
  735. }
  736. static void sscape_pnp_start_dma(sscape_info* devc, int arg )
  737. {
  738. int reg;
  739. if (arg == 0) reg = 2;
  740. else reg = 3;
  741. sscape_write(devc, reg, sscape_read( devc, reg) | 0x01);
  742. sscape_write(devc, reg, sscape_read( devc, reg) & 0xFE);
  743. }
  744. static int sscape_pnp_wait_dma (sscape_info* devc, int arg )
  745. {
  746. int reg;
  747. unsigned long i;
  748. unsigned char d;
  749. if (arg == 0) reg = 2;
  750. else reg = 3;
  751. sleep ( 1 );
  752. i = 0;
  753. do {
  754. d = sscape_read(devc, reg) & 1;
  755. if ( d == 1) break;
  756. i++;
  757. } while (i < 500000);
  758. d = sscape_read(devc, reg) & 1;
  759. return d;
  760. }
  761. static int sscape_pnp_alloc_dma(sscape_info* devc)
  762. {
  763. /* printk(KERN_INFO "sscape: requesting dma\n"); */
  764. if (request_dma(devc -> dma, "sscape")) return 0;
  765. /* printk(KERN_INFO "sscape: dma channel allocated\n"); */
  766. if (!sscape_alloc_dma(devc)) {
  767. free_dma(devc -> dma);
  768. return 0;
  769. };
  770. return 1;
  771. }
  772. static void sscape_pnp_free_dma(sscape_info* devc)
  773. {
  774. sscape_free_dma( devc);
  775. free_dma(devc -> dma );
  776. /* printk(KERN_INFO "sscape: dma released\n"); */
  777. }
  778. static int sscape_pnp_upload_file(sscape_info* devc, char* fn)
  779. {
  780. int done = 0;
  781. int timeout_val;
  782. char* data,*dt;
  783. int len,l;
  784. unsigned long flags;
  785. sscape_write( devc, 9, sscape_read(devc, 9 ) & 0x3F );
  786. sscape_write( devc, 2, (devc -> dma << 4) | 0x80 );
  787. sscape_write( devc, 3, 0x20 );
  788. sscape_write( devc, 9, sscape_read( devc, 9 ) | 0x80 );
  789. len = mod_firmware_load(fn, &data);
  790. if (len == 0) {
  791. printk(KERN_ERR "sscape: file not found: %s\n", fn);
  792. return 0;
  793. }
  794. dt = data;
  795. spin_lock_irqsave(&devc->lock,flags);
  796. while ( len > 0 ) {
  797. if (len > devc -> buffsize) l = devc->buffsize;
  798. else l = len;
  799. len -= l;
  800. memcpy(devc->raw_buf, dt, l); dt += l;
  801. sscape_start_dma(devc->dma, devc->raw_buf_phys, l, 0x48);
  802. sscape_pnp_start_dma ( devc, 0 );
  803. if (sscape_pnp_wait_dma ( devc, 0 ) == 0) {
  804. spin_unlock_irqrestore(&devc->lock,flags);
  805. return 0;
  806. }
  807. }
  808. spin_unlock_irqrestore(&devc->lock,flags);
  809. vfree(data);
  810. outb(0, devc -> base + 2);
  811. outb(0, devc -> base);
  812. sscape_write ( devc, 9, sscape_read( devc, 9 ) | 0x40);
  813. timeout_val = 5 * HZ;
  814. while (!done && timeout_val-- > 0)
  815. {
  816. unsigned char x;
  817. sleep(1);
  818. x = inb( devc -> base + 3);
  819. if (x == 0xff || x == 0xfe) /* OBP startup acknowledge */
  820. {
  821. //printk(KERN_ERR "Soundscape: Acknowledge = %x\n", x);
  822. done = 1;
  823. }
  824. }
  825. timeout_val = 5 * HZ;
  826. done = 0;
  827. while (!done && timeout_val-- > 0)
  828. {
  829. unsigned char x;
  830. sleep(1);
  831. x = inb( devc -> base + 3);
  832. if (x == 0xfe) /* OBP startup acknowledge */
  833. {
  834. //printk(KERN_ERR "Soundscape: Acknowledge = %x\n", x);
  835. done = 1;
  836. }
  837. }
  838. if ( !done ) printk(KERN_ERR "soundscape: OBP Initialization failed.\n");
  839. sscape_write( devc, 2, devc->ic_type == IC_ODIE ? 0x70 : 0x40);
  840. sscape_write( devc, 3, (devc -> dma << 4) + 0x80);
  841. return 1;
  842. }
  843. static void __init sscape_pnp_init_hw(sscape_info* devc)
  844. {
  845. unsigned char midi_irq = 0, sb_irq = 0;
  846. unsigned i;
  847. static char code_file_name[23] = "/sndscape/sndscape.cox";
  848. int sscape_joystic_enable = 0x7f;
  849. int sscape_mic_enable = 0;
  850. int sscape_ext_midi = 0;
  851. if ( !sscape_pnp_alloc_dma(devc) ) {
  852. printk(KERN_ERR "sscape: faild to allocate dma\n");
  853. return;
  854. }
  855. for (i = 0; i < 4; i++) {
  856. if ( devc -> irq == valid_interrupts[i] )
  857. midi_irq = i;
  858. if ( devc -> codec_irq == valid_interrupts[i] )
  859. sb_irq = i;
  860. }
  861. sscape_write( devc, 5, 0x50);
  862. sscape_write( devc, 7, 0x2e);
  863. sscape_write( devc, 8, 0x00);
  864. sscape_write( devc, 2, devc->ic_type == IC_ODIE ? 0x70 : 0x40);
  865. sscape_write( devc, 3, ( devc -> dma << 4) | 0x80);
  866. sscape_write (devc, 4, 0xF0 | (midi_irq<<2) | midi_irq);
  867. i = 0x10; //sscape_read(devc, 9) & (devc->ic_type == IC_ODIE ? 0xf0 : 0xc0);
  868. if (sscape_joystic_enable) i |= 8;
  869. sscape_write (devc, 9, i);
  870. sscape_write (devc, 6, 0x80);
  871. sscape_write (devc, 1, 0x80);
  872. if (devc -> codec_type == 2) {
  873. sscape_pnp_write_codec( devc, 0x0C, 0x50);
  874. sscape_pnp_write_codec( devc, 0x10, sscape_pnp_read_codec( devc, 0x10) & 0x3F);
  875. sscape_pnp_write_codec( devc, 0x11, sscape_pnp_read_codec( devc, 0x11) | 0xC0);
  876. sscape_pnp_write_codec( devc, 29, 0x20);
  877. }
  878. if (sscape_pnp_upload_file(devc, "/sndscape/scope.cod") == 0 ) {
  879. printk(KERN_ERR "sscape: faild to upload file /sndscape/scope.cod\n");
  880. sscape_pnp_free_dma(devc);
  881. return;
  882. }
  883. i = sscape_read_host_ctrl( devc );
  884. if ( (i & 0x0F) > 7 ) {
  885. printk(KERN_ERR "sscape: scope.cod faild\n");
  886. sscape_pnp_free_dma(devc);
  887. return;
  888. }
  889. if ( i & 0x10 ) sscape_write( devc, 7, 0x2F);
  890. code_file_name[21] = (char) ( i & 0x0F) + 0x30;
  891. if (sscape_pnp_upload_file( devc, code_file_name) == 0) {
  892. printk(KERN_ERR "sscape: faild to upload file %s\n", code_file_name);
  893. sscape_pnp_free_dma(devc);
  894. return;
  895. }
  896. if (devc->ic_type != IC_ODIE) {
  897. sscape_pnp_write_codec( devc, 10, (sscape_pnp_read_codec(devc, 10) & 0x7f) |
  898. ( sscape_mic_enable == 0 ? 0x00 : 0x80) );
  899. }
  900. sscape_write_host_ctrl2( devc, 0x84, 0x64 ); /* MIDI volume */
  901. sscape_write_host_ctrl2( devc, 0x86, 0x64 ); /* MIDI volume?? */
  902. sscape_write_host_ctrl2( devc, 0x8A, sscape_ext_midi);
  903. sscape_pnp_write_codec ( devc, 6, 0x3f ); //WAV_VOL
  904. sscape_pnp_write_codec ( devc, 7, 0x3f ); //WAV_VOL
  905. sscape_pnp_write_codec ( devc, 2, 0x1F ); //WD_CDXVOLL
  906. sscape_pnp_write_codec ( devc, 3, 0x1F ); //WD_CDXVOLR
  907. if (devc -> codec_type == 1) {
  908. sscape_pnp_write_codec ( devc, 4, 0x1F );
  909. sscape_pnp_write_codec ( devc, 5, 0x1F );
  910. sscape_write_host_ctrl2( devc, 0x88, sscape_mic_enable);
  911. } else {
  912. int t;
  913. sscape_pnp_write_codec ( devc, 0x10, 0x1F << 1);
  914. sscape_pnp_write_codec ( devc, 0x11, 0xC0 | (0x1F << 1));
  915. t = sscape_pnp_read_codec( devc, 0x00) & 0xDF;
  916. if ( (sscape_mic_enable == 0)) t |= 0;
  917. else t |= 0x20;
  918. sscape_pnp_write_codec ( devc, 0x00, t);
  919. t = sscape_pnp_read_codec( devc, 0x01) & 0xDF;
  920. if ( (sscape_mic_enable == 0) ) t |= 0;
  921. else t |= 0x20;
  922. sscape_pnp_write_codec ( devc, 0x01, t);
  923. sscape_pnp_write_codec ( devc, 0x40 | 29 , 0x20);
  924. outb(0, devc -> codec);
  925. }
  926. if (devc -> ic_type == IC_OPUS ) {
  927. int i = sscape_read( devc, 9 );
  928. sscape_write( devc, 9, i | 3 );
  929. sscape_write( devc, 3, 0x40);
  930. if (request_region(0x228, 1, "sscape setup junk")) {
  931. outb(0, 0x228);
  932. release_region(0x228,1);
  933. }
  934. sscape_write( devc, 3, (devc -> dma << 4) | 0x80);
  935. sscape_write( devc, 9, i );
  936. }
  937. host_close ( devc );
  938. sscape_pnp_free_dma(devc);
  939. }
  940. static int __init detect_sscape_pnp(sscape_info* devc)
  941. {
  942. long i, irq_bits = 0xff;
  943. unsigned int d;
  944. DDB(printk("Entered detect_sscape_pnp(%x)\n", devc->base));
  945. if (!request_region(devc->codec, 2, "sscape codec")) {
  946. printk(KERN_ERR "detect_sscape_pnp: port %x is not free\n", devc->codec);
  947. return 0;
  948. }
  949. if ((inb(devc->base + 2) & 0x78) != 0)
  950. goto fail;
  951. d = inb ( devc -> base + 4) & 0xF0;
  952. if (d & 0x80)
  953. goto fail;
  954. if (d == 0) {
  955. devc->codec_type = 1;
  956. devc->ic_type = IC_ODIE;
  957. } else if ( (d & 0x60) != 0) {
  958. devc->codec_type = 2;
  959. devc->ic_type = IC_OPUS;
  960. } else if ( (d & 0x40) != 0) { /* WTF? */
  961. devc->codec_type = 2;
  962. devc->ic_type = IC_ODIE;
  963. } else
  964. goto fail;
  965. sscape_is_pnp = 1;
  966. outb(0xFA, devc -> base+4);
  967. if ((inb( devc -> base+4) & 0x9F) != 0x0A)
  968. goto fail;
  969. outb(0xFE, devc -> base+4);
  970. if ( (inb(devc -> base+4) & 0x9F) != 0x0E)
  971. goto fail;
  972. if ( (inb(devc -> base+5) & 0x9F) != 0x0E)
  973. goto fail;
  974. if (devc->codec_type == 2) {
  975. if (devc->codec != devc->base + 8) {
  976. printk("soundscape warning: incorrect codec port specified\n");
  977. goto fail;
  978. }
  979. d = 0x10 | (sscape_read(devc, 9) & 0xCF);
  980. sscape_write(devc, 9, d);
  981. sscape_write(devc, 6, 0x80);
  982. } else {
  983. //todo: check codec is not base + 8
  984. }
  985. d = (sscape_read(devc, 9) & 0x3F) | 0xC0;
  986. sscape_write(devc, 9, d);
  987. for (i = 0; i < 550000; i++)
  988. if ( !(inb(devc -> codec) & 0x80) ) break;
  989. d = inb(devc -> codec);
  990. if (d & 0x80)
  991. goto fail;
  992. if ( inb(devc -> codec + 2) == 0xFF)
  993. goto fail;
  994. sscape_write(devc, 9, sscape_read(devc, 9) & 0x3F );
  995. d = inb(devc -> codec) & 0x80;
  996. if ( d == 0) {
  997. printk(KERN_INFO "soundscape: hardware detected\n");
  998. valid_interrupts = valid_interrupts_new;
  999. } else {
  1000. printk(KERN_INFO "soundscape: board looks like media fx\n");
  1001. valid_interrupts = valid_interrupts_old;
  1002. old_hardware = 1;
  1003. }
  1004. sscape_write( devc, 9, 0xC0 | (sscape_read(devc, 9) & 0x3F) );
  1005. for (i = 0; i < 550000; i++)
  1006. if ( !(inb(devc -> codec) & 0x80))
  1007. break;
  1008. sscape_pnp_init_hw(devc);
  1009. for (i = 0; i < 4; i++)
  1010. {
  1011. if (devc->codec_irq == valid_interrupts[i]) {
  1012. irq_bits = i;
  1013. break;
  1014. }
  1015. }
  1016. sscape_write(devc, GA_INTENA_REG, 0x00);
  1017. sscape_write(devc, GA_DMACFG_REG, 0x50);
  1018. sscape_write(devc, GA_DMAA_REG, 0x70);
  1019. sscape_write(devc, GA_DMAB_REG, 0x20);
  1020. sscape_write(devc, GA_INTCFG_REG, 0xf0);
  1021. sscape_write(devc, GA_CDCFG_REG, 0x89 | (devc->dma << 4) | (irq_bits << 1));
  1022. sscape_pnp_write_codec( devc, 0, sscape_pnp_read_codec( devc, 0) | 0x20);
  1023. sscape_pnp_write_codec( devc, 0, sscape_pnp_read_codec( devc, 1) | 0x20);
  1024. return 1;
  1025. fail:
  1026. release_region(devc->codec, 2);
  1027. return 0;
  1028. }
  1029. static int __init probe_sscape(struct address_info *hw_config)
  1030. {
  1031. devc->base = hw_config->io_base;
  1032. devc->irq = hw_config->irq;
  1033. devc->dma = hw_config->dma;
  1034. devc->osp = hw_config->osp;
  1035. #ifdef SSCAPE_DEBUG1
  1036. /*
  1037. * Temporary debugging aid. Print contents of the registers before
  1038. * changing them.
  1039. */
  1040. {
  1041. int i;
  1042. for (i = 0; i < 13; i++)
  1043. printk("I%d = %02x (old value)\n", i, sscape_read(devc, i));
  1044. }
  1045. #endif
  1046. devc->failed = 1;
  1047. sscape_ports = request_region(devc->base, 2, "mpu401");
  1048. if (!sscape_ports)
  1049. return 0;
  1050. if (!request_region(devc->base + 2, 6, "SoundScape")) {
  1051. release_region(devc->base, 2);
  1052. return 0;
  1053. }
  1054. if (!detect_ga(devc)) {
  1055. if (detect_sscape_pnp(devc))
  1056. return 1;
  1057. release_region(devc->base, 2);
  1058. release_region(devc->base + 2, 6);
  1059. return 0;
  1060. }
  1061. if (old_hardware) /* Check that it's really an old Spea/Reveal card. */
  1062. {
  1063. unsigned char tmp;
  1064. int cc;
  1065. if (!((tmp = sscape_read(devc, GA_HMCTL_REG)) & 0xc0))
  1066. {
  1067. sscape_write(devc, GA_HMCTL_REG, tmp | 0x80);
  1068. for (cc = 0; cc < 200000; ++cc)
  1069. inb(devc->base + ODIE_ADDR);
  1070. }
  1071. }
  1072. return 1;
  1073. }
  1074. static int __init init_ss_ms_sound(struct address_info *hw_config)
  1075. {
  1076. int i, irq_bits = 0xff;
  1077. int ad_flags = 0;
  1078. struct resource *ports;
  1079. if (devc->failed)
  1080. {
  1081. printk(KERN_ERR "soundscape: Card not detected\n");
  1082. return 0;
  1083. }
  1084. if (devc->ok == 0)
  1085. {
  1086. printk(KERN_ERR "soundscape: Invalid initialization order.\n");
  1087. return 0;
  1088. }
  1089. for (i = 0; i < 4; i++)
  1090. {
  1091. if (hw_config->irq == valid_interrupts[i])
  1092. {
  1093. irq_bits = i;
  1094. break;
  1095. }
  1096. }
  1097. if (irq_bits == 0xff) {
  1098. printk(KERN_ERR "soundscape: Invalid MSS IRQ%d\n", hw_config->irq);
  1099. return 0;
  1100. }
  1101. if (old_hardware)
  1102. ad_flags = 0x12345677; /* Tell that we may have a CS4248 chip (Spea-V7 Media FX) */
  1103. else if (sscape_is_pnp)
  1104. ad_flags = 0x87654321; /* Tell that we have a soundscape pnp with 1845 chip */
  1105. ports = request_region(hw_config->io_base, 4, "ad1848");
  1106. if (!ports) {
  1107. printk(KERN_ERR "soundscape: ports busy\n");
  1108. return 0;
  1109. }
  1110. if (!ad1848_detect(ports, &ad_flags, hw_config->osp)) {
  1111. release_region(hw_config->io_base, 4);
  1112. return 0;
  1113. }
  1114. if (!sscape_is_pnp) /*pnp is already setup*/
  1115. {
  1116. /*
  1117. * Setup the DMA polarity.
  1118. */
  1119. sscape_write(devc, GA_DMACFG_REG, 0x50);
  1120. /*
  1121. * Take the gate-array off of the DMA channel.
  1122. */
  1123. sscape_write(devc, GA_DMAB_REG, 0x20);
  1124. /*
  1125. * Init the AD1848 (CD-ROM) config reg.
  1126. */
  1127. sscape_write(devc, GA_CDCFG_REG, 0x89 | (hw_config->dma << 4) | (irq_bits << 1));
  1128. }
  1129. if (hw_config->irq == devc->irq)
  1130. printk(KERN_WARNING "soundscape: Warning! The WSS mode can't share IRQ with MIDI\n");
  1131. hw_config->slots[0] = ad1848_init(
  1132. sscape_is_pnp ? "SoundScape" : "SoundScape PNP",
  1133. ports,
  1134. hw_config->irq,
  1135. hw_config->dma,
  1136. hw_config->dma,
  1137. 0,
  1138. devc->osp,
  1139. THIS_MODULE);
  1140. if (hw_config->slots[0] != -1) /* The AD1848 driver installed itself */
  1141. {
  1142. audio_devs[hw_config->slots[0]]->coproc = &sscape_coproc_operations;
  1143. devc->codec_audiodev = hw_config->slots[0];
  1144. devc->my_audiodev = hw_config->slots[0];
  1145. /* Set proper routings here (what are they) */
  1146. AD1848_REROUTE(SOUND_MIXER_LINE1, SOUND_MIXER_LINE);
  1147. }
  1148. #ifdef SSCAPE_DEBUG5
  1149. /*
  1150. * Temporary debugging aid. Print contents of the registers
  1151. * after the AD1848 device has been initialized.
  1152. */
  1153. {
  1154. int i;
  1155. for (i = 0; i < 13; i++)
  1156. printk("I%d = %02x\n", i, sscape_read(devc, i));
  1157. }
  1158. #endif
  1159. return 1;
  1160. }
  1161. static void __exit unload_sscape(struct address_info *hw_config)
  1162. {
  1163. release_region(devc->base + 2, 6);
  1164. unload_mpu401(hw_config);
  1165. if (sscape_is_pnp)
  1166. release_region(devc->codec, 2);
  1167. }
  1168. static void __exit unload_ss_ms_sound(struct address_info *hw_config)
  1169. {
  1170. ad1848_unload(hw_config->io_base,
  1171. hw_config->irq,
  1172. devc->dma,
  1173. devc->dma,
  1174. 0);
  1175. sound_unload_audiodev(hw_config->slots[0]);
  1176. }
  1177. static struct address_info cfg;
  1178. static struct address_info cfg_mpu;
  1179. static int __initdata spea = -1;
  1180. static int mss = 0;
  1181. static int __initdata dma = -1;
  1182. static int __initdata irq = -1;
  1183. static int __initdata io = -1;
  1184. static int __initdata mpu_irq = -1;
  1185. static int __initdata mpu_io = -1;
  1186. module_param(dma, int, 0);
  1187. module_param(irq, int, 0);
  1188. module_param(io, int, 0);
  1189. module_param(spea, int, 0); /* spea=0/1 set the old_hardware */
  1190. module_param(mpu_irq, int, 0);
  1191. module_param(mpu_io, int, 0);
  1192. module_param(mss, int, 0);
  1193. static int __init init_sscape(void)
  1194. {
  1195. printk(KERN_INFO "Soundscape driver Copyright (C) by Hannu Savolainen 1993-1996\n");
  1196. cfg.irq = irq;
  1197. cfg.dma = dma;
  1198. cfg.io_base = io;
  1199. cfg_mpu.irq = mpu_irq;
  1200. cfg_mpu.io_base = mpu_io;
  1201. /* WEH - Try to get right dma channel */
  1202. cfg_mpu.dma = dma;
  1203. devc->codec = cfg.io_base;
  1204. devc->codec_irq = cfg.irq;
  1205. devc->codec_type = 0;
  1206. devc->ic_type = 0;
  1207. devc->raw_buf = NULL;
  1208. spin_lock_init(&devc->lock);
  1209. if (cfg.dma == -1 || cfg.irq == -1 || cfg.io_base == -1) {
  1210. printk(KERN_ERR "DMA, IRQ, and IO port must be specified.\n");
  1211. return -EINVAL;
  1212. }
  1213. if (cfg_mpu.irq == -1 && cfg_mpu.io_base != -1) {
  1214. printk(KERN_ERR "MPU_IRQ must be specified if MPU_IO is set.\n");
  1215. return -EINVAL;
  1216. }
  1217. if(spea != -1) {
  1218. old_hardware = spea;
  1219. printk(KERN_INFO "Forcing %s hardware support.\n",
  1220. spea?"new":"old");
  1221. }
  1222. if (probe_sscape(&cfg_mpu) == 0)
  1223. return -ENODEV;
  1224. attach_sscape(&cfg_mpu);
  1225. mss = init_ss_ms_sound(&cfg);
  1226. return 0;
  1227. }
  1228. static void __exit cleanup_sscape(void)
  1229. {
  1230. if (mss)
  1231. unload_ss_ms_sound(&cfg);
  1232. unload_sscape(&cfg_mpu);
  1233. }
  1234. module_init(init_sscape);
  1235. module_exit(cleanup_sscape);
  1236. #ifndef MODULE
  1237. static int __init setup_sscape(char *str)
  1238. {
  1239. /* io, irq, dma, mpu_io, mpu_irq */
  1240. int ints[6];
  1241. str = get_options(str, ARRAY_SIZE(ints), ints);
  1242. io = ints[1];
  1243. irq = ints[2];
  1244. dma = ints[3];
  1245. mpu_io = ints[4];
  1246. mpu_irq = ints[5];
  1247. return 1;
  1248. }
  1249. __setup("sscape=", setup_sscape);
  1250. #endif
  1251. MODULE_LICENSE("GPL");