gus_io.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541
  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * I/O routines for GF1/InterWave synthesizer chips
  4. *
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #include <sound/driver.h>
  22. #include <linux/delay.h>
  23. #include <linux/time.h>
  24. #include <sound/core.h>
  25. #include <sound/gus.h>
  26. void snd_gf1_delay(struct snd_gus_card * gus)
  27. {
  28. int i;
  29. for (i = 0; i < 6; i++) {
  30. mb();
  31. inb(GUSP(gus, DRAM));
  32. }
  33. }
  34. /*
  35. * =======================================================================
  36. */
  37. /*
  38. * ok.. stop of control registers (wave & ramp) need some special things..
  39. * big UltraClick (tm) elimination...
  40. */
  41. static inline void __snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
  42. {
  43. unsigned char value;
  44. outb(reg | 0x80, gus->gf1.reg_regsel);
  45. mb();
  46. value = inb(gus->gf1.reg_data8);
  47. mb();
  48. outb(reg, gus->gf1.reg_regsel);
  49. mb();
  50. outb((value | 0x03) & ~(0x80 | 0x20), gus->gf1.reg_data8);
  51. mb();
  52. }
  53. static inline void __snd_gf1_write8(struct snd_gus_card * gus,
  54. unsigned char reg,
  55. unsigned char data)
  56. {
  57. outb(reg, gus->gf1.reg_regsel);
  58. mb();
  59. outb(data, gus->gf1.reg_data8);
  60. mb();
  61. }
  62. static inline unsigned char __snd_gf1_look8(struct snd_gus_card * gus,
  63. unsigned char reg)
  64. {
  65. outb(reg, gus->gf1.reg_regsel);
  66. mb();
  67. return inb(gus->gf1.reg_data8);
  68. }
  69. static inline void __snd_gf1_write16(struct snd_gus_card * gus,
  70. unsigned char reg, unsigned int data)
  71. {
  72. outb(reg, gus->gf1.reg_regsel);
  73. mb();
  74. outw((unsigned short) data, gus->gf1.reg_data16);
  75. mb();
  76. }
  77. static inline unsigned short __snd_gf1_look16(struct snd_gus_card * gus,
  78. unsigned char reg)
  79. {
  80. outb(reg, gus->gf1.reg_regsel);
  81. mb();
  82. return inw(gus->gf1.reg_data16);
  83. }
  84. static inline void __snd_gf1_adlib_write(struct snd_gus_card * gus,
  85. unsigned char reg, unsigned char data)
  86. {
  87. outb(reg, gus->gf1.reg_timerctrl);
  88. inb(gus->gf1.reg_timerctrl);
  89. inb(gus->gf1.reg_timerctrl);
  90. outb(data, gus->gf1.reg_timerdata);
  91. inb(gus->gf1.reg_timerctrl);
  92. inb(gus->gf1.reg_timerctrl);
  93. }
  94. static inline void __snd_gf1_write_addr(struct snd_gus_card * gus, unsigned char reg,
  95. unsigned int addr, int w_16bit)
  96. {
  97. if (gus->gf1.enh_mode) {
  98. if (w_16bit)
  99. addr = ((addr >> 1) & ~0x0000000f) | (addr & 0x0000000f);
  100. __snd_gf1_write8(gus, SNDRV_GF1_VB_UPPER_ADDRESS, (unsigned char) ((addr >> 26) & 0x03));
  101. } else if (w_16bit)
  102. addr = (addr & 0x00c0000f) | ((addr & 0x003ffff0) >> 1);
  103. __snd_gf1_write16(gus, reg, (unsigned short) (addr >> 11));
  104. __snd_gf1_write16(gus, reg + 1, (unsigned short) (addr << 5));
  105. }
  106. static inline unsigned int __snd_gf1_read_addr(struct snd_gus_card * gus,
  107. unsigned char reg, short w_16bit)
  108. {
  109. unsigned int res;
  110. res = ((unsigned int) __snd_gf1_look16(gus, reg | 0x80) << 11) & 0xfff800;
  111. res |= ((unsigned int) __snd_gf1_look16(gus, (reg + 1) | 0x80) >> 5) & 0x0007ff;
  112. if (gus->gf1.enh_mode) {
  113. res |= (unsigned int) __snd_gf1_look8(gus, SNDRV_GF1_VB_UPPER_ADDRESS | 0x80) << 26;
  114. if (w_16bit)
  115. res = ((res << 1) & 0xffffffe0) | (res & 0x0000000f);
  116. } else if (w_16bit)
  117. res = ((res & 0x001ffff0) << 1) | (res & 0x00c0000f);
  118. return res;
  119. }
  120. /*
  121. * =======================================================================
  122. */
  123. void snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
  124. {
  125. __snd_gf1_ctrl_stop(gus, reg);
  126. }
  127. void snd_gf1_write8(struct snd_gus_card * gus,
  128. unsigned char reg,
  129. unsigned char data)
  130. {
  131. __snd_gf1_write8(gus, reg, data);
  132. }
  133. unsigned char snd_gf1_look8(struct snd_gus_card * gus, unsigned char reg)
  134. {
  135. return __snd_gf1_look8(gus, reg);
  136. }
  137. void snd_gf1_write16(struct snd_gus_card * gus,
  138. unsigned char reg,
  139. unsigned int data)
  140. {
  141. __snd_gf1_write16(gus, reg, data);
  142. }
  143. unsigned short snd_gf1_look16(struct snd_gus_card * gus, unsigned char reg)
  144. {
  145. return __snd_gf1_look16(gus, reg);
  146. }
  147. void snd_gf1_adlib_write(struct snd_gus_card * gus,
  148. unsigned char reg,
  149. unsigned char data)
  150. {
  151. __snd_gf1_adlib_write(gus, reg, data);
  152. }
  153. void snd_gf1_write_addr(struct snd_gus_card * gus, unsigned char reg,
  154. unsigned int addr, short w_16bit)
  155. {
  156. __snd_gf1_write_addr(gus, reg, addr, w_16bit);
  157. }
  158. unsigned int snd_gf1_read_addr(struct snd_gus_card * gus,
  159. unsigned char reg,
  160. short w_16bit)
  161. {
  162. return __snd_gf1_read_addr(gus, reg, w_16bit);
  163. }
  164. /*
  165. */
  166. void snd_gf1_i_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
  167. {
  168. unsigned long flags;
  169. spin_lock_irqsave(&gus->reg_lock, flags);
  170. __snd_gf1_ctrl_stop(gus, reg);
  171. spin_unlock_irqrestore(&gus->reg_lock, flags);
  172. }
  173. void snd_gf1_i_write8(struct snd_gus_card * gus,
  174. unsigned char reg,
  175. unsigned char data)
  176. {
  177. unsigned long flags;
  178. spin_lock_irqsave(&gus->reg_lock, flags);
  179. __snd_gf1_write8(gus, reg, data);
  180. spin_unlock_irqrestore(&gus->reg_lock, flags);
  181. }
  182. unsigned char snd_gf1_i_look8(struct snd_gus_card * gus, unsigned char reg)
  183. {
  184. unsigned long flags;
  185. unsigned char res;
  186. spin_lock_irqsave(&gus->reg_lock, flags);
  187. res = __snd_gf1_look8(gus, reg);
  188. spin_unlock_irqrestore(&gus->reg_lock, flags);
  189. return res;
  190. }
  191. void snd_gf1_i_write16(struct snd_gus_card * gus,
  192. unsigned char reg,
  193. unsigned int data)
  194. {
  195. unsigned long flags;
  196. spin_lock_irqsave(&gus->reg_lock, flags);
  197. __snd_gf1_write16(gus, reg, data);
  198. spin_unlock_irqrestore(&gus->reg_lock, flags);
  199. }
  200. unsigned short snd_gf1_i_look16(struct snd_gus_card * gus, unsigned char reg)
  201. {
  202. unsigned long flags;
  203. unsigned short res;
  204. spin_lock_irqsave(&gus->reg_lock, flags);
  205. res = __snd_gf1_look16(gus, reg);
  206. spin_unlock_irqrestore(&gus->reg_lock, flags);
  207. return res;
  208. }
  209. #if 0
  210. void snd_gf1_i_adlib_write(struct snd_gus_card * gus,
  211. unsigned char reg,
  212. unsigned char data)
  213. {
  214. unsigned long flags;
  215. spin_lock_irqsave(&gus->reg_lock, flags);
  216. __snd_gf1_adlib_write(gus, reg, data);
  217. spin_unlock_irqrestore(&gus->reg_lock, flags);
  218. }
  219. void snd_gf1_i_write_addr(struct snd_gus_card * gus, unsigned char reg,
  220. unsigned int addr, short w_16bit)
  221. {
  222. unsigned long flags;
  223. spin_lock_irqsave(&gus->reg_lock, flags);
  224. __snd_gf1_write_addr(gus, reg, addr, w_16bit);
  225. spin_unlock_irqrestore(&gus->reg_lock, flags);
  226. }
  227. #endif /* 0 */
  228. #ifdef CONFIG_SND_DEBUG
  229. static unsigned int snd_gf1_i_read_addr(struct snd_gus_card * gus,
  230. unsigned char reg, short w_16bit)
  231. {
  232. unsigned int res;
  233. unsigned long flags;
  234. spin_lock_irqsave(&gus->reg_lock, flags);
  235. res = __snd_gf1_read_addr(gus, reg, w_16bit);
  236. spin_unlock_irqrestore(&gus->reg_lock, flags);
  237. return res;
  238. }
  239. #endif
  240. /*
  241. */
  242. void snd_gf1_dram_addr(struct snd_gus_card * gus, unsigned int addr)
  243. {
  244. outb(0x43, gus->gf1.reg_regsel);
  245. mb();
  246. outw((unsigned short) addr, gus->gf1.reg_data16);
  247. mb();
  248. outb(0x44, gus->gf1.reg_regsel);
  249. mb();
  250. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  251. mb();
  252. }
  253. void snd_gf1_poke(struct snd_gus_card * gus, unsigned int addr, unsigned char data)
  254. {
  255. unsigned long flags;
  256. spin_lock_irqsave(&gus->reg_lock, flags);
  257. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  258. mb();
  259. outw((unsigned short) addr, gus->gf1.reg_data16);
  260. mb();
  261. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  262. mb();
  263. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  264. mb();
  265. outb(data, gus->gf1.reg_dram);
  266. spin_unlock_irqrestore(&gus->reg_lock, flags);
  267. }
  268. unsigned char snd_gf1_peek(struct snd_gus_card * gus, unsigned int addr)
  269. {
  270. unsigned long flags;
  271. unsigned char res;
  272. spin_lock_irqsave(&gus->reg_lock, flags);
  273. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  274. mb();
  275. outw((unsigned short) addr, gus->gf1.reg_data16);
  276. mb();
  277. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  278. mb();
  279. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  280. mb();
  281. res = inb(gus->gf1.reg_dram);
  282. spin_unlock_irqrestore(&gus->reg_lock, flags);
  283. return res;
  284. }
  285. #if 0
  286. void snd_gf1_pokew(struct snd_gus_card * gus, unsigned int addr, unsigned short data)
  287. {
  288. unsigned long flags;
  289. #ifdef CONFIG_SND_DEBUG
  290. if (!gus->interwave)
  291. snd_printk(KERN_DEBUG "snd_gf1_pokew - GF1!!!\n");
  292. #endif
  293. spin_lock_irqsave(&gus->reg_lock, flags);
  294. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  295. mb();
  296. outw((unsigned short) addr, gus->gf1.reg_data16);
  297. mb();
  298. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  299. mb();
  300. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  301. mb();
  302. outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
  303. mb();
  304. outw(data, gus->gf1.reg_data16);
  305. spin_unlock_irqrestore(&gus->reg_lock, flags);
  306. }
  307. unsigned short snd_gf1_peekw(struct snd_gus_card * gus, unsigned int addr)
  308. {
  309. unsigned long flags;
  310. unsigned short res;
  311. #ifdef CONFIG_SND_DEBUG
  312. if (!gus->interwave)
  313. snd_printk(KERN_DEBUG "snd_gf1_peekw - GF1!!!\n");
  314. #endif
  315. spin_lock_irqsave(&gus->reg_lock, flags);
  316. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  317. mb();
  318. outw((unsigned short) addr, gus->gf1.reg_data16);
  319. mb();
  320. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  321. mb();
  322. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  323. mb();
  324. outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
  325. mb();
  326. res = inw(gus->gf1.reg_data16);
  327. spin_unlock_irqrestore(&gus->reg_lock, flags);
  328. return res;
  329. }
  330. void snd_gf1_dram_setmem(struct snd_gus_card * gus, unsigned int addr,
  331. unsigned short value, unsigned int count)
  332. {
  333. unsigned long port;
  334. unsigned long flags;
  335. #ifdef CONFIG_SND_DEBUG
  336. if (!gus->interwave)
  337. snd_printk(KERN_DEBUG "snd_gf1_dram_setmem - GF1!!!\n");
  338. #endif
  339. addr &= ~1;
  340. count >>= 1;
  341. port = GUSP(gus, GF1DATALOW);
  342. spin_lock_irqsave(&gus->reg_lock, flags);
  343. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  344. mb();
  345. outw((unsigned short) addr, gus->gf1.reg_data16);
  346. mb();
  347. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  348. mb();
  349. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  350. mb();
  351. outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
  352. while (count--)
  353. outw(value, port);
  354. spin_unlock_irqrestore(&gus->reg_lock, flags);
  355. }
  356. #endif /* 0 */
  357. void snd_gf1_select_active_voices(struct snd_gus_card * gus)
  358. {
  359. unsigned short voices;
  360. static unsigned short voices_tbl[32 - 14 + 1] =
  361. {
  362. 44100, 41160, 38587, 36317, 34300, 32494, 30870, 29400, 28063, 26843,
  363. 25725, 24696, 23746, 22866, 22050, 21289, 20580, 19916, 19293
  364. };
  365. voices = gus->gf1.active_voices;
  366. if (voices > 32)
  367. voices = 32;
  368. if (voices < 14)
  369. voices = 14;
  370. if (gus->gf1.enh_mode)
  371. voices = 32;
  372. gus->gf1.active_voices = voices;
  373. gus->gf1.playback_freq =
  374. gus->gf1.enh_mode ? 44100 : voices_tbl[voices - 14];
  375. if (!gus->gf1.enh_mode) {
  376. snd_gf1_i_write8(gus, SNDRV_GF1_GB_ACTIVE_VOICES, 0xc0 | (voices - 1));
  377. udelay(100);
  378. }
  379. }
  380. #ifdef CONFIG_SND_DEBUG
  381. void snd_gf1_print_voice_registers(struct snd_gus_card * gus)
  382. {
  383. unsigned char mode;
  384. int voice, ctrl;
  385. voice = gus->gf1.active_voice;
  386. printk(KERN_INFO " -%i- GF1 voice ctrl, ramp ctrl = 0x%x, 0x%x\n", voice, ctrl = snd_gf1_i_read8(gus, 0), snd_gf1_i_read8(gus, 0x0d));
  387. printk(KERN_INFO " -%i- GF1 frequency = 0x%x\n", voice, snd_gf1_i_read16(gus, 1));
  388. printk(KERN_INFO " -%i- GF1 loop start, end = 0x%x (0x%x), 0x%x (0x%x)\n", voice, snd_gf1_i_read_addr(gus, 2, ctrl & 4), snd_gf1_i_read_addr(gus, 2, (ctrl & 4) ^ 4), snd_gf1_i_read_addr(gus, 4, ctrl & 4), snd_gf1_i_read_addr(gus, 4, (ctrl & 4) ^ 4));
  389. printk(KERN_INFO " -%i- GF1 ramp start, end, rate = 0x%x, 0x%x, 0x%x\n", voice, snd_gf1_i_read8(gus, 7), snd_gf1_i_read8(gus, 8), snd_gf1_i_read8(gus, 6));
  390. printk(KERN_INFO" -%i- GF1 volume = 0x%x\n", voice, snd_gf1_i_read16(gus, 9));
  391. printk(KERN_INFO " -%i- GF1 position = 0x%x (0x%x)\n", voice, snd_gf1_i_read_addr(gus, 0x0a, ctrl & 4), snd_gf1_i_read_addr(gus, 0x0a, (ctrl & 4) ^ 4));
  392. if (gus->interwave && snd_gf1_i_read8(gus, 0x19) & 0x01) { /* enhanced mode */
  393. mode = snd_gf1_i_read8(gus, 0x15);
  394. printk(KERN_INFO " -%i- GFA1 mode = 0x%x\n", voice, mode);
  395. if (mode & 0x01) { /* Effect processor */
  396. printk(KERN_INFO " -%i- GFA1 effect address = 0x%x\n", voice, snd_gf1_i_read_addr(gus, 0x11, ctrl & 4));
  397. printk(KERN_INFO " -%i- GFA1 effect volume = 0x%x\n", voice, snd_gf1_i_read16(gus, 0x16));
  398. printk(KERN_INFO " -%i- GFA1 effect volume final = 0x%x\n", voice, snd_gf1_i_read16(gus, 0x1d));
  399. printk(KERN_INFO " -%i- GFA1 effect acumulator = 0x%x\n", voice, snd_gf1_i_read8(gus, 0x14));
  400. }
  401. if (mode & 0x20) {
  402. printk(KERN_INFO " -%i- GFA1 left offset = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x13), snd_gf1_i_read16(gus, 0x13) >> 4);
  403. printk(KERN_INFO " -%i- GFA1 left offset final = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x1c), snd_gf1_i_read16(gus, 0x1c) >> 4);
  404. printk(KERN_INFO " -%i- GFA1 right offset = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x0c), snd_gf1_i_read16(gus, 0x0c) >> 4);
  405. printk(KERN_INFO " -%i- GFA1 right offset final = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x1b), snd_gf1_i_read16(gus, 0x1b) >> 4);
  406. } else
  407. printk(KERN_INFO " -%i- GF1 pan = 0x%x\n", voice, snd_gf1_i_read8(gus, 0x0c));
  408. } else
  409. printk(KERN_INFO " -%i- GF1 pan = 0x%x\n", voice, snd_gf1_i_read8(gus, 0x0c));
  410. }
  411. #if 0
  412. void snd_gf1_print_global_registers(struct snd_gus_card * gus)
  413. {
  414. unsigned char global_mode = 0x00;
  415. printk(KERN_INFO " -G- GF1 active voices = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_ACTIVE_VOICES));
  416. if (gus->interwave) {
  417. global_mode = snd_gf1_i_read8(gus, SNDRV_GF1_GB_GLOBAL_MODE);
  418. printk(KERN_INFO " -G- GF1 global mode = 0x%x\n", global_mode);
  419. }
  420. if (global_mode & 0x02) /* LFO enabled? */
  421. printk(KERN_INFO " -G- GF1 LFO base = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_LFO_BASE));
  422. printk(KERN_INFO " -G- GF1 voices IRQ read = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_VOICES_IRQ_READ));
  423. printk(KERN_INFO " -G- GF1 DRAM DMA control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL));
  424. printk(KERN_INFO " -G- GF1 DRAM DMA high/low = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_HIGH), snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW));
  425. printk(KERN_INFO " -G- GF1 DRAM IO high/low = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_IO_HIGH), snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_IO_LOW));
  426. if (!gus->interwave)
  427. printk(KERN_INFO " -G- GF1 record DMA control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_REC_DMA_CONTROL));
  428. printk(KERN_INFO " -G- GF1 DRAM IO 16 = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_DRAM_IO16));
  429. if (gus->gf1.enh_mode) {
  430. printk(KERN_INFO " -G- GFA1 memory config = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG));
  431. printk(KERN_INFO " -G- GFA1 memory control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_MEMORY_CONTROL));
  432. printk(KERN_INFO " -G- GFA1 FIFO record base = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_RECORD_BASE_ADDR));
  433. printk(KERN_INFO " -G- GFA1 FIFO playback base = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_PLAY_BASE_ADDR));
  434. printk(KERN_INFO " -G- GFA1 interleave control = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_INTERLEAVE));
  435. }
  436. }
  437. void snd_gf1_print_setup_registers(struct snd_gus_card * gus)
  438. {
  439. printk(KERN_INFO " -S- mix control = 0x%x\n", inb(GUSP(gus, MIXCNTRLREG)));
  440. printk(KERN_INFO " -S- IRQ status = 0x%x\n", inb(GUSP(gus, IRQSTAT)));
  441. printk(KERN_INFO " -S- timer control = 0x%x\n", inb(GUSP(gus, TIMERCNTRL)));
  442. printk(KERN_INFO " -S- timer data = 0x%x\n", inb(GUSP(gus, TIMERDATA)));
  443. printk(KERN_INFO " -S- status read = 0x%x\n", inb(GUSP(gus, REGCNTRLS)));
  444. printk(KERN_INFO " -S- Sound Blaster control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL));
  445. printk(KERN_INFO " -S- AdLib timer 1/2 = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_1), snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_2));
  446. printk(KERN_INFO " -S- reset = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_RESET));
  447. if (gus->interwave) {
  448. printk(KERN_INFO " -S- compatibility = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_COMPATIBILITY));
  449. printk(KERN_INFO " -S- decode control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DECODE_CONTROL));
  450. printk(KERN_INFO " -S- version number = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_VERSION_NUMBER));
  451. printk(KERN_INFO " -S- MPU-401 emul. control A/B = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_A), snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_B));
  452. printk(KERN_INFO " -S- emulation IRQ = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_EMULATION_IRQ));
  453. }
  454. }
  455. void snd_gf1_peek_print_block(struct snd_gus_card * gus, unsigned int addr, int count, int w_16bit)
  456. {
  457. if (!w_16bit) {
  458. while (count-- > 0)
  459. printk(count > 0 ? "%02x:" : "%02x", snd_gf1_peek(gus, addr++));
  460. } else {
  461. while (count-- > 0) {
  462. printk(count > 0 ? "%04x:" : "%04x", snd_gf1_peek(gus, addr) | (snd_gf1_peek(gus, addr + 1) << 8));
  463. addr += 2;
  464. }
  465. }
  466. }
  467. #endif /* 0 */
  468. #endif