ad1816a_lib.c 28 KB

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  1. /*
  2. ad1816a.c - lowlevel code for Analog Devices AD1816A chip.
  3. Copyright (C) 1999-2000 by Massimo Piccioni <dafastidio@libero.it>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  15. */
  16. #include <sound/driver.h>
  17. #include <linux/delay.h>
  18. #include <linux/init.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/slab.h>
  21. #include <linux/ioport.h>
  22. #include <sound/core.h>
  23. #include <sound/ad1816a.h>
  24. #include <asm/io.h>
  25. #include <asm/dma.h>
  26. static inline int snd_ad1816a_busy_wait(struct snd_ad1816a *chip)
  27. {
  28. int timeout;
  29. for (timeout = 1000; timeout-- > 0; udelay(10))
  30. if (inb(AD1816A_REG(AD1816A_CHIP_STATUS)) & AD1816A_READY)
  31. return 0;
  32. snd_printk("chip busy.\n");
  33. return -EBUSY;
  34. }
  35. static inline unsigned char snd_ad1816a_in(struct snd_ad1816a *chip, unsigned char reg)
  36. {
  37. snd_ad1816a_busy_wait(chip);
  38. return inb(AD1816A_REG(reg));
  39. }
  40. static inline void snd_ad1816a_out(struct snd_ad1816a *chip, unsigned char reg,
  41. unsigned char value)
  42. {
  43. snd_ad1816a_busy_wait(chip);
  44. outb(value, AD1816A_REG(reg));
  45. }
  46. static inline void snd_ad1816a_out_mask(struct snd_ad1816a *chip, unsigned char reg,
  47. unsigned char mask, unsigned char value)
  48. {
  49. snd_ad1816a_out(chip, reg,
  50. (value & mask) | (snd_ad1816a_in(chip, reg) & ~mask));
  51. }
  52. static unsigned short snd_ad1816a_read(struct snd_ad1816a *chip, unsigned char reg)
  53. {
  54. snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
  55. return snd_ad1816a_in(chip, AD1816A_INDIR_DATA_LOW) |
  56. (snd_ad1816a_in(chip, AD1816A_INDIR_DATA_HIGH) << 8);
  57. }
  58. static void snd_ad1816a_write(struct snd_ad1816a *chip, unsigned char reg,
  59. unsigned short value)
  60. {
  61. snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
  62. snd_ad1816a_out(chip, AD1816A_INDIR_DATA_LOW, value & 0xff);
  63. snd_ad1816a_out(chip, AD1816A_INDIR_DATA_HIGH, (value >> 8) & 0xff);
  64. }
  65. static void snd_ad1816a_write_mask(struct snd_ad1816a *chip, unsigned char reg,
  66. unsigned short mask, unsigned short value)
  67. {
  68. snd_ad1816a_write(chip, reg,
  69. (value & mask) | (snd_ad1816a_read(chip, reg) & ~mask));
  70. }
  71. static unsigned char snd_ad1816a_get_format(struct snd_ad1816a *chip,
  72. unsigned int format, int channels)
  73. {
  74. unsigned char retval = AD1816A_FMT_LINEAR_8;
  75. switch (format) {
  76. case SNDRV_PCM_FORMAT_MU_LAW:
  77. retval = AD1816A_FMT_ULAW_8;
  78. break;
  79. case SNDRV_PCM_FORMAT_A_LAW:
  80. retval = AD1816A_FMT_ALAW_8;
  81. break;
  82. case SNDRV_PCM_FORMAT_S16_LE:
  83. retval = AD1816A_FMT_LINEAR_16_LIT;
  84. break;
  85. case SNDRV_PCM_FORMAT_S16_BE:
  86. retval = AD1816A_FMT_LINEAR_16_BIG;
  87. }
  88. return (channels > 1) ? (retval | AD1816A_FMT_STEREO) : retval;
  89. }
  90. static int snd_ad1816a_open(struct snd_ad1816a *chip, unsigned int mode)
  91. {
  92. unsigned long flags;
  93. spin_lock_irqsave(&chip->lock, flags);
  94. if (chip->mode & mode) {
  95. spin_unlock_irqrestore(&chip->lock, flags);
  96. return -EAGAIN;
  97. }
  98. switch ((mode &= AD1816A_MODE_OPEN)) {
  99. case AD1816A_MODE_PLAYBACK:
  100. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  101. AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
  102. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  103. AD1816A_PLAYBACK_IRQ_ENABLE, 0xffff);
  104. break;
  105. case AD1816A_MODE_CAPTURE:
  106. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  107. AD1816A_CAPTURE_IRQ_PENDING, 0x00);
  108. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  109. AD1816A_CAPTURE_IRQ_ENABLE, 0xffff);
  110. break;
  111. case AD1816A_MODE_TIMER:
  112. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  113. AD1816A_TIMER_IRQ_PENDING, 0x00);
  114. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  115. AD1816A_TIMER_IRQ_ENABLE, 0xffff);
  116. }
  117. chip->mode |= mode;
  118. spin_unlock_irqrestore(&chip->lock, flags);
  119. return 0;
  120. }
  121. static void snd_ad1816a_close(struct snd_ad1816a *chip, unsigned int mode)
  122. {
  123. unsigned long flags;
  124. spin_lock_irqsave(&chip->lock, flags);
  125. switch ((mode &= AD1816A_MODE_OPEN)) {
  126. case AD1816A_MODE_PLAYBACK:
  127. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  128. AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
  129. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  130. AD1816A_PLAYBACK_IRQ_ENABLE, 0x0000);
  131. break;
  132. case AD1816A_MODE_CAPTURE:
  133. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  134. AD1816A_CAPTURE_IRQ_PENDING, 0x00);
  135. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  136. AD1816A_CAPTURE_IRQ_ENABLE, 0x0000);
  137. break;
  138. case AD1816A_MODE_TIMER:
  139. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  140. AD1816A_TIMER_IRQ_PENDING, 0x00);
  141. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  142. AD1816A_TIMER_IRQ_ENABLE, 0x0000);
  143. }
  144. if (!((chip->mode &= ~mode) & AD1816A_MODE_OPEN))
  145. chip->mode = 0;
  146. spin_unlock_irqrestore(&chip->lock, flags);
  147. }
  148. static int snd_ad1816a_trigger(struct snd_ad1816a *chip, unsigned char what,
  149. int channel, int cmd)
  150. {
  151. int error = 0;
  152. switch (cmd) {
  153. case SNDRV_PCM_TRIGGER_START:
  154. case SNDRV_PCM_TRIGGER_STOP:
  155. spin_lock(&chip->lock);
  156. cmd = (cmd == SNDRV_PCM_TRIGGER_START) ? 0xff: 0x00;
  157. if (what & AD1816A_PLAYBACK_ENABLE)
  158. snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
  159. AD1816A_PLAYBACK_ENABLE, cmd);
  160. if (what & AD1816A_CAPTURE_ENABLE)
  161. snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
  162. AD1816A_CAPTURE_ENABLE, cmd);
  163. spin_unlock(&chip->lock);
  164. break;
  165. default:
  166. snd_printk("invalid trigger mode 0x%x.\n", what);
  167. error = -EINVAL;
  168. }
  169. return error;
  170. }
  171. static int snd_ad1816a_playback_trigger(struct snd_pcm_substream *substream, int cmd)
  172. {
  173. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  174. return snd_ad1816a_trigger(chip, AD1816A_PLAYBACK_ENABLE,
  175. SNDRV_PCM_STREAM_PLAYBACK, cmd);
  176. }
  177. static int snd_ad1816a_capture_trigger(struct snd_pcm_substream *substream, int cmd)
  178. {
  179. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  180. return snd_ad1816a_trigger(chip, AD1816A_CAPTURE_ENABLE,
  181. SNDRV_PCM_STREAM_CAPTURE, cmd);
  182. }
  183. static int snd_ad1816a_hw_params(struct snd_pcm_substream *substream,
  184. struct snd_pcm_hw_params *hw_params)
  185. {
  186. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  187. }
  188. static int snd_ad1816a_hw_free(struct snd_pcm_substream *substream)
  189. {
  190. return snd_pcm_lib_free_pages(substream);
  191. }
  192. static int snd_ad1816a_playback_prepare(struct snd_pcm_substream *substream)
  193. {
  194. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  195. unsigned long flags;
  196. struct snd_pcm_runtime *runtime = substream->runtime;
  197. unsigned int size, rate;
  198. spin_lock_irqsave(&chip->lock, flags);
  199. chip->p_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
  200. snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
  201. AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
  202. snd_dma_program(chip->dma1, runtime->dma_addr, size,
  203. DMA_MODE_WRITE | DMA_AUTOINIT);
  204. rate = runtime->rate;
  205. if (chip->clock_freq)
  206. rate = (rate * 33000) / chip->clock_freq;
  207. snd_ad1816a_write(chip, AD1816A_PLAYBACK_SAMPLE_RATE, rate);
  208. snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
  209. AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
  210. snd_ad1816a_get_format(chip, runtime->format,
  211. runtime->channels));
  212. snd_ad1816a_write(chip, AD1816A_PLAYBACK_BASE_COUNT,
  213. snd_pcm_lib_period_bytes(substream) / 4 - 1);
  214. spin_unlock_irqrestore(&chip->lock, flags);
  215. return 0;
  216. }
  217. static int snd_ad1816a_capture_prepare(struct snd_pcm_substream *substream)
  218. {
  219. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  220. unsigned long flags;
  221. struct snd_pcm_runtime *runtime = substream->runtime;
  222. unsigned int size, rate;
  223. spin_lock_irqsave(&chip->lock, flags);
  224. chip->c_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
  225. snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
  226. AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
  227. snd_dma_program(chip->dma2, runtime->dma_addr, size,
  228. DMA_MODE_READ | DMA_AUTOINIT);
  229. rate = runtime->rate;
  230. if (chip->clock_freq)
  231. rate = (rate * 33000) / chip->clock_freq;
  232. snd_ad1816a_write(chip, AD1816A_CAPTURE_SAMPLE_RATE, rate);
  233. snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
  234. AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
  235. snd_ad1816a_get_format(chip, runtime->format,
  236. runtime->channels));
  237. snd_ad1816a_write(chip, AD1816A_CAPTURE_BASE_COUNT,
  238. snd_pcm_lib_period_bytes(substream) / 4 - 1);
  239. spin_unlock_irqrestore(&chip->lock, flags);
  240. return 0;
  241. }
  242. static snd_pcm_uframes_t snd_ad1816a_playback_pointer(struct snd_pcm_substream *substream)
  243. {
  244. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  245. size_t ptr;
  246. if (!(chip->mode & AD1816A_MODE_PLAYBACK))
  247. return 0;
  248. ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
  249. return bytes_to_frames(substream->runtime, ptr);
  250. }
  251. static snd_pcm_uframes_t snd_ad1816a_capture_pointer(struct snd_pcm_substream *substream)
  252. {
  253. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  254. size_t ptr;
  255. if (!(chip->mode & AD1816A_MODE_CAPTURE))
  256. return 0;
  257. ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
  258. return bytes_to_frames(substream->runtime, ptr);
  259. }
  260. static irqreturn_t snd_ad1816a_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  261. {
  262. struct snd_ad1816a *chip = dev_id;
  263. unsigned char status;
  264. spin_lock(&chip->lock);
  265. status = snd_ad1816a_in(chip, AD1816A_INTERRUPT_STATUS);
  266. spin_unlock(&chip->lock);
  267. if ((status & AD1816A_PLAYBACK_IRQ_PENDING) && chip->playback_substream)
  268. snd_pcm_period_elapsed(chip->playback_substream);
  269. if ((status & AD1816A_CAPTURE_IRQ_PENDING) && chip->capture_substream)
  270. snd_pcm_period_elapsed(chip->capture_substream);
  271. if ((status & AD1816A_TIMER_IRQ_PENDING) && chip->timer)
  272. snd_timer_interrupt(chip->timer, chip->timer->sticks);
  273. spin_lock(&chip->lock);
  274. snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
  275. spin_unlock(&chip->lock);
  276. return IRQ_HANDLED;
  277. }
  278. static struct snd_pcm_hardware snd_ad1816a_playback = {
  279. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  280. SNDRV_PCM_INFO_MMAP_VALID),
  281. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  282. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
  283. SNDRV_PCM_FMTBIT_S16_BE),
  284. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  285. .rate_min = 4000,
  286. .rate_max = 55200,
  287. .channels_min = 1,
  288. .channels_max = 2,
  289. .buffer_bytes_max = (128*1024),
  290. .period_bytes_min = 64,
  291. .period_bytes_max = (128*1024),
  292. .periods_min = 1,
  293. .periods_max = 1024,
  294. .fifo_size = 0,
  295. };
  296. static struct snd_pcm_hardware snd_ad1816a_capture = {
  297. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  298. SNDRV_PCM_INFO_MMAP_VALID),
  299. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  300. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
  301. SNDRV_PCM_FMTBIT_S16_BE),
  302. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  303. .rate_min = 4000,
  304. .rate_max = 55200,
  305. .channels_min = 1,
  306. .channels_max = 2,
  307. .buffer_bytes_max = (128*1024),
  308. .period_bytes_min = 64,
  309. .period_bytes_max = (128*1024),
  310. .periods_min = 1,
  311. .periods_max = 1024,
  312. .fifo_size = 0,
  313. };
  314. #if 0 /* not used now */
  315. static int snd_ad1816a_timer_close(struct snd_timer *timer)
  316. {
  317. struct snd_ad1816a *chip = snd_timer_chip(timer);
  318. snd_ad1816a_close(chip, AD1816A_MODE_TIMER);
  319. return 0;
  320. }
  321. static int snd_ad1816a_timer_open(struct snd_timer *timer)
  322. {
  323. struct snd_ad1816a *chip = snd_timer_chip(timer);
  324. snd_ad1816a_open(chip, AD1816A_MODE_TIMER);
  325. return 0;
  326. }
  327. static unsigned long snd_ad1816a_timer_resolution(struct snd_timer *timer)
  328. {
  329. snd_assert(timer != NULL, return 0);
  330. return 10000;
  331. }
  332. static int snd_ad1816a_timer_start(struct snd_timer *timer)
  333. {
  334. unsigned short bits;
  335. unsigned long flags;
  336. struct snd_ad1816a *chip = snd_timer_chip(timer);
  337. spin_lock_irqsave(&chip->lock, flags);
  338. bits = snd_ad1816a_read(chip, AD1816A_INTERRUPT_ENABLE);
  339. if (!(bits & AD1816A_TIMER_ENABLE)) {
  340. snd_ad1816a_write(chip, AD1816A_TIMER_BASE_COUNT,
  341. timer->sticks & 0xffff);
  342. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  343. AD1816A_TIMER_ENABLE, 0xffff);
  344. }
  345. spin_unlock_irqrestore(&chip->lock, flags);
  346. return 0;
  347. }
  348. static int snd_ad1816a_timer_stop(struct snd_timer *timer)
  349. {
  350. unsigned long flags;
  351. struct snd_ad1816a *chip = snd_timer_chip(timer);
  352. spin_lock_irqsave(&chip->lock, flags);
  353. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  354. AD1816A_TIMER_ENABLE, 0x0000);
  355. spin_unlock_irqrestore(&chip->lock, flags);
  356. return 0;
  357. }
  358. static struct snd_timer_hardware snd_ad1816a_timer_table = {
  359. .flags = SNDRV_TIMER_HW_AUTO,
  360. .resolution = 10000,
  361. .ticks = 65535,
  362. .open = snd_ad1816a_timer_open,
  363. .close = snd_ad1816a_timer_close,
  364. .c_resolution = snd_ad1816a_timer_resolution,
  365. .start = snd_ad1816a_timer_start,
  366. .stop = snd_ad1816a_timer_stop,
  367. };
  368. #endif /* not used now */
  369. static int snd_ad1816a_playback_open(struct snd_pcm_substream *substream)
  370. {
  371. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  372. struct snd_pcm_runtime *runtime = substream->runtime;
  373. int error;
  374. if ((error = snd_ad1816a_open(chip, AD1816A_MODE_PLAYBACK)) < 0)
  375. return error;
  376. snd_pcm_set_sync(substream);
  377. runtime->hw = snd_ad1816a_playback;
  378. snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
  379. snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
  380. chip->playback_substream = substream;
  381. return 0;
  382. }
  383. static int snd_ad1816a_capture_open(struct snd_pcm_substream *substream)
  384. {
  385. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  386. struct snd_pcm_runtime *runtime = substream->runtime;
  387. int error;
  388. if ((error = snd_ad1816a_open(chip, AD1816A_MODE_CAPTURE)) < 0)
  389. return error;
  390. snd_pcm_set_sync(substream);
  391. runtime->hw = snd_ad1816a_capture;
  392. snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
  393. snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
  394. chip->capture_substream = substream;
  395. return 0;
  396. }
  397. static int snd_ad1816a_playback_close(struct snd_pcm_substream *substream)
  398. {
  399. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  400. chip->playback_substream = NULL;
  401. snd_ad1816a_close(chip, AD1816A_MODE_PLAYBACK);
  402. return 0;
  403. }
  404. static int snd_ad1816a_capture_close(struct snd_pcm_substream *substream)
  405. {
  406. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  407. chip->capture_substream = NULL;
  408. snd_ad1816a_close(chip, AD1816A_MODE_CAPTURE);
  409. return 0;
  410. }
  411. static void __devinit snd_ad1816a_init(struct snd_ad1816a *chip)
  412. {
  413. unsigned long flags;
  414. spin_lock_irqsave(&chip->lock, flags);
  415. snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
  416. snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
  417. AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
  418. snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
  419. AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
  420. snd_ad1816a_write(chip, AD1816A_INTERRUPT_ENABLE, 0x0000);
  421. snd_ad1816a_write_mask(chip, AD1816A_CHIP_CONFIG,
  422. AD1816A_CAPTURE_NOT_EQUAL | AD1816A_WSS_ENABLE, 0xffff);
  423. snd_ad1816a_write(chip, AD1816A_DSP_CONFIG, 0x0000);
  424. snd_ad1816a_write(chip, AD1816A_POWERDOWN_CTRL, 0x0000);
  425. spin_unlock_irqrestore(&chip->lock, flags);
  426. }
  427. static int __devinit snd_ad1816a_probe(struct snd_ad1816a *chip)
  428. {
  429. unsigned long flags;
  430. spin_lock_irqsave(&chip->lock, flags);
  431. switch (chip->version = snd_ad1816a_read(chip, AD1816A_VERSION_ID)) {
  432. case 0:
  433. chip->hardware = AD1816A_HW_AD1815;
  434. break;
  435. case 1:
  436. chip->hardware = AD1816A_HW_AD18MAX10;
  437. break;
  438. case 3:
  439. chip->hardware = AD1816A_HW_AD1816A;
  440. break;
  441. default:
  442. chip->hardware = AD1816A_HW_AUTO;
  443. }
  444. spin_unlock_irqrestore(&chip->lock, flags);
  445. return 0;
  446. }
  447. static int snd_ad1816a_free(struct snd_ad1816a *chip)
  448. {
  449. release_and_free_resource(chip->res_port);
  450. if (chip->irq >= 0)
  451. free_irq(chip->irq, (void *) chip);
  452. if (chip->dma1 >= 0) {
  453. snd_dma_disable(chip->dma1);
  454. free_dma(chip->dma1);
  455. }
  456. if (chip->dma2 >= 0) {
  457. snd_dma_disable(chip->dma2);
  458. free_dma(chip->dma2);
  459. }
  460. kfree(chip);
  461. return 0;
  462. }
  463. static int snd_ad1816a_dev_free(struct snd_device *device)
  464. {
  465. struct snd_ad1816a *chip = device->device_data;
  466. return snd_ad1816a_free(chip);
  467. }
  468. static const char __devinit *snd_ad1816a_chip_id(struct snd_ad1816a *chip)
  469. {
  470. switch (chip->hardware) {
  471. case AD1816A_HW_AD1816A: return "AD1816A";
  472. case AD1816A_HW_AD1815: return "AD1815";
  473. case AD1816A_HW_AD18MAX10: return "AD18max10";
  474. default:
  475. snd_printk("Unknown chip version %d:%d.\n",
  476. chip->version, chip->hardware);
  477. return "AD1816A - unknown";
  478. }
  479. }
  480. int __devinit snd_ad1816a_create(struct snd_card *card,
  481. unsigned long port, int irq, int dma1, int dma2,
  482. struct snd_ad1816a **rchip)
  483. {
  484. static struct snd_device_ops ops = {
  485. .dev_free = snd_ad1816a_dev_free,
  486. };
  487. int error;
  488. struct snd_ad1816a *chip;
  489. *rchip = NULL;
  490. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  491. if (chip == NULL)
  492. return -ENOMEM;
  493. chip->irq = -1;
  494. chip->dma1 = -1;
  495. chip->dma2 = -1;
  496. if ((chip->res_port = request_region(port, 16, "AD1816A")) == NULL) {
  497. snd_printk(KERN_ERR "ad1816a: can't grab port 0x%lx\n", port);
  498. snd_ad1816a_free(chip);
  499. return -EBUSY;
  500. }
  501. if (request_irq(irq, snd_ad1816a_interrupt, SA_INTERRUPT, "AD1816A", (void *) chip)) {
  502. snd_printk(KERN_ERR "ad1816a: can't grab IRQ %d\n", irq);
  503. snd_ad1816a_free(chip);
  504. return -EBUSY;
  505. }
  506. chip->irq = irq;
  507. if (request_dma(dma1, "AD1816A - 1")) {
  508. snd_printk(KERN_ERR "ad1816a: can't grab DMA1 %d\n", dma1);
  509. snd_ad1816a_free(chip);
  510. return -EBUSY;
  511. }
  512. chip->dma1 = dma1;
  513. if (request_dma(dma2, "AD1816A - 2")) {
  514. snd_printk(KERN_ERR "ad1816a: can't grab DMA2 %d\n", dma2);
  515. snd_ad1816a_free(chip);
  516. return -EBUSY;
  517. }
  518. chip->dma2 = dma2;
  519. chip->card = card;
  520. chip->port = port;
  521. spin_lock_init(&chip->lock);
  522. if ((error = snd_ad1816a_probe(chip))) {
  523. snd_ad1816a_free(chip);
  524. return error;
  525. }
  526. snd_ad1816a_init(chip);
  527. /* Register device */
  528. if ((error = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  529. snd_ad1816a_free(chip);
  530. return error;
  531. }
  532. *rchip = chip;
  533. return 0;
  534. }
  535. static struct snd_pcm_ops snd_ad1816a_playback_ops = {
  536. .open = snd_ad1816a_playback_open,
  537. .close = snd_ad1816a_playback_close,
  538. .ioctl = snd_pcm_lib_ioctl,
  539. .hw_params = snd_ad1816a_hw_params,
  540. .hw_free = snd_ad1816a_hw_free,
  541. .prepare = snd_ad1816a_playback_prepare,
  542. .trigger = snd_ad1816a_playback_trigger,
  543. .pointer = snd_ad1816a_playback_pointer,
  544. };
  545. static struct snd_pcm_ops snd_ad1816a_capture_ops = {
  546. .open = snd_ad1816a_capture_open,
  547. .close = snd_ad1816a_capture_close,
  548. .ioctl = snd_pcm_lib_ioctl,
  549. .hw_params = snd_ad1816a_hw_params,
  550. .hw_free = snd_ad1816a_hw_free,
  551. .prepare = snd_ad1816a_capture_prepare,
  552. .trigger = snd_ad1816a_capture_trigger,
  553. .pointer = snd_ad1816a_capture_pointer,
  554. };
  555. int __devinit snd_ad1816a_pcm(struct snd_ad1816a *chip, int device, struct snd_pcm **rpcm)
  556. {
  557. int error;
  558. struct snd_pcm *pcm;
  559. if ((error = snd_pcm_new(chip->card, "AD1816A", device, 1, 1, &pcm)))
  560. return error;
  561. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1816a_playback_ops);
  562. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1816a_capture_ops);
  563. pcm->private_data = chip;
  564. pcm->info_flags = (chip->dma1 == chip->dma2 ) ? SNDRV_PCM_INFO_JOINT_DUPLEX : 0;
  565. strcpy(pcm->name, snd_ad1816a_chip_id(chip));
  566. snd_ad1816a_init(chip);
  567. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  568. snd_dma_isa_data(),
  569. 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
  570. chip->pcm = pcm;
  571. if (rpcm)
  572. *rpcm = pcm;
  573. return 0;
  574. }
  575. #if 0 /* not used now */
  576. int __devinit snd_ad1816a_timer(struct snd_ad1816a *chip, int device, struct snd_timer **rtimer)
  577. {
  578. struct snd_timer *timer;
  579. struct snd_timer_id tid;
  580. int error;
  581. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  582. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  583. tid.card = chip->card->number;
  584. tid.device = device;
  585. tid.subdevice = 0;
  586. if ((error = snd_timer_new(chip->card, "AD1816A", &tid, &timer)) < 0)
  587. return error;
  588. strcpy(timer->name, snd_ad1816a_chip_id(chip));
  589. timer->private_data = chip;
  590. chip->timer = timer;
  591. timer->hw = snd_ad1816a_timer_table;
  592. if (rtimer)
  593. *rtimer = timer;
  594. return 0;
  595. }
  596. #endif /* not used now */
  597. /*
  598. *
  599. */
  600. static int snd_ad1816a_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  601. {
  602. static char *texts[8] = {
  603. "Line", "Mix", "CD", "Synth", "Video",
  604. "Mic", "Phone",
  605. };
  606. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  607. uinfo->count = 2;
  608. uinfo->value.enumerated.items = 7;
  609. if (uinfo->value.enumerated.item > 6)
  610. uinfo->value.enumerated.item = 6;
  611. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  612. return 0;
  613. }
  614. static int snd_ad1816a_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  615. {
  616. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  617. unsigned long flags;
  618. unsigned short val;
  619. spin_lock_irqsave(&chip->lock, flags);
  620. val = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL);
  621. spin_unlock_irqrestore(&chip->lock, flags);
  622. ucontrol->value.enumerated.item[0] = (val >> 12) & 7;
  623. ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
  624. return 0;
  625. }
  626. static int snd_ad1816a_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  627. {
  628. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  629. unsigned long flags;
  630. unsigned short val;
  631. int change;
  632. if (ucontrol->value.enumerated.item[0] > 6 ||
  633. ucontrol->value.enumerated.item[1] > 6)
  634. return -EINVAL;
  635. val = (ucontrol->value.enumerated.item[0] << 12) |
  636. (ucontrol->value.enumerated.item[1] << 4);
  637. spin_lock_irqsave(&chip->lock, flags);
  638. change = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL) != val;
  639. snd_ad1816a_write(chip, AD1816A_ADC_SOURCE_SEL, val);
  640. spin_unlock_irqrestore(&chip->lock, flags);
  641. return change;
  642. }
  643. #define AD1816A_SINGLE(xname, reg, shift, mask, invert) \
  644. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_single, \
  645. .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
  646. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  647. static int snd_ad1816a_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  648. {
  649. int mask = (kcontrol->private_value >> 16) & 0xff;
  650. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  651. uinfo->count = 1;
  652. uinfo->value.integer.min = 0;
  653. uinfo->value.integer.max = mask;
  654. return 0;
  655. }
  656. static int snd_ad1816a_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  657. {
  658. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  659. unsigned long flags;
  660. int reg = kcontrol->private_value & 0xff;
  661. int shift = (kcontrol->private_value >> 8) & 0xff;
  662. int mask = (kcontrol->private_value >> 16) & 0xff;
  663. int invert = (kcontrol->private_value >> 24) & 0xff;
  664. spin_lock_irqsave(&chip->lock, flags);
  665. ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask;
  666. spin_unlock_irqrestore(&chip->lock, flags);
  667. if (invert)
  668. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  669. return 0;
  670. }
  671. static int snd_ad1816a_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  672. {
  673. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  674. unsigned long flags;
  675. int reg = kcontrol->private_value & 0xff;
  676. int shift = (kcontrol->private_value >> 8) & 0xff;
  677. int mask = (kcontrol->private_value >> 16) & 0xff;
  678. int invert = (kcontrol->private_value >> 24) & 0xff;
  679. int change;
  680. unsigned short old_val, val;
  681. val = (ucontrol->value.integer.value[0] & mask);
  682. if (invert)
  683. val = mask - val;
  684. val <<= shift;
  685. spin_lock_irqsave(&chip->lock, flags);
  686. old_val = snd_ad1816a_read(chip, reg);
  687. val = (old_val & ~(mask << shift)) | val;
  688. change = val != old_val;
  689. snd_ad1816a_write(chip, reg, val);
  690. spin_unlock_irqrestore(&chip->lock, flags);
  691. return change;
  692. }
  693. #define AD1816A_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
  694. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_double, \
  695. .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
  696. .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
  697. static int snd_ad1816a_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  698. {
  699. int mask = (kcontrol->private_value >> 16) & 0xff;
  700. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  701. uinfo->count = 2;
  702. uinfo->value.integer.min = 0;
  703. uinfo->value.integer.max = mask;
  704. return 0;
  705. }
  706. static int snd_ad1816a_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  707. {
  708. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  709. unsigned long flags;
  710. int reg = kcontrol->private_value & 0xff;
  711. int shift_left = (kcontrol->private_value >> 8) & 0x0f;
  712. int shift_right = (kcontrol->private_value >> 12) & 0x0f;
  713. int mask = (kcontrol->private_value >> 16) & 0xff;
  714. int invert = (kcontrol->private_value >> 24) & 0xff;
  715. unsigned short val;
  716. spin_lock_irqsave(&chip->lock, flags);
  717. val = snd_ad1816a_read(chip, reg);
  718. ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
  719. ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
  720. spin_unlock_irqrestore(&chip->lock, flags);
  721. if (invert) {
  722. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  723. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  724. }
  725. return 0;
  726. }
  727. static int snd_ad1816a_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  728. {
  729. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  730. unsigned long flags;
  731. int reg = kcontrol->private_value & 0xff;
  732. int shift_left = (kcontrol->private_value >> 8) & 0x0f;
  733. int shift_right = (kcontrol->private_value >> 12) & 0x0f;
  734. int mask = (kcontrol->private_value >> 16) & 0xff;
  735. int invert = (kcontrol->private_value >> 24) & 0xff;
  736. int change;
  737. unsigned short old_val, val1, val2;
  738. val1 = ucontrol->value.integer.value[0] & mask;
  739. val2 = ucontrol->value.integer.value[1] & mask;
  740. if (invert) {
  741. val1 = mask - val1;
  742. val2 = mask - val2;
  743. }
  744. val1 <<= shift_left;
  745. val2 <<= shift_right;
  746. spin_lock_irqsave(&chip->lock, flags);
  747. old_val = snd_ad1816a_read(chip, reg);
  748. val1 = (old_val & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  749. change = val1 != old_val;
  750. snd_ad1816a_write(chip, reg, val1);
  751. spin_unlock_irqrestore(&chip->lock, flags);
  752. return change;
  753. }
  754. static struct snd_kcontrol_new snd_ad1816a_controls[] __devinitdata = {
  755. AD1816A_DOUBLE("Master Playback Switch", AD1816A_MASTER_ATT, 15, 7, 1, 1),
  756. AD1816A_DOUBLE("Master Playback Volume", AD1816A_MASTER_ATT, 8, 0, 31, 1),
  757. AD1816A_DOUBLE("PCM Playback Switch", AD1816A_VOICE_ATT, 15, 7, 1, 1),
  758. AD1816A_DOUBLE("PCM Playback Volume", AD1816A_VOICE_ATT, 8, 0, 63, 1),
  759. AD1816A_DOUBLE("Line Playback Switch", AD1816A_LINE_GAIN_ATT, 15, 7, 1, 1),
  760. AD1816A_DOUBLE("Line Playback Volume", AD1816A_LINE_GAIN_ATT, 8, 0, 31, 1),
  761. AD1816A_DOUBLE("CD Playback Switch", AD1816A_CD_GAIN_ATT, 15, 7, 1, 1),
  762. AD1816A_DOUBLE("CD Playback Volume", AD1816A_CD_GAIN_ATT, 8, 0, 31, 1),
  763. AD1816A_DOUBLE("Synth Playback Switch", AD1816A_SYNTH_GAIN_ATT, 15, 7, 1, 1),
  764. AD1816A_DOUBLE("Synth Playback Volume", AD1816A_SYNTH_GAIN_ATT, 8, 0, 31, 1),
  765. AD1816A_DOUBLE("FM Playback Switch", AD1816A_FM_ATT, 15, 7, 1, 1),
  766. AD1816A_DOUBLE("FM Playback Volume", AD1816A_FM_ATT, 8, 0, 63, 1),
  767. AD1816A_SINGLE("Mic Playback Switch", AD1816A_MIC_GAIN_ATT, 15, 1, 1),
  768. AD1816A_SINGLE("Mic Playback Volume", AD1816A_MIC_GAIN_ATT, 8, 31, 1),
  769. AD1816A_SINGLE("Mic Boost", AD1816A_MIC_GAIN_ATT, 14, 1, 0),
  770. AD1816A_DOUBLE("Video Playback Switch", AD1816A_VID_GAIN_ATT, 15, 7, 1, 1),
  771. AD1816A_DOUBLE("Video Playback Volume", AD1816A_VID_GAIN_ATT, 8, 0, 31, 1),
  772. AD1816A_SINGLE("Phone Capture Switch", AD1816A_PHONE_IN_GAIN_ATT, 15, 1, 1),
  773. AD1816A_SINGLE("Phone Capture Volume", AD1816A_PHONE_IN_GAIN_ATT, 0, 15, 1),
  774. AD1816A_SINGLE("Phone Playback Switch", AD1816A_PHONE_OUT_ATT, 7, 1, 1),
  775. AD1816A_SINGLE("Phone Playback Volume", AD1816A_PHONE_OUT_ATT, 0, 31, 1),
  776. {
  777. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  778. .name = "Capture Source",
  779. .info = snd_ad1816a_info_mux,
  780. .get = snd_ad1816a_get_mux,
  781. .put = snd_ad1816a_put_mux,
  782. },
  783. AD1816A_DOUBLE("Capture Switch", AD1816A_ADC_PGA, 15, 7, 1, 1),
  784. AD1816A_DOUBLE("Capture Volume", AD1816A_ADC_PGA, 8, 0, 15, 0),
  785. AD1816A_SINGLE("3D Control - Switch", AD1816A_3D_PHAT_CTRL, 15, 1, 1),
  786. AD1816A_SINGLE("3D Control - Level", AD1816A_3D_PHAT_CTRL, 0, 15, 0),
  787. };
  788. int __devinit snd_ad1816a_mixer(struct snd_ad1816a *chip)
  789. {
  790. struct snd_card *card;
  791. unsigned int idx;
  792. int err;
  793. snd_assert(chip != NULL && chip->card != NULL, return -EINVAL);
  794. card = chip->card;
  795. strcpy(card->mixername, snd_ad1816a_chip_id(chip));
  796. for (idx = 0; idx < ARRAY_SIZE(snd_ad1816a_controls); idx++) {
  797. if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_ad1816a_controls[idx], chip))) < 0)
  798. return err;
  799. }
  800. return 0;
  801. }