atomic.h 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717
  1. /*
  2. * Atomic operations that C can't guarantee us. Useful for
  3. * resource counting etc..
  4. *
  5. * But use these as seldom as possible since they are much more slower
  6. * than regular operations.
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. *
  12. * Copyright (C) 1996, 97, 99, 2000, 03, 04 by Ralf Baechle
  13. */
  14. /*
  15. * As workaround for the ATOMIC_DEC_AND_LOCK / atomic_dec_and_lock mess in
  16. * <linux/spinlock.h> we have to include <linux/spinlock.h> outside the
  17. * main big wrapper ...
  18. */
  19. #include <linux/config.h>
  20. #include <linux/spinlock.h>
  21. #ifndef _ASM_ATOMIC_H
  22. #define _ASM_ATOMIC_H
  23. #include <asm/cpu-features.h>
  24. #include <asm/interrupt.h>
  25. #include <asm/war.h>
  26. typedef struct { volatile int counter; } atomic_t;
  27. #define ATOMIC_INIT(i) { (i) }
  28. /*
  29. * atomic_read - read atomic variable
  30. * @v: pointer of type atomic_t
  31. *
  32. * Atomically reads the value of @v.
  33. */
  34. #define atomic_read(v) ((v)->counter)
  35. /*
  36. * atomic_set - set atomic variable
  37. * @v: pointer of type atomic_t
  38. * @i: required value
  39. *
  40. * Atomically sets the value of @v to @i.
  41. */
  42. #define atomic_set(v,i) ((v)->counter = (i))
  43. /*
  44. * atomic_add - add integer to atomic variable
  45. * @i: integer value to add
  46. * @v: pointer of type atomic_t
  47. *
  48. * Atomically adds @i to @v.
  49. */
  50. static __inline__ void atomic_add(int i, atomic_t * v)
  51. {
  52. if (cpu_has_llsc && R10000_LLSC_WAR) {
  53. unsigned long temp;
  54. __asm__ __volatile__(
  55. " .set mips3 \n"
  56. "1: ll %0, %1 # atomic_add \n"
  57. " addu %0, %2 \n"
  58. " sc %0, %1 \n"
  59. " beqzl %0, 1b \n"
  60. " .set mips0 \n"
  61. : "=&r" (temp), "=m" (v->counter)
  62. : "Ir" (i), "m" (v->counter));
  63. } else if (cpu_has_llsc) {
  64. unsigned long temp;
  65. __asm__ __volatile__(
  66. " .set mips3 \n"
  67. "1: ll %0, %1 # atomic_add \n"
  68. " addu %0, %2 \n"
  69. " sc %0, %1 \n"
  70. " beqz %0, 1b \n"
  71. " .set mips0 \n"
  72. : "=&r" (temp), "=m" (v->counter)
  73. : "Ir" (i), "m" (v->counter));
  74. } else {
  75. unsigned long flags;
  76. local_irq_save(flags);
  77. v->counter += i;
  78. local_irq_restore(flags);
  79. }
  80. }
  81. /*
  82. * atomic_sub - subtract the atomic variable
  83. * @i: integer value to subtract
  84. * @v: pointer of type atomic_t
  85. *
  86. * Atomically subtracts @i from @v.
  87. */
  88. static __inline__ void atomic_sub(int i, atomic_t * v)
  89. {
  90. if (cpu_has_llsc && R10000_LLSC_WAR) {
  91. unsigned long temp;
  92. __asm__ __volatile__(
  93. " .set mips3 \n"
  94. "1: ll %0, %1 # atomic_sub \n"
  95. " subu %0, %2 \n"
  96. " sc %0, %1 \n"
  97. " beqzl %0, 1b \n"
  98. " .set mips0 \n"
  99. : "=&r" (temp), "=m" (v->counter)
  100. : "Ir" (i), "m" (v->counter));
  101. } else if (cpu_has_llsc) {
  102. unsigned long temp;
  103. __asm__ __volatile__(
  104. " .set mips3 \n"
  105. "1: ll %0, %1 # atomic_sub \n"
  106. " subu %0, %2 \n"
  107. " sc %0, %1 \n"
  108. " beqz %0, 1b \n"
  109. " .set mips0 \n"
  110. : "=&r" (temp), "=m" (v->counter)
  111. : "Ir" (i), "m" (v->counter));
  112. } else {
  113. unsigned long flags;
  114. local_irq_save(flags);
  115. v->counter -= i;
  116. local_irq_restore(flags);
  117. }
  118. }
  119. /*
  120. * Same as above, but return the result value
  121. */
  122. static __inline__ int atomic_add_return(int i, atomic_t * v)
  123. {
  124. unsigned long result;
  125. if (cpu_has_llsc && R10000_LLSC_WAR) {
  126. unsigned long temp;
  127. __asm__ __volatile__(
  128. " .set mips3 \n"
  129. "1: ll %1, %2 # atomic_add_return \n"
  130. " addu %0, %1, %3 \n"
  131. " sc %0, %2 \n"
  132. " beqzl %0, 1b \n"
  133. " addu %0, %1, %3 \n"
  134. " sync \n"
  135. " .set mips0 \n"
  136. : "=&r" (result), "=&r" (temp), "=m" (v->counter)
  137. : "Ir" (i), "m" (v->counter)
  138. : "memory");
  139. } else if (cpu_has_llsc) {
  140. unsigned long temp;
  141. __asm__ __volatile__(
  142. " .set mips3 \n"
  143. "1: ll %1, %2 # atomic_add_return \n"
  144. " addu %0, %1, %3 \n"
  145. " sc %0, %2 \n"
  146. " beqz %0, 1b \n"
  147. " addu %0, %1, %3 \n"
  148. " sync \n"
  149. " .set mips0 \n"
  150. : "=&r" (result), "=&r" (temp), "=m" (v->counter)
  151. : "Ir" (i), "m" (v->counter)
  152. : "memory");
  153. } else {
  154. unsigned long flags;
  155. local_irq_save(flags);
  156. result = v->counter;
  157. result += i;
  158. v->counter = result;
  159. local_irq_restore(flags);
  160. }
  161. return result;
  162. }
  163. static __inline__ int atomic_sub_return(int i, atomic_t * v)
  164. {
  165. unsigned long result;
  166. if (cpu_has_llsc && R10000_LLSC_WAR) {
  167. unsigned long temp;
  168. __asm__ __volatile__(
  169. " .set mips3 \n"
  170. "1: ll %1, %2 # atomic_sub_return \n"
  171. " subu %0, %1, %3 \n"
  172. " sc %0, %2 \n"
  173. " beqzl %0, 1b \n"
  174. " subu %0, %1, %3 \n"
  175. " sync \n"
  176. " .set mips0 \n"
  177. : "=&r" (result), "=&r" (temp), "=m" (v->counter)
  178. : "Ir" (i), "m" (v->counter)
  179. : "memory");
  180. } else if (cpu_has_llsc) {
  181. unsigned long temp;
  182. __asm__ __volatile__(
  183. " .set mips3 \n"
  184. "1: ll %1, %2 # atomic_sub_return \n"
  185. " subu %0, %1, %3 \n"
  186. " sc %0, %2 \n"
  187. " beqz %0, 1b \n"
  188. " subu %0, %1, %3 \n"
  189. " sync \n"
  190. " .set mips0 \n"
  191. : "=&r" (result), "=&r" (temp), "=m" (v->counter)
  192. : "Ir" (i), "m" (v->counter)
  193. : "memory");
  194. } else {
  195. unsigned long flags;
  196. local_irq_save(flags);
  197. result = v->counter;
  198. result -= i;
  199. v->counter = result;
  200. local_irq_restore(flags);
  201. }
  202. return result;
  203. }
  204. /*
  205. * atomic_sub_if_positive - conditionally subtract integer from atomic variable
  206. * @i: integer value to subtract
  207. * @v: pointer of type atomic_t
  208. *
  209. * Atomically test @v and subtract @i if @v is greater or equal than @i.
  210. * The function returns the old value of @v minus @i.
  211. */
  212. static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
  213. {
  214. unsigned long result;
  215. if (cpu_has_llsc && R10000_LLSC_WAR) {
  216. unsigned long temp;
  217. __asm__ __volatile__(
  218. " .set mips3 \n"
  219. "1: ll %1, %2 # atomic_sub_if_positive\n"
  220. " subu %0, %1, %3 \n"
  221. " bltz %0, 1f \n"
  222. " sc %0, %2 \n"
  223. " beqzl %0, 1b \n"
  224. " sync \n"
  225. "1: \n"
  226. " .set mips0 \n"
  227. : "=&r" (result), "=&r" (temp), "=m" (v->counter)
  228. : "Ir" (i), "m" (v->counter)
  229. : "memory");
  230. } else if (cpu_has_llsc) {
  231. unsigned long temp;
  232. __asm__ __volatile__(
  233. " .set mips3 \n"
  234. "1: ll %1, %2 # atomic_sub_if_positive\n"
  235. " subu %0, %1, %3 \n"
  236. " bltz %0, 1f \n"
  237. " sc %0, %2 \n"
  238. " beqz %0, 1b \n"
  239. " sync \n"
  240. "1: \n"
  241. " .set mips0 \n"
  242. : "=&r" (result), "=&r" (temp), "=m" (v->counter)
  243. : "Ir" (i), "m" (v->counter)
  244. : "memory");
  245. } else {
  246. unsigned long flags;
  247. local_irq_save(flags);
  248. result = v->counter;
  249. result -= i;
  250. if (result >= 0)
  251. v->counter = result;
  252. local_irq_restore(flags);
  253. }
  254. return result;
  255. }
  256. #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
  257. #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
  258. /**
  259. * atomic_add_unless - add unless the number is a given value
  260. * @v: pointer of type atomic_t
  261. * @a: the amount to add to v...
  262. * @u: ...unless v is equal to u.
  263. *
  264. * Atomically adds @a to @v, so long as it was not @u.
  265. * Returns non-zero if @v was not @u, and zero otherwise.
  266. */
  267. #define atomic_add_unless(v, a, u) \
  268. ({ \
  269. int c, old; \
  270. c = atomic_read(v); \
  271. while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
  272. c = old; \
  273. c != (u); \
  274. })
  275. #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
  276. #define atomic_dec_return(v) atomic_sub_return(1,(v))
  277. #define atomic_inc_return(v) atomic_add_return(1,(v))
  278. /*
  279. * atomic_sub_and_test - subtract value from variable and test result
  280. * @i: integer value to subtract
  281. * @v: pointer of type atomic_t
  282. *
  283. * Atomically subtracts @i from @v and returns
  284. * true if the result is zero, or false for all
  285. * other cases.
  286. */
  287. #define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
  288. /*
  289. * atomic_inc_and_test - increment and test
  290. * @v: pointer of type atomic_t
  291. *
  292. * Atomically increments @v by 1
  293. * and returns true if the result is zero, or false for all
  294. * other cases.
  295. */
  296. #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
  297. /*
  298. * atomic_dec_and_test - decrement by 1 and test
  299. * @v: pointer of type atomic_t
  300. *
  301. * Atomically decrements @v by 1 and
  302. * returns true if the result is 0, or false for all other
  303. * cases.
  304. */
  305. #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
  306. /*
  307. * atomic_dec_if_positive - decrement by 1 if old value positive
  308. * @v: pointer of type atomic_t
  309. */
  310. #define atomic_dec_if_positive(v) atomic_sub_if_positive(1, v)
  311. /*
  312. * atomic_inc - increment atomic variable
  313. * @v: pointer of type atomic_t
  314. *
  315. * Atomically increments @v by 1.
  316. */
  317. #define atomic_inc(v) atomic_add(1,(v))
  318. /*
  319. * atomic_dec - decrement and test
  320. * @v: pointer of type atomic_t
  321. *
  322. * Atomically decrements @v by 1.
  323. */
  324. #define atomic_dec(v) atomic_sub(1,(v))
  325. /*
  326. * atomic_add_negative - add and test if negative
  327. * @v: pointer of type atomic_t
  328. * @i: integer value to add
  329. *
  330. * Atomically adds @i to @v and returns true
  331. * if the result is negative, or false when
  332. * result is greater than or equal to zero.
  333. */
  334. #define atomic_add_negative(i,v) (atomic_add_return(i, (v)) < 0)
  335. #ifdef CONFIG_64BIT
  336. typedef struct { volatile __s64 counter; } atomic64_t;
  337. #define ATOMIC64_INIT(i) { (i) }
  338. /*
  339. * atomic64_read - read atomic variable
  340. * @v: pointer of type atomic64_t
  341. *
  342. */
  343. #define atomic64_read(v) ((v)->counter)
  344. /*
  345. * atomic64_set - set atomic variable
  346. * @v: pointer of type atomic64_t
  347. * @i: required value
  348. */
  349. #define atomic64_set(v,i) ((v)->counter = (i))
  350. /*
  351. * atomic64_add - add integer to atomic variable
  352. * @i: integer value to add
  353. * @v: pointer of type atomic64_t
  354. *
  355. * Atomically adds @i to @v.
  356. */
  357. static __inline__ void atomic64_add(long i, atomic64_t * v)
  358. {
  359. if (cpu_has_llsc && R10000_LLSC_WAR) {
  360. unsigned long temp;
  361. __asm__ __volatile__(
  362. " .set mips3 \n"
  363. "1: lld %0, %1 # atomic64_add \n"
  364. " addu %0, %2 \n"
  365. " scd %0, %1 \n"
  366. " beqzl %0, 1b \n"
  367. " .set mips0 \n"
  368. : "=&r" (temp), "=m" (v->counter)
  369. : "Ir" (i), "m" (v->counter));
  370. } else if (cpu_has_llsc) {
  371. unsigned long temp;
  372. __asm__ __volatile__(
  373. " .set mips3 \n"
  374. "1: lld %0, %1 # atomic64_add \n"
  375. " addu %0, %2 \n"
  376. " scd %0, %1 \n"
  377. " beqz %0, 1b \n"
  378. " .set mips0 \n"
  379. : "=&r" (temp), "=m" (v->counter)
  380. : "Ir" (i), "m" (v->counter));
  381. } else {
  382. unsigned long flags;
  383. local_irq_save(flags);
  384. v->counter += i;
  385. local_irq_restore(flags);
  386. }
  387. }
  388. /*
  389. * atomic64_sub - subtract the atomic variable
  390. * @i: integer value to subtract
  391. * @v: pointer of type atomic64_t
  392. *
  393. * Atomically subtracts @i from @v.
  394. */
  395. static __inline__ void atomic64_sub(long i, atomic64_t * v)
  396. {
  397. if (cpu_has_llsc && R10000_LLSC_WAR) {
  398. unsigned long temp;
  399. __asm__ __volatile__(
  400. " .set mips3 \n"
  401. "1: lld %0, %1 # atomic64_sub \n"
  402. " subu %0, %2 \n"
  403. " scd %0, %1 \n"
  404. " beqzl %0, 1b \n"
  405. " .set mips0 \n"
  406. : "=&r" (temp), "=m" (v->counter)
  407. : "Ir" (i), "m" (v->counter));
  408. } else if (cpu_has_llsc) {
  409. unsigned long temp;
  410. __asm__ __volatile__(
  411. " .set mips3 \n"
  412. "1: lld %0, %1 # atomic64_sub \n"
  413. " subu %0, %2 \n"
  414. " scd %0, %1 \n"
  415. " beqz %0, 1b \n"
  416. " .set mips0 \n"
  417. : "=&r" (temp), "=m" (v->counter)
  418. : "Ir" (i), "m" (v->counter));
  419. } else {
  420. unsigned long flags;
  421. local_irq_save(flags);
  422. v->counter -= i;
  423. local_irq_restore(flags);
  424. }
  425. }
  426. /*
  427. * Same as above, but return the result value
  428. */
  429. static __inline__ long atomic64_add_return(long i, atomic64_t * v)
  430. {
  431. unsigned long result;
  432. if (cpu_has_llsc && R10000_LLSC_WAR) {
  433. unsigned long temp;
  434. __asm__ __volatile__(
  435. " .set mips3 \n"
  436. "1: lld %1, %2 # atomic64_add_return \n"
  437. " addu %0, %1, %3 \n"
  438. " scd %0, %2 \n"
  439. " beqzl %0, 1b \n"
  440. " addu %0, %1, %3 \n"
  441. " sync \n"
  442. " .set mips0 \n"
  443. : "=&r" (result), "=&r" (temp), "=m" (v->counter)
  444. : "Ir" (i), "m" (v->counter)
  445. : "memory");
  446. } else if (cpu_has_llsc) {
  447. unsigned long temp;
  448. __asm__ __volatile__(
  449. " .set mips3 \n"
  450. "1: lld %1, %2 # atomic64_add_return \n"
  451. " addu %0, %1, %3 \n"
  452. " scd %0, %2 \n"
  453. " beqz %0, 1b \n"
  454. " addu %0, %1, %3 \n"
  455. " sync \n"
  456. " .set mips0 \n"
  457. : "=&r" (result), "=&r" (temp), "=m" (v->counter)
  458. : "Ir" (i), "m" (v->counter)
  459. : "memory");
  460. } else {
  461. unsigned long flags;
  462. local_irq_save(flags);
  463. result = v->counter;
  464. result += i;
  465. v->counter = result;
  466. local_irq_restore(flags);
  467. }
  468. return result;
  469. }
  470. static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
  471. {
  472. unsigned long result;
  473. if (cpu_has_llsc && R10000_LLSC_WAR) {
  474. unsigned long temp;
  475. __asm__ __volatile__(
  476. " .set mips3 \n"
  477. "1: lld %1, %2 # atomic64_sub_return \n"
  478. " subu %0, %1, %3 \n"
  479. " scd %0, %2 \n"
  480. " beqzl %0, 1b \n"
  481. " subu %0, %1, %3 \n"
  482. " sync \n"
  483. " .set mips0 \n"
  484. : "=&r" (result), "=&r" (temp), "=m" (v->counter)
  485. : "Ir" (i), "m" (v->counter)
  486. : "memory");
  487. } else if (cpu_has_llsc) {
  488. unsigned long temp;
  489. __asm__ __volatile__(
  490. " .set mips3 \n"
  491. "1: lld %1, %2 # atomic64_sub_return \n"
  492. " subu %0, %1, %3 \n"
  493. " scd %0, %2 \n"
  494. " beqz %0, 1b \n"
  495. " subu %0, %1, %3 \n"
  496. " sync \n"
  497. " .set mips0 \n"
  498. : "=&r" (result), "=&r" (temp), "=m" (v->counter)
  499. : "Ir" (i), "m" (v->counter)
  500. : "memory");
  501. } else {
  502. unsigned long flags;
  503. local_irq_save(flags);
  504. result = v->counter;
  505. result -= i;
  506. v->counter = result;
  507. local_irq_restore(flags);
  508. }
  509. return result;
  510. }
  511. /*
  512. * atomic64_sub_if_positive - conditionally subtract integer from atomic variable
  513. * @i: integer value to subtract
  514. * @v: pointer of type atomic64_t
  515. *
  516. * Atomically test @v and subtract @i if @v is greater or equal than @i.
  517. * The function returns the old value of @v minus @i.
  518. */
  519. static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
  520. {
  521. unsigned long result;
  522. if (cpu_has_llsc && R10000_LLSC_WAR) {
  523. unsigned long temp;
  524. __asm__ __volatile__(
  525. " .set mips3 \n"
  526. "1: lld %1, %2 # atomic64_sub_if_positive\n"
  527. " dsubu %0, %1, %3 \n"
  528. " bltz %0, 1f \n"
  529. " scd %0, %2 \n"
  530. " beqzl %0, 1b \n"
  531. " sync \n"
  532. "1: \n"
  533. " .set mips0 \n"
  534. : "=&r" (result), "=&r" (temp), "=m" (v->counter)
  535. : "Ir" (i), "m" (v->counter)
  536. : "memory");
  537. } else if (cpu_has_llsc) {
  538. unsigned long temp;
  539. __asm__ __volatile__(
  540. " .set mips3 \n"
  541. "1: lld %1, %2 # atomic64_sub_if_positive\n"
  542. " dsubu %0, %1, %3 \n"
  543. " bltz %0, 1f \n"
  544. " scd %0, %2 \n"
  545. " beqz %0, 1b \n"
  546. " sync \n"
  547. "1: \n"
  548. " .set mips0 \n"
  549. : "=&r" (result), "=&r" (temp), "=m" (v->counter)
  550. : "Ir" (i), "m" (v->counter)
  551. : "memory");
  552. } else {
  553. unsigned long flags;
  554. local_irq_save(flags);
  555. result = v->counter;
  556. result -= i;
  557. if (result >= 0)
  558. v->counter = result;
  559. local_irq_restore(flags);
  560. }
  561. return result;
  562. }
  563. #define atomic64_dec_return(v) atomic64_sub_return(1,(v))
  564. #define atomic64_inc_return(v) atomic64_add_return(1,(v))
  565. /*
  566. * atomic64_sub_and_test - subtract value from variable and test result
  567. * @i: integer value to subtract
  568. * @v: pointer of type atomic64_t
  569. *
  570. * Atomically subtracts @i from @v and returns
  571. * true if the result is zero, or false for all
  572. * other cases.
  573. */
  574. #define atomic64_sub_and_test(i,v) (atomic64_sub_return((i), (v)) == 0)
  575. /*
  576. * atomic64_inc_and_test - increment and test
  577. * @v: pointer of type atomic64_t
  578. *
  579. * Atomically increments @v by 1
  580. * and returns true if the result is zero, or false for all
  581. * other cases.
  582. */
  583. #define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
  584. /*
  585. * atomic64_dec_and_test - decrement by 1 and test
  586. * @v: pointer of type atomic64_t
  587. *
  588. * Atomically decrements @v by 1 and
  589. * returns true if the result is 0, or false for all other
  590. * cases.
  591. */
  592. #define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0)
  593. /*
  594. * atomic64_dec_if_positive - decrement by 1 if old value positive
  595. * @v: pointer of type atomic64_t
  596. */
  597. #define atomic64_dec_if_positive(v) atomic64_sub_if_positive(1, v)
  598. /*
  599. * atomic64_inc - increment atomic variable
  600. * @v: pointer of type atomic64_t
  601. *
  602. * Atomically increments @v by 1.
  603. */
  604. #define atomic64_inc(v) atomic64_add(1,(v))
  605. /*
  606. * atomic64_dec - decrement and test
  607. * @v: pointer of type atomic64_t
  608. *
  609. * Atomically decrements @v by 1.
  610. */
  611. #define atomic64_dec(v) atomic64_sub(1,(v))
  612. /*
  613. * atomic64_add_negative - add and test if negative
  614. * @v: pointer of type atomic64_t
  615. * @i: integer value to add
  616. *
  617. * Atomically adds @i to @v and returns true
  618. * if the result is negative, or false when
  619. * result is greater than or equal to zero.
  620. */
  621. #define atomic64_add_negative(i,v) (atomic64_add_return(i, (v)) < 0)
  622. #endif /* CONFIG_64BIT */
  623. /*
  624. * atomic*_return operations are serializing but not the non-*_return
  625. * versions.
  626. */
  627. #define smp_mb__before_atomic_dec() smp_mb()
  628. #define smp_mb__after_atomic_dec() smp_mb()
  629. #define smp_mb__before_atomic_inc() smp_mb()
  630. #define smp_mb__after_atomic_inc() smp_mb()
  631. #include <asm-generic/atomic.h>
  632. #endif /* _ASM_ATOMIC_H */